Merge pull request #754 from ucb-bar/sodor-testchipip-bump
Bump sodor and testchipip
This commit is contained in:
@@ -141,7 +141,7 @@ class WithNPerfCounters(n: Int = 29) extends Config((site, here, up) => {
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class WithRocketICacheScratchpad extends Config((site, here, up) => {
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class WithRocketICacheScratchpad extends Config((site, here, up) => {
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case RocketTilesKey => up(RocketTilesKey, site) map { r =>
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case RocketTilesKey => up(RocketTilesKey, site) map { r =>
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r.copy(icache = r.icache.map(_.copy(itimAddr = Some(0x100000 + r.hartId * 0x10000))))
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r.copy(icache = r.icache.map(_.copy(itimAddr = Some(0x300000 + r.hartId * 0x10000))))
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}
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}
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})
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})
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@@ -7,6 +7,7 @@ import freechips.rocketchip.config.{Config}
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class Sodor1StageConfig extends Config(
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class Sodor1StageConfig extends Config(
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// Create a Sodor 1-stage core
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// Create a Sodor 1-stage core
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new sodor.common.WithNSodorCores(1, internalTile = sodor.common.Stage1Factory) ++
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new sodor.common.WithNSodorCores(1, internalTile = sodor.common.Stage1Factory) ++
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new testchipip.WithSerialTLWidth(32) ++
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new testchipip.WithSerialPBusMem ++
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new testchipip.WithSerialPBusMem ++
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new freechips.rocketchip.subsystem.WithScratchpadsOnly ++ // use sodor tile-internal scratchpad
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new freechips.rocketchip.subsystem.WithScratchpadsOnly ++ // use sodor tile-internal scratchpad
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new freechips.rocketchip.subsystem.WithNoMemPort ++ // use no external memory
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new freechips.rocketchip.subsystem.WithNoMemPort ++ // use no external memory
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@@ -16,6 +17,7 @@ class Sodor1StageConfig extends Config(
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class Sodor2StageConfig extends Config(
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class Sodor2StageConfig extends Config(
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// Create a Sodor 2-stage core
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// Create a Sodor 2-stage core
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new sodor.common.WithNSodorCores(1, internalTile = sodor.common.Stage2Factory) ++
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new sodor.common.WithNSodorCores(1, internalTile = sodor.common.Stage2Factory) ++
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new testchipip.WithSerialTLWidth(32) ++
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new testchipip.WithSerialPBusMem ++
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new testchipip.WithSerialPBusMem ++
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new freechips.rocketchip.subsystem.WithScratchpadsOnly ++ // use sodor tile-internal scratchpad
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new freechips.rocketchip.subsystem.WithScratchpadsOnly ++ // use sodor tile-internal scratchpad
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new freechips.rocketchip.subsystem.WithNoMemPort ++ // use no external memory
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new freechips.rocketchip.subsystem.WithNoMemPort ++ // use no external memory
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@@ -25,6 +27,7 @@ class Sodor2StageConfig extends Config(
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class Sodor3StageConfig extends Config(
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class Sodor3StageConfig extends Config(
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// Create a Sodor 1-stage core with two ports
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// Create a Sodor 1-stage core with two ports
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new sodor.common.WithNSodorCores(1, internalTile = sodor.common.Stage3Factory(ports = 2)) ++
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new sodor.common.WithNSodorCores(1, internalTile = sodor.common.Stage3Factory(ports = 2)) ++
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new testchipip.WithSerialTLWidth(32) ++
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new testchipip.WithSerialPBusMem ++
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new testchipip.WithSerialPBusMem ++
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new freechips.rocketchip.subsystem.WithScratchpadsOnly ++ // use sodor tile-internal scratchpad
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new freechips.rocketchip.subsystem.WithScratchpadsOnly ++ // use sodor tile-internal scratchpad
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new freechips.rocketchip.subsystem.WithNoMemPort ++ // use no external memory
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new freechips.rocketchip.subsystem.WithNoMemPort ++ // use no external memory
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@@ -34,6 +37,7 @@ class Sodor3StageConfig extends Config(
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class Sodor3StageSinglePortConfig extends Config(
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class Sodor3StageSinglePortConfig extends Config(
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// Create a Sodor 3-stage core with one ports (instruction and data memory access controlled by arbiter)
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// Create a Sodor 3-stage core with one ports (instruction and data memory access controlled by arbiter)
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new sodor.common.WithNSodorCores(1, internalTile = sodor.common.Stage3Factory(ports = 1)) ++
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new sodor.common.WithNSodorCores(1, internalTile = sodor.common.Stage3Factory(ports = 1)) ++
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new testchipip.WithSerialTLWidth(32) ++
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new testchipip.WithSerialPBusMem ++
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new testchipip.WithSerialPBusMem ++
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new freechips.rocketchip.subsystem.WithScratchpadsOnly ++ // use sodor tile-internal scratchpad
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new freechips.rocketchip.subsystem.WithScratchpadsOnly ++ // use sodor tile-internal scratchpad
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new freechips.rocketchip.subsystem.WithNoMemPort ++ // use no external memory
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new freechips.rocketchip.subsystem.WithNoMemPort ++ // use no external memory
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@@ -43,6 +47,7 @@ class Sodor3StageSinglePortConfig extends Config(
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class Sodor5StageConfig extends Config(
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class Sodor5StageConfig extends Config(
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// Create a Sodor 5-stage core
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// Create a Sodor 5-stage core
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new sodor.common.WithNSodorCores(1, internalTile = sodor.common.Stage5Factory) ++
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new sodor.common.WithNSodorCores(1, internalTile = sodor.common.Stage5Factory) ++
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new testchipip.WithSerialTLWidth(32) ++
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new testchipip.WithSerialPBusMem ++
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new testchipip.WithSerialPBusMem ++
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new freechips.rocketchip.subsystem.WithScratchpadsOnly ++ // use sodor tile-internal scratchpad
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new freechips.rocketchip.subsystem.WithScratchpadsOnly ++ // use sodor tile-internal scratchpad
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new freechips.rocketchip.subsystem.WithNoMemPort ++ // use no external memory
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new freechips.rocketchip.subsystem.WithNoMemPort ++ // use no external memory
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@@ -52,6 +57,7 @@ class Sodor5StageConfig extends Config(
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class SodorUCodeConfig extends Config(
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class SodorUCodeConfig extends Config(
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// Construct a Sodor microcode-based single-bus core
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// Construct a Sodor microcode-based single-bus core
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new sodor.common.WithNSodorCores(1, internalTile = sodor.common.UCodeFactory) ++
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new sodor.common.WithNSodorCores(1, internalTile = sodor.common.UCodeFactory) ++
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new testchipip.WithSerialTLWidth(32) ++
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new testchipip.WithSerialPBusMem ++
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new testchipip.WithSerialPBusMem ++
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new freechips.rocketchip.subsystem.WithScratchpadsOnly ++ // use sodor tile-internal scratchpad
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new freechips.rocketchip.subsystem.WithScratchpadsOnly ++ // use sodor tile-internal scratchpad
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new freechips.rocketchip.subsystem.WithNoMemPort ++ // use no external memory
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new freechips.rocketchip.subsystem.WithNoMemPort ++ // use no external memory
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Submodule generators/riscv-sodor updated: 8fc516409f...449354c27b
Submodule generators/testchipip updated: 39ed56be3e...6572beb03b
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