Enable precommit | Format files

This commit is contained in:
abejgonzalez
2023-08-28 14:56:55 -07:00
parent 7440f561d0
commit c7f1fe220d
28 changed files with 38 additions and 49 deletions

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@@ -36,4 +36,3 @@ The target config should also match the architectural configuration of however s
cd sims/vcs
make CONFIG=dmiRocketConfig run-binary LOADARCH=../../hello.riscv.0x80000000.1000.loadarch

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@@ -21,4 +21,3 @@ Take the following example:
:end-before: DOC include end: HarnessClockInstantiatorEx
Here you can see the ``th.harnessClockInstantiator`` is used to request a clock and reset at ``memFreq`` frequency.

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@@ -112,4 +112,3 @@ For instance, if we wanted to add the previously defined accelerator and route c
new RocketConfig)
To add RoCC instructions in your program, use the RoCC C macros provided in ``tests/rocc.h``. You can find examples in the files ``tests/accum.c`` and ``charcount.c``.

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@@ -91,4 +91,3 @@ class SimplePllConfiguration(
}
def referenceSinkParams(): ClockSinkParameters = sinkDividerMap.find(_._2 == 1).get._1
}

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@@ -45,4 +45,3 @@ class TileClockGater(address: BigInt, beatBytes: Int)(implicit p: Parameters, va
}): _*)
}
}

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@@ -67,4 +67,3 @@ class dmiMediumBoomCosimConfig extends Config(
new chipyard.config.WithDMIDTM ++ // have debug module expose a clocked DMI port
new boom.common.WithNMediumBooms(1) ++
new chipyard.config.AbstractConfig)

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@@ -92,4 +92,3 @@ class UARTTSIRocketConfig extends Config(
new chipyard.config.WithPeripheryBusFrequency(10) ++
new freechips.rocketchip.subsystem.WithNBigCores(1) ++ // single rocket-core
new chipyard.config.AbstractConfig)

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@@ -38,4 +38,3 @@ class ChipyardOptions private[stage] (
if (!topPackage.isEmpty && !configClass.isEmpty) Some(s"${topPackage.get}.${configClass.get}") else None
}
}

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@@ -210,6 +210,7 @@ cat <<EOT >> env.sh
# line auto-generated by $0
conda activate $CYDIR/.conda-env
source $CYDIR/scripts/fix-open-files.sh
pre-commit install
EOT
echo "Setup complete!"

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@@ -138,4 +138,3 @@ rm -rf mem.0x80000000.bin
riscv64-unknown-elf-ld -Tdata=0x80000000 -nmagic --defsym tohost=0x$TOHOST --defsym fromhost=0x$FROMHOST -o $LOADMEM_ELF $RAWMEM_ELF
rm -rf $RAWMEM_ELF

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@@ -27,4 +27,3 @@ done
target_args="$target_args +permissive-off"
INPUT_ARGS="$regular_args $target_args"

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@@ -62,4 +62,3 @@ PREPROC_DEFINES = \
-define RANDOMIZE_REG_INIT \
-define RANDOMIZE_GARBAGE_ASSIGN \
-define RANDOMIZE_INVALID_ASSIGN

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@@ -20,4 +20,3 @@ for bmark in "${bmarks[@]}"
do
cp bd/src/$bmark/$bmark $BUILDDIR/
done