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Merge pull request #1726 from ucb-bar/submod-rename

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Rename blocks/cache submodules to match new chipsalliance ownership
This commit is contained in:
Jerry Zhao
2024-01-08 16:32:35 -08:00
committed by GitHub
parent a425c4f34d 9f45c49f04
commit c9fa23edf0
15 changed files with 38 additions and 38 deletions
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2
scripts/tutorial-patches/build.sbt.patch
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@@ -5,7 +5,7 @@ index c3be6161..2a6d7160 100644
@@ -147,7 +147,7 @@ lazy val testchipip = (project in file("generators/testchipip"))
lazy val chipyard = (project in file("generators/chipyard"))
.dependsOn(testchipip, rocketchip, boom, hwacha, sifive_blocks, sifive_cache, iocell,
.dependsOn(testchipip, rocketchip, boom, hwacha, rocketchip_blocks, rocketchip_inclusive_cache, iocell,
- sha3, // On separate line to allow for cleaner tutorial-setup patches
+ //sha3, // On separate line to allow for cleaner tutorial-setup patches
dsptools, rocket_dsp_utils,