Merge branch 'dev' into local-fpga-support

2020-12-27 20:57:57 -08:00
parent f1fdab5bd3 6b0d57d606
commit ca723f1323
60 changed files with 533 additions and 367 deletions
--- a/docs/Chipyard-Basics/Chipyard-Components.rst
+++ b/docs/Chipyard-Basics/Chipyard-Components.rst
@@ -20,9 +20,9 @@ Processor Cores
  An out-of-order RISC-V core.
  See :ref:`Berkeley Out-of-Order Machine (BOOM)` for more information.

-**Ariane Core**
-  An in-order RISC-V core written in System Verilog.
-  See :ref:`Ariane Core` for more information.
+**CVA6 Core**
+  An in-order RISC-V core written in System Verilog. Previously called Ariane.
+  See :ref:`CVA6 Core` for more information.

 Accelerators
 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^