From cbce5ffa5610419e50b48347da83ba28cc9302e6 Mon Sep 17 00:00:00 2001 From: "-T.K.-" Date: Tue, 20 Jun 2023 15:20:19 -0700 Subject: [PATCH] FIX: fix SPI Flash base address Change to match the standardized memory map suggested [here](https://docs.google.com/presentation/d/18qrFsHImYO4OJEpl8oQ_g3m2dc6a2Q0LppnVxTX-19I/edit#slide=id.g1c27f282ad8_0_54) --- .../src/main/scala/config/fragments/PeripheralFragments.scala | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/generators/chipyard/src/main/scala/config/fragments/PeripheralFragments.scala b/generators/chipyard/src/main/scala/config/fragments/PeripheralFragments.scala index 9bd2ceb2..5f6f8571 100644 --- a/generators/chipyard/src/main/scala/config/fragments/PeripheralFragments.scala +++ b/generators/chipyard/src/main/scala/config/fragments/PeripheralFragments.scala @@ -85,7 +85,7 @@ class WithUARTInitBaudRate(baudrate: BigInt = 115200) extends Config ((site, her * @param fAddress the address of the Execute-in-Place (XIP) region of the SPI flash memory * @param size the size of the Execute-in-Place (XIP) region of the SPI flash memory */ -class WithSPIFlash(size: BigInt = 0x10000000, address: BigInt = 0x10040000, fAddress: BigInt = 0x20000000) extends Config((site, here, up) => { +class WithSPIFlash(size: BigInt = 0x10000000, address: BigInt = 0x10030000, fAddress: BigInt = 0x20000000) extends Config((site, here, up) => { // Note: the default size matches freedom with the addresses below case PeripherySPIFlashKey => up(PeripherySPIFlashKey) ++ Seq( SPIFlashParams(rAddress = address, fAddress = fAddress, fSize = size))