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Fix verilator clean

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This commit is contained in:
Jerry Zhao
2019-05-07 23:05:13 -07:00
parent 2f2243df40
commit cf9ef97676
3 changed files with 5 additions and 4 deletions
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2
sims/verisim/Makefile
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@@ -90,4 +90,4 @@ $(output_dir)/%.vpd: $(output_dir)/% $(sim_debug)
#########################################################################################
.PHONY: clean
clean:
rm -rf $(build_dir) $(sim_prefix)-*
rm -rf $(gen_dir)/* $(sim_prefix)-*

2
sims/vsim/Makefile
View File

@@ -94,4 +94,4 @@ $(output_dir)/%.vpd: $(output_dir)/% $(sim_debug)
#########################################################################################
.PHONY: clean
clean:
rm -rf $(sim_dir)/generated-src/* csrc $(sim_prefix)-* ucli.key vc_hdrs.h
rm -rf $(gen_dir)/* csrc $(sim_prefix)-* ucli.key vc_hdrs.h

3
variables.mk
View File

@@ -138,7 +138,8 @@ output_dir=$(sim_dir)/output
#########################################################################################
# build output directory for compilation
#########################################################################################
build_dir=$(sim_dir)/generated-src/$(long_name)
gen_dir=$(sim_dir)/generated-src
build_dir=$(gen_dir)/$(long_name)
#########################################################################################
# vsrcs needed to run projects