From d06abdb419ad5969e0a6953583cc920c4eb405aa Mon Sep 17 00:00:00 2001 From: Tingyuan LIANG Date: Thu, 12 Aug 2021 23:22:41 +0800 Subject: [PATCH] Swap two arguments to resolve bug **Related issue**: N/A **Type of change**: bug fix **Impact**: other **Release Notes** The string of path for "-ip-vivado-tcls" could be empty ("") For example, run "make SUB_PROJECT=arty bitstream" will get errors due the argument parsing in [prologue.tcl](https://github.com/sifive/fpga-shells/blob/d4b3878e4f5cf5c4621dbfe9b0bda1ed0dd3b995/xilinx/common/tcl/prologue.tcl) Swaping the two arguments can resolve bug. --- fpga/Makefile | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/fpga/Makefile b/fpga/Makefile index 8b2ed28b..b53e4fdf 100644 --- a/fpga/Makefile +++ b/fpga/Makefile @@ -118,8 +118,8 @@ $(BIT_FILE): $(synth_list_f) -tclargs \ -top-module "$(MODEL)" \ -F "$(synth_list_f)" \ - -ip-vivado-tcls "$(shell find '$(build_dir)' -name '*.vivado.tcl')" \ - -board "$(BOARD)" + -board "$(BOARD)" \ + -ip-vivado-tcls "$(shell find '$(build_dir)' -name '*.vivado.tcl')" .PHONY: bitstream bitstream: $(BIT_FILE)