Merge remote-tracking branch 'upstream/main' into graphics
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@@ -25,7 +25,7 @@ sim_prefix = simv
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sim = $(sim_dir)/$(sim_prefix)-$(MODEL_PACKAGE)-$(CONFIG)
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sim_debug = $(sim_dir)/$(sim_prefix)-$(MODEL_PACKAGE)-$(CONFIG)-debug
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include $(base_dir)/vcs.mk
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include $(sim_dir)/vcs.mk
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.PHONY: default debug
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default: $(sim)
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@@ -56,7 +56,7 @@ include $(base_dir)/common.mk
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#########################################################################################
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VCS = vcs -full64
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VCS_OPTS = $(VCS_CC_OPTS) $(VCS_NONCC_OPTS) $(PREPROC_DEFINES)
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VCS_OPTS = $(VCS_CC_OPTS) $(VCS_NONCC_OPTS) $(SIM_PREPROC_DEFINES) $(VCS_PREPROC_DEFINES)
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#########################################################################################
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# vcs build paths
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@@ -93,7 +93,7 @@ $(output_dir)/%.fsdb: $(output_dir)/% $(sim_debug)
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#########################################################################################
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.PHONY: clean clean-sim clean-sim-debug
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clean:
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rm -rf $(gen_dir) $(sim_prefix)-* ucli.key
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rm -rf $(CLASSPATH_CACHE) $(gen_dir) $(sim_prefix)-* ucli.key
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clean-sim:
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rm -rf $(model_dir) $(build_dir)/vc_hdrs.h $(sim) $(sim).daidir ucli.key
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61
sims/vcs/vcs.mk
Normal file
61
sims/vcs/vcs.mk
Normal file
@@ -0,0 +1,61 @@
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HELP_COMPILATION_VARIABLES += \
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" USE_VPD = set to '1' to build VCS simulator to emit VPD instead of FSDB."
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HELP_SIMULATION_VARIABLES += \
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" USE_VPD = set to '1' to run VCS simulator emitting VPD instead of FSDB."
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ifndef USE_VPD
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get_waveform_flag=+fsdbfile=$(1).fsdb
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else
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get_waveform_flag=+vcdplusfile=$(1).vpd
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endif
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# If ntb_random_seed unspecified, vcs uses 1 as constant seed.
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# Set ntb_random_seed_automatic to actually get a random seed
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ifdef RANDOM_SEED
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SEED_FLAG=+ntb_random_seed=$(RANDOM_SEED)
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else
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SEED_FLAG=+ntb_random_seed_automatic
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endif
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CLOCK_PERIOD ?= 1.0
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RESET_DELAY ?= 777.7
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#----------------------------------------------------------------------------------------
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# gcc configuration/optimization
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#----------------------------------------------------------------------------------------
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include $(base_dir)/sims/common-sim-flags.mk
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VCS_CXXFLAGS = $(SIM_CXXFLAGS)
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VCS_LDFLAGS = $(SIM_LDFLAGS)
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# vcs requires LDFLAGS to not include library names (i.e. -l needs to be separate)
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VCS_CC_OPTS = \
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-CFLAGS "$(VCS_CXXFLAGS)" \
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-LDFLAGS "$(filter-out -l%,$(VCS_LDFLAGS))" \
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$(filter -l%,$(VCS_LDFLAGS))
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VCS_NONCC_OPTS = \
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-notice \
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-line \
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+lint=all,noVCDE,noONGS,noUI \
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-error=PCWM-L \
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-error=noZMMCM \
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-timescale=1ns/10ps \
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-quiet \
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-q \
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+rad \
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+vcs+lic+wait \
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+vc+list \
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-f $(sim_common_files) \
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-sverilog +systemverilogext+.sv+.svi+.svh+.svt -assert svaext +libext+.sv \
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+v2k +verilog2001ext+.v95+.vt+.vp +libext+.v \
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-debug_pp \
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+incdir+$(GEN_COLLATERAL_DIR)
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VCS_PREPROC_DEFINES = \
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+define+VCS
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ifndef USE_VPD
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VCS_PREPROC_DEFINES += +define+FSDB
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endif
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