added note about generated-src being different for commercial/openroad flows
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@@ -1,7 +1,7 @@
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.. _sky130-commercial-tutorial:
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Sky130 Tutorial
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===============
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Sky130 Commercial Tutorial
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==========================
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The ``vlsi`` folder of this repository contains an example Hammer flow with the TinyRocketConfig from Chipyard. This example tutorial uses the built-in Sky130 technology plugin and requires access to the included Cadence and Mentor tool plugin submodules. Cadence is necessary for synthesis & place-and-route, while Mentor is needed for DRC & LVS.
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Project Structure
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@@ -121,6 +121,15 @@ The command ``make buildfile`` generates a set of Make targets in ``build/hammer
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It needs to be re-run if environment variables are changed.
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It is recommended that you edit these variables directly in the Makefile rather than exporting them to your shell environment.
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The ``buildfile`` make target has dependencies on both (1) the Verilog that is elaborated from all Chisel sources
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and (2) the mapping of memory instances in the design to SRAM macros;
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all files related to these two steps reside in the ``generated-src/chipyard.TestHarness.TinyRocketConfig-ChipTop`` directory.
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Note that the files in ``generated-src`` vary for each tool/technology flow.
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This especially applies to the Sky130 Commercial vs OpenROAD tutorial flows
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(due to the ``ENABLE_YOSYS_FLOW`` flag present for the OpenROAD flow), so these flows should be run in separate
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chipyard installations. If the wrong sources are generated, simply run ``make buildfile -B`` to rebuild all targets correctly.
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For the purpose of brevity, in this tutorial we will set the Make variable ``tutorial=sky130-commercial``,
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which will cause additional variables to be set in ``tutorial.mk``, a few of which are summarized as follows:
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@@ -148,6 +148,15 @@ The command ``make buildfile`` generates a set of Make targets in ``build/hammer
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It needs to be re-run if environment variables are changed.
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It is recommended that you edit these variables directly in the Makefile rather than exporting them to your shell environment.
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The ``buildfile`` make target has dependencies on both (1) the Verilog that is elaborated from all Chisel sources
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and (2) the mapping of memory instances in the design to SRAM macros;
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all files related to these two steps reside in the ``generated-src/chipyard.TestHarness.TinyRocketConfig-ChipTop`` directory.
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Note that the files in ``generated-src`` vary for each tool/technology flow.
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This especially applies to the Sky130 Commercial vs OpenROAD tutorial flows
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(due to the ``ENABLE_YOSYS_FLOW`` flag, explained below), so these flows should be run in separate
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chipyard installations. If the wrong sources are generated, simply run ``make buildfile -B`` to rebuild all targets correctly.
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For the sake of brevity, in this tutorial we will set the Make variable ``tutorial=sky130-openroad``,
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which will cause additional variables to be set in ``tutorial.mk``, a few of which are summarized as follows:
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