Fix a number of build.sbt related problems

This commit is contained in:
David Biancolin
2019-05-29 22:26:04 +00:00
parent 0cb1608e2c
commit f4fb0c42b1
5 changed files with 32 additions and 19 deletions

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@@ -50,15 +50,8 @@ def isolateAllTests(tests: Seq[TestDefinition]) = tests map { test =>
new Group(test.name, Seq(test), SubProcess(options)) new Group(test.name, Seq(test), SubProcess(options))
} toSeq } toSeq
// Subproject definitions begin // Subproject definitions begin
// Biancolin: get to the bottom of these
//lazy val rebarFirrtl = (project in file("tools/firrtl"))
// .settings(commonSettings)
// Overlaps with the dependency-injected version
// lazy val rocketchip = RootProject(rocketChipDir)
// NB: FIRRTL dependency is unmanaged (and dropped in sim/lib) // NB: FIRRTL dependency is unmanaged (and dropped in sim/lib)
lazy val chisel = (project in rocketChipDir / "chisel3") lazy val chisel = (project in rocketChipDir / "chisel3")
@@ -76,7 +69,7 @@ lazy val rocketMacros = (project in rocketChipDir / "macros")
// HACK: I'm strugging to override settings in rocket-chip's build.sbt (i want // HACK: I'm strugging to override settings in rocket-chip's build.sbt (i want
// the subproject to register a new library dependendency on midas's targetutils library) // the subproject to register a new library dependendency on midas's targetutils library)
// So instead, avoid the existing build.sbt altogether and specify the project's root at src/ // So instead, avoid the existing build.sbt altogether and specify the project's root at src/
lazy val rebarRocketchip = (project in rocketChipDir / "src") lazy val rocketchip = (project in rocketChipDir / "src")
.settings( .settings(
commonSettings, commonSettings,
scalaSource in Compile := baseDirectory.value / "main" / "scala", scalaSource in Compile := baseDirectory.value / "main" / "scala",
@@ -84,7 +77,7 @@ lazy val rebarRocketchip = (project in rocketChipDir / "src")
.dependsOn(chisel, hardfloat, rocketMacros) .dependsOn(chisel, hardfloat, rocketMacros)
lazy val testchipip = (project in file("generators/testchipip")) lazy val testchipip = (project in file("generators/testchipip"))
.dependsOn(rebarRocketchip) .dependsOn(rocketchip)
.settings(commonSettings) .settings(commonSettings)
lazy val example = conditionalDependsOn(project in file("generators/example")) lazy val example = conditionalDependsOn(project in file("generators/example"))
@@ -95,15 +88,15 @@ lazy val utilities = conditionalDependsOn(project in file("generators/utilities"
.settings(commonSettings) .settings(commonSettings)
lazy val icenet = (project in file("generators/icenet")) lazy val icenet = (project in file("generators/icenet"))
.dependsOn(rebarRocketchip, testchipip) .dependsOn(rocketchip, testchipip)
.settings(commonSettings) .settings(commonSettings)
lazy val hwacha = (project in file("generators/hwacha")) lazy val hwacha = (project in file("generators/hwacha"))
.dependsOn(rebarRocketchip) .dependsOn(rocketchip)
.settings(commonSettings) .settings(commonSettings)
lazy val boom = (project in file("generators/boom")) lazy val boom = (project in file("generators/boom"))
.dependsOn(rebarRocketchip) .dependsOn(rocketchip)
.settings(commonSettings) .settings(commonSettings)
lazy val tapeout = conditionalDependsOn(project in file("./tools/barstools/tapeout/")) lazy val tapeout = conditionalDependsOn(project in file("./tools/barstools/tapeout/"))
@@ -113,12 +106,12 @@ lazy val mdf = (project in file("./tools/barstools/mdf/scalalib/"))
.settings(commonSettings) .settings(commonSettings)
lazy val barstoolsMacros = (project in file("./tools/barstools/macros/")) lazy val barstoolsMacros = (project in file("./tools/barstools/macros/"))
.dependsOn(mdf, rebarRocketchip) .dependsOn(mdf, rocketchip)
.enablePlugins(sbtassembly.AssemblyPlugin) .enablePlugins(sbtassembly.AssemblyPlugin)
.settings(commonSettings) .settings(commonSettings)
lazy val sifive_blocks = (project in file("generators/sifive-blocks")) lazy val sifive_blocks = (project in file("generators/sifive-blocks"))
.dependsOn(rebarRocketchip) .dependsOn(rocketchip)
.settings(commonSettings) .settings(commonSettings)
// Library components of FireSim // Library components of FireSim

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@@ -62,11 +62,11 @@ $(HARNESS_FILE) $(HARNESS_ANNO) $(HARNESS_FIR) $(sim_harness_blackboxes): $(FIRR
# This file is for simulation only. VLSI flows should replace this file with one containing hard SRAMs # This file is for simulation only. VLSI flows should replace this file with one containing hard SRAMs
MACROCOMPILER_MODE ?= --mode synflops MACROCOMPILER_MODE ?= --mode synflops
$(SMEMS_FILE) $(SMEMS_FIR): $(SMEMS_CONF) $(SMEMS_FILE) $(SMEMS_FIR): $(SMEMS_CONF)
cd $(base_dir) && $(SBT) "project barstools-macros" "runMain barstools.macros.MacroCompiler -n $(SMEMS_CONF) -v $(SMEMS_FILE) -f $(SMEMS_FIR) $(MACROCOMPILER_MODE)" cd $(base_dir) && $(SBT) "project barstoolsMacros" "runMain barstools.macros.MacroCompiler -n $(SMEMS_CONF) -v $(SMEMS_FILE) -f $(SMEMS_FIR) $(MACROCOMPILER_MODE)"
HARNESS_MACROCOMPILER_MODE = --mode synflops HARNESS_MACROCOMPILER_MODE = --mode synflops
$(HARNESS_SMEMS_FILE) $(HARNESS_SMEMS_FIR): $(HARNESS_SMEMS_CONF) $(HARNESS_SMEMS_FILE) $(HARNESS_SMEMS_FIR): $(HARNESS_SMEMS_CONF)
cd $(base_dir) && $(SBT) "project barstools-macros" "runMain barstools.macros.MacroCompiler -n $(HARNESS_SMEMS_CONF) -v $(HARNESS_SMEMS_FILE) -f $(HARNESS_SMEMS_FIR) $(HARNESS_MACROCOMPILER_MODE)" cd $(base_dir) && $(SBT) "project barstoolsMacros" "runMain barstools.macros.MacroCompiler -n $(HARNESS_SMEMS_CONF) -v $(HARNESS_SMEMS_FILE) -f $(HARNESS_SMEMS_FIR) $(HARNESS_MACROCOMPILER_MODE)"
######################################################################################### #########################################################################################
# helper rule to just make verilog files # helper rule to just make verilog files

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@@ -122,3 +122,12 @@ object FireSimGenerator extends App with IsFireSimGeneratorLike {
generateArtefacts generateArtefacts
generateTclEnvFile generateTclEnvFile
} }
// For now, provide a separate generator app when not specifically building for FireSim
object Generator extends freechips.rocketchip.util.GeneratorApp with HasTestSuites {
val longName = names.topModuleProject + "." + names.topModuleClass + "." + names.configs
generateFirrtl
generateAnno
generateTestSuiteMakefrags
generateArtefacts
}

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@@ -6,6 +6,7 @@ set -o pipefail
unamestr=$(uname) unamestr=$(uname)
RDIR=$(pwd) RDIR=$(pwd)
scripts_dir="$( cd "$( dirname "${BASH_SOURCE[0]}" )" >/dev/null 2>&1 && pwd )"
# ignore riscv-tools for submodule init recursive # ignore riscv-tools for submodule init recursive
# you must do this globally (otherwise riscv-tools deep # you must do this globally (otherwise riscv-tools deep
@@ -19,3 +20,13 @@ git submodule update --init --recursive #--jobs 8
# unignore riscv-tools,catapult-shell2 globally # unignore riscv-tools,catapult-shell2 globally
git config --global --unset submodule.riscv-tools.update git config --global --unset submodule.riscv-tools.update
git config --global --unset submodule.experimental-blocks.update git config --global --unset submodule.experimental-blocks.update
# Renable firesim and init only the required submodules to provide
# all required scala deps, without doing a full build-setup
git config --unset submodule.sims/firesim.update
cd $scripts_dir/../sims/
git submodule update --init firesim
cd firesim/sim
git submodule update --init midas
cd $RDIR
git config submodule.sims/firesim.update none

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@@ -64,7 +64,7 @@ ifeq ($(SUB_PROJECT),boom)
endif endif
# for Rocket-chip developers # for Rocket-chip developers
ifeq ($(SUB_PROJECT),rocketchip) ifeq ($(SUB_PROJECT),rocketchip)
SBT_PROJECT ?= rebarrocketchip SBT_PROJECT ?= rocketchip
MODEL ?= TestHarness MODEL ?= TestHarness
VLOG_MODEL ?= TestHarness VLOG_MODEL ?= TestHarness
MODEL_PACKAGE ?= freechips.rocketchip.system MODEL_PACKAGE ?= freechips.rocketchip.system
@@ -91,12 +91,12 @@ ifeq ($(SUB_PROJECT),firechip)
SBT_PROJECT ?= $(SUB_PROJECT) SBT_PROJECT ?= $(SUB_PROJECT)
MODEL ?= TestHarness MODEL ?= TestHarness
VLOG_MODEL ?= TestHarness VLOG_MODEL ?= TestHarness
MODEL_PACKAGE ?= firesim.firesim MODEL_PACKAGE ?= freechips.rocketchip.system
CONFIG ?= FireSimRocketChipConfig CONFIG ?= FireSimRocketChipConfig
CONFIG_PACKAGE ?= firesim.firesim CONFIG_PACKAGE ?= firesim.firesim
GENERATOR_PACKAGE ?= firesim.firesim GENERATOR_PACKAGE ?= firesim.firesim
TB ?= TestDriver TB ?= TestDriver
TOP ?= ExampleRocketSystem TOP ?= FireSimNoNIC
endif endif
######################################################################################### #########################################################################################