diff --git a/docs/Chipyard-Basics/Running-A-Simulation.rst b/docs/Chipyard-Basics/Running-A-Simulation.rst
index 7b3f0cc1..76eb0acb 100644
--- a/docs/Chipyard-Basics/Running-A-Simulation.rst
+++ b/docs/Chipyard-Basics/Running-A-Simulation.rst
@@ -9,7 +9,7 @@ Software RTL Simulation
 ------------------------
 The Chipyard framework provides wrappers for two common software RTL simulators:
 the open-source Verilator simulator and the proprietary VCS simulator.
-For more information on either of these simulators, please refer to :ref:`Verilator` or :ref:`VCS`.
+For more information on either of these simulators, please refer to :ref:`Verilator (Open-Source)` or :ref:`Synopsys VCS (License Required)`.
 The following instructions assume at least one of these simulators is installed.
 
 Verilator/VCS Flows