From fcd48ad262532b2b782b72e33a4836f00f43a73f Mon Sep 17 00:00:00 2001 From: Harrison Liew Date: Thu, 3 Oct 2019 19:36:00 -0700 Subject: [PATCH] fix power straps --- .gitmodules | 6 +++--- vlsi/example-vlsi | 14 ++++++++++---- vlsi/example.yml | 4 ++++ vlsi/hammer | 2 +- 4 files changed, 18 insertions(+), 8 deletions(-) diff --git a/.gitmodules b/.gitmodules index 35addf76..901df05f 100644 --- a/.gitmodules +++ b/.gitmodules @@ -60,10 +60,10 @@ url = https://github.com/freechipsproject/firrtl-interpreter.git [submodule "vlsi/hammer-cadence-plugins"] path = vlsi/hammer-cadence-plugins - url = git@github.com:ucb-bar/hammer-cadence-plugins.git + url = https://github.com/ucb-bar/hammer-cadence-plugins.git [submodule "vlsi/hammer-synopsys-plugins"] path = vlsi/hammer-synopsys-plugins - url = git@github.com:ucb-bar/hammer-synopsys-plugins.git + url = https://github.com/ucb-bar/hammer-synopsys-plugins.git [submodule "vlsi/hammer-mentor-plugins"] path = vlsi/hammer-mentor-plugins - url = git@github.com:ucb-bar/hammer-mentor-plugins.git + url = https://github.com/ucb-bar/hammer-mentor-plugins.git diff --git a/vlsi/example-vlsi b/vlsi/example-vlsi index 516ef588..21ff9598 100755 --- a/vlsi/example-vlsi +++ b/vlsi/example-vlsi @@ -24,7 +24,7 @@ def example_tool_settings(x: hammer_vlsi.HammerTool) -> bool: x.append(''' # TODO # Place custom TCL here -set_db route_design_bottom_routing_layer 2 +set_db route_design_bottom_routing_layer 1 set_db route_design_top_routing_layer 7 ''') return True @@ -32,6 +32,7 @@ set_db route_design_top_routing_layer 7 def scale_final_gds(x: hammer_vlsi.HammerTool) -> bool: """ Scale the final GDS by a factor of 4 + hammer/src/hammer-vlsi/technology/asap7/__init__.py implements scale_gds_script """ x.append(''' # Write script out to a temporary file and execute it @@ -53,16 +54,21 @@ class ExampleDriver(CLIDriver): # Default set of steps can be found in the CAD tool plugin's __init__.py # make_pre_insertion_hook will execute the custom hook before the specified step - hammer_vlsi.HammerTool.make_pre_insertion_hook("route_design", example_add_fillers), # SYNTAX: make_pre_insertion_hook("EXISTING_STEP", INSERTED_HOOK) + # SYNTAX: make_pre_insertion_hook("EXISTING_STEP", INSERTED_HOOK) + # hammer_vlsi.HammerTool.make_pre_insertion_hook("route_design", example_add_fillers), + # make_post_insertion_hook will execute the custom hook after the specified step hammer_vlsi.HammerTool.make_post_insertion_hook("init_design", example_tool_settings), + # make_replacement_hook will replace the specified step with a custom hook - hammer_vlsi.HammerTool.make_replacement_hook("place_tap_cells", example_place_tap_cells), + # hammer_vlsi.HammerTool.make_replacement_hook("place_tap_cells", example_place_tap_cells), + # make_removal_hook will remove the specified step from the flow hammer_vlsi.HammerTool.make_removal_hook("place_bumps"), + # The target step in any of the above calls may be a default step or another one of your custom hooks - # This is an example of a technology-supplied hook (look in hammer/src/hammer-vlsi/technology/asap7/__init__.py) + # This is an example of a technology-supplied hook hammer_vlsi.HammerTool.make_post_insertion_hook("write_design", scale_final_gds) ] return extra_hooks diff --git a/vlsi/example.yml b/vlsi/example.yml index 3f8c0f23..32dc23d3 100644 --- a/vlsi/example.yml +++ b/vlsi/example.yml @@ -34,7 +34,11 @@ par.generate_power_straps_options: - M7 - M8 - M9 + pin_layers: + - M9 track_width: 5 + track_width_M2: 7 # minimum allowed + track_width_M3: 7 # minimum allowed track_spacing: 0 track_start: 10 power_utilization: 0.05 diff --git a/vlsi/hammer b/vlsi/hammer index b5024772..e30da8cc 160000 --- a/vlsi/hammer +++ b/vlsi/hammer @@ -1 +1 @@ -Subproject commit b50247729bc536522ae42e8adb5e38277095775b +Subproject commit e30da8cc55297db0d6fe28cfe3309f77450944c0