From ffe1b74e67261d53d52344c661f31c2d5ea80efb Mon Sep 17 00:00:00 2001 From: Hansung Kim Date: Sun, 1 Oct 2023 19:37:31 -0700 Subject: [PATCH] Add gen-collateral to Verilator include dir This fixes VX_define.vh not being found when compiling Vortex verilog sources. --- sims/verilator/Makefile | 1 + 1 file changed, 1 insertion(+) diff --git a/sims/verilator/Makefile b/sims/verilator/Makefile index 0341ff7d..73845bc2 100644 --- a/sims/verilator/Makefile +++ b/sims/verilator/Makefile @@ -152,6 +152,7 @@ VERILATOR_NONCC_OPTS = \ $(MAX_WIDTH_OPTS) \ $(SIM_PREPROC_DEFINES) \ $(VERILATOR_PREPROC_DEFINES) \ + -I$(GEN_COLLATERAL_DIR) \ --top-module $(TB) \ --vpi \ -f $(sim_common_files)