7c7b336c3f
* Add SPI flash configs, IOBinders, CI tests, and docs * Add writable SPI flash support * bump * Fix CI * Fix CI * Update docs/Generators/TestChipIP.rst Co-authored-by: Chick Markley <chick@qrhino.com> * Maybe actually fix CI * Fix broken merge * Fix the tutorial patch * bump tcip to master * fix GPIO naming bug Co-authored-by: Chick Markley <chick@qrhino.com>
78 lines
2.9 KiB
C
78 lines
2.9 KiB
C
#include <stdlib.h>
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#include <stdio.h>
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#include "mmio.h"
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#include "spiflash.h"
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int main(void)
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{
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spiflash_ffmt ffmt;
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ffmt.fields.cmd_en = 1;
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ffmt.fields.addr_len = 4; // Valid options are 3 or 4 for our model
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ffmt.fields.pad_cnt = 0; // Our SPI flash model assumes 8 dummy cycles for fast reads, 0 for slow
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ffmt.fields.cmd_proto = SPIFLASH_PROTO_SINGLE; // Our SPI flash model only supports single-bit commands
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ffmt.fields.addr_proto = SPIFLASH_PROTO_SINGLE; // We support both single and quad
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ffmt.fields.data_proto = SPIFLASH_PROTO_SINGLE; // We support both single and quad
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ffmt.fields.cmd_code = 0x13; // Slow read 4 byte
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ffmt.fields.pad_code = 0x00; // Not used by our model
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printf("Testing SPI flash command 0x13...\n");
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configure_spiflash(ffmt);
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if (test_spiflash(0x0, 0x100, 0)) return 1;
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printf("Testing SPI flash command 0x03...\n");
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ffmt.fields.cmd_code = 0x03; // Slow read 3 byte address
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ffmt.fields.addr_len = 3; // 3 byte address
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configure_spiflash(ffmt);
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if (test_spiflash(0x0, 0x100, 0)) return 1;
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printf("Testing SPI flash command 0x0B...\n");
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ffmt.fields.cmd_code = 0x0B; // Fast read 3 byte address
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ffmt.fields.pad_cnt = 8; // Needs to be 8 for fast read
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configure_spiflash(ffmt);
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if (test_spiflash(0x1000, 0x100, 0)) return 1;
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printf("Testing SPI flash command 0x0C...\n");
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ffmt.fields.cmd_code = 0x0C; // Fast read 4 byte address
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ffmt.fields.addr_len = 4; // 4 byte address
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configure_spiflash(ffmt);
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if (test_spiflash(0x2340, 0x100, 0)) return 1;
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printf("Testing SPI flash command 0x6C...\n");
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ffmt.fields.cmd_code = 0x6C; // Fast read 4 byte address, quad data
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ffmt.fields.data_proto = SPIFLASH_PROTO_QUAD; // Quad data
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configure_spiflash(ffmt);
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if (test_spiflash(0x410c, 0x100, 0)) return 1;
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printf("Testing SPI flash command 0x6B...\n");
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ffmt.fields.cmd_code = 0x6B; // Fast read 3 byte address, quad data
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ffmt.fields.addr_len = 3;
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configure_spiflash(ffmt);
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if (test_spiflash(0x5ff8, 0x100, 0)) return 1;
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printf("Testing SPI flash command 0xEB...\n");
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ffmt.fields.cmd_code = 0xEB; // Fast read 3 byte address, quad data, quad addr
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ffmt.fields.addr_proto = SPIFLASH_PROTO_QUAD;
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configure_spiflash(ffmt);
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if (test_spiflash(0x7c04, 0x100, 0)) return 1;
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printf("Testing SPI flash command 0xEC...\n");
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ffmt.fields.cmd_code = 0xEC; // Fast read 4 byte address, quad data, quad addr
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ffmt.fields.addr_len = 4;
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configure_spiflash(ffmt);
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if (test_spiflash(0x9000, 0x100, 0)) return 1;
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printf("Testing SPI flash extended range...\n");
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// The provided memory image is only 1MiB, but the model has 16MiB of addressable space
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// This should return 0
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if (test_spiflash(0x100000, 0x100, 1)) return 1;
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// This write should do nothing, so we can just re-test the first test
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printf("Testing that the SPI is not writable...\n");
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write_spiflash(test_data, test_len, 0x0, 0x3E, 4, SPIFLASH_PROTO_QUAD, SPIFLASH_PROTO_QUAD);
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if (test_spiflash(0x0, 0x100, 0)) return 1;
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return 0;
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}
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