231 lines
8.5 KiB
Scala
231 lines
8.5 KiB
Scala
import Tests._
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// This gives us a nicer handle to the root project instead of using the
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// implicit one
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lazy val chipyardRoot = Project("chipyardRoot", file("."))
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lazy val commonSettings = Seq(
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organization := "edu.berkeley.cs",
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version := "1.0",
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scalaVersion := "2.12.10",
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traceLevel := 15,
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test in assembly := {},
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assemblyMergeStrategy in assembly := { _ match {
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case PathList("META-INF", "MANIFEST.MF") => MergeStrategy.discard
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case _ => MergeStrategy.first}},
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scalacOptions ++= Seq("-deprecation","-unchecked","-Xsource:2.11"),
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libraryDependencies += "org.scalatest" %% "scalatest" % "3.0.8" % "test",
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libraryDependencies += "org.json4s" %% "json4s-jackson" % "3.6.1",
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libraryDependencies += "org.scala-lang" % "scala-reflect" % scalaVersion.value,
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libraryDependencies += "com.github.scopt" %% "scopt" % "3.7.0",
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libraryDependencies += "org.scala-lang.modules" % "scala-jline" % "2.12.1",
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libraryDependencies += "com.typesafe.play" %% "play-json" % "2.6.10",
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libraryDependencies += "org.typelevel" %% "spire" % "0.16.2",
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libraryDependencies += "org.scalanlp" %% "breeze" % "1.0",
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addCompilerPlugin("org.scalamacros" % "paradise" % "2.1.0" cross CrossVersion.full),
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unmanagedBase := (chipyardRoot / unmanagedBase).value,
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allDependencies := allDependencies.value.filterNot(_.organization == "edu.berkeley.cs"),
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exportJars := true,
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resolvers ++= Seq(
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Resolver.sonatypeRepo("snapshots"),
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Resolver.sonatypeRepo("releases"),
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Resolver.mavenLocal))
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val rocketChipDir = file("generators/rocket-chip")
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lazy val firesimAsLibrary = sys.env.get("FIRESIM_STANDALONE") == None
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lazy val firesimDir = if (firesimAsLibrary) {
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file("sims/firesim/sim/")
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} else {
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file("../../sim")
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}
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// Checks for -DROCKET_USE_MAVEN.
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// If it's there, use a maven dependency.
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// Else, depend on subprojects in git submodules.
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def conditionalDependsOn(prj: Project): Project = {
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if (sys.props.contains("ROCKET_USE_MAVEN")) {
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prj.settings(Seq(
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libraryDependencies += "edu.berkeley.cs" %% "testchipip" % "1.0-020719-SNAPSHOT",
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))
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} else {
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prj.dependsOn(testchipip)
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}
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}
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/**
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* It has been a struggle for us to override settings in subprojects.
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* An example would be adding a dependency to rocketchip on midas's targetutils library,
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* or replacing dsptools's maven dependency on chisel with the local chisel project.
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*
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* This function works around this by specifying the project's root at src/ and overriding
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* scalaSource and resourceDirectory.
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*/
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def freshProject(name: String, dir: File): Project = {
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Project(id = name, base = dir / "src")
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.settings(
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scalaSource in Compile := baseDirectory.value / "main" / "scala",
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resourceDirectory in Compile := baseDirectory.value / "main" / "resources"
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)
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}
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// Fork each scala test for now, to work around persistent mutable state
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// in Rocket-Chip based generators
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def isolateAllTests(tests: Seq[TestDefinition]) = tests map { test =>
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val options = ForkOptions()
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new Group(test.name, Seq(test), SubProcess(options))
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} toSeq
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// Subproject definitions begin
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//
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// FIRRTL is handled as an unmanaged dependency. Make will build the firrtl jar
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// before launching sbt if any of the firrtl source files has been updated
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// The jar is dropped in chipyard's lib/ directory, which is used as the unmanagedBase
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// for all subprojects
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lazy val chisel = (project in file("tools/chisel3"))
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lazy val firrtl_interpreter = (project in file("tools/firrtl-interpreter"))
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.settings(commonSettings)
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lazy val treadle = (project in file("tools/treadle"))
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.settings(commonSettings)
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lazy val chisel_testers = (project in file("tools/chisel-testers"))
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.dependsOn(chisel, firrtl_interpreter, treadle)
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.settings(
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commonSettings,
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libraryDependencies ++= Seq(
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"junit" % "junit" % "4.12",
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"org.scalatest" %% "scalatest" % "3.0.5",
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"org.scalacheck" %% "scalacheck" % "1.14.0",
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"com.github.scopt" %% "scopt" % "3.7.0"
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)
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)
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// Contains annotations & firrtl passes you may wish to use in rocket-chip without
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// introducing a circular dependency between RC and MIDAS
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lazy val midasTargetUtils = ProjectRef(firesimDir, "targetutils")
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// Rocket-chip dependencies (subsumes making RC a RootProject)
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lazy val hardfloat = (project in rocketChipDir / "hardfloat")
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.settings(commonSettings).dependsOn(midasTargetUtils)
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lazy val rocketMacros = (project in rocketChipDir / "macros")
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.settings(commonSettings)
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lazy val rocketConfig = (project in rocketChipDir / "api-config-chipsalliance/build-rules/sbt")
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.settings(commonSettings)
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lazy val rocketchip = freshProject("rocketchip", rocketChipDir)
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.settings(commonSettings)
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.dependsOn(chisel, hardfloat, rocketMacros, rocketConfig)
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lazy val testchipip = (project in file("generators/testchipip"))
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.dependsOn(rocketchip, sifive_blocks)
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.settings(commonSettings)
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lazy val iocell = (project in file("./tools/barstools/iocell/"))
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.dependsOn(chisel)
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.settings(commonSettings)
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lazy val chipyard = conditionalDependsOn(project in file("generators/chipyard"))
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.dependsOn(boom, hwacha, sifive_blocks, sifive_cache, utilities, iocell,
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sha3, // On separate line to allow for cleaner tutorial-setup patches
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dsptools, `rocket-dsptools`,
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gemmini, icenet, tracegen, ariane, nvdla, sodor)
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.settings(commonSettings)
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lazy val tracegen = conditionalDependsOn(project in file("generators/tracegen"))
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.dependsOn(rocketchip, sifive_cache, boom, utilities)
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.settings(commonSettings)
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lazy val utilities = conditionalDependsOn(project in file("generators/utilities"))
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.settings(commonSettings)
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lazy val icenet = (project in file("generators/icenet"))
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.dependsOn(rocketchip, testchipip)
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.settings(commonSettings)
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lazy val hwacha = (project in file("generators/hwacha"))
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.dependsOn(rocketchip)
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.settings(commonSettings)
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lazy val boom = conditionalDependsOn(project in file("generators/boom"))
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.dependsOn(rocketchip)
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.settings(commonSettings)
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lazy val ariane = (project in file("generators/ariane"))
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.dependsOn(rocketchip)
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.settings(commonSettings)
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lazy val sodor = (project in file("generators/riscv-sodor"))
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.dependsOn(rocketchip)
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.settings(commonSettings)
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lazy val sha3 = (project in file("generators/sha3"))
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.dependsOn(rocketchip, chisel_testers, midasTargetUtils)
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.settings(commonSettings)
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lazy val gemmini = (project in file("generators/gemmini"))
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.dependsOn(rocketchip, chisel_testers, testchipip)
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.settings(commonSettings)
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lazy val nvdla = (project in file("generators/nvdla"))
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.dependsOn(rocketchip)
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.settings(commonSettings)
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lazy val tapeout = conditionalDependsOn(project in file("./tools/barstools/tapeout/"))
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.dependsOn(chisel_testers, chipyard)
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.settings(commonSettings)
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.settings(libraryDependencies ++= Seq("io.github.daviddenton" %% "handlebars-scala-fork" % "2.3.0"))
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lazy val mdf = (project in file("./tools/barstools/mdf/scalalib/"))
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.settings(commonSettings)
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lazy val barstoolsMacros = (project in file("./tools/barstools/macros/"))
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.dependsOn(firrtl_interpreter, mdf, rocketchip)
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.enablePlugins(sbtassembly.AssemblyPlugin)
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.settings(commonSettings)
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lazy val dsptools = freshProject("dsptools", file("./tools/dsptools"))
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.dependsOn(chisel, chisel_testers)
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.settings(
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commonSettings,
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libraryDependencies ++= Seq(
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"junit" % "junit" % "4.13" % "test",
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"org.scalatest" %% "scalatest" % "3.0.8",
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"org.scalacheck" %% "scalacheck" % "1.14.3" % "test"
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))
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lazy val `rocket-dsptools` = freshProject("rocket-dsptools", file("./tools/dsptools/rocket"))
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.dependsOn(rocketchip, dsptools)
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.settings(commonSettings)
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lazy val sifive_blocks = (project in file("generators/sifive-blocks"))
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.dependsOn(rocketchip)
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.settings(commonSettings)
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lazy val sifive_cache = (project in file("generators/sifive-cache")).settings(
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commonSettings,
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scalaSource in Compile := baseDirectory.value / "design/craft"
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).dependsOn(rocketchip)
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// Library components of FireSim
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lazy val midas = ProjectRef(firesimDir, "midas")
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lazy val firesimLib = ProjectRef(firesimDir, "firesimLib")
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lazy val firechip = conditionalDependsOn(project in file("generators/firechip"))
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.dependsOn(chipyard, midasTargetUtils, midas, firesimLib % "test->test;compile->compile")
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.settings(
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commonSettings,
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testGrouping in Test := isolateAllTests( (definedTests in Test).value ),
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testOptions in Test += Tests.Argument("-oF")
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)
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lazy val fpga_shells = (project in file("./fpga/fpga-shells"))
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.dependsOn(rocketchip, sifive_blocks, chipyard)
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.settings(commonSettings)
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lazy val fpga_platforms = (project in file("./fpga"))
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.dependsOn(chipyard, fpga_shells)
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.settings(commonSettings)
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