143 lines
3.6 KiB
Plaintext
143 lines
3.6 KiB
Plaintext
library (ExampleDCO_PVT_0P77V_0C) {
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technology (cmos);
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date : "Mon Sep 2 16:01:59 2019";
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comment : "Generated by dotlibber.py";
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revision : 0;
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delay_model : table_lookup;
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simulation : true;
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capacitive_load_unit (1,pf);
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voltage_unit : "1V";
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current_unit : "1mA";
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time_unit : "1ns";
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pulling_resistance_unit : "1kohm";
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nom_process : 1;
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nom_temperature : 0;
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nom_voltage : 0.770000;
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voltage_map(VDD, 0.770000);
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voltage_map(VSS, 0.000000);
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operating_conditions("PVT_0P77V_0C") {
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process : 1;
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temperature : 0;
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voltage : 0.770000;
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}
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default_operating_conditions : PVT_0P77V_0C;
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lu_table_template (constraint_template_3x3) {
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variable_1 : related_pin_transition;
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variable_2 : constrained_pin_transition;
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index_1 ("0.0001, 0.0002, 0.0003");
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index_2 ("0.0001, 0.0002, 0.0003");
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}
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lu_table_template (delay_template_8x8) {
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variable_1 : input_net_transition;
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variable_2 : total_output_net_capacitance;
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index_1 ("0.0003, 0.0004, 0.0005, 0.0006, 0.0007, 0.0008, 0.0009, 0.001");
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index_2 ("0.0011, 0.0022, 0.0033, 0.0044, 0.0055, 0.0066, 0.0077, 0.0088");
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}
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type (bus_13_to_0) {
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base_type : array ;
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data_type : bit ;
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bit_width : 14 ;
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bit_from : 13 ;
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bit_to : 0 ;
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downto : true ;
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}
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type (bus_15_to_0) {
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base_type : array ;
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data_type : bit ;
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bit_width : 16 ;
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bit_from : 15 ;
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bit_to : 0 ;
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downto : true ;
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}
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type (bus_7_to_0) {
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base_type : array ;
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data_type : bit ;
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bit_width : 8 ;
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bit_from : 7 ;
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bit_to : 0 ;
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downto : true ;
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}
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cell (ExampleDCO) {
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dont_use : true;
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dont_touch : true;
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is_macro_cell : true;
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pg_pin (VDD) {
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pg_type : primary_power;
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voltage_name : VDD;
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}
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pg_pin (VSS) {
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pg_type : primary_ground;
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voltage_name : VSS;
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}
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pin (clock) {
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direction : output;
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clock : true;
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max_capacitance : 0.02;
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related_power_pin : VDD;
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related_ground_pin : VSS;
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}
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bus ( col_sel_b ) {
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bus_type : bus_13_to_0;
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direction : input;
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capacitance : 0.006;
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max_transition : 0.04;
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pin ( col_sel_b[13:0] ) {
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related_power_pin : VDD;
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related_ground_pin : VSS;
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}
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}
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bus ( row_sel_b ) {
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bus_type : bus_15_to_0;
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direction : input;
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capacitance : 0.006;
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max_transition : 0.04;
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pin ( row_sel_b[15:0] ) {
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related_power_pin : VDD;
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related_ground_pin : VSS;
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}
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}
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bus ( code_regulator ) {
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bus_type : bus_7_to_0;
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direction : input;
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capacitance : 0.006;
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max_transition : 0.04;
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pin ( code_regulator[7:0] ) {
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related_power_pin : VDD;
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related_ground_pin : VSS;
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}
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}
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pin (dither) {
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direction : input;
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capacitance : 0.006;
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max_transition : 0.04;
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related_power_pin : VDD;
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related_ground_pin : VSS;
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}
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pin (sleep_b) {
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direction : input;
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capacitance : 0.006;
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max_transition : 0.04;
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related_power_pin : VDD;
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related_ground_pin : VSS;
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}
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}
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}
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