40 lines
1.7 KiB
ReStructuredText
40 lines
1.7 KiB
ReStructuredText
Commercial Software RTL Simulators
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VCS
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-----------------------
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`VCS <https://www.synopsys.com/verification/simulation/vcs.html>`__ is a commercial RTL simulator developed by Synopsys.
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It requires commercial licenses.
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The Chipyard framework can compile and execute simulations using VCS.
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VCS simulation will generally compile faster than Verilator simulations.
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To run a simulation using VCS, perform the following steps:
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Make sure that the VCS simulator is on your ``PATH``.
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To compile the example design, run make in the ``sims/vsim`` directory.
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This will elaborate the ``DefaultRocketConfig`` in the example project.
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An executable called ``simulator-example-DefaultRocketConfig`` will be produced.
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This executable is a simulator that has been compiled based on the design that was built.
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You can then use this executable to run any compatible RV64 code.
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For instance, to run one of the riscv-tools assembly tests.
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.. code-block:: shell
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./simulator-example-DefaultRocketConfig $RISCV/riscv64-unknown-elf/share/riscv-tests/isa/rv64ui-p-simple
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If you later create your own project, you can use environment variables to build an alternate configuration.
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.. code-block:: shell
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make SUB_PROJECT=yourproject
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./simulator-<yourproject>-<yourconfig> ...
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If you would like to extract waveforms from the simulation, run the command ``make debug`` instead of just ``make``.
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This will generate a vpd file (this is a proprietary waveform representation format used by Synopsys) that can be loaded to vpd-supported waveform viewers.
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If you have Synopsys licenses, we recommend using the DVE waveform viewer.
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Please refer to :ref:`Running A Simulation` for a step by step tutorial on how to get a simulator up and running.
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