* Use published rocketchip * Simulator works! * Gitignore was masking csrc * Fix broken submodules * Update gitignore * Fix things up * Some more cleanup * Clean up so that using maven works * Incorporate feedback * Oops * Add workaround for some of csrc * Forgot dtm and jtag * Make name better and add comment * Extraneous comment * Fix includes. After running a clean build, I realized old build state was masking this problem. verisim/csrc needs to be in the include path until we find a more permanent solution to our problem. * Add target to generate verilator-specific files. * Ignore DS_Store * Generate bootrom from testchipip * Oops * Add extraneous rocket-dsptools reference
13 lines
136 B
Plaintext
13 lines
136 B
Plaintext
bootrom
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/Makefrag.pkgs
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target
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*.jar
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*.stamp
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/vsim
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/verisim/generated-src*
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/verisim/simulator-*
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/verisim/verilator
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simv*
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*.vcd
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.DS_Store
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