379 lines
17 KiB
Makefile
379 lines
17 KiB
Makefile
SHELL=/bin/bash
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SED ?= sed
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ifndef RISCV
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$(error RISCV is unset. Did you source the Chipyard auto-generated env file (which activates the default conda environment)?)
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else
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$(info Running with RISCV=$(RISCV))
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endif
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#########################################################################################
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# specify user-interface variables
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#########################################################################################
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HELP_COMPILATION_VARIABLES += \
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" EXTRA_GENERATOR_REQS = additional make requirements needed for the main generator" \
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" EXTRA_SIM_CXXFLAGS = additional CXXFLAGS for building simulators" \
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" EXTRA_SIM_LDFLAGS = additional LDFLAGS for building simulators" \
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" EXTRA_SIM_SOURCES = additional simulation sources needed for simulator" \
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" EXTRA_SIM_REQS = additional make requirements to build the simulator" \
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" ENABLE_SBT_THIN_CLIENT = if set, use sbt's experimental thin client (works best when overridding SBT_BIN with the mainline sbt script)" \
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" EXTRA_CHISEL_OPTIONS = additional options to pass to the Chisel compiler" \
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" EXTRA_FIRRTL_OPTIONS = additional options to pass to the FIRRTL compiler"
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EXTRA_GENERATOR_REQS ?= $(BOOTROM_TARGETS)
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EXTRA_SIM_CXXFLAGS ?=
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EXTRA_SIM_LDFLAGS ?=
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EXTRA_SIM_SOURCES ?=
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EXTRA_SIM_REQS ?=
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#----------------------------------------------------------------------------
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HELP_SIMULATION_VARIABLES += \
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" EXTRA_SIM_FLAGS = additional runtime simulation flags (passed within +permissive)" \
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" NUMACTL = set to '1' to wrap simulator in the appropriate numactl command" \
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" BREAK_SIM_PREREQ = when running a binary, doesn't rebuild RTL on source changes"
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EXTRA_SIM_FLAGS ?=
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NUMACTL ?= 0
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NUMA_PREFIX = $(if $(filter $(NUMACTL),0),,$(shell $(base_dir)/scripts/numa_prefix))
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#----------------------------------------------------------------------------
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HELP_COMMANDS += \
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" run-binary = run [./$(shell basename $(sim))] and log instructions to file" \
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" run-binary-fast = run [./$(shell basename $(sim))] and don't log instructions" \
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" run-binary-debug = run [./$(shell basename $(sim_debug))] and log instructions and waveform to files" \
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" verilog = generate intermediate verilog files from chisel elaboration and firrtl passes" \
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" firrtl = generate intermediate firrtl files from chisel elaboration" \
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" run-tests = run all assembly and benchmark tests" \
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" launch-sbt = start sbt terminal" \
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" {shutdown,start}-sbt-server = shutdown or start sbt server if using ENABLE_SBT_THIN_CLIENT" \
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#########################################################################################
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# include additional subproject make fragments
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# see HELP_COMPILATION_VARIABLES
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#########################################################################################
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include $(base_dir)/generators/cva6/cva6.mk
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include $(base_dir)/generators/tracegen/tracegen.mk
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include $(base_dir)/generators/nvdla/nvdla.mk
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include $(base_dir)/tools/dromajo/dromajo.mk
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include $(base_dir)/tools/torture.mk
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#########################################################################################
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# Prerequisite lists
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#########################################################################################
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# Returns a list of files in directory $1 with file extension $2.
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# If available, use 'fd' to find the list of files, which is faster than 'find'.
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ifeq ($(shell which fd 2> /dev/null),)
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lookup_srcs = $(shell find -L $(1)/ -name target -prune -o \( -iname "*.$(2)" ! -iname ".*" \) -print 2> /dev/null)
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else
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lookup_srcs = $(shell fd -L -t f -e $(2) . $(1))
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endif
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SOURCE_DIRS = $(addprefix $(base_dir)/,generators sims/firesim/sim tools/barstools fpga/fpga-shells fpga/src)
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SCALA_SOURCES = $(call lookup_srcs,$(SOURCE_DIRS),scala)
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VLOG_SOURCES = $(call lookup_srcs,$(SOURCE_DIRS),sv) $(call lookup_srcs,$(SOURCE_DIRS),v)
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# This assumes no SBT meta-build sources
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SBT_SOURCE_DIRS = $(addprefix $(base_dir)/,generators sims/firesim/sim tools)
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SBT_SOURCES = $(call lookup_srcs,$(SBT_SOURCE_DIRS),sbt) $(base_dir)/build.sbt $(base_dir)/project/plugins.sbt $(base_dir)/project/build.properties
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#########################################################################################
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# SBT Server Setup (start server / rebuild proj. defs. if SBT_SOURCES change)
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#########################################################################################
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$(SBT_THIN_CLIENT_TIMESTAMP): $(SBT_SOURCES)
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ifneq (,$(wildcard $(SBT_THIN_CLIENT_TIMESTAMP)))
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cd $(base_dir) && $(SBT) "reload"
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touch $@
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else
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cd $(base_dir) && $(SBT) "exit"
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endif
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#########################################################################################
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# copy over bootrom files
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#########################################################################################
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$(build_dir) $(OUT_DIR):
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mkdir -p $@
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$(BOOTROM_TARGETS): $(build_dir)/bootrom.%.img: $(TESTCHIP_RSRCS_DIR)/testchipip/bootrom/bootrom.%.img | $(build_dir)
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cp -f $< $@
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#########################################################################################
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# create firrtl file rule and variables
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#########################################################################################
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# AG: must re-elaborate if cva6 sources have changed... otherwise just run firrtl compile
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$(FIRRTL_FILE) $(ANNO_FILE) &: $(SCALA_SOURCES) $(sim_files) $(SCALA_BUILDTOOL_DEPS) $(EXTRA_GENERATOR_REQS)
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mkdir -p $(build_dir)
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$(call run_scala_main,$(SBT_PROJECT),$(GENERATOR_PACKAGE).Generator,\
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--target-dir $(build_dir) \
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--name $(long_name) \
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--top-module $(MODEL_PACKAGE).$(MODEL) \
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--legacy-configs $(CONFIG_PACKAGE):$(CONFIG) \
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$(EXTRA_CHISEL_OPTIONS))
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define firtool_extra_anno_contents
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[
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{
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"class":"sifive.enterprise.firrtl.MarkDUTAnnotation",
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"target":"~$(MODEL)|$(TOP)"
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},
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{
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"class": "sifive.enterprise.firrtl.TestHarnessHierarchyAnnotation",
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"filename": "$(FIRTOOL_MODEL_HRCHY_JSON)"
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},
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{
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"class": "sifive.enterprise.firrtl.ModuleHierarchyAnnotation",
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"filename": "$(FIRTOOL_TOP_HRCHY_JSON)"
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}
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]
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endef
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export firtool_extra_anno_contents
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$(FINAL_ANNO_FILE) $(FIRTOOL_EXTRA_ANNO_FILE): $(ANNO_FILE)
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echo "$$firtool_extra_anno_contents" > $(FIRTOOL_EXTRA_ANNO_FILE)
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jq -s '[.[][]]' $(ANNO_FILE) $(FIRTOOL_EXTRA_ANNO_FILE) > $(FINAL_ANNO_FILE)
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.PHONY: firrtl
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firrtl: $(FIRRTL_FILE) $(FINAL_ANNO_FILE)
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#########################################################################################
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# create verilog files rules and variables
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#########################################################################################
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FIRTOOL_TARGETS = \
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$(FIRTOOL_SMEMS_CONF) \
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$(FIRTOOL_TOP_SMEMS_JSON) \
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$(FIRTOOL_TOP_HRCHY_JSON) \
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$(FIRTOOL_MODEL_HRCHY_JSON) \
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$(FIRTOOL_MODEL_SMEMS_JSON) \
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$(FIRTOOL_FILELIST) \
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$(FIRTOOL_BB_MODS_FILELIST)
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# DOC include start: FirrtlCompiler
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$(TOP_TARGETS) $(HARNESS_TARGETS) &: $(FIRRTL_FILE) $(ANNO_FILE) $(VLOG_SOURCES)
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$(call run_scala_main,tapeout,barstools.tapeout.transforms.GenerateTopAndHarness,\
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--allow-unrecognized-annotations \
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--output-file $(TOP_FILE) \
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--harness-o $(HARNESS_FILE) \
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--input-file $(FIRRTL_FILE) \
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--syn-top $(TOP) \
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--harness-top $(VLOG_MODEL) \
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--annotation-file $(ANNO_FILE) \
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--top-anno-out $(TOP_ANNO) \
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--top-dotf-out $(sim_top_blackboxes) \
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--top-fir $(TOP_FIR) \
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--harness-anno-out $(HARNESS_ANNO) \
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--harness-dotf-out $(sim_harness_blackboxes) \
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--harness-fir $(HARNESS_FIR) \
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$(REPL_SEQ_MEM) \
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$(HARNESS_CONF_FLAGS) \
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--target-dir $(build_dir) \
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--log-level $(FIRRTL_LOGLEVEL) \
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$(EXTRA_FIRRTL_OPTIONS))
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touch $(sim_top_blackboxes) $(sim_harness_blackboxes)
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# NOTE: These *_temp intermediate targets will get removed in favor of make 4.3 grouped targets (&: operator)
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.INTERMEDIATE: firrtl_temp
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$(CIRCT_TARGETS): firrtl_temp
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@echo "" > /dev/null
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# hack: lower to middle firrtl if Fixed types are found
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$(FIRTOOL_TARGETS) &: $(FIRRTL_FILE) $(FINAL_ANNO_FILE) $(VLOG_SOURCES)
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$(call run_scala_main,tapeout,barstools.tapeout.transforms.GenerateTop,\
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--no-dedup \
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--output-file $(SFC_FIRRTL_BASENAME) \
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--output-annotation-file $(SFC_ANNO_FILE) \
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--target-dir $(OUT_DIR) \
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--input-file $(FIRRTL_FILE) \
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--annotation-file $(FINAL_ANNO_FILE) \
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--log-level $(FIRRTL_LOGLEVEL) \
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--allow-unrecognized-annotations \
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-X $(if $(shell grep "Fixed<" $(FIRRTL_FILE)),middle,none) \
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$(EXTRA_FIRRTL_OPTIONS))
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$(if $(shell grep "Fixed<" $(FIRRTL_FILE)),mv $(SFC_FIRRTL_BASENAME).mid.fir $(SFC_FIRRTL_FILE),)
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firtool \
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--format=fir \
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-O=release \
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--dedup \
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--export-module-hierarchy \
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--emit-metadata \
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--verify-each=false \
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--disable-annotation-classless \
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--disable-annotation-unknown \
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--warn-on-unprocessed-annotations \
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--lowering-options=emittedLineLength=2048,noAlwaysComb,disallowLocalVariables,explicitBitcast,verifLabels,locationInfoStyle=wrapInAtSquareBracket \
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--repl-seq-mem \
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--repl-seq-mem-circuit=$(MODEL) \
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--repl-seq-mem-file=$(FIRTOOL_SMEMS_CONF) \
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--annotation-file=$(SFC_ANNO_FILE) \
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--split-verilog \
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-o $(OUT_DIR) \
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$(SFC_FIRRTL_FILE)
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$(SED) -i 's/.*/& /' $(FIRTOOL_SMEMS_CONF) # need trailing space for SFC macrocompiler
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# DOC include end: FirrtlCompiler
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$(TOP_MODS_FILELIST) $(MODEL_MODS_FILELIST) $(ALL_MODS_FILELIST) $(BB_MODS_FILELIST) &: $(FIRTOOL_MODEL_HRCHY_JSON) $(FIRTOOL_FILELIST) $(FIRTOOL_BB_MODS_FILELIST)
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$(base_dir)/scripts/split-module-files.py \
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--model-hier-json $(FIRTOOL_MODEL_HRCHY_JSON) \
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--dut $(TOP) \
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--out-dut-filelist $(TOP_MODS_FILELIST) \
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--out-model-filelist $(MODEL_MODS_FILELIST) \
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--in-all-filelist $(FIRTOOL_FILELIST) \
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--target-dir $(OUT_DIR)
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$(SED) -e 's;^;$(OUT_DIR)/;' $(FIRTOOL_BB_MODS_FILELIST) > $(BB_MODS_FILELIST)
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$(SED) -i 's/\.\///' $(TOP_MODS_FILELIST)
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$(SED) -i 's/\.\///' $(MODEL_MODS_FILELIST)
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$(SED) -i 's/\.\///' $(BB_MODS_FILELIST)
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sort -u $(TOP_MODS_FILELIST) $(MODEL_MODS_FILELIST) $(BB_MODS_FILELIST) > $(ALL_MODS_FILELIST)
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$(TOP_SMEMS_CONF) $(HARNESS_SMEMS_CONF) &: $(FIRTOOL_TOP_SMEMS_JSON) $(FIRTOOL_MODEL_SMEMS_JSON) $(FIRTOOL_SMEMS_CONF)
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$(base_dir)/scripts/split-mems-conf.py \
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--in-smems-conf $(FIRTOOL_SMEMS_CONF) \
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--in-dut-smems-json $(FIRTOOL_TOP_SMEMS_JSON) \
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--in-model-smems-json $(FIRTOOL_MODEL_SMEMS_JSON) \
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--out-dut-smems-conf $(TOP_SMEMS_CONF) \
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--out-model-smems-conf $(HARNESS_SMEMS_CONF)
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# This file is for simulation only. VLSI flows should replace this file with one containing hard SRAMs
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MACROCOMPILER_MODE ?= --mode synflops
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$(TOP_SMEMS_FILE) $(TOP_SMEMS_FIR) &: $(TOP_SMEMS_CONF)
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$(call run_scala_main,tapeout,barstools.macros.MacroCompiler,-n $(TOP_SMEMS_CONF) -v $(TOP_SMEMS_FILE) -f $(TOP_SMEMS_FIR) $(MACROCOMPILER_MODE))
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HARNESS_MACROCOMPILER_MODE = --mode synflops
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$(HARNESS_SMEMS_FILE) $(HARNESS_SMEMS_FIR) &: $(HARNESS_SMEMS_CONF) | $(TOP_SMEMS_FILE)
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$(call run_scala_main,tapeout,barstools.macros.MacroCompiler, -n $(HARNESS_SMEMS_CONF) -v $(HARNESS_SMEMS_FILE) -f $(HARNESS_SMEMS_FIR) $(HARNESS_MACROCOMPILER_MODE))
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########################################################################################
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# remove duplicate files and headers in list of simulation file inputs
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########################################################################################
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$(sim_common_files): $(sim_files) $(ALL_MODS_FILELIST) $(TOP_SMEMS_FILE) $(HARNESS_SMEMS_FILE)
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sort -u $(sim_files) $(ALL_MODS_FILELIST) | grep -v '.*\.\(svh\|h\)$$' > $@
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echo "$(TOP_SMEMS_FILE)" >> $@
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echo "$(HARNESS_SMEMS_FILE)" >> $@
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#########################################################################################
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# helper rule to just make verilog files
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#########################################################################################
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.PHONY: verilog
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verilog: $(sim_common_files)
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#########################################################################################
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# helper rules to run simulations
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#########################################################################################
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.PHONY: run-binary run-binary-fast run-binary-debug run-fast
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check-binary:
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ifeq (,$(BINARY))
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$(error BINARY variable is not set. Set it to the simulation binary)
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endif
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# allow you to override sim prereq
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ifeq (,$(BREAK_SIM_PREREQ))
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SIM_PREREQ = $(sim)
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SIM_DEBUG_PREREQ = $(sim_debug)
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endif
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# run normal binary with hardware-logged insn dissassembly
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run-binary: $(output_dir) $(SIM_PREREQ) check-binary
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(set -o pipefail && $(NUMA_PREFIX) $(sim) $(PERMISSIVE_ON) $(SIM_FLAGS) $(EXTRA_SIM_FLAGS) $(SEED_FLAG) $(VERBOSE_FLAGS) $(PERMISSIVE_OFF) $(BINARY) </dev/null 2> >(spike-dasm > $(sim_out_name).out) | tee $(sim_out_name).log)
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# run simulator as fast as possible (no insn disassembly)
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run-binary-fast: $(output_dir) $(SIM_PREREQ) check-binary
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(set -o pipefail && $(NUMA_PREFIX) $(sim) $(PERMISSIVE_ON) $(SIM_FLAGS) $(EXTRA_SIM_FLAGS) $(SEED_FLAG) $(PERMISSIVE_OFF) $(BINARY) </dev/null | tee $(sim_out_name).log)
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# run simulator with as much debug info as possible
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run-binary-debug: $(output_dir) $(SIM_DEBUG_PREREQ) check-binary
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(set -o pipefail && $(NUMA_PREFIX) $(sim_debug) $(PERMISSIVE_ON) $(SIM_FLAGS) $(EXTRA_SIM_FLAGS) $(SEED_FLAG) $(VERBOSE_FLAGS) $(WAVEFORM_FLAG) $(PERMISSIVE_OFF) $(BINARY) </dev/null 2> >(spike-dasm > $(sim_out_name).out) | tee $(sim_out_name).log)
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run-fast: run-asm-tests-fast run-bmark-tests-fast
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#########################################################################################
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# helper rules to run simulator with fast loadmem via hex files
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#########################################################################################
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$(binary_hex): $(output_dir) $(BINARY)
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$(base_dir)/scripts/smartelf2hex.sh $(BINARY) > $(binary_hex)
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run-binary-hex: check-binary
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run-binary-hex: $(output_dir) $(SIM_PREREQ) $(binary_hex)
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run-binary-hex: run-binary
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run-binary-hex: override LOADMEM_ADDR = 80000000
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run-binary-hex: override LOADMEM = $(binary_hex)
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run-binary-hex: override SIM_FLAGS += +loadmem=$(LOADMEM) +loadmem_addr=$(LOADMEM_ADDR)
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run-binary-debug-hex: check-binary
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run-binary-debug-hex: $(output_dir) $(SIM_DEBUG_REREQ) $(binary_hex)
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run-binary-debug-hex: run-binary-debug
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run-binary-debug-hex: override LOADMEM_ADDR = 80000000
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run-binary-debug-hex: override LOADMEM = $(binary_hex)
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run-binary-debug-hex: override SIM_FLAGS += +loadmem=$(LOADMEM) +loadmem_addr=$(LOADMEM_ADDR)
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run-binary-fast-hex: check-binary
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run-binary-fast-hex: $(output_dir) $(SIM_PREREQ) $(binary_hex)
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run-binary-fast-hex: run-binary-fast
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run-binary-fast-hex: override LOADMEM_ADDR = 80000000
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run-binary-fast-hex: override LOADMEM = $(binary_hex)
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run-binary-fast-hex: override SIM_FLAGS += +loadmem=$(LOADMEM) +loadmem_addr=$(LOADMEM_ADDR)
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#########################################################################################
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# run assembly/benchmarks rules
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#########################################################################################
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$(output_dir):
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mkdir -p $@
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$(output_dir)/%: $(RISCV)/riscv64-unknown-elf/share/riscv-tests/isa/% $(output_dir)
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ln -sf $< $@
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$(output_dir)/%.run: $(output_dir)/% $(SIM_PREREQ)
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(set -o pipefail && $(NUMA_PREFIX) $(sim) $(PERMISSIVE_ON) $(SIM_FLAGS) $(EXTRA_SIM_FLAGS) $(SEED_FLAG) $(PERMISSIVE_OFF) $< </dev/null | tee $<.log) && touch $@
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$(output_dir)/%.out: $(output_dir)/% $(SIM_PREREQ)
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(set -o pipefail && $(NUMA_PREFIX) $(sim) $(PERMISSIVE_ON) $(SIM_FLAGS) $(EXTRA_SIM_FLAGS) $(SEED_FLAG) $(VERBOSE_FLAGS) $(PERMISSIVE_OFF) $< </dev/null 2> >(spike-dasm > $@) | tee $<.log)
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#########################################################################################
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# include build/project specific makefrags made from the generator
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#########################################################################################
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ifneq ($(filter run% %.run %.out %.vpd %.vcd %.fsdb,$(MAKECMDGOALS)),)
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-include $(build_dir)/$(long_name).d
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endif
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#######################################
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# Rules for building DRAMSim2 library
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#######################################
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dramsim_dir = $(base_dir)/tools/DRAMSim2
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dramsim_lib = $(dramsim_dir)/libdramsim.a
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$(dramsim_lib):
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$(MAKE) -C $(dramsim_dir) $(notdir $@)
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################################################
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# Helper to run SBT or manage the SBT server
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################################################
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SBT_COMMAND ?= shell
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.PHONY: launch-sbt
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launch-sbt:
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cd $(base_dir) && $(SBT_NON_THIN) "$(SBT_COMMAND)"
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.PHONY: check-thin-client
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check-thin-client:
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ifeq (,$(ENABLE_SBT_THIN_CLIENT))
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$(error ENABLE_SBT_THIN_CLIENT not set.)
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endif
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.PHONY: shutdown-sbt-server
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shutdown-sbt-server: check-thin-client
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cd $(base_dir) && $(SBT) "shutdown"
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.PHONY: start-sbt-server
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start-sbt-server: check-thin-client
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cd $(base_dir) && $(SBT) "exit"
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#########################################################################################
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# print help text
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#########################################################################################
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.PHONY: help
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help:
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@for line in $(HELP_LINES); do echo "$$line"; done
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#########################################################################################
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# Implicit rule handling
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#########################################################################################
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# Disable all suffix rules to improve Make performance on systems running older
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# versions of Make
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.SUFFIXES:
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