Files
chipyard/docs/Generators/index.rst
Abraham Gonzalez d0bec3fba7 Ariane Integration (#448)
* [ariane/make] integrate ariane | have verilator be installed on path not in makefile

* [misc] warn on verilator not found | search for v files | cleanup build.sbt + .gitignore

* [firesim] bump

* [ci] add midas ariane tests

* [docker/ci] use new docker-image with verilator | re-elab on v changes for ariane | address comments

* [ci] remove references to local verilator install

* [verilator] update flags

* [verilator] minimal set of flags for ariane

* [ariane] bump ariane to master

* [ci] revert to 4.016 verilator

* [ci] install verilator to ci server | misc compile fixes

* [ci/make] add longer ci timeout | update when assert is added in verilator sim

* [firesim] bump for misc. updates

* [make/ci] cleanup makefile and remove firesim tests of it

* [docs/firesim] bump and clean docs

* [firesim] bump

* [ci] use remote verilator for midas tests

* [misc] cleanup built.sbt more

* [firesim] bump

* [misc] bump build.sbt patch for tutorials

* [firesim/ci] cleanup and bump firesim
2020-03-09 18:06:41 -07:00

32 lines
1.1 KiB
ReStructuredText

.. _generator-index:
Included RTL Generators
============================
A Generator can be thought of as a generalized RTL design, written using a mix of meta-programming and standard RTL.
This type of meta-programming is enabled by the Chisel hardware description language (see :ref:`Chisel`).
A standard RTL design is essentially just a single instance of a design coming from a generator.
However, by using meta-programming and parameter systems, generators can allow for integration of complex hardware designs in automated ways.
The following pages introduce the generators integrated with the Chipyard framework.
Chipyard bundles the source code for the generators, under the ``generators/`` directory.
It builds them from source each time (although the build system will cache results if they have not changed),
so changes to the generators themselves will automatically be used when building with Chipyard and propagate to software simulation, FPGA-accelerated simulation, and VLSI flows.
.. toctree::
:maxdepth: 2
:caption: Generators:
Rocket-Chip
Rocket
BOOM
Hwacha
Gemmini
IceNet
TestChipIP
SiFive-Generators
SHA3
Ariane