From 36895d6e7cb0f802d8ce725f7d38aab2627470e6 Mon Sep 17 00:00:00 2001
From: felsabbagh3 <felsabbagh3@gatech.edu>
Date: Sun, 29 Mar 2020 21:21:53 -0700
Subject: [PATCH] Fixed miss_add on for snoop replays

---
 rtl/VX_cache/VX_bank.v | 2 +-
 rtl/VX_define.v        | 6 +++---
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/rtl/VX_cache/VX_bank.v b/rtl/VX_cache/VX_bank.v
index 7ff4153a..f7e6090c 100644
--- a/rtl/VX_cache/VX_bank.v
+++ b/rtl/VX_cache/VX_bank.v
@@ -523,7 +523,7 @@ module VX_bank
 	wire invalidate_fill;
 
 	// Enqueue to miss reserv if it's a valid miss
-	assign miss_add       = valid_st2 && miss_st2 && !mrvq_full && !((is_snp_st2 && valid_st2 && ffsq_full) ||((valid_st2 && !miss_st2) && cwbq_full) || (((valid_st2 && miss_st2 && dirty_st2) || fill_saw_dirty_st2) && dwbq_full) || (valid_st2 && miss_st2 && mrvq_full));
+	assign miss_add       = valid_st2 && !is_snp_st2 && miss_st2 && !mrvq_full && !((is_snp_st2 && valid_st2 && ffsq_full) ||((valid_st2 && !miss_st2) && cwbq_full) || (((valid_st2 && miss_st2 && dirty_st2) || fill_saw_dirty_st2) && dwbq_full) || (valid_st2 && miss_st2 && mrvq_full));
 	assign miss_add_pc    = pc_st2;
 	assign miss_add_addr  = addr_st2;
 	assign miss_add_data  = writeword_st2;
diff --git a/rtl/VX_define.v b/rtl/VX_define.v
index 17f34734..870a5414 100644
--- a/rtl/VX_define.v
+++ b/rtl/VX_define.v
@@ -223,7 +223,7 @@
 
 // Snoop Req Queue
 `ifndef DSNRQ_SIZE
-`define DSNRQ_SIZE 8
+`define DSNRQ_SIZE 32
 `endif
 
 // Queues for writebacks Knobs {1, 2, 4, 8, ...}
@@ -250,7 +250,7 @@
 
 // Fill Forward SNP Queue
 `ifndef DFFSQ_SIZE
-`define DFFSQ_SIZE 8
+`define DFFSQ_SIZE 32
 `endif
 
 // Fill Invalidator Size {Fill invalidator must be active}
@@ -331,7 +331,7 @@
 
 // Snoop Req Queue
 `ifndef ISNRQ_SIZE
-`define ISNRQ_SIZE 8
+`define ISNRQ_SIZE 32
 `endif
 
 // Queues for writebacks Knobs {1, 2, 4, 8, ...}