refactoring all arbiters with buffering for request count > 2, optimized the cache core response module in critical path when running as L2

hw/rtl/VX_config.vh

@@ -8,7 +8,7 @@
 `endif
 
 `ifndef NUM_CORES
-`define NUM_CORES 4
+`define NUM_CORES 2
 `endif
 
 `ifndef NUM_WARPS
@@ -250,11 +250,6 @@
 `define IBANK_LINE_SIZE `GLOBAL_BLOCK_SIZE
 `endif
 
-// Number of banks {1, 2, 4, 8,...}
-`ifndef INUM_BANKS
-`define INUM_BANKS 1
-`endif
-
 // Size of a word in bytes
 `ifndef IWORD_SIZE
 `define IWORD_SIZE 4