L2 and L1 using different block size support, RTLsim fixes, dram_rsp_ready optimization

2020-11-21 09:47:56 -08:00
parent a7da36c007
commit 1795980a52
50 changed files with 972 additions and 952 deletions
--- a/hw/simulate/testbench.cpp
+++ b/hw/simulate/testbench.cpp
@@ -3,6 +3,10 @@
 #include <fstream>
 #include <iomanip>

+#define GREEN   "\\033[32m"
+#define RED     "\\033[31m"
+#define DEFAULT "\\033[39m"
+
 #define ALL_TESTS

 int main(int argc, char **argv) {