From 38f73af627f381c084834f62d2102972ba973cb8 Mon Sep 17 00:00:00 2001 From: Blaise Tine Date: Tue, 21 Apr 2020 17:50:42 -0400 Subject: [PATCH] update --- hw/rtl/{VX_alu.v => VX_alu_unit.v} | 0 hw/rtl/VX_lsu_unit.v | 2 +- hw/simulate/simulator.cpp | 2 +- 3 files changed, 2 insertions(+), 2 deletions(-) rename hw/rtl/{VX_alu.v => VX_alu_unit.v} (100%) diff --git a/hw/rtl/VX_alu.v b/hw/rtl/VX_alu_unit.v similarity index 100% rename from hw/rtl/VX_alu.v rename to hw/rtl/VX_alu_unit.v diff --git a/hw/rtl/VX_lsu_unit.v b/hw/rtl/VX_lsu_unit.v index 4ee25e8f..4bbff8f6 100644 --- a/hw/rtl/VX_lsu_unit.v +++ b/hw/rtl/VX_lsu_unit.v @@ -1,6 +1,6 @@ `include "VX_define.vh" -module VX_lsu ( +module VX_lsu_unit ( input wire clk, input wire reset, input wire no_slot_mem, diff --git a/hw/simulate/simulator.cpp b/hw/simulate/simulator.cpp index dafdcb20..00afa590 100644 --- a/hw/simulate/simulator.cpp +++ b/hw/simulate/simulator.cpp @@ -306,7 +306,7 @@ bool Simulator::run() { int status = 0; #else // check riscv-tests PASSED/FAILED status - int status = (int)vortex_->Vortex->back_end->wb->last_data_wb & 0xf; + int status = (int)vortex_->Vortex->back_end->writeback->last_data_wb & 0xf; #endif return (status == 1);