RTL code refactoring

hw/rtl/libs/VX_priority_encoder.v

@@ -1,21 +1,28 @@
 `include "VX_define.vh"
 
-module VX_priority_encoder (
-    input  wire[`NUM_WARPS-1:0] valids,
-    output reg[`NW_BITS-1:0] 	index,
-    output reg           		found
+module VX_priority_encoder #( 
+	parameter N
+) (
+    input  wire [N-1:0]          valids,
+    output wire [`LOG2UP(N)-1:0] index,
+    output wire           	 	 found
 );
+	reg [`LOG2UP(N)-1:0] index_r;
+	reg found_r;
 
 	integer i;
 	always @(*) begin
-		index = 0;
-		found = 0;
+		index_r = 0;
+		found_r = 0;
 		for (i = `NUM_WARPS-1; i >= 0; i = i - 1) begin
 			if (valids[i]) begin
-				index = i[`NW_BITS-1:0];
-				found = 1;
+				index_r = i[`NW_BITS-1:0];
+				found_r = 1;
 			end
 		end
 	end
+
+	assign index = index_r;
+	assign found = found_r;
 	
 endmodule