diff --git a/hw/rtl/VX_lsu_unit.v b/hw/rtl/VX_lsu_unit.v index 507b4c2e..3a04032c 100644 --- a/hw/rtl/VX_lsu_unit.v +++ b/hw/rtl/VX_lsu_unit.v @@ -62,14 +62,14 @@ module VX_lsu_unit #( assign dcache_rsp_if.core_rsp_ready = ~no_slot_mem; assign {mem_wb_if.pc, mem_wb_if.wb, mem_wb_if.rd, mem_wb_if.warp_num} = dcache_rsp_if.core_rsp_tag; - always_comb begin + /*always_comb begin if (1'($time & 1) && dcache_req_if.core_req_ready && (| dcache_req_if.core_req_valid)) begin $display("*** %t: D%01d$ req: valid=%b, addr=%0h, tag=%0h, r=%0d, w=%0d, pc=%0h, rd=%0d, warp=%0d, data=%0h", $time, CORE_ID, use_valid, use_address, dcache_req_if.core_req_tag, use_mem_read, use_mem_write, use_pc, use_rd, use_warp_num, use_store_data); end if (1'($time & 1) && dcache_rsp_if.core_rsp_ready && (| dcache_rsp_if.core_rsp_valid)) begin $display("*** %t: D%01d$ rsp: valid=%b, tag=%0h, pc=%0h, rd=%0d, warp=%0d, data=%0h", $time, CORE_ID, mem_wb_if.valid, dcache_rsp_if.core_rsp_tag, mem_wb_if.pc, mem_wb_if.rd, mem_wb_if.warp_num, mem_wb_if.data); end - end + end*/ endmodule diff --git a/hw/rtl/Vortex_Socket.v b/hw/rtl/Vortex_Socket.v index a9f4b5bb..f83f20c8 100644 --- a/hw/rtl/Vortex_Socket.v +++ b/hw/rtl/Vortex_Socket.v @@ -328,13 +328,13 @@ module Vortex_Socket ( ); end - always_comb begin + /*always_comb begin if (1'($time & 1) && (dram_req_read || dram_req_write) && dram_req_ready) begin $display("*** %t: DRAM req: w=%b addr=%0h, tag=%0h, data=%0h", $time, dram_req_write, {dram_req_addr, `CLOG2(`GLOBAL_BLOCK_SIZE)'(0)}, dram_req_tag, dram_req_data); end if (1'($time & 1) && dram_rsp_valid && dram_rsp_ready) begin $display("*** %t: DRAM rsp: tag=%0h, data=%0h", $time, dram_rsp_tag, dram_rsp_data); end - end + end*/ endmodule \ No newline at end of file diff --git a/hw/rtl/cache/VX_snp_forwarder.v b/hw/rtl/cache/VX_snp_forwarder.v index 70daeb76..7082ac41 100644 --- a/hw/rtl/cache/VX_snp_forwarder.v +++ b/hw/rtl/cache/VX_snp_forwarder.v @@ -112,7 +112,7 @@ module VX_snp_forwarder #( assign snp_fwdin_ready[i] = fwdin_ready && (fwdin_sel == `REQS_BITS'(i)); end - always_comb begin + /*always_comb begin if (1'($time & 1) && snp_req_valid && snp_req_ready) begin $display("*** %t: snp req: addr=%0h, tag=%0h", $time, snp_req_addr, snp_req_tag); end @@ -125,6 +125,6 @@ module VX_snp_forwarder #( if (1'($time & 1) && snp_rsp_valid && snp_rsp_ready) begin $display("*** %t: snp rsp: addr=%0h, tag=%0h", $time, snp_rsp_addr, snp_rsp_tag); end - end + end*/ endmodule \ No newline at end of file