Before evict_wb_old removal

This commit is contained in:
felsabbagh3
2019-11-07 13:27:38 -05:00
parent 3372baea87
commit 58a9140f08
28 changed files with 344 additions and 331 deletions

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@@ -9,7 +9,7 @@ module VX_cache_bank_valid
(
input wire [NUM_REQ-1:0] i_p_valid,
input wire [NUM_REQ-1:0][31:0] i_p_addr,
output reg [NUMBER_BANKS - 1 : 0][`NT_M1:0] thread_track_banks
output reg [NUMBER_BANKS - 1 : 0][NUM_REQ-1:0] thread_track_banks
);
generate

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@@ -93,7 +93,7 @@ module VX_cache_data_per_index
genvar ways;
for(ways=0; ways < CACHE_WAYS; ways = ways + 1) begin
for(ways=0; ways < CACHE_WAYS; ways = ways + 1) begin : each_way
assign hit_per_way[ways] = ((valid_use_per_way[ways] == 1'b1) && (tag_use_per_way[ways] == tag_write)) ? 1'b1 : 0;
assign we_per_way[ways] = (evict == 1'b1) || (update == 1'b1) ? ((ways == way_to_update) ? (we) : 0) : 0;

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@@ -36,7 +36,8 @@ module VX_d_cache
parameter ADDR_OFFSET_START = 5,
parameter ADDR_OFFSET_END = 6,
parameter ADDR_IND_START = 7,
parameter ADDR_IND_END = 14
parameter ADDR_IND_END = 14,
parameter MEM_ADDR_REQ_MASK = 32'hffffffc0
)
(
clk,
@@ -353,8 +354,8 @@ module VX_d_cache
// Mem Rsp
// Req to mem:
assign o_m_evict_addr = evict_addr & 32'hffffffc0;
assign o_m_read_addr = miss_addr & 32'hffffffc0;
assign o_m_evict_addr = evict_addr & MEM_ADDR_REQ_MASK;
assign o_m_read_addr = miss_addr & MEM_ADDR_REQ_MASK;
assign o_m_valid = (state == SEND_MEM_REQ);
assign o_m_read_or_write = (state == SEND_MEM_REQ) && (|eviction_wb_old);
//end