pipeline refactoring: centralized issue buffer

2020-07-26 11:21:08 -04:00
parent 1f63f9da25
commit 7c86b68977
62 changed files with 923 additions and 820 deletions
--- a/hw/rtl/interfaces/VX_ifetch_rsp_if.v
+++ b/hw/rtl/interfaces/VX_ifetch_rsp_if.v
@@ -5,11 +5,12 @@

 interface VX_ifetch_rsp_if ();

-    wire [`NUM_THREADS-1:0]   valid;    
-    wire [`NW_BITS-1:0]       warp_num;
-    wire [31:0]               curr_PC;
-    wire [31:0]               instr;
-    wire                      ready;
+    wire                    valid;    
+    wire [`NUM_THREADS-1:0] thread_mask;    
+    wire [`NW_BITS-1:0]     warp_num;
+    wire [31:0]             curr_PC;
+    wire [31:0]             instr;
+    wire                    ready;

 endinterface