diff --git a/driver/sw/rtlsim/Makefile b/driver/sw/rtlsim/Makefile index 1dc5e3f8..020694a2 100644 --- a/driver/sw/rtlsim/Makefile +++ b/driver/sw/rtlsim/Makefile @@ -1,5 +1,6 @@ -#CFLAGS += -std=c++11 -O3 -Wall -Wextra -pedantic -Wfatal-errors -CFLAGS += -std=c++11 -g -O0 -Wall -Wextra -pedantic -Wfatal-errors +# CFLAGS += -std=c++11 -O3 -Wall -Wextra -pedantic -Wfatal-errors +CFLAGS += -std=c++11 -O2 -Wall -Wextra -pedantic -Wfatal-errors +# CFLAGS += -std=c++11 -g -O0 -Wall -Wextra -pedantic -Wfatal-errors USE_MULTICORE=1 @@ -27,7 +28,7 @@ RTL_INCLUDE = -I../../../rtl -I../../../rtl/interfaces -I../../../rtl/cache -I.. #THREADS ?= $(shell python3 -c 'import multiprocessing as mp; print(max(1, mp.cpu_count() // 2))') #VL_FLAGS += --threads $(THREADS) -VL_FLAGS += -Wno-UNDRIVEN --Wno-PINMISSING -Wno-STMTDLY -Wno-WIDTH -Wno-UNSIGNED -Wno-UNOPTFLAT -Wno-LITENDIAN +VL_FLAGS += -Wno-UNDRIVEN --Wno-PINMISSING -Wno-STMTDLY -Wno-WIDTH -Wno-UNSIGNED -Wno-UNOPTFLAT -Wno-LITENDIAN -Wno-BLKLOOPINIT # Debugigng #VL_FLAGS += --trace -DVL_DEBUG=1 @@ -46,4 +47,4 @@ $(PROJECT): $(SRCS) build_config make -j -C obj_dir -f V$(RTL_TOP).mk clean: - rm -rf $(PROJECT) obj_dir \ No newline at end of file + rm -rf $(PROJECT) obj_dir diff --git a/rtl/simulate/simulator.cpp b/rtl/simulate/simulator.cpp index 4d7e4d8a..58070712 100644 --- a/rtl/simulate/simulator.cpp +++ b/rtl/simulate/simulator.cpp @@ -351,6 +351,8 @@ void Simulator::send_snoops(uint32_t mem_addr, uint32_t size) { } void Simulator::flush_caches(uint32_t mem_addr, uint32_t size) { + printf("[sim] total cycles: %lld\n", this->total_cycles_); + // send snoops for L1 flush this->send_snoops(mem_addr, size); this->wait(PIPELINE_FLUSH_LATENCY); @@ -383,4 +385,4 @@ bool Simulator::run() { #endif return (status == 1); -} \ No newline at end of file +} diff --git a/run_tests.sh b/run_tests.sh new file mode 100755 index 00000000..9d249146 --- /dev/null +++ b/run_tests.sh @@ -0,0 +1,51 @@ +#!/bin/bash +set -e + +mkdir -p test_outputs + +output_dir="$(pwd)/test_outputs" + +(cd rtl ; python3 gen_synth_configs.py ; ls -l configs) + +config_location=rtl/configs + +declare -a test_names=("sgemm" "saxpy" "bfs" "guassian" "vecadd" "nearn" "sfilter") + +for test_name in ${test_names[@]}; do + if [ ! -d "benchmarks/new_opencl/$test_name" ]; then + echo "Unknown benchmark $test_name" + exit 1 + fi +done + + +for filename in "$config_location"/*.sh; do + +name=${filename##*/} +base=${name%.*} + +. "$filename" + +make -C rtl build_config +make -C runtime build_config +make -C driver/sw/rtlsim + +for test_name in ${test_names[@]}; do + +( + +echo "Running $base-$test_name..." + +cd "benchmarks/new_opencl/$test_name" +make clean +make +make run-rtlsim 2>&1 | tee "$output_dir/$base-$test_name.log" +) & + +done # test_name + +wait + +done # config + +