From 86aabbbf5d624ac00b58a9211808b1cfc869ea7f Mon Sep 17 00:00:00 2001
From: Blaise Tine <tinebp@yahoo.com>
Date: Mon, 28 Jun 2021 08:00:29 -0700
Subject: [PATCH] minor update

---
 driver/opae/vlsim/opae_sim.cpp | 6 +++---
 hw/rtl/afu/VX_to_mem.v         | 2 +-
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/driver/opae/vlsim/opae_sim.cpp b/driver/opae/vlsim/opae_sim.cpp
index 98f54730..dc1f8b07 100644
--- a/driver/opae/vlsim/opae_sim.cpp
+++ b/driver/opae/vlsim/opae_sim.cpp
@@ -307,7 +307,7 @@ void opae_sim::avs_bus() {
       memcpy(vortex_afu_->avs_readdata[b], mem_rd_it->data.data(), MEM_BLOCK_SIZE);
       uint32_t addr = mem_rd_it->addr;
       mem_reads_[b].erase(mem_rd_it);
-      /*printf("%0ld: [sim] MEM Rd Rsp: addr=%x, pending={", timestamp, addr * MEM_BLOCK_SIZE);
+      /*printf("%0ld: [sim] MEM Rd Rsp: bank=%d, addr=%x, pending={", timestamp, b, addr * MEM_BLOCK_SIZE);
       for (auto& req : mem_reads_[b]) {
         if (req.cycles_left != 0) 
           printf(" !%0x", req.addr * MEM_BLOCK_SIZE);
@@ -340,7 +340,7 @@ void opae_sim::avs_bus() {
             ram_[base_addr + i] = data[i];
           }
         }
-        /*printf("%0ld: [sim] MEM Wr Req: addr=%x, data=", timestamp, base_addr);
+        /*printf("%0ld: [sim] MEM Wr Req: bank=%d, addr=%x, data=", timestamp, b, base_addr);
         for (int i = 0; i < MEM_BLOCK_SIZE; i++) {
           printf("%0x", data[(MEM_BLOCK_SIZE-1)-i]);
         }
@@ -358,7 +358,7 @@ void opae_sim::avs_bus() {
           }
         }
         mem_reads_[b].emplace_back(mem_req);
-        /*printf("%0ld: [sim] MEM Rd Req: addr=%x, pending={", timestamp, mem_req.addr * MEM_BLOCK_SIZE);
+        /*printf("%0ld: [sim] MEM Rd Req: bank=%d, addr=%x, pending={", timestamp, b, mem_req.addr * MEM_BLOCK_SIZE);
         for (auto& req : mem_reads_[b]) {
           if (req.cycles_left != 0) 
             printf(" !%0x", req.addr * MEM_BLOCK_SIZE);
diff --git a/hw/rtl/afu/VX_to_mem.v b/hw/rtl/afu/VX_to_mem.v
index c9c6287c..6401453a 100644
--- a/hw/rtl/afu/VX_to_mem.v
+++ b/hw/rtl/afu/VX_to_mem.v
@@ -122,7 +122,7 @@ module VX_to_mem #(
             end 
         end
         assign mem_rsp_tag_in_w = (rsp_ctr != 0) ? mem_rsp_tag_in_r : mem_rsp_tag_in;
-        `RUNTIME_ASSERT((mem_rsp_tag_in_w == mem_rsp_tag_in), ("oops!"))
+        `RUNTIME_ASSERT(!mem_rsp_in_fire || (mem_rsp_tag_in_w == mem_rsp_tag_in), ("out-of-order memory reponse! cur=%d, expected=%d", mem_rsp_tag_in_w, mem_rsp_tag_in))
 
         wire [SRC_ADDR_WIDTH+D-1:0] mem_req_addr_in_qual = {mem_req_addr_in, req_ctr};