diff --git a/hw/rtl/VX_cluster.sv b/hw/rtl/VX_cluster.sv index d537249d..90076673 100644 --- a/hw/rtl/VX_cluster.sv +++ b/hw/rtl/VX_cluster.sv @@ -167,6 +167,6 @@ module VX_cluster import VX_gpu_pkg::*; #( ); end - `BUFFER_BUSY (busy, (| per_socket_busy), (`NUM_SOCKETS > 1)); + `BUFFER_EX(busy, (| per_socket_busy), 1'b1, (`NUM_SOCKETS > 1)); endmodule diff --git a/hw/rtl/VX_define.vh b/hw/rtl/VX_define.vh index 5dcf1f2f..95d206ce 100644 --- a/hw/rtl/VX_define.vh +++ b/hw/rtl/VX_define.vh @@ -307,20 +307,20 @@ /////////////////////////////////////////////////////////////////////////////// -`define BUFFER_BUSY(dst, src, enable) \ - logic __busy; \ - if (enable) begin \ - always @(posedge clk) begin \ - if (reset) begin \ - __busy <= 1'b0; \ - end else begin \ - __busy <= src; \ - end \ - end \ - end else begin \ - assign __busy = src; \ - end \ - assign dst = __busy +`define BUFFER_EX(dst, src, ena, latency) \ + VX_pipe_register #( \ + .DATAW ($bits(dst)), \ + .RESETW ($bits(dst)), \ + .DEPTH (latency) \ + ) __``dst ( \ + .clk (clk), \ + .reset (reset), \ + .enable (ena), \ + .data_in (src), \ + .data_out (dst) \ + ) + +`define BUFFER(dst, src) `BUFFER_EX(dst, src, 1'b1, 1) `define POP_COUNT_EX(out, in, model) \ VX_popcount #( \ diff --git a/hw/rtl/VX_socket.sv b/hw/rtl/VX_socket.sv index 1e61fdff..139598d9 100644 --- a/hw/rtl/VX_socket.sv +++ b/hw/rtl/VX_socket.sv @@ -245,6 +245,6 @@ module VX_socket import VX_gpu_pkg::*; #( ); end - `BUFFER_BUSY (busy, (| per_core_busy), (`SOCKET_SIZE > 1)); + `BUFFER_EX(busy, (| per_core_busy), 1'b1, (`SOCKET_SIZE > 1)); endmodule diff --git a/hw/rtl/Vortex.sv b/hw/rtl/Vortex.sv index 5bd628d5..594204e4 100644 --- a/hw/rtl/Vortex.sv +++ b/hw/rtl/Vortex.sv @@ -166,7 +166,7 @@ module Vortex import VX_gpu_pkg::*; ( ); end - `BUFFER_BUSY (busy, (| per_cluster_busy), (`NUM_CLUSTERS > 1)); + `BUFFER_EX(busy, (| per_cluster_busy), 1'b1, (`NUM_CLUSTERS > 1)); `ifdef PERF_ENABLE diff --git a/hw/rtl/core/VX_schedule.sv b/hw/rtl/core/VX_schedule.sv index 0ffeafc2..9008f605 100644 --- a/hw/rtl/core/VX_schedule.sv +++ b/hw/rtl/core/VX_schedule.sv @@ -353,7 +353,7 @@ module VX_schedule import VX_gpu_pkg::*; #( .empty (no_pending_instr) ); - `BUFFER_BUSY (busy, (active_warps != 0 || ~no_pending_instr), 1); + `BUFFER_EX(busy, (active_warps != 0 || ~no_pending_instr), 1'b1, 1); // export CSRs assign sched_csr_if.cycles = cycles;