Stats output on request.

src/core.cpp

@@ -30,7 +30,7 @@ void Harp::reg_doWrite(Word cpuId, Word regNum) {
 #endif
 
 Core::Core(const ArchDef &a, Decoder &d, MemoryUnit &mem, Word id):
-  a(a), iDec(d), mem(mem)
+  a(a), iDec(d), mem(mem), steps(0)
 {
   for (unsigned i = 0; i < a.getNWarps(); ++i)
     w.push_back(Warp(this));
@@ -44,6 +44,8 @@ bool Core::interrupt(Word r0) {
 }
 
 void Core::step() {
+  ++steps;
+
   for (unsigned i = 0; i < w.size(); ++i) {
     if (w[i].activeThreads) {
       D(3, "Core step stepping warp " << i << '[' << w[i].activeThreads << ']');
@@ -59,11 +61,20 @@ bool Core::running() const {
   return false;
 }
 
+void Core::printStats() const {
+  cout << "Steps: " << steps << endl;
+
+  for (unsigned i = 0; i < w.size(); ++i) {
+    cout << "=== Warp " << i << " ===" << endl;
+    w[i].printStats();
+  }
+}
+
 Warp::Warp(Core *c, Word id) : 
   core(c), pc(0), interruptEnable(true),
   supervisorMode(true), activeThreads(0), reg(0), pred(0),
   shadowReg(core->a.getNRegs()), shadowPReg(core->a.getNPRegs()), id(id),
-  spawned(false)
+  spawned(false), steps(0), insts(0), loads(0), stores(0)
 {
   /* Build the register file. */
   Word regNum(0);
@@ -92,6 +103,8 @@ void Warp::step() {
 
   if (activeThreads == 0) return;
 
+  ++steps;
+  
   D(3, "in step pc=0x" << hex << pc);
 
   /* Fetch and decode. */
@@ -205,3 +218,10 @@ bool Warp::interrupt(Word r0) {
 
   return true;
 }
+
+void Warp::printStats() const {
+  cout << "Steps: " << steps << endl
+       << "Insts: " << insts << endl
+       << "Loads: " << loads << endl
+       << "Stores: " << stores << endl;
+}

src/harptool.cpp

@@ -207,12 +207,13 @@ int disasm_main(int argc, char **argv) {
 
 int emu_main(int argc, char **argv) {
   string archString("8w32/32/8/8"), imgFileName("a.out.bin");
-  bool showHelp;
+  bool showHelp, showStats;
 
   /* Read the command line arguments. */
   CommandLineArgFlag          fh("-h", "--help", "", showHelp);
   CommandLineArgSetter<string>fc("-c", "--core", "", imgFileName);
   CommandLineArgSetter<string>fa("-a", "--arch", "", archString);
+  CommandLineArgFlag          fs("-s", "--stats", "", showStats);
   
   CommandLineArg::readArgs(argc, argv);
 
@@ -244,6 +245,8 @@ int emu_main(int argc, char **argv) {
 
   while (core.running()) { console.poll(); core.step(); }
 
+  if (showStats) core.printStats();
+
   return 0;
 }
 

src/include/core.h

@@ -79,12 +79,15 @@ namespace Harp {
     bool running() const;
     void step();
 
+    void printStats() const;
+    
     const ArchDef &a;
     Decoder &iDec;
     MemoryUnit &mem;
 
     Word interruptEntry;
 
+    unsigned long steps;
     std::vector<Warp> w;
     std::map<Word, std::set<Warp *> > b; // Barriers
   };
@@ -100,6 +103,8 @@ namespace Harp {
     bool getSupervisorMode() const { return supervisorMode; }
 #endif
 
+    void printStats() const;
+    
 //  private:
     Core *core;
 
@@ -117,6 +122,8 @@ namespace Harp {
     bool interruptEnable, shadowInterruptEnable, supervisorMode, 
          shadowSupervisorMode, spawned;
 
+    unsigned long steps, insts, loads, stores;
+    
     friend class Instruction;
   };
 };

src/instruction.cpp

@@ -150,6 +150,8 @@ void Instruction::executeOn(Warp &c) {
     if (((predicated && !pReg[pred]) || !c.tmask[t]) &&
           op != SPLIT && op != JOIN) continue;
 
+    ++c.insts;
+    
     Word memAddr;  
     switch (op) {
       case NOP: break;
@@ -250,14 +252,16 @@ void Instruction::executeOn(Warp &c) {
                   if (!pcSet) nextPc = reg[rsrc[0]];
                   pcSet = true;
                   break;
-      case LD: memAddr = reg[rsrc[0]] + immsrc;
+      case LD: ++c.loads;
+	       memAddr = reg[rsrc[0]] + immsrc;
 #ifdef EMU_INSTRUMENTATION
                Harp::OSDomain::osDomain->
                  do_mem(0, memAddr, c.core->mem.virtToPhys(memAddr), 8, true);
 #endif
                reg[rdest] = c.core->mem.read(memAddr, c.supervisorMode);
                break;
-      case ST: memAddr = reg[rsrc[1]] + immsrc;
+      case ST: ++c.stores;
+	       memAddr = reg[rsrc[1]] + immsrc;
                c.core->mem.write(memAddr, reg[rsrc[0]], c.supervisorMode);
 #ifdef EMU_INSTRUMENTATION
                Harp::OSDomain::osDomain->