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cache optimization - moved read requests to stage1 and eliminating stage3

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This commit is contained in:
Blaise Tine
2020-12-31 07:40:58 -08:00
parent 9f128085d5
commit abe32ed553
16 changed files with 301 additions and 355 deletions
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4
hw/rtl/VX_define.vh
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@@ -234,8 +234,8 @@
///////////////////////////////////////////////////////////////////////////////
`ifdef DBG_CACHE_REQ_INFO // pc, rd, wid
`define DBG_CACHE_REQ_MDATAW (32 + `NR_BITS + `NW_BITS)
`ifdef DBG_CACHE_REQ_INFO // wid PC
`define DBG_CACHE_REQ_MDATAW (`NW_BITS + 32)
`else
`define DBG_CACHE_REQ_MDATAW 0
`endif