removing pipeline additional registers
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@@ -284,7 +284,7 @@ module VX_fp_fpga #(
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tag_out_r = 'x;
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for (integer i = 0; i < NUM_FPC; i++) begin
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if (per_core_valid_out[i]) begin
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per_core_ready_out[i] = 1;
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per_core_ready_out[i] = ready_out;
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valid_out_r = 1;
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has_fflags_r = fpnew_has_fflags && (i == 0);
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result_r = per_core_result[i];
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@@ -82,7 +82,7 @@ module VX_fp_noncomp #(
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.o_type(tmp_b_type)
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);
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wire tmp_a_smaller = (dataa[i] < datab[i]) ^ (tmp_a_sign || tmp_b_sign);
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wire tmp_a_smaller = $signed(dataa[i]) < $signed(datab[i]);
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wire tmp_ab_equal = (dataa[i] == datab[i]) | (tmp_a_type[4] & tmp_b_type[4]);
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always @(posedge clk) begin
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