diff --git a/README.md b/README.md index 69b6a5c2..5ec60343 100644 --- a/README.md +++ b/README.md @@ -59,34 +59,4 @@ Run SGEMM OpenCL Benchmark $ cd Vortex/benchmarks/opencl/sgemm $ make -<<<<<<< HEAD $ make run - -Basic Instructions to build the OpenCL Compiler for Vortex ----------------------------------------------------------- - -Build LLVM for RiscV - - $ git clone -b release/10.x https://github.com/llvm/llvm-project.git llvm - $ cd llvm - $ mkdir build - $ cd build - $ cmake -G Ninja -DCMAKE_BUILD_TYPE=Debug -DLLVM_ENABLE_PROJECTS="clang" -DBUILD_SHARED_LIBS=True -DLLVM_USE_SPLIT_DWARF=True -DCMAKE_INSTALL_PREFIX=$RISC_GNU_TOOLS_PATH -DLLVM_OPTIMIZED_TABLEGEN=True -DLLVM_BUILD_TESTS=True -DDEFAULT_SYSROOT=$RISC_GNU_TOOLS_PATH/riscv32-unknown-elf -DLLVM_DEFAULT_TARGET_TRIPLE="riscv32-unknown-elf" -DLLVM_TARGETS_TO_BUILD="RISCV" .. - $ cmake --build . --target install - -Build pocl for RISCV - - $ git clone https://github.gatech.edu/casl/pocl.git - $ cd pocl - $ mkdir build - $ cd build - $ export POCL_CC_PATH=$PWD/../drops_riscv_cc - $ export POCL_RT_PATH=$PWD/../drops_riscv_rt - $ cmake -G Ninja -DCMAKE_INSTALL_PREFIX=$POCL_CC_PATH -DCMAKE_BUILD_TYPE=Debug -DWITH_LLVM_CONFIG=$RISC_GNU_TOOLS_PATH/bin/llvm-config -DNEWLIB_BSP=ON -DNEWLIB_DEVICE_ADDRESS_BIT=32 -DNEWLIB_DEVICE_MARCH=rv32im -DBUILD_TESTS=OFF -DPOCL_DEBUG_MESSAGES=ON .. - $ cmake --build . --target install - $ rm -rf * - $ cmake -G Ninja -DCMAKE_INSTALL_PREFIX=$POCL_RT_PATH -DCMAKE_BUILD_TYPE=Debug -DOCS_AVAILABLE=OFF -DBUILD_SHARED_LIBS=OFF -DNEWLIB_BSP=ON -DNEWLIB_DEVICE_ADDRESS_BIT=32 -DNEWLIB_DEVICE_MARCH=rv32im -DBUILD_TESTS=OFF -DHOST_DEVICE_BUILD_HASH=basic-riscv32-unknown-elf -DCMAKE_TOOLCHAIN_FILE=../RISCV_newlib.cmake -DENABLE_TRACING=OFF -DENABLE_ICD=OFF -DPOCL_DEBUG_MESSAGES=ON .. - $ cmake --build . --target install -======= - $ make run ->>>>>>> fpga_synthesis diff --git a/benchmarks/opencl/convolution/kernel.cl b/benchmarks/opencl/convolution/kernel.cl index 35de4707..ff56dc6f 100755 --- a/benchmarks/opencl/convolution/kernel.cl +++ b/benchmarks/opencl/convolution/kernel.cl @@ -1,58 +1,3 @@ -<<<<<<< HEAD -__kernel -void convolution( - __read_only image2d_t sourceImage, - __write_only image2d_t outputImage, - int rows, - int cols, - __constant float* filter, - int filterWidth, - sampler_t sampler) -{ - // Store each work-item’s unique row and column - int column = get_global_id(0); - int row = get_global_id(1); - - // Half the width of the filter is needed for indexing - // memory later - int halfWidth = (int)(filterWidth/2); - - // All accesses to images return data as four-element vector - // (i.e., float4), although only the 'x' component will contain - // meaningful data in this code - float4 sum = {0.0f, 0.0f, 0.0f, 0.0f}; - - // Iterator for the filter - int filterIdx = 0; - - // Each work-item iterates around its local area based on the - // size of the filter - int2 coords; // Coordinates for accessing the image - // Iterate the filter rows - for(int i = -halfWidth; i <= halfWidth; i++) { - coords.y = row + i; - - // Iterate over the filter columns - for(int j = -halfWidth; j <= halfWidth; j++) { - coords.x = column + j; - - float4 pixel; - // Read a pixel from the image. A single channel image - // stores the pixel in the 'x' coordinate of the returned - // vector. - pixel = read_imagef(sourceImage, sampler, coords); - sum.x += pixel.x * filter[filterIdx++]; - } - } - - // Copy the data to the output image if the - // work-item is in bounds - if(row < rows && column < cols) { - coords.x = column; - coords.y = row; - write_imagef(outputImage, coords, sum); - } -======= __kernel void convolution( __read_only image2d_t sourceImage, @@ -106,5 +51,4 @@ void convolution( coords.y = row; write_imagef(outputImage, coords, sum); } ->>>>>>> fpga_synthesis } \ No newline at end of file diff --git a/benchmarks/opencl/convolution/main.cpp b/benchmarks/opencl/convolution/main.cpp index b88d91d7..f5bf1584 100755 --- a/benchmarks/opencl/convolution/main.cpp +++ b/benchmarks/opencl/convolution/main.cpp @@ -1,265 +1,3 @@ -<<<<<<< HEAD -#include -#include -#include - -#include "utils.h" - -// This function takes a positive integer and rounds it up to -// the nearest multiple of another provided integer -unsigned int roundUp(unsigned int value, unsigned int multiple) { - - // Determine how far past the nearest multiple the value is - unsigned int remainder = value % multiple; - - // Add the difference to make the value a multiple - if(remainder != 0) { - value += (multiple-remainder); - } - - return value; -} - -// This function reads in a text file and stores it as a char pointer -char* readSource(char* kernelPath) { - - cl_int status; - FILE *fp; - char *source; - long int size; - - printf("Program file is: %s\n", kernelPath); - - fp = fopen(kernelPath, "rb"); - if(!fp) { - printf("Could not open kernel file\n"); - exit(-1); - } - status = fseek(fp, 0, SEEK_END); - if(status != 0) { - printf("Error seeking to end of file\n"); - exit(-1); - } - size = ftell(fp); - if(size < 0) { - printf("Error getting file position\n"); - exit(-1); - } - - rewind(fp); - - source = (char *)malloc(size + 1); - - int i; - for (i = 0; i < size+1; i++) { - source[i]='\0'; - } - - if(source == NULL) { - printf("Error allocating space for the kernel source\n"); - exit(-1); - } - - fread(source, 1, size, fp); - source[size] = '\0'; - - return source; -} - -void chk(cl_int status, const char* cmd) { - - if(status != CL_SUCCESS) { - printf("%s failed (%d)\n", cmd, status); - exit(-1); - } -} - -int main() { - - int i, j, k, l; - - // Rows and columns in the input image - int imageHeight; - int imageWidth; - - const char* inputFile = "input.bmp"; - const char* outputFile = "output.bmp"; - - // Homegrown function to read a BMP from file - float* inputImage = readImage(inputFile, &imageWidth, - &imageHeight); - - // Size of the input and output images on the host - int dataSize = imageHeight*imageWidth*sizeof(float); - - // Output image on the host - float* outputImage = NULL; - outputImage = (float*)malloc(dataSize); - float* refImage = NULL; - refImage = (float*)malloc(dataSize); - - // 45 degree motion blur - float filter[49] = - {0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, - 0, 0, -1, 0, 1, 0, 0, - 0, 0, -2, 0, 2, 0, 0, - 0, 0, -1, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0}; - - // The convolution filter is 7x7 - int filterWidth = 7; - int filterSize = filterWidth*filterWidth; // Assume a square kernel - - // Set up the OpenCL environment - cl_int status; - - // Discovery platform - cl_platform_id platform; - status = clGetPlatformIDs(1, &platform, NULL); - chk(status, "clGetPlatformIDs"); - - // Discover device - cl_device_id device; - clGetDeviceIDs(platform, CL_DEVICE_TYPE_ALL, 1, &device, NULL); - chk(status, "clGetDeviceIDs"); - - // Create context - cl_context_properties props[3] = {CL_CONTEXT_PLATFORM, - (cl_context_properties)(platform), 0}; - cl_context context; - context = clCreateContext(props, 1, &device, NULL, NULL, &status); - chk(status, "clCreateContext"); - - // Create command queue - cl_command_queue queue; - queue = clCreateCommandQueue(context, device, 0, &status); - chk(status, "clCreateCommandQueue"); - - // The image format describes how the data will be stored in memory - cl_image_format format; - format.image_channel_order = CL_R; // single channel - format.image_channel_data_type = CL_FLOAT; // float data type - - // Create space for the source image on the device - cl_mem d_inputImage = clCreateImage2D(context, 0, &format, imageWidth, - imageHeight, 0, NULL, &status); - chk(status, "clCreateImage2D"); - - // Create space for the output image on the device - cl_mem d_outputImage = clCreateImage2D(context, 0, &format, imageWidth, - imageHeight, 0, NULL, &status); - chk(status, "clCreateImage2D"); - - // Create space for the 7x7 filter on the device - cl_mem d_filter = clCreateBuffer(context, 0, filterSize*sizeof(float), - NULL, &status); - chk(status, "clCreateBuffer"); - - // Copy the source image to the device - size_t origin[3] = {0, 0, 0}; // Offset within the image to copy from - size_t region[3] = {imageWidth, imageHeight, 1}; // Elements to per dimension - status = clEnqueueWriteImage(queue, d_inputImage, CL_FALSE, origin, region, - 0, 0, inputImage, 0, NULL, NULL); - chk(status, "clEnqueueWriteImage"); - - // Copy the 7x7 filter to the device - status = clEnqueueWriteBuffer(queue, d_filter, CL_FALSE, 0, - filterSize*sizeof(float), filter, 0, NULL, NULL); - chk(status, "clEnqueueWriteBuffer"); - - // Create the image sampler - cl_sampler sampler = clCreateSampler(context, CL_FALSE, - CL_ADDRESS_CLAMP_TO_EDGE, CL_FILTER_NEAREST, &status); - chk(status, "clCreateSampler"); - - const char* source = readSource("kernel.cl"); - - // Create a program object with source and build it - cl_program program; - program = clCreateProgramWithSource(context, 1, &source, NULL, NULL); - chk(status, "clCreateProgramWithSource"); - status = clBuildProgram(program, 1, &device, NULL, NULL, NULL); - chk(status, "clBuildProgram"); - - // Create the kernel object - cl_kernel kernel; - kernel = clCreateKernel(program, "convolution", &status); - chk(status, "clCreateKernel"); - - // Set the kernel arguments - status = clSetKernelArg(kernel, 0, sizeof(cl_mem), &d_inputImage); - status |= clSetKernelArg(kernel, 1, sizeof(cl_mem), &d_outputImage); - status |= clSetKernelArg(kernel, 2, sizeof(int), &imageHeight); - status |= clSetKernelArg(kernel, 3, sizeof(int), &imageWidth); - status |= clSetKernelArg(kernel, 4, sizeof(cl_mem), &d_filter); - status |= clSetKernelArg(kernel, 5, sizeof(int), &filterWidth); - status |= clSetKernelArg(kernel, 6, sizeof(cl_sampler), &sampler); - chk(status, "clSetKernelArg"); - - // Set the work item dimensions - size_t globalSize[2] = {imageWidth, imageHeight}; - status = clEnqueueNDRangeKernel(queue, kernel, 2, NULL, globalSize, NULL, 0, - NULL, NULL); - chk(status, "clEnqueueNDRange"); - - // Read the image back to the host - status = clEnqueueReadImage(queue, d_outputImage, CL_TRUE, origin, - region, 0, 0, outputImage, 0, NULL, NULL); - chk(status, "clEnqueueReadImage"); - - // Write the output image to file - storeImage(outputImage, outputFile, imageHeight, imageWidth, inputFile); - - // Compute the reference image - for(i = 0; i < imageHeight; i++) { - for(j = 0; j < imageWidth; j++) { - refImage[i*imageWidth+j] = 0; - } - } - - // Iterate over the rows of the source image - int halfFilterWidth = filterWidth/2; - float sum; - for(i = 0; i < imageHeight; i++) { - // Iterate over the columns of the source image - for(j = 0; j < imageWidth; j++) { - sum = 0; // Reset sum for new source pixel - // Apply the filter to the neighborhood - for(k = - halfFilterWidth; k <= halfFilterWidth; k++) { - for(l = - halfFilterWidth; l <= halfFilterWidth; l++) { - if(i+k >= 0 && i+k < imageHeight && - j+l >= 0 && j+l < imageWidth) { - sum += inputImage[(i+k)*imageWidth + j+l] * - filter[(k+halfFilterWidth)*filterWidth + - l+halfFilterWidth]; - } - } - } - refImage[i*imageWidth+j] = sum; - } - } - - int failed = 0; - for(i = 0; i < imageHeight; i++) { - for(j = 0; j < imageWidth; j++) { - if(abs(outputImage[i*imageWidth+j]-refImage[i*imageWidth+j]) > 0.01) { - printf("Results are INCORRECT\n"); - printf("Pixel mismatch at <%d,%d> (%f vs. %f)\n", i, j, - outputImage[i*imageWidth+j], refImage[i*imageWidth+j]); - failed = 1; - } - if(failed) break; - } - if(failed) break; - } - if(!failed) { - printf("Results are correct\n"); - } - - return 0; -======= #include #include #include @@ -520,5 +258,4 @@ int main() { } return 0; ->>>>>>> fpga_synthesis } \ No newline at end of file diff --git a/runtime/qemu/vx_api.c b/runtime/qemu/vx_api.c index f2e7ce81..16bb493c 100644 --- a/runtime/qemu/vx_api.c +++ b/runtime/qemu/vx_api.c @@ -1,27 +1,11 @@ #include #include -<<<<<<< HEAD -======= #include "../vx_api/vx_api.h" ->>>>>>> fpga_synthesis #ifdef __cplusplus extern "C" { #endif -<<<<<<< HEAD -struct pocl_context_t { - uint32_t num_groups[3]; - uint32_t global_offset[3]; - uint32_t local_size[3]; - uint8_t *printf_buffer; - uint32_t *printf_buffer_position; - uint32_t printf_buffer_capacity; - uint32_t work_dim; -}; - -======= ->>>>>>> fpga_synthesis typedef void (*pocl_workgroup_func) ( void * /* args */, void * /* pocl_context */, @@ -30,11 +14,7 @@ typedef void (*pocl_workgroup_func) ( uint32_t /* group_z */ ); -<<<<<<< HEAD -void pocl_spawn(struct pocl_context_t * ctx, const pocl_workgroup_func pfn, void * arguments) { -======= void pocl_spawn(struct pocl_context_t * ctx, pocl_workgroup_func pfn, const void * args) { ->>>>>>> fpga_synthesis uint32_t x, y, z; for (z = 0; z < ctx->num_groups[2]; ++z) for (y = 0; y < ctx->num_groups[1]; ++y) diff --git a/simX/include/archdef.h b/simX/include/archdef.h index 710c44c9..1b4b2f3e 100644 --- a/simX/include/archdef.h +++ b/simX/include/archdef.h @@ -16,12 +16,7 @@ namespace Harp { public: struct Undefined {}; -<<<<<<< HEAD - ArchDef(const std::string &s, bool cpu_mode = false) - : cpu_mode_(cpu_mode) { -======= ArchDef(const std::string &s, int num_warps = 32, int num_threads = 32) { ->>>>>>> fpga_synthesis std::istringstream iss(s.c_str()); wordSize = 4; diff --git a/simX/instruction.cpp b/simX/instruction.cpp index 8249858e..0c04eb6a 100644 --- a/simX/instruction.cpp +++ b/simX/instruction.cpp @@ -707,105 +707,6 @@ void Instruction::executeOn(Warp &c, trace_inst_t *trace_inst) { pcSet = true; } break; -<<<<<<< HEAD - case SYS_INST: - //std::cout << "SYS_INST\n"; - temp = reg[rsrc[0]]; - - if (!c.core->a.is_cpu_mode()) { - // - // GPGPU CSR extension - // - if (immsrc == 0x20) // ThreadID - { - reg[rdest] = t; - D(2, "CSR Reading tid " << hex << immsrc << dec << " and returning " << reg[rdest]); - } - else if (immsrc == 0x21) // WarpID - { - reg[rdest] = c.id; - D(2, "CSR Reading wid " << hex << immsrc << dec << " and returning " << reg[rdest]); - } - else if (immsrc == 0x25) - { - reg[rdest] = c.core->num_instructions; - } - else if (immsrc == 0x26) - { - reg[rdest] = c.core->num_cycles; - } - } else { - switch (func3) - { - case 1: - // printf("Case 1\n"); - if (rdest != 0) - { - reg[rdest] = c.csr[immsrc & 0x00000FFF]; - } - c.csr[immsrc & 0x00000FFF] = temp; - - break; - case 2: - // printf("Case 2\n"); - if (rdest != 0) - { - // printf("Reading from CSR: %d = %d\n", (immsrc & 0x00000FFF), c.csr[immsrc & 0x00000FFF]); - reg[rdest] = c.csr[immsrc & 0x00000FFF]; - } - // printf("Writing to CSR --> %d = %d\n", immsrc, (temp | c.csr[immsrc & 0x00000FFF])); - c.csr[immsrc & 0x00000FFF] = temp | c.csr[immsrc & 0x00000FFF]; - - break; - case 3: - // printf("Case 3\n"); - if (rdest != 0) - { - reg[rdest] = c.csr[immsrc & 0x00000FFF]; - } - c.csr[immsrc & 0x00000FFF] = temp & (~c.csr[immsrc & 0x00000FFF]); - - break; - case 5: - // printf("Case 5\n"); - if (rdest != 0) - { - reg[rdest] = c.csr[immsrc & 0x00000FFF]; - } - c.csr[immsrc & 0x00000FFF] = rsrc[0]; - - break; - case 6: - // printf("Case 6\n"); - if (rdest != 0) - { - reg[rdest] = c.csr[immsrc & 0x00000FFF]; - } - c.csr[immsrc & 0x00000FFF] = rsrc[0] | c.csr[immsrc & 0x00000FFF]; - - break; - case 7: - // printf("Case 7\n"); - if (rdest != 0) - { - reg[rdest] = c.csr[immsrc & 0x00000FFF]; - } - c.csr[immsrc & 0x00000FFF] = rsrc[0] & (~c.csr[immsrc & 0x00000FFF]); - - break; - case 0: - if (immsrc < 2) - { - //std::cout << "INTERRUPT ECALL/EBREAK\n"; - nextActiveThreads = 0; - c.spawned = false; - // c.interrupt(0); - } - break; - default: - break; - } -======= case 4: // BLT D(3, "BLT: r" << rsrc[0] << ", r" << rsrc[1] << ", imm=" << (int)immsrc); @@ -813,7 +714,6 @@ void Instruction::executeOn(Warp &c, trace_inst_t *trace_inst) { if (!pcSet) nextPc = (c.pc - 4) + immsrc; pcSet = true; ->>>>>>> fpga_synthesis } break; case 5: diff --git a/simX/simX.cpp b/simX/simX.cpp index cbb39ded..799d053f 100644 --- a/simX/simX.cpp +++ b/simX/simX.cpp @@ -59,14 +59,9 @@ HarpToolMode findMode(int argc, char** argv) { int emu_main(int argc, char **argv) { string archString("rv32i"); string imgFileName("a.dsfsdout.bin"); -<<<<<<< HEAD - bool showHelp, showStats, basicMachine, batch; - bool cpu_mode(false); -======= bool showHelp(false), showStats(false), basicMachine(true); int max_warps(NUM_WARPS); int max_threads(NUM_THREADS); ->>>>>>> fpga_synthesis /* Read the command line arguments. */ CommandLineArgFlag fh("-h", "--help", "", showHelp); @@ -74,13 +69,8 @@ int emu_main(int argc, char **argv) { CommandLineArgSetterfa("-a", "--arch", "", archString); CommandLineArgFlag fs("-s", "--stats", "", showStats); CommandLineArgFlag fb("-b", "--basic", "", basicMachine); -<<<<<<< HEAD - CommandLineArgFlag fi("-i", "--batch", "", batch); - CommandLineArgFlag fx("-x", "--cpu", "", cpu_mode); -======= CommandLineArgSetter fw("-w", "--warps", "", max_warps); CommandLineArgSetter ft("-t", "--threads", "", max_threads); ->>>>>>> fpga_synthesis CommandLineArg::readArgs(argc, argv); @@ -90,11 +80,7 @@ int emu_main(int argc, char **argv) { } /* Instantiate a Core, RAM, and console output. */ -<<<<<<< HEAD - ArchDef arch(archString, cpu_mode); -======= ArchDef arch(archString, max_warps, max_threads); ->>>>>>> fpga_synthesis Decoder *dec; diff --git a/simX/test_riscv.sh b/simX/test_riscv.sh index 380d9777..39d00b1d 100755 --- a/simX/test_riscv.sh +++ b/simX/test_riscv.sh @@ -1,147 +1,3 @@ -<<<<<<< HEAD -make -cd obj_dir -echo start > results.txt - -echo ./riscv_tests/rv32ui-p-add.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-add.hex -s -b >> results.txt - -echo ./riscv_tests/rv32ui-p-addi.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-addi.hex -s -b >> results.txt - -echo ./riscv_tests/rv32ui-p-and.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-and.hex -s -b >> results.txt - -echo ./riscv_tests/rv32ui-p-andi.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-andi.hex -s -b >> results.txt - -echo ./riscv_tests/rv32ui-p-auipc.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-auipc.hex -s -b >> results.txt - -echo ./riscv_tests/rv32ui-p-beq.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-beq.hex -s -b >> results.txt - -echo ./riscv_tests/rv32ui-p-bge.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-bge.hex -s -b >> results.txt - -echo ./riscv_tests/rv32ui-p-bgeu.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-bgeu.hex -s -b >> results.txt - -echo ./riscv_tests/rv32ui-p-blt.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-blt.hex -s -b >> results.txt - -echo ./riscv_tests/rv32ui-p-bltu.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-bltu.hex -s -b >> results.txt - -echo ./riscv_tests/rv32ui-p-bne.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-bne.hex -s -b >> results.txt - -echo ./riscv_tests/rv32ui-p-jal.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-jal.hex -s -b >> results.txt - -echo ./riscv_tests/rv32ui-p-jalr.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-jalr.hex -s -b >> results.txt - -echo ./riscv_tests/rv32ui-p-lb.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-lb.hex -s -b >> results.txt - -echo ./riscv_tests/rv32ui-p-lbu.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-lbu.hex -s -b >> results.txt - -echo ./riscv_tests/rv32ui-p-lh.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-lh.hex -s -b >> results.txt - -echo ./riscv_tests/rv32ui-p-lhu.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-lhu.hex -s -b >> results.txt - -echo ./riscv_tests/rv32ui-p-lui.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-lui.hex -s -b >> results.txt - -echo ./riscv_tests/rv32ui-p-lw.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-lw.hex -s -b >> results.txt - -echo ./riscv_tests/rv32ui-p-or.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-or.hex -s -b >> results.txt - -echo ./riscv_tests/rv32ui-p-ori.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-ori.hex -s -b >> results.txt - -echo ./riscv_tests/rv32ui-p-sb.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-sb.hex -s -b >> results.txt - -echo ./riscv_tests/rv32ui-p-sh.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-sh.hex -s -b >> results.txt - -echo ./riscv_tests/rv32ui-p-simple.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-simple.hex -s -b >> results.txt - -echo ./riscv_tests/rv32ui-p-sll.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-sll.hex -s -b >> results.txt - -echo ./riscv_tests/rv32ui-p-slli.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-slli.hex -s -b >> results.txt - -echo ./riscv_tests/rv32ui-p-slt.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-slt.hex -s -b >> results.txt - -echo ./riscv_tests/rv32ui-p-slti.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-slti.hex -s -b >> results.txt - -echo ./riscv_tests/rv32ui-p-sltiu.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-sltiu.hex -s -b >> results.txt - -echo ./riscv_tests/rv32ui-p-sltu.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-sltu.hex -s -b >> results.txt - -echo ./riscv_tests/rv32ui-p-sra.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-sra.hex -s -b >> results.txt - -echo ./riscv_tests/rv32ui-p-srai.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-srai.hex -s -b >> results.txt - -echo ./riscv_tests/rv32ui-p-srl.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-srl.hex -s -b >> results.txt - -echo ./riscv_tests/rv32ui-p-srli.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-srli.hex -s -b >> results.txt - -echo ./riscv_tests/rv32ui-p-sub.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-sub.hex -s -b >> results.txt - -echo ./riscv_tests/rv32ui-p-sw.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-sw.hex -s -b >> results.txt - -echo ./riscv_tests/rv32ui-p-xor.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-xor.hex -s -b >> results.txt - -echo ./riscv_tests/rv32ui-p-xori.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-xori.hex -s -b >> results.txt - -# echo ./riscv_tests/rv32um-p-div.hex >> results.txt -# ./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32um-p-div.hex -s -b >> results.txt - -# echo ./riscv_tests/rv32um-p-divu.hex >> results.txt -# ./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32um-p-divu.hex -s -b >> results.txt - -# echo ./riscv_tests/rv32um-p-mul.hex >> results.txt -# ./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32um-p-mul.hex -s -b >> results.txt - -# echo ./riscv_tests/rv32um-p-mulh.hex >> results.txt -# ./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32um-p-mulh.hex -s -b >> results.txt - -# echo ./riscv_tests/rv32um-p-mulhsu.hex >> results.txt -# ./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32um-p-mulhsu.hex -s -b >> results.txt - -# echo ./riscv_tests/rv32um-p-mulhu.hex >> results.txt -# ./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32um-p-mulhu.hex -s -b >> results.txt - -# echo ./riscv_tests/rv32um-p-rem.hex >> results.txt -# ./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32um-p-rem.hex -s -b >> results.txt - -# echo ./riscv_tests/rv32um-p-remu.hex >> results.txt -# ./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32um-p-remu.hex -s -b >> results.txt - -======= #!/bin/bash make @@ -285,4 +141,3 @@ echo ./../benchmarks/riscv_tests/rv32ui-p-xori.hex >> results.txt # echo ./../benchmarks/riscv_tests/rv32um-p-remu.hex >> results.txt # ./Vcache_simX -E -a rv32i --core ../benchmarks/riscv_tests/rv32um-p-remu.hex -s -b >> results.txt ->>>>>>> fpga_synthesis diff --git a/simX/test_runtime.sh b/simX/test_runtime.sh index ddb93dc2..725e9600 100755 --- a/simX/test_runtime.sh +++ b/simX/test_runtime.sh @@ -1,11 +1,3 @@ -<<<<<<< HEAD -make -make -C ../runtime/mains/dev -make -C ../runtime/mains/hello -make -C ../runtime/mains/nativevecadd -make -C ../runtime/mains/simple -make -C ../runtime/mains/vecadd -======= #!/bin/bash make @@ -14,23 +6,14 @@ make -C ../runtime/tests/hello make -C ../runtime/tests/nativevecadd make -C ../runtime/tests/simple make -C ../runtime/tests/vecadd ->>>>>>> fpga_synthesis cd obj_dir echo start > results.txt printf "Fasten your seatbelts ladies and gentelmen!!\n\n\n\n" -<<<<<<< HEAD -#./Vcache_simX -E -a rv32i --core ../../runtime/mains/dev/vx_dev_main.hex -s -b 1> emulator.debug -#./Vcache_simX -E -a rv32i --core ../../runtime/mains/hello/hello.hex -s -b 1> emulator.debug -./Vcache_simX -E -a rv32i --core ../../runtime/mains/nativevecadd/vx_pocl_main.hex -s -b 1> emulator.debug -./Vcache_simX -E -a rv32i --core ../../runtime/mains/simple/vx_simple_main.hex -s -b 1> emulator.debug -./Vcache_simX -E -a rv32i --core ../../runtime/mains/vecadd/vx_pocl_main.hex -s -b 1> emulator.debug -======= #./Vcache_simX -E -a rv32i --core ../runtime/tests/dev/vx_dev_main.hex -s -b 1> emulator.debug #./Vcache_simX -E -a rv32i --core ../runtime/tests/hello/hello.hex -s -b 1> emulator.debug ./Vcache_simX -E -a rv32i --core ../runtime/tests/nativevecadd/vx_pocl_main.hex -s -b 1> emulator.debug ./Vcache_simX -E -a rv32i --core ../runtime/tests/simple/vx_simple_main.hex -s -b 1> emulator.debug ./Vcache_simX -E -a rv32i --core ../runtime/tests/vecadd/vx_pocl_main.hex -s -b 1> emulator.debug ->>>>>>> fpga_synthesis