diff --git a/hw/opae/sources.txt b/hw/opae/sources.txt index fba72c91..516aa4b2 100644 --- a/hw/opae/sources.txt +++ b/hw/opae/sources.txt @@ -15,7 +15,7 @@ vortex_afu.json ../rtl/cache/VX_cache_config.vh ../rtl/interfaces/VX_exec_unit_req_if.v -../rtl/interfaces/VX_branch_response_if.v +../rtl/interfaces/VX_branch_rsp_if.v ../rtl/interfaces/VX_inst_meta_if.v ../rtl/interfaces/VX_join_if.v ../rtl/interfaces/VX_icache_response_if.v diff --git a/hw/rtl/VX_back_end.v b/hw/rtl/VX_back_end.v index af0be2fc..d0595265 100644 --- a/hw/rtl/VX_back_end.v +++ b/hw/rtl/VX_back_end.v @@ -13,8 +13,8 @@ module VX_back_end #( output wire mem_delay_o, output wire exec_delay_o, output wire gpr_stage_delay, - VX_jal_response_if jal_rsp_if, - VX_branch_response_if branch_rsp_if, + VX_jal_rsp_if jal_rsp_if, + VX_branch_rsp_if branch_rsp_if, VX_frE_to_bckE_req_if bckE_req_if, VX_wb_if writeback_if, @@ -81,7 +81,7 @@ VX_lsu load_store_unit ( .no_slot_mem_i (no_slot_mem) ); -VX_execute_unit execUnit ( +VX_exec_unit exec_unit ( .clk (clk), .reset (reset), .exec_unit_req_if(exec_unit_req_if), diff --git a/hw/rtl/VX_dmem_controller.v b/hw/rtl/VX_dmem_ctrl.v similarity index 97% rename from hw/rtl/VX_dmem_controller.v rename to hw/rtl/VX_dmem_ctrl.v index 83db3804..caf93d5e 100644 --- a/hw/rtl/VX_dmem_controller.v +++ b/hw/rtl/VX_dmem_ctrl.v @@ -1,6 +1,6 @@ `include "VX_define.vh" -module VX_dmem_controller ( +module VX_dmem_ctrl ( input wire clk, input wire reset, diff --git a/hw/rtl/VX_execute_unit.v b/hw/rtl/VX_exec_unit.v similarity index 96% rename from hw/rtl/VX_execute_unit.v rename to hw/rtl/VX_exec_unit.v index 762a3b6d..e7d3bda9 100644 --- a/hw/rtl/VX_execute_unit.v +++ b/hw/rtl/VX_exec_unit.v @@ -1,6 +1,6 @@ `include "VX_define.vh" -module VX_execute_unit ( +module VX_exec_unit ( input wire clk, input wire reset, // Request @@ -10,9 +10,9 @@ module VX_execute_unit ( // Writeback VX_inst_exec_wb_if inst_exec_wb_if, // JAL Response - VX_jal_response_if jal_rsp_if, + VX_jal_rsp_if jal_rsp_if, // Branch Response - VX_branch_response_if branch_rsp_if, + VX_branch_rsp_if branch_rsp_if, input wire no_slot_exec_i, output wire delay_o @@ -110,9 +110,9 @@ module VX_execute_unit ( // VX_inst_exec_wb_if inst_exec_wb_temp_if(); // JAL Response - VX_jal_response_if jal_rsp_temp_if(); + VX_jal_rsp_if jal_rsp_temp_if(); // Branch Response - VX_branch_response_if branch_rsp_temp_if(); + VX_branch_rsp_if branch_rsp_temp_if(); // Actual Writeback assign inst_exec_wb_if.rd = exec_unit_req_if.rd; @@ -180,4 +180,4 @@ module VX_execute_unit ( // assign out_is_csr = exec_unit_req_if.is_csr; // assign out_csr_address = exec_unit_req_if.csr_address; -endmodule : VX_execute_unit \ No newline at end of file +endmodule : VX_exec_unit \ No newline at end of file diff --git a/hw/rtl/VX_fetch.v b/hw/rtl/VX_fetch.v index db149337..8754977f 100644 --- a/hw/rtl/VX_fetch.v +++ b/hw/rtl/VX_fetch.v @@ -11,8 +11,8 @@ module VX_fetch ( input wire[`NUM_THREADS-1:0] icache_stage_valids, output wire ebreak_o, - VX_jal_response_if jal_rsp_if, - VX_branch_response_if branch_rsp_if, + VX_jal_rsp_if jal_rsp_if, + VX_branch_rsp_if branch_rsp_if, VX_inst_meta_if fe_inst_meta_fi, VX_warp_ctl_if warp_ctl_if ); @@ -30,7 +30,7 @@ module VX_fetch ( assign pipe_stall = schedule_delay || icache_stage_delay; - VX_warp_scheduler warp_scheduler( + VX_warp_sched warp_sched ( .clk (clk), .reset (reset), .stall (pipe_stall), diff --git a/hw/rtl/VX_front_end.v b/hw/rtl/VX_front_end.v index d5fe06e1..26988971 100644 --- a/hw/rtl/VX_front_end.v +++ b/hw/rtl/VX_front_end.v @@ -11,8 +11,8 @@ module VX_front_end ( VX_gpu_dcache_rsp_if icache_rsp_if, VX_gpu_dcache_req_if icache_req_if, - VX_jal_response_if jal_rsp_if, - VX_branch_response_if branch_rsp_if, + VX_jal_rsp_if jal_rsp_if, + VX_branch_rsp_if branch_rsp_if, VX_frE_to_bckE_req_if bckE_req_if, diff --git a/hw/rtl/VX_warp_scheduler.v b/hw/rtl/VX_warp_sched.v similarity index 99% rename from hw/rtl/VX_warp_scheduler.v rename to hw/rtl/VX_warp_sched.v index 50aabf86..7d3485d9 100644 --- a/hw/rtl/VX_warp_scheduler.v +++ b/hw/rtl/VX_warp_sched.v @@ -1,6 +1,6 @@ `include "VX_define.vh" -module VX_warp_scheduler ( +module VX_warp_sched ( input wire clk, // Clock input wire reset, input wire stall, diff --git a/hw/rtl/Vortex.v b/hw/rtl/Vortex.v index 9d3f6a7a..19ec6362 100644 --- a/hw/rtl/Vortex.v +++ b/hw/rtl/Vortex.v @@ -133,8 +133,8 @@ VX_frE_to_bckE_req_if bckE_req_if(); // New instruction request to EXE/MEM // Back-end to Front-end VX_wb_if writeback_if(); // Writeback to GPRs -VX_branch_response_if branch_rsp_if(); // Branch Resolution to Fetch -VX_jal_response_if jal_rsp_if(); // Jump resolution to Fetch +VX_branch_rsp_if branch_rsp_if(); // Branch Resolution to Fetch +VX_jal_rsp_if jal_rsp_if(); // Jump resolution to Fetch // Warp controls VX_warp_ctl_if warp_ctl_if(); @@ -189,7 +189,7 @@ VX_back_end #( .gpr_stage_delay (gpr_stage_delay) ); -VX_dmem_controller dmem_controller ( +VX_dmem_ctrl dmem_controller ( .clk (clk), .reset (reset), diff --git a/hw/rtl/interfaces/VX_branch_response_if.v b/hw/rtl/interfaces/VX_branch_rsp_if.v similarity index 86% rename from hw/rtl/interfaces/VX_branch_response_if.v rename to hw/rtl/interfaces/VX_branch_rsp_if.v index 4a1617cd..62d23d4e 100644 --- a/hw/rtl/interfaces/VX_branch_response_if.v +++ b/hw/rtl/interfaces/VX_branch_rsp_if.v @@ -3,7 +3,7 @@ `include "../VX_define.vh" -interface VX_branch_response_if (); +interface VX_branch_rsp_if (); wire valid_branch; wire branch_dir; diff --git a/hw/rtl/interfaces/VX_dcache_request_if.v b/hw/rtl/interfaces/VX_dcache_request_if.v deleted file mode 100644 index e61ac455..00000000 --- a/hw/rtl/interfaces/VX_dcache_request_if.v +++ /dev/null @@ -1,16 +0,0 @@ -`ifndef VX_DCACHE_REQ -`define VX_DCACHE_REQ - -`include "../VX_define.vh" - -interface VX_dcache_request_if (); - - wire [`NUM_THREADS-1:0][31:0] out_cache_driver_in_address; - wire [2:0] out_cache_driver_in_mem_read; - wire [2:0] out_cache_driver_in_mem_write; - wire [`NUM_THREADS-1:0] out_cache_driver_in_valid; - wire [`NUM_THREADS-1:0][31:0] out_cache_driver_in_data; - -endinterface - -`endif \ No newline at end of file diff --git a/hw/rtl/interfaces/VX_dcache_response_if.v b/hw/rtl/interfaces/VX_dcache_response_if.v deleted file mode 100644 index 280631bb..00000000 --- a/hw/rtl/interfaces/VX_dcache_response_if.v +++ /dev/null @@ -1,13 +0,0 @@ -`ifndef VX_DCACHE_RSP -`define VX_DCACHE_RSP - -`include "../VX_define.vh" - -interface VX_dcache_response_if (); - - wire [`NUM_THREADS-1:0][31:0] in_cache_driver_out_data; - wire delay; - -endinterface - -`endif \ No newline at end of file diff --git a/hw/rtl/interfaces/VX_dram_req_rsp_if.v b/hw/rtl/interfaces/VX_dram_req_rsp_if.v deleted file mode 100644 index 08c803d5..00000000 --- a/hw/rtl/interfaces/VX_dram_req_rsp_if.v +++ /dev/null @@ -1,25 +0,0 @@ - -`ifndef VX_DRAM_REQ_RSP_INTER -`define VX_DRAM_REQ_RSP_INTER - -`include "../VX_define.vh" - -interface VX_dram_req_rsp_if #( - parameter NUM_BANKS = 8, - parameter NUM_WORDS_PER_BLOCK = 4 -) (); - - // Req - wire [31:0] o_m_evict_addr; - wire [31:0] o_m_read_addr; - wire o_m_valid; - wire [NUM_BANKS - 1:0][NUM_WORDS_PER_BLOCK-1:0][31:0] o_m_writedata; - wire o_m_read_or_write; - - // Rsp - wire [NUM_BANKS - 1:0][NUM_WORDS_PER_BLOCK-1:0][31:0] i_m_readdata; - wire i_m_ready; - -endinterface - -`endif diff --git a/hw/rtl/interfaces/VX_icache_request_if.v b/hw/rtl/interfaces/VX_icache_request_if.v deleted file mode 100644 index 6d02f106..00000000 --- a/hw/rtl/interfaces/VX_icache_request_if.v +++ /dev/null @@ -1,17 +0,0 @@ - -`ifndef VX_ICACHE_REQ -`define VX_ICACHE_REQ - -`include "../VX_define.vh" - -interface VX_icache_request_if (); - - wire [31:0] pc_address; - wire [2:0] out_cache_driver_in_mem_read; - wire [2:0] out_cache_driver_in_mem_write; - wire out_cache_driver_in_valid; - wire [31:0] out_cache_driver_in_data; - -endinterface - -`endif \ No newline at end of file diff --git a/hw/rtl/interfaces/VX_icache_response_if.v b/hw/rtl/interfaces/VX_icache_rsp_if.v similarity index 82% rename from hw/rtl/interfaces/VX_icache_response_if.v rename to hw/rtl/interfaces/VX_icache_rsp_if.v index d73775e4..d4bd7a41 100644 --- a/hw/rtl/interfaces/VX_icache_response_if.v +++ b/hw/rtl/interfaces/VX_icache_rsp_if.v @@ -3,7 +3,7 @@ `include "../VX_define.vh" -interface VX_icache_response_if (); +interface VX_icache_rsp_if (); // wire ready; // wire stall; diff --git a/hw/rtl/interfaces/VX_jal_response_if.v b/hw/rtl/interfaces/VX_jal_rsp_if.v similarity index 84% rename from hw/rtl/interfaces/VX_jal_response_if.v rename to hw/rtl/interfaces/VX_jal_rsp_if.v index fde25f7a..1a796777 100644 --- a/hw/rtl/interfaces/VX_jal_response_if.v +++ b/hw/rtl/interfaces/VX_jal_rsp_if.v @@ -4,7 +4,7 @@ `include "../VX_define.vh" -interface VX_jal_response_if (); +interface VX_jal_rsp_if (); wire jal; wire [31:0] jal_dest; diff --git a/hw/rtl/interfaces/VX_mem_req_if.v b/hw/rtl/interfaces/VX_mem_req_if.v deleted file mode 100644 index 5c6afa4b..00000000 --- a/hw/rtl/interfaces/VX_mem_req_if.v +++ /dev/null @@ -1,25 +0,0 @@ -`ifndef VX_MEM_REQ_IN -`define VX_MEM_REQ_IN - -`include "../VX_define.vh" - -interface VX_mem_req_if (); - - wire [`NUM_THREADS-1:0][31:0] alu_result; - wire [2:0] mem_read; - wire [2:0] mem_write; - wire [4:0] rd; - wire [1:0] wb; - wire [4:0] rs1; - wire [4:0] rs2; - wire [`NUM_THREADS-1:0][31:0] rd2; - wire [31:0] PC_next; - wire [31:0] curr_PC; - wire [31:0] branch_offset; - wire [2:0] branch_type; - wire [`NUM_THREADS-1:0] valid; - wire [`NW_BITS-1:0] warp_num; - -endinterface - -`endif \ No newline at end of file diff --git a/hw/rtl/VX_countones.v b/hw/rtl/libs/VX_countones.v similarity index 57% rename from hw/rtl/VX_countones.v rename to hw/rtl/libs/VX_countones.v index 62f20e16..5881ab7c 100644 --- a/hw/rtl/VX_countones.v +++ b/hw/rtl/libs/VX_countones.v @@ -1,12 +1,8 @@ -module VX_countones - #( - parameter N = 10 - ) - ( - - input wire[N-1:0] valids, - output reg[$clog2(N):0] count - +module VX_countones #( + parameter N = 10 +) ( + input wire[N-1:0] valids, + output reg[$clog2(N):0] count ); integer i; diff --git a/simX/cache_simX.v b/simX/cache_simX.v index bb51313e..ce3f746e 100644 --- a/simX/cache_simX.v +++ b/simX/cache_simX.v @@ -33,7 +33,7 @@ module cache_simX ( assign VX_icache_req.cache_driver_in_data_o = 0; - VX_icache_response_if VX_icache_rsp; + VX_icache_rsp_if VX_icache_rsp; assign out_icache_stall = VX_icache_rsp.delay; @@ -79,7 +79,7 @@ module cache_simX ( assign VX_dram_req_rsp.i_m_ready = dcache_i_m_ready; - VX_dmem_controller dmem_controller ( + VX_dmem_ctrl dmem_controller ( .clk (clk), .reset (reset), .VX_dram_req_rsp (VX_dram_req_rsp),