diff --git a/.DS_Store b/.DS_Store
index 884dee55..e5107c39 100644
Binary files a/.DS_Store and b/.DS_Store differ
diff --git a/emulator/vortex_software/vx_os/vx_back/vx_back.s b/emulator/vortex_software/vx_os/vx_back/vx_back.s
index c918588d..72c917cf 100644
--- a/emulator/vortex_software/vx_os/vx_back/vx_back.s
+++ b/emulator/vortex_software/vx_os/vx_back/vx_back.s
@@ -6,9 +6,9 @@
 .type _start, @function
 .global _start
 _start:
-    li a0, 4          # Num Warps
+    li a0, 2          # Num Warps
     csrw 0x20, a0     # Setting the number of available warps 
-    li a0, 8          # Num Threads
+    li a0, 1          # Num Threads
     csrw 0x21, a0     # Setting the number of available threads
     csrw mhartid,zero
     csrw misa,zero
diff --git a/kernel/vortex_test.dump b/kernel/vortex_test.dump
index 9e6b29f7..84a97b03 100644
--- a/kernel/vortex_test.dump
+++ b/kernel/vortex_test.dump
@@ -5,15 +5,15 @@ vortex_test.elf:     file format elf32-littleriscv
 Disassembly of section .text:
 
 80000000 <_start>:
-80000000:	00200513          	li	a0,2
+80000000:	00800513          	li	a0,8
 80000004:	02051073          	csrw	0x20,a0
-80000008:	00200513          	li	a0,2
+80000008:	00400513          	li	a0,4
 8000000c:	02151073          	csrw	0x21,a0
 80000010:	f1401073          	csrw	mhartid,zero
 80000014:	30101073          	csrw	misa,zero
 80000018:	7ffff137          	lui	sp,0x7ffff
-8000001c:	1b0000ef          	jal	ra,800001cc <vx_before_main>
-80000020:	6a8010ef          	jal	ra,800016c8 <main>
+8000001c:	1e8000ef          	jal	ra,80000204 <vx_before_main>
+80000020:	0bd010ef          	jal	ra,800018dc <main>
 80000024:	00000073          	ecall
 
 80000028 <vx_createThreads>:
@@ -48,1538 +48,1675 @@ Disassembly of section .text:
 80000070:	00000513          	li	a0,0
 80000074:	00060f93          	mv	t6,a2
 80000078:	00038d93          	mv	s11,t2
-8000007c:	01bfe0eb          	0x1bfe0eb
-80000080:	00000517          	auipc	a0,0x0
-80000084:	1b050513          	addi	a0,a0,432 # 80000230 <vx_reschedule_warps>
-80000088:	0005406b          	0x5406b
+8000007c:	00000013          	nop
+80000080:	00000013          	nop
+80000084:	00000013          	nop
+80000088:	00000013          	nop
+8000008c:	00000013          	nop
+80000090:	00000013          	nop
+80000094:	00000013          	nop
+80000098:	00000013          	nop
+8000009c:	01bfe0eb          	0x1bfe0eb
+800000a0:	00000013          	nop
+800000a4:	00000013          	nop
+800000a8:	00000013          	nop
+800000ac:	00000013          	nop
+800000b0:	00000013          	nop
+800000b4:	00000013          	nop
+800000b8:	00000517          	auipc	a0,0x0
+800000bc:	1b450513          	addi	a0,a0,436 # 8000026c <vx_reschedule_warps>
+800000c0:	0005406b          	0x5406b
 
-8000008c <vx_wspawn>:
-8000008c:	00000317          	auipc	t1,0x0
-80000090:	f9c30313          	addi	t1,t1,-100 # 80000028 <vx_createThreads>
-80000094:	0003006b          	0x3006b
-80000098:	00008067          	ret
+800000c4 <vx_wspawn>:
+800000c4:	00000317          	auipc	t1,0x0
+800000c8:	f6430313          	addi	t1,t1,-156 # 80000028 <vx_createThreads>
+800000cc:	0003006b          	0x3006b
+800000d0:	00008067          	ret
 
-8000009c <vx_save_context>:
-8000009c:	01000217          	auipc	tp,0x1000
-800000a0:	20020213          	addi	tp,tp,512 # 8100029c <context>
-800000a4:	00022023          	sw	zero,0(tp) # 0 <A_WARPS-0x7>
-800000a8:	00122223          	sw	ra,4(tp) # 4 <A_WARPS-0x3>
-800000ac:	00222423          	sw	sp,8(tp) # 8 <A_WARPS+0x1>
-800000b0:	00322623          	sw	gp,12(tp) # c <A_WARPS+0x5>
-800000b4:	00422823          	sw	tp,16(tp) # 10 <A_WARPS+0x9>
-800000b8:	00522a23          	sw	t0,20(tp) # 14 <A_WARPS+0xd>
-800000bc:	00622c23          	sw	t1,24(tp) # 18 <A_WARPS+0x11>
-800000c0:	00722e23          	sw	t2,28(tp) # 1c <A_WARPS+0x15>
-800000c4:	02822023          	sw	s0,32(tp) # 20 <A_WARPS+0x19>
-800000c8:	02922223          	sw	s1,36(tp) # 24 <A_WARPS+0x1d>
-800000cc:	02a22423          	sw	a0,40(tp) # 28 <A_WARPS+0x21>
-800000d0:	02b22623          	sw	a1,44(tp) # 2c <A_WARPS+0x25>
-800000d4:	02c22823          	sw	a2,48(tp) # 30 <A_WARPS+0x29>
-800000d8:	02d22a23          	sw	a3,52(tp) # 34 <SIZE+0x2>
-800000dc:	02e22c23          	sw	a4,56(tp) # 38 <SIZE+0x6>
-800000e0:	02f22e23          	sw	a5,60(tp) # 3c <SIZE+0xa>
-800000e4:	05022023          	sw	a6,64(tp) # 40 <SIZE+0xe>
-800000e8:	05122223          	sw	a7,68(tp) # 44 <SIZE+0x12>
-800000ec:	05222423          	sw	s2,72(tp) # 48 <SIZE+0x16>
-800000f0:	05322623          	sw	s3,76(tp) # 4c <SIZE+0x1a>
-800000f4:	05422823          	sw	s4,80(tp) # 50 <SIZE+0x1e>
-800000f8:	05522a23          	sw	s5,84(tp) # 54 <SIZE+0x22>
-800000fc:	05622c23          	sw	s6,88(tp) # 58 <SIZE+0x26>
-80000100:	05722e23          	sw	s7,92(tp) # 5c <SIZE+0x2a>
-80000104:	07822023          	sw	s8,96(tp) # 60 <SIZE+0x2e>
-80000108:	07922223          	sw	s9,100(tp) # 64 <SIZE+0x32>
-8000010c:	07a22423          	sw	s10,104(tp) # 68 <SIZE+0x36>
-80000110:	07b22623          	sw	s11,108(tp) # 6c <SIZE+0x3a>
-80000114:	07c22823          	sw	t3,112(tp) # 70 <SIZE+0x3e>
-80000118:	07d22a23          	sw	t4,116(tp) # 74 <SIZE+0x42>
-8000011c:	07e22c23          	sw	t5,120(tp) # 78 <SIZE+0x46>
-80000120:	07f22e23          	sw	t6,124(tp) # 7c <SIZE+0x4a>
-80000124:	00100213          	li	tp,1
-80000128:	00008067          	ret
+800000d4 <vx_save_context>:
+800000d4:	01000217          	auipc	tp,0x1000
+800000d8:	26020213          	addi	tp,tp,608 # 81000334 <context>
+800000dc:	00022023          	sw	zero,0(tp) # 0 <A_WARPS-0x7>
+800000e0:	00122223          	sw	ra,4(tp) # 4 <A_WARPS-0x3>
+800000e4:	00222423          	sw	sp,8(tp) # 8 <A_WARPS+0x1>
+800000e8:	00322623          	sw	gp,12(tp) # c <A_WARPS+0x5>
+800000ec:	00422823          	sw	tp,16(tp) # 10 <A_WARPS+0x9>
+800000f0:	00522a23          	sw	t0,20(tp) # 14 <A_WARPS+0xd>
+800000f4:	00622c23          	sw	t1,24(tp) # 18 <A_WARPS+0x11>
+800000f8:	00722e23          	sw	t2,28(tp) # 1c <A_WARPS+0x15>
+800000fc:	02822023          	sw	s0,32(tp) # 20 <A_WARPS+0x19>
+80000100:	02922223          	sw	s1,36(tp) # 24 <A_WARPS+0x1d>
+80000104:	02a22423          	sw	a0,40(tp) # 28 <A_WARPS+0x21>
+80000108:	02b22623          	sw	a1,44(tp) # 2c <A_WARPS+0x25>
+8000010c:	02c22823          	sw	a2,48(tp) # 30 <A_WARPS+0x29>
+80000110:	02d22a23          	sw	a3,52(tp) # 34 <SIZE+0x2>
+80000114:	02e22c23          	sw	a4,56(tp) # 38 <SIZE+0x6>
+80000118:	02f22e23          	sw	a5,60(tp) # 3c <SIZE+0xa>
+8000011c:	05022023          	sw	a6,64(tp) # 40 <SIZE+0xe>
+80000120:	05122223          	sw	a7,68(tp) # 44 <SIZE+0x12>
+80000124:	05222423          	sw	s2,72(tp) # 48 <SIZE+0x16>
+80000128:	05322623          	sw	s3,76(tp) # 4c <SIZE+0x1a>
+8000012c:	05422823          	sw	s4,80(tp) # 50 <SIZE+0x1e>
+80000130:	05522a23          	sw	s5,84(tp) # 54 <SIZE+0x22>
+80000134:	05622c23          	sw	s6,88(tp) # 58 <SIZE+0x26>
+80000138:	05722e23          	sw	s7,92(tp) # 5c <SIZE+0x2a>
+8000013c:	07822023          	sw	s8,96(tp) # 60 <SIZE+0x2e>
+80000140:	07922223          	sw	s9,100(tp) # 64 <SIZE+0x32>
+80000144:	07a22423          	sw	s10,104(tp) # 68 <SIZE+0x36>
+80000148:	07b22623          	sw	s11,108(tp) # 6c <SIZE+0x3a>
+8000014c:	07c22823          	sw	t3,112(tp) # 70 <SIZE+0x3e>
+80000150:	07d22a23          	sw	t4,116(tp) # 74 <SIZE+0x42>
+80000154:	07e22c23          	sw	t5,120(tp) # 78 <SIZE+0x46>
+80000158:	07f22e23          	sw	t6,124(tp) # 7c <SIZE+0x4a>
+8000015c:	00100213          	li	tp,1
+80000160:	00008067          	ret
 
-8000012c <vx_load_context>:
-8000012c:	01000217          	auipc	tp,0x1000
-80000130:	17020213          	addi	tp,tp,368 # 8100029c <context>
-80000134:	00022003          	lw	zero,0(tp) # 0 <A_WARPS-0x7>
-80000138:	00422083          	lw	ra,4(tp) # 4 <A_WARPS-0x3>
-8000013c:	00822103          	lw	sp,8(tp) # 8 <A_WARPS+0x1>
-80000140:	00c22183          	lw	gp,12(tp) # c <A_WARPS+0x5>
-80000144:	01022203          	lw	tp,16(tp) # 10 <A_WARPS+0x9>
-80000148:	01422283          	lw	t0,20(tp) # 14 <A_WARPS+0xd>
-8000014c:	01822303          	lw	t1,24(tp) # 18 <A_WARPS+0x11>
-80000150:	01c22383          	lw	t2,28(tp) # 1c <A_WARPS+0x15>
-80000154:	02022403          	lw	s0,32(tp) # 20 <A_WARPS+0x19>
-80000158:	02422483          	lw	s1,36(tp) # 24 <A_WARPS+0x1d>
-8000015c:	02822503          	lw	a0,40(tp) # 28 <A_WARPS+0x21>
-80000160:	02c22583          	lw	a1,44(tp) # 2c <A_WARPS+0x25>
-80000164:	03022603          	lw	a2,48(tp) # 30 <A_WARPS+0x29>
-80000168:	03422683          	lw	a3,52(tp) # 34 <SIZE+0x2>
-8000016c:	03822703          	lw	a4,56(tp) # 38 <SIZE+0x6>
-80000170:	03c22783          	lw	a5,60(tp) # 3c <SIZE+0xa>
-80000174:	04022803          	lw	a6,64(tp) # 40 <SIZE+0xe>
-80000178:	04422883          	lw	a7,68(tp) # 44 <SIZE+0x12>
-8000017c:	04822903          	lw	s2,72(tp) # 48 <SIZE+0x16>
-80000180:	04c22983          	lw	s3,76(tp) # 4c <SIZE+0x1a>
-80000184:	05022a03          	lw	s4,80(tp) # 50 <SIZE+0x1e>
-80000188:	05422a83          	lw	s5,84(tp) # 54 <SIZE+0x22>
-8000018c:	05822b03          	lw	s6,88(tp) # 58 <SIZE+0x26>
-80000190:	05c22b83          	lw	s7,92(tp) # 5c <SIZE+0x2a>
-80000194:	06022c03          	lw	s8,96(tp) # 60 <SIZE+0x2e>
-80000198:	06422c83          	lw	s9,100(tp) # 64 <SIZE+0x32>
-8000019c:	06822d03          	lw	s10,104(tp) # 68 <SIZE+0x36>
-800001a0:	06c22d83          	lw	s11,108(tp) # 6c <SIZE+0x3a>
-800001a4:	07022e03          	lw	t3,112(tp) # 70 <SIZE+0x3e>
-800001a8:	07422e83          	lw	t4,116(tp) # 74 <SIZE+0x42>
-800001ac:	07822f03          	lw	t5,120(tp) # 78 <SIZE+0x46>
-800001b0:	07c22f83          	lw	t6,124(tp) # 7c <SIZE+0x4a>
-800001b4:	00000213          	li	tp,0
-800001b8:	00008067          	ret
+80000164 <vx_load_context>:
+80000164:	01000217          	auipc	tp,0x1000
+80000168:	1d020213          	addi	tp,tp,464 # 81000334 <context>
+8000016c:	00022003          	lw	zero,0(tp) # 0 <A_WARPS-0x7>
+80000170:	00422083          	lw	ra,4(tp) # 4 <A_WARPS-0x3>
+80000174:	00822103          	lw	sp,8(tp) # 8 <A_WARPS+0x1>
+80000178:	00c22183          	lw	gp,12(tp) # c <A_WARPS+0x5>
+8000017c:	01022203          	lw	tp,16(tp) # 10 <A_WARPS+0x9>
+80000180:	01422283          	lw	t0,20(tp) # 14 <A_WARPS+0xd>
+80000184:	01822303          	lw	t1,24(tp) # 18 <A_WARPS+0x11>
+80000188:	01c22383          	lw	t2,28(tp) # 1c <A_WARPS+0x15>
+8000018c:	02022403          	lw	s0,32(tp) # 20 <A_WARPS+0x19>
+80000190:	02422483          	lw	s1,36(tp) # 24 <A_WARPS+0x1d>
+80000194:	02822503          	lw	a0,40(tp) # 28 <A_WARPS+0x21>
+80000198:	02c22583          	lw	a1,44(tp) # 2c <A_WARPS+0x25>
+8000019c:	03022603          	lw	a2,48(tp) # 30 <A_WARPS+0x29>
+800001a0:	03422683          	lw	a3,52(tp) # 34 <SIZE+0x2>
+800001a4:	03822703          	lw	a4,56(tp) # 38 <SIZE+0x6>
+800001a8:	03c22783          	lw	a5,60(tp) # 3c <SIZE+0xa>
+800001ac:	04022803          	lw	a6,64(tp) # 40 <SIZE+0xe>
+800001b0:	04422883          	lw	a7,68(tp) # 44 <SIZE+0x12>
+800001b4:	04822903          	lw	s2,72(tp) # 48 <SIZE+0x16>
+800001b8:	04c22983          	lw	s3,76(tp) # 4c <SIZE+0x1a>
+800001bc:	05022a03          	lw	s4,80(tp) # 50 <SIZE+0x1e>
+800001c0:	05422a83          	lw	s5,84(tp) # 54 <SIZE+0x22>
+800001c4:	05822b03          	lw	s6,88(tp) # 58 <SIZE+0x26>
+800001c8:	05c22b83          	lw	s7,92(tp) # 5c <SIZE+0x2a>
+800001cc:	06022c03          	lw	s8,96(tp) # 60 <SIZE+0x2e>
+800001d0:	06422c83          	lw	s9,100(tp) # 64 <SIZE+0x32>
+800001d4:	06822d03          	lw	s10,104(tp) # 68 <SIZE+0x36>
+800001d8:	06c22d83          	lw	s11,108(tp) # 6c <SIZE+0x3a>
+800001dc:	07022e03          	lw	t3,112(tp) # 70 <SIZE+0x3e>
+800001e0:	07422e83          	lw	t4,116(tp) # 74 <SIZE+0x42>
+800001e4:	07822f03          	lw	t5,120(tp) # 78 <SIZE+0x46>
+800001e8:	07c22f83          	lw	t6,124(tp) # 7c <SIZE+0x4a>
+800001ec:	00000213          	li	tp,0
+800001f0:	00008067          	ret
 
-800001bc <vx_available_warps>:
-800001bc:	02002573          	csrr	a0,0x20
-800001c0:	00008067          	ret
+800001f4 <vx_available_warps>:
+800001f4:	02002573          	csrr	a0,0x20
+800001f8:	00008067          	ret
 
-800001c4 <vx_available_threads>:
-800001c4:	02102573          	csrr	a0,0x21
-800001c8:	00008067          	ret
+800001fc <vx_available_threads>:
+800001fc:	02102573          	csrr	a0,0x21
+80000200:	00008067          	ret
 
-800001cc <vx_before_main>:
-800001cc:	fe010113          	addi	sp,sp,-32
-800001d0:	00112e23          	sw	ra,28(sp)
-800001d4:	00812c23          	sw	s0,24(sp)
-800001d8:	02010413          	addi	s0,sp,32
-800001dc:	fe042623          	sw	zero,-20(s0)
-800001e0:	0300006f          	j	80000210 <vx_before_main+0x44>
-800001e4:	fec42703          	lw	a4,-20(s0)
-800001e8:	4c400793          	li	a5,1220
-800001ec:	02f70733          	mul	a4,a4,a5
-800001f0:	810007b7          	lui	a5,0x81000
-800001f4:	31c78793          	addi	a5,a5,796 # 8100031c <main_sp+0xffffa960>
-800001f8:	00f707b3          	add	a5,a4,a5
-800001fc:	00078513          	mv	a0,a5
-80000200:	404000ef          	jal	ra,80000604 <queue_initialize>
-80000204:	fec42783          	lw	a5,-20(s0)
-80000208:	00178793          	addi	a5,a5,1
-8000020c:	fef42623          	sw	a5,-20(s0)
-80000210:	fec42703          	lw	a4,-20(s0)
-80000214:	00700793          	li	a5,7
-80000218:	fce7d6e3          	bge	a5,a4,800001e4 <vx_before_main+0x18>
-8000021c:	00000013          	nop
-80000220:	01c12083          	lw	ra,28(sp)
-80000224:	01812403          	lw	s0,24(sp)
-80000228:	02010113          	addi	sp,sp,32
-8000022c:	00008067          	ret
+80000204 <vx_before_main>:
+80000204:	fe010113          	addi	sp,sp,-32
+80000208:	00112e23          	sw	ra,28(sp)
+8000020c:	00812c23          	sw	s0,24(sp)
+80000210:	02010413          	addi	s0,sp,32
+80000214:	fe042623          	sw	zero,-20(s0)
+80000218:	0340006f          	j	8000024c <vx_before_main+0x48>
+8000021c:	fec42703          	lw	a4,-20(s0)
+80000220:	000017b7          	lui	a5,0x1
+80000224:	97478793          	addi	a5,a5,-1676 # 974 <SIZE+0x942>
+80000228:	02f70733          	mul	a4,a4,a5
+8000022c:	810007b7          	lui	a5,0x81000
+80000230:	43478793          	addi	a5,a5,1076 # 81000434 <barrier_bool+0xfffd714c>
+80000234:	00f707b3          	add	a5,a4,a5
+80000238:	00078513          	mv	a0,a5
+8000023c:	45c000ef          	jal	ra,80000698 <queue_initialize>
+80000240:	fec42783          	lw	a5,-20(s0)
+80000244:	00178793          	addi	a5,a5,1
+80000248:	fef42623          	sw	a5,-20(s0)
+8000024c:	fec42703          	lw	a4,-20(s0)
+80000250:	01f00793          	li	a5,31
+80000254:	fce7d4e3          	bge	a5,a4,8000021c <vx_before_main+0x18>
+80000258:	00000013          	nop
+8000025c:	01c12083          	lw	ra,28(sp)
+80000260:	01812403          	lw	s0,24(sp)
+80000264:	02010113          	addi	sp,sp,32
+80000268:	00008067          	ret
 
-80000230 <vx_reschedule_warps>:
-80000230:	fd010113          	addi	sp,sp,-48
-80000234:	02112623          	sw	ra,44(sp)
-80000238:	02812423          	sw	s0,40(sp)
-8000023c:	03a12223          	sw	s10,36(sp)
-80000240:	03010413          	addi	s0,sp,48
-80000244:	000d0713          	mv	a4,s10
-80000248:	4c400793          	li	a5,1220
-8000024c:	02f70733          	mul	a4,a4,a5
-80000250:	810007b7          	lui	a5,0x81000
-80000254:	31c78793          	addi	a5,a5,796 # 8100031c <main_sp+0xffffa960>
-80000258:	00f707b3          	add	a5,a4,a5
-8000025c:	00078513          	mv	a0,a5
-80000260:	4b8000ef          	jal	ra,80000718 <queue_isEmpty>
-80000264:	00050793          	mv	a5,a0
-80000268:	02078a63          	beqz	a5,8000029c <vx_reschedule_warps+0x6c>
-8000026c:	000d0713          	mv	a4,s10
-80000270:	810007b7          	lui	a5,0x81000
-80000274:	00271713          	slli	a4,a4,0x2
-80000278:	27c78793          	addi	a5,a5,636 # 8100027c <main_sp+0xffffa8c0>
-8000027c:	00f707b3          	add	a5,a4,a5
-80000280:	00100713          	li	a4,1
-80000284:	00e7a023          	sw	a4,0(a5)
-80000288:	000d0793          	mv	a5,s10
-8000028c:	00079663          	bnez	a5,80000298 <vx_reschedule_warps+0x68>
-80000290:	e9dff0ef          	jal	ra,8000012c <vx_load_context>
-80000294:	0580006f          	j	800002ec <vx_reschedule_warps+0xbc>
-80000298:	00000073          	ecall
-8000029c:	000d0713          	mv	a4,s10
-800002a0:	4c400793          	li	a5,1220
-800002a4:	02f70733          	mul	a4,a4,a5
-800002a8:	810007b7          	lui	a5,0x81000
-800002ac:	31c78793          	addi	a5,a5,796 # 8100031c <main_sp+0xffffa960>
-800002b0:	00f707b3          	add	a5,a4,a5
-800002b4:	fd840713          	addi	a4,s0,-40
-800002b8:	00070593          	mv	a1,a4
-800002bc:	00078513          	mv	a0,a5
-800002c0:	3d0000ef          	jal	ra,80000690 <queue_dequeue>
-800002c4:	fe042783          	lw	a5,-32(s0)
-800002c8:	00078113          	mv	sp,a5
-800002cc:	fdc42783          	lw	a5,-36(s0)
-800002d0:	fd842583          	lw	a1,-40(s0)
-800002d4:	fe442603          	lw	a2,-28(s0)
-800002d8:	fe842683          	lw	a3,-24(s0)
-800002dc:	fec42703          	lw	a4,-20(s0)
+8000026c <vx_reschedule_warps>:
+8000026c:	fd010113          	addi	sp,sp,-48
+80000270:	02112623          	sw	ra,44(sp)
+80000274:	02812423          	sw	s0,40(sp)
+80000278:	03a12223          	sw	s10,36(sp)
+8000027c:	03010413          	addi	s0,sp,48
+80000280:	000d0793          	mv	a5,s10
+80000284:	00078593          	mv	a1,a5
+80000288:	810007b7          	lui	a5,0x81000
+8000028c:	04078513          	addi	a0,a5,64 # 81000040 <barrier_bool+0xfffd6d58>
+80000290:	664000ef          	jal	ra,800008f4 <vx_printf>
+80000294:	00000013          	nop
+80000298:	00000013          	nop
+8000029c:	00000013          	nop
+800002a0:	00000013          	nop
+800002a4:	00000013          	nop
+800002a8:	00000013          	nop
+800002ac:	00000013          	nop
+800002b0:	00000013          	nop
+800002b4:	00000013          	nop
+800002b8:	00000013          	nop
+800002bc:	00000013          	nop
+800002c0:	00000013          	nop
+800002c4:	000d0713          	mv	a4,s10
+800002c8:	000017b7          	lui	a5,0x1
+800002cc:	97478793          	addi	a5,a5,-1676 # 974 <SIZE+0x942>
+800002d0:	02f70733          	mul	a4,a4,a5
+800002d4:	810007b7          	lui	a5,0x81000
+800002d8:	43478793          	addi	a5,a5,1076 # 81000434 <barrier_bool+0xfffd714c>
+800002dc:	00f707b3          	add	a5,a4,a5
 800002e0:	00078513          	mv	a0,a5
-800002e4:	d45ff0ef          	jal	ra,80000028 <vx_createThreads>
-800002e8:	00000073          	ecall
-800002ec:	02c12083          	lw	ra,44(sp)
-800002f0:	02812403          	lw	s0,40(sp)
-800002f4:	02412d03          	lw	s10,36(sp)
-800002f8:	03010113          	addi	sp,sp,48
-800002fc:	00008067          	ret
+800002e4:	4e0000ef          	jal	ra,800007c4 <queue_isEmpty>
+800002e8:	00050793          	mv	a5,a0
+800002ec:	02078a63          	beqz	a5,80000320 <vx_reschedule_warps+0xb4>
+800002f0:	000d0713          	mv	a4,s10
+800002f4:	810007b7          	lui	a5,0x81000
+800002f8:	00271713          	slli	a4,a4,0x2
+800002fc:	28c78793          	addi	a5,a5,652 # 8100028c <barrier_bool+0xfffd6fa4>
+80000300:	00f707b3          	add	a5,a4,a5
+80000304:	00100713          	li	a4,1
+80000308:	00e7a023          	sw	a4,0(a5)
+8000030c:	000d0793          	mv	a5,s10
+80000310:	00079663          	bnez	a5,8000031c <vx_reschedule_warps+0xb0>
+80000314:	e51ff0ef          	jal	ra,80000164 <vx_load_context>
+80000318:	05c0006f          	j	80000374 <vx_reschedule_warps+0x108>
+8000031c:	00000073          	ecall
+80000320:	000d0713          	mv	a4,s10
+80000324:	000017b7          	lui	a5,0x1
+80000328:	97478793          	addi	a5,a5,-1676 # 974 <SIZE+0x942>
+8000032c:	02f70733          	mul	a4,a4,a5
+80000330:	810007b7          	lui	a5,0x81000
+80000334:	43478793          	addi	a5,a5,1076 # 81000434 <barrier_bool+0xfffd714c>
+80000338:	00f707b3          	add	a5,a4,a5
+8000033c:	fd840713          	addi	a4,s0,-40
+80000340:	00070593          	mv	a1,a4
+80000344:	00078513          	mv	a0,a5
+80000348:	3dc000ef          	jal	ra,80000724 <queue_dequeue>
+8000034c:	fe042783          	lw	a5,-32(s0)
+80000350:	00078113          	mv	sp,a5
+80000354:	fdc42783          	lw	a5,-36(s0)
+80000358:	fd842583          	lw	a1,-40(s0)
+8000035c:	fe442603          	lw	a2,-28(s0)
+80000360:	fe842683          	lw	a3,-24(s0)
+80000364:	fec42703          	lw	a4,-20(s0)
+80000368:	00078513          	mv	a0,a5
+8000036c:	cbdff0ef          	jal	ra,80000028 <vx_createThreads>
+80000370:	00000073          	ecall
+80000374:	02c12083          	lw	ra,44(sp)
+80000378:	02812403          	lw	s0,40(sp)
+8000037c:	02412d03          	lw	s10,36(sp)
+80000380:	03010113          	addi	sp,sp,48
+80000384:	00008067          	ret
 
-80000300 <vx_schedule_warps>:
-80000300:	fb010113          	addi	sp,sp,-80
-80000304:	04112623          	sw	ra,76(sp)
-80000308:	04812423          	sw	s0,72(sp)
-8000030c:	05010413          	addi	s0,sp,80
-80000310:	eadff0ef          	jal	ra,800001bc <vx_available_warps>
-80000314:	fea42423          	sw	a0,-24(s0)
-80000318:	00010993          	mv	s3,sp
-8000031c:	00100793          	li	a5,1
-80000320:	fef42623          	sw	a5,-20(s0)
-80000324:	0840006f          	j	800003a8 <vx_schedule_warps+0xa8>
-80000328:	fec42703          	lw	a4,-20(s0)
-8000032c:	4c400793          	li	a5,1220
-80000330:	02f70733          	mul	a4,a4,a5
-80000334:	810007b7          	lui	a5,0x81000
-80000338:	31c78793          	addi	a5,a5,796 # 8100031c <main_sp+0xffffa960>
-8000033c:	00f707b3          	add	a5,a4,a5
-80000340:	00078513          	mv	a0,a5
-80000344:	3d4000ef          	jal	ra,80000718 <queue_isEmpty>
-80000348:	00050793          	mv	a5,a0
-8000034c:	04079863          	bnez	a5,8000039c <vx_schedule_warps+0x9c>
-80000350:	fec42703          	lw	a4,-20(s0)
-80000354:	4c400793          	li	a5,1220
-80000358:	02f70733          	mul	a4,a4,a5
-8000035c:	810007b7          	lui	a5,0x81000
-80000360:	31c78793          	addi	a5,a5,796 # 8100031c <main_sp+0xffffa960>
-80000364:	00f707b3          	add	a5,a4,a5
-80000368:	fd040713          	addi	a4,s0,-48
-8000036c:	00070593          	mv	a1,a4
-80000370:	00078513          	mv	a0,a5
-80000374:	31c000ef          	jal	ra,80000690 <queue_dequeue>
-80000378:	fd842783          	lw	a5,-40(s0)
-8000037c:	00078113          	mv	sp,a5
-80000380:	fd442783          	lw	a5,-44(s0)
-80000384:	fd042583          	lw	a1,-48(s0)
-80000388:	fdc42603          	lw	a2,-36(s0)
-8000038c:	fe042683          	lw	a3,-32(s0)
-80000390:	fe442703          	lw	a4,-28(s0)
-80000394:	00078513          	mv	a0,a5
-80000398:	cf5ff0ef          	jal	ra,8000008c <vx_wspawn>
-8000039c:	fec42783          	lw	a5,-20(s0)
-800003a0:	00178793          	addi	a5,a5,1
-800003a4:	fef42623          	sw	a5,-20(s0)
-800003a8:	fec42783          	lw	a5,-20(s0)
-800003ac:	fe842703          	lw	a4,-24(s0)
-800003b0:	f6e7ece3          	bltu	a5,a4,80000328 <vx_schedule_warps+0x28>
-800003b4:	00098113          	mv	sp,s3
-800003b8:	ce5ff0ef          	jal	ra,8000009c <vx_save_context>
-800003bc:	00020793          	mv	a5,tp
-800003c0:	04078863          	beqz	a5,80000410 <vx_schedule_warps+0x110>
-800003c4:	810007b7          	lui	a5,0x81000
-800003c8:	31c78513          	addi	a0,a5,796 # 8100031c <main_sp+0xffffa960>
-800003cc:	34c000ef          	jal	ra,80000718 <queue_isEmpty>
-800003d0:	00050793          	mv	a5,a0
-800003d4:	02079e63          	bnez	a5,80000410 <vx_schedule_warps+0x110>
-800003d8:	fb840793          	addi	a5,s0,-72
-800003dc:	00078593          	mv	a1,a5
-800003e0:	810007b7          	lui	a5,0x81000
-800003e4:	31c78513          	addi	a0,a5,796 # 8100031c <main_sp+0xffffa960>
-800003e8:	2a8000ef          	jal	ra,80000690 <queue_dequeue>
-800003ec:	fc042783          	lw	a5,-64(s0)
-800003f0:	00078113          	mv	sp,a5
-800003f4:	fbc42783          	lw	a5,-68(s0)
-800003f8:	fb842583          	lw	a1,-72(s0)
-800003fc:	fc442603          	lw	a2,-60(s0)
-80000400:	fc842683          	lw	a3,-56(s0)
-80000404:	fcc42703          	lw	a4,-52(s0)
-80000408:	00078513          	mv	a0,a5
-8000040c:	c1dff0ef          	jal	ra,80000028 <vx_createThreads>
-80000410:	00000013          	nop
-80000414:	04c12083          	lw	ra,76(sp)
-80000418:	04812403          	lw	s0,72(sp)
-8000041c:	05010113          	addi	sp,sp,80
-80000420:	00008067          	ret
+80000388 <vx_schedule_warps>:
+80000388:	fb010113          	addi	sp,sp,-80
+8000038c:	04112623          	sw	ra,76(sp)
+80000390:	04812423          	sw	s0,72(sp)
+80000394:	05010413          	addi	s0,sp,80
+80000398:	e5dff0ef          	jal	ra,800001f4 <vx_available_warps>
+8000039c:	fea42423          	sw	a0,-24(s0)
+800003a0:	00010993          	mv	s3,sp
+800003a4:	00100793          	li	a5,1
+800003a8:	fef42623          	sw	a5,-20(s0)
+800003ac:	08c0006f          	j	80000438 <vx_schedule_warps+0xb0>
+800003b0:	fec42703          	lw	a4,-20(s0)
+800003b4:	000017b7          	lui	a5,0x1
+800003b8:	97478793          	addi	a5,a5,-1676 # 974 <SIZE+0x942>
+800003bc:	02f70733          	mul	a4,a4,a5
+800003c0:	810007b7          	lui	a5,0x81000
+800003c4:	43478793          	addi	a5,a5,1076 # 81000434 <barrier_bool+0xfffd714c>
+800003c8:	00f707b3          	add	a5,a4,a5
+800003cc:	00078513          	mv	a0,a5
+800003d0:	3f4000ef          	jal	ra,800007c4 <queue_isEmpty>
+800003d4:	00050793          	mv	a5,a0
+800003d8:	04079a63          	bnez	a5,8000042c <vx_schedule_warps+0xa4>
+800003dc:	fec42703          	lw	a4,-20(s0)
+800003e0:	000017b7          	lui	a5,0x1
+800003e4:	97478793          	addi	a5,a5,-1676 # 974 <SIZE+0x942>
+800003e8:	02f70733          	mul	a4,a4,a5
+800003ec:	810007b7          	lui	a5,0x81000
+800003f0:	43478793          	addi	a5,a5,1076 # 81000434 <barrier_bool+0xfffd714c>
+800003f4:	00f707b3          	add	a5,a4,a5
+800003f8:	fd040713          	addi	a4,s0,-48
+800003fc:	00070593          	mv	a1,a4
+80000400:	00078513          	mv	a0,a5
+80000404:	320000ef          	jal	ra,80000724 <queue_dequeue>
+80000408:	fd842783          	lw	a5,-40(s0)
+8000040c:	00078113          	mv	sp,a5
+80000410:	fd442783          	lw	a5,-44(s0)
+80000414:	fd042583          	lw	a1,-48(s0)
+80000418:	fdc42603          	lw	a2,-36(s0)
+8000041c:	fe042683          	lw	a3,-32(s0)
+80000420:	fe442703          	lw	a4,-28(s0)
+80000424:	00078513          	mv	a0,a5
+80000428:	c9dff0ef          	jal	ra,800000c4 <vx_wspawn>
+8000042c:	fec42783          	lw	a5,-20(s0)
+80000430:	00178793          	addi	a5,a5,1
+80000434:	fef42623          	sw	a5,-20(s0)
+80000438:	fec42783          	lw	a5,-20(s0)
+8000043c:	fe842703          	lw	a4,-24(s0)
+80000440:	f6e7e8e3          	bltu	a5,a4,800003b0 <vx_schedule_warps+0x28>
+80000444:	00098113          	mv	sp,s3
+80000448:	c8dff0ef          	jal	ra,800000d4 <vx_save_context>
+8000044c:	00020793          	mv	a5,tp
+80000450:	04078863          	beqz	a5,800004a0 <vx_schedule_warps+0x118>
+80000454:	810007b7          	lui	a5,0x81000
+80000458:	43478513          	addi	a0,a5,1076 # 81000434 <barrier_bool+0xfffd714c>
+8000045c:	368000ef          	jal	ra,800007c4 <queue_isEmpty>
+80000460:	00050793          	mv	a5,a0
+80000464:	02079e63          	bnez	a5,800004a0 <vx_schedule_warps+0x118>
+80000468:	fb840793          	addi	a5,s0,-72
+8000046c:	00078593          	mv	a1,a5
+80000470:	810007b7          	lui	a5,0x81000
+80000474:	43478513          	addi	a0,a5,1076 # 81000434 <barrier_bool+0xfffd714c>
+80000478:	2ac000ef          	jal	ra,80000724 <queue_dequeue>
+8000047c:	fc042783          	lw	a5,-64(s0)
+80000480:	00078113          	mv	sp,a5
+80000484:	fbc42783          	lw	a5,-68(s0)
+80000488:	fb842583          	lw	a1,-72(s0)
+8000048c:	fc442603          	lw	a2,-60(s0)
+80000490:	fc842683          	lw	a3,-56(s0)
+80000494:	fcc42703          	lw	a4,-52(s0)
+80000498:	00078513          	mv	a0,a5
+8000049c:	b8dff0ef          	jal	ra,80000028 <vx_createThreads>
+800004a0:	00000013          	nop
+800004a4:	04c12083          	lw	ra,76(sp)
+800004a8:	04812403          	lw	s0,72(sp)
+800004ac:	05010113          	addi	sp,sp,80
+800004b0:	00008067          	ret
 
-80000424 <vx_spawnWarps>:
-80000424:	fb010113          	addi	sp,sp,-80
-80000428:	04112623          	sw	ra,76(sp)
-8000042c:	04812423          	sw	s0,72(sp)
-80000430:	05010413          	addi	s0,sp,80
-80000434:	faa42e23          	sw	a0,-68(s0)
-80000438:	fab42c23          	sw	a1,-72(s0)
-8000043c:	fac42a23          	sw	a2,-76(s0)
-80000440:	fad42823          	sw	a3,-80(s0)
-80000444:	d89ff0ef          	jal	ra,800001cc <vx_before_main>
-80000448:	d75ff0ef          	jal	ra,800001bc <vx_available_warps>
-8000044c:	fea42223          	sw	a0,-28(s0)
-80000450:	00010913          	mv	s2,sp
-80000454:	fe042623          	sw	zero,-20(s0)
-80000458:	fe042423          	sw	zero,-24(s0)
-8000045c:	08c0006f          	j	800004e8 <vx_spawnWarps+0xc4>
-80000460:	ffff09b7          	lui	s3,0xffff0
-80000464:	01310133          	add	sp,sp,s3
-80000468:	fe842783          	lw	a5,-24(s0)
-8000046c:	fcf42623          	sw	a5,-52(s0)
-80000470:	fb842783          	lw	a5,-72(s0)
-80000474:	fcf42823          	sw	a5,-48(s0)
-80000478:	00010793          	mv	a5,sp
-8000047c:	fcf42a23          	sw	a5,-44(s0)
-80000480:	fb442783          	lw	a5,-76(s0)
-80000484:	fcf42c23          	sw	a5,-40(s0)
-80000488:	fb042783          	lw	a5,-80(s0)
-8000048c:	fcf42e23          	sw	a5,-36(s0)
-80000490:	fec42783          	lw	a5,-20(s0)
-80000494:	fef42023          	sw	a5,-32(s0)
-80000498:	fec42703          	lw	a4,-20(s0)
-8000049c:	4c400793          	li	a5,1220
-800004a0:	02f70733          	mul	a4,a4,a5
-800004a4:	810007b7          	lui	a5,0x81000
-800004a8:	31c78793          	addi	a5,a5,796 # 8100031c <main_sp+0xffffa960>
-800004ac:	00f707b3          	add	a5,a4,a5
-800004b0:	fcc40713          	addi	a4,s0,-52
-800004b4:	00070593          	mv	a1,a4
-800004b8:	00078513          	mv	a0,a5
-800004bc:	16c000ef          	jal	ra,80000628 <queue_enqueue>
-800004c0:	fec42783          	lw	a5,-20(s0)
-800004c4:	00178793          	addi	a5,a5,1
-800004c8:	fef42623          	sw	a5,-20(s0)
-800004cc:	fec42783          	lw	a5,-20(s0)
-800004d0:	fe442703          	lw	a4,-28(s0)
-800004d4:	00e7e463          	bltu	a5,a4,800004dc <vx_spawnWarps+0xb8>
-800004d8:	fe042623          	sw	zero,-20(s0)
-800004dc:	fe842783          	lw	a5,-24(s0)
-800004e0:	00178793          	addi	a5,a5,1
-800004e4:	fef42423          	sw	a5,-24(s0)
-800004e8:	fe842703          	lw	a4,-24(s0)
-800004ec:	fbc42783          	lw	a5,-68(s0)
-800004f0:	f6f768e3          	bltu	a4,a5,80000460 <vx_spawnWarps+0x3c>
-800004f4:	00090113          	mv	sp,s2
-800004f8:	e09ff0ef          	jal	ra,80000300 <vx_schedule_warps>
-800004fc:	00000013          	nop
-80000500:	04c12083          	lw	ra,76(sp)
-80000504:	04812403          	lw	s0,72(sp)
-80000508:	05010113          	addi	sp,sp,80
-8000050c:	00008067          	ret
-
-80000510 <vx_wait_for_warps>:
-80000510:	fd010113          	addi	sp,sp,-48
-80000514:	02112623          	sw	ra,44(sp)
-80000518:	02812423          	sw	s0,40(sp)
-8000051c:	03010413          	addi	s0,sp,48
-80000520:	fca42e23          	sw	a0,-36(s0)
-80000524:	c99ff0ef          	jal	ra,800001bc <vx_available_warps>
-80000528:	fea42023          	sw	a0,-32(s0)
-8000052c:	fe042623          	sw	zero,-20(s0)
-80000530:	0540006f          	j	80000584 <vx_wait_for_warps+0x74>
-80000534:	fe042623          	sw	zero,-20(s0)
-80000538:	fe042423          	sw	zero,-24(s0)
-8000053c:	03c0006f          	j	80000578 <vx_wait_for_warps+0x68>
-80000540:	810007b7          	lui	a5,0x81000
-80000544:	fe842703          	lw	a4,-24(s0)
-80000548:	00271713          	slli	a4,a4,0x2
-8000054c:	27c78793          	addi	a5,a5,636 # 8100027c <main_sp+0xffffa8c0>
-80000550:	00f707b3          	add	a5,a4,a5
-80000554:	0007a703          	lw	a4,0(a5)
-80000558:	00100793          	li	a5,1
-8000055c:	00f71863          	bne	a4,a5,8000056c <vx_wait_for_warps+0x5c>
+800004b4 <vx_spawnWarps>:
+800004b4:	fb010113          	addi	sp,sp,-80
+800004b8:	04112623          	sw	ra,76(sp)
+800004bc:	04812423          	sw	s0,72(sp)
+800004c0:	05010413          	addi	s0,sp,80
+800004c4:	faa42e23          	sw	a0,-68(s0)
+800004c8:	fab42c23          	sw	a1,-72(s0)
+800004cc:	fac42a23          	sw	a2,-76(s0)
+800004d0:	fad42823          	sw	a3,-80(s0)
+800004d4:	d31ff0ef          	jal	ra,80000204 <vx_before_main>
+800004d8:	d1dff0ef          	jal	ra,800001f4 <vx_available_warps>
+800004dc:	fea42223          	sw	a0,-28(s0)
+800004e0:	00010913          	mv	s2,sp
+800004e4:	fe042623          	sw	zero,-20(s0)
+800004e8:	fe042423          	sw	zero,-24(s0)
+800004ec:	0900006f          	j	8000057c <vx_spawnWarps+0xc8>
+800004f0:	ffff09b7          	lui	s3,0xffff0
+800004f4:	01310133          	add	sp,sp,s3
+800004f8:	fe842783          	lw	a5,-24(s0)
+800004fc:	fcf42623          	sw	a5,-52(s0)
+80000500:	fb842783          	lw	a5,-72(s0)
+80000504:	fcf42823          	sw	a5,-48(s0)
+80000508:	00010793          	mv	a5,sp
+8000050c:	fcf42a23          	sw	a5,-44(s0)
+80000510:	fb442783          	lw	a5,-76(s0)
+80000514:	fcf42c23          	sw	a5,-40(s0)
+80000518:	fb042783          	lw	a5,-80(s0)
+8000051c:	fcf42e23          	sw	a5,-36(s0)
+80000520:	fec42783          	lw	a5,-20(s0)
+80000524:	fef42023          	sw	a5,-32(s0)
+80000528:	fec42703          	lw	a4,-20(s0)
+8000052c:	000017b7          	lui	a5,0x1
+80000530:	97478793          	addi	a5,a5,-1676 # 974 <SIZE+0x942>
+80000534:	02f70733          	mul	a4,a4,a5
+80000538:	810007b7          	lui	a5,0x81000
+8000053c:	43478793          	addi	a5,a5,1076 # 81000434 <barrier_bool+0xfffd714c>
+80000540:	00f707b3          	add	a5,a4,a5
+80000544:	fcc40713          	addi	a4,s0,-52
+80000548:	00070593          	mv	a1,a4
+8000054c:	00078513          	mv	a0,a5
+80000550:	16c000ef          	jal	ra,800006bc <queue_enqueue>
+80000554:	fec42783          	lw	a5,-20(s0)
+80000558:	00178793          	addi	a5,a5,1
+8000055c:	fef42623          	sw	a5,-20(s0)
 80000560:	fec42783          	lw	a5,-20(s0)
-80000564:	00178793          	addi	a5,a5,1
-80000568:	fef42623          	sw	a5,-20(s0)
-8000056c:	fe842783          	lw	a5,-24(s0)
-80000570:	00178793          	addi	a5,a5,1
-80000574:	fef42423          	sw	a5,-24(s0)
-80000578:	fe842783          	lw	a5,-24(s0)
-8000057c:	fe042703          	lw	a4,-32(s0)
-80000580:	fce7e0e3          	bltu	a5,a4,80000540 <vx_wait_for_warps+0x30>
-80000584:	fec42703          	lw	a4,-20(s0)
-80000588:	fdc42783          	lw	a5,-36(s0)
-8000058c:	faf714e3          	bne	a4,a5,80000534 <vx_wait_for_warps+0x24>
-80000590:	fe042223          	sw	zero,-28(s0)
-80000594:	0280006f          	j	800005bc <vx_wait_for_warps+0xac>
-80000598:	810007b7          	lui	a5,0x81000
-8000059c:	fe442703          	lw	a4,-28(s0)
-800005a0:	00271713          	slli	a4,a4,0x2
-800005a4:	27c78793          	addi	a5,a5,636 # 8100027c <main_sp+0xffffa8c0>
-800005a8:	00f707b3          	add	a5,a4,a5
-800005ac:	0007a023          	sw	zero,0(a5)
-800005b0:	fe442783          	lw	a5,-28(s0)
-800005b4:	00178793          	addi	a5,a5,1
-800005b8:	fef42223          	sw	a5,-28(s0)
-800005bc:	fe442783          	lw	a5,-28(s0)
-800005c0:	fe042703          	lw	a4,-32(s0)
-800005c4:	fce7eae3          	bltu	a5,a4,80000598 <vx_wait_for_warps+0x88>
-800005c8:	00000013          	nop
-800005cc:	02c12083          	lw	ra,44(sp)
-800005d0:	02812403          	lw	s0,40(sp)
-800005d4:	03010113          	addi	sp,sp,48
-800005d8:	00008067          	ret
+80000564:	fe442703          	lw	a4,-28(s0)
+80000568:	00e7e463          	bltu	a5,a4,80000570 <vx_spawnWarps+0xbc>
+8000056c:	fe042623          	sw	zero,-20(s0)
+80000570:	fe842783          	lw	a5,-24(s0)
+80000574:	00178793          	addi	a5,a5,1
+80000578:	fef42423          	sw	a5,-24(s0)
+8000057c:	fe842703          	lw	a4,-24(s0)
+80000580:	fbc42783          	lw	a5,-68(s0)
+80000584:	f6f766e3          	bltu	a4,a5,800004f0 <vx_spawnWarps+0x3c>
+80000588:	00090113          	mv	sp,s2
+8000058c:	dfdff0ef          	jal	ra,80000388 <vx_schedule_warps>
+80000590:	00000013          	nop
+80000594:	04c12083          	lw	ra,76(sp)
+80000598:	04812403          	lw	s0,72(sp)
+8000059c:	05010113          	addi	sp,sp,80
+800005a0:	00008067          	ret
 
-800005dc <vx_get_arg_struct>:
-800005dc:	ff010113          	addi	sp,sp,-16
-800005e0:	00812623          	sw	s0,12(sp)
-800005e4:	01712423          	sw	s7,8(sp)
-800005e8:	01010413          	addi	s0,sp,16
-800005ec:	000b8793          	mv	a5,s7
-800005f0:	00078513          	mv	a0,a5
-800005f4:	00c12403          	lw	s0,12(sp)
-800005f8:	00812b83          	lw	s7,8(sp)
-800005fc:	01010113          	addi	sp,sp,16
-80000600:	00008067          	ret
+800005a4 <vx_wait_for_warps>:
+800005a4:	fd010113          	addi	sp,sp,-48
+800005a8:	02112623          	sw	ra,44(sp)
+800005ac:	02812423          	sw	s0,40(sp)
+800005b0:	03010413          	addi	s0,sp,48
+800005b4:	fca42e23          	sw	a0,-36(s0)
+800005b8:	c3dff0ef          	jal	ra,800001f4 <vx_available_warps>
+800005bc:	fea42023          	sw	a0,-32(s0)
+800005c0:	fe042623          	sw	zero,-20(s0)
+800005c4:	0540006f          	j	80000618 <vx_wait_for_warps+0x74>
+800005c8:	fe042623          	sw	zero,-20(s0)
+800005cc:	fe042423          	sw	zero,-24(s0)
+800005d0:	03c0006f          	j	8000060c <vx_wait_for_warps+0x68>
+800005d4:	810007b7          	lui	a5,0x81000
+800005d8:	fe842703          	lw	a4,-24(s0)
+800005dc:	00271713          	slli	a4,a4,0x2
+800005e0:	28c78793          	addi	a5,a5,652 # 8100028c <barrier_bool+0xfffd6fa4>
+800005e4:	00f707b3          	add	a5,a4,a5
+800005e8:	0007a703          	lw	a4,0(a5)
+800005ec:	00100793          	li	a5,1
+800005f0:	00f71863          	bne	a4,a5,80000600 <vx_wait_for_warps+0x5c>
+800005f4:	fec42783          	lw	a5,-20(s0)
+800005f8:	00178793          	addi	a5,a5,1
+800005fc:	fef42623          	sw	a5,-20(s0)
+80000600:	fe842783          	lw	a5,-24(s0)
+80000604:	00178793          	addi	a5,a5,1
+80000608:	fef42423          	sw	a5,-24(s0)
+8000060c:	fe842783          	lw	a5,-24(s0)
+80000610:	fe042703          	lw	a4,-32(s0)
+80000614:	fce7e0e3          	bltu	a5,a4,800005d4 <vx_wait_for_warps+0x30>
+80000618:	fec42703          	lw	a4,-20(s0)
+8000061c:	fdc42783          	lw	a5,-36(s0)
+80000620:	faf714e3          	bne	a4,a5,800005c8 <vx_wait_for_warps+0x24>
+80000624:	fe042223          	sw	zero,-28(s0)
+80000628:	0280006f          	j	80000650 <vx_wait_for_warps+0xac>
+8000062c:	810007b7          	lui	a5,0x81000
+80000630:	fe442703          	lw	a4,-28(s0)
+80000634:	00271713          	slli	a4,a4,0x2
+80000638:	28c78793          	addi	a5,a5,652 # 8100028c <barrier_bool+0xfffd6fa4>
+8000063c:	00f707b3          	add	a5,a4,a5
+80000640:	0007a023          	sw	zero,0(a5)
+80000644:	fe442783          	lw	a5,-28(s0)
+80000648:	00178793          	addi	a5,a5,1
+8000064c:	fef42223          	sw	a5,-28(s0)
+80000650:	fe442783          	lw	a5,-28(s0)
+80000654:	fe042703          	lw	a4,-32(s0)
+80000658:	fce7eae3          	bltu	a5,a4,8000062c <vx_wait_for_warps+0x88>
+8000065c:	00000013          	nop
+80000660:	02c12083          	lw	ra,44(sp)
+80000664:	02812403          	lw	s0,40(sp)
+80000668:	03010113          	addi	sp,sp,48
+8000066c:	00008067          	ret
 
-80000604 <queue_initialize>:
-80000604:	00050293          	mv	t0,a0
-80000608:	00000313          	li	t1,0
-8000060c:	00700393          	li	t2,7
-80000610:	0062a023          	sw	t1,0(t0)
-80000614:	0062a223          	sw	t1,4(t0)
-80000618:	0062a423          	sw	t1,8(t0)
-8000061c:	0072a623          	sw	t2,12(t0)
-80000620:	0062a823          	sw	t1,16(t0)
-80000624:	00008067          	ret
+80000670 <vx_get_arg_struct>:
+80000670:	ff010113          	addi	sp,sp,-16
+80000674:	00812623          	sw	s0,12(sp)
+80000678:	01712423          	sw	s7,8(sp)
+8000067c:	01010413          	addi	s0,sp,16
+80000680:	000b8793          	mv	a5,s7
+80000684:	00078513          	mv	a0,a5
+80000688:	00c12403          	lw	s0,12(sp)
+8000068c:	00812b83          	lw	s7,8(sp)
+80000690:	01010113          	addi	sp,sp,16
+80000694:	00008067          	ret
 
-80000628 <queue_enqueue>:
-80000628:	00050293          	mv	t0,a0
-8000062c:	0082a303          	lw	t1,8(t0)
-80000630:	00130313          	addi	t1,t1,1
-80000634:	0062a423          	sw	t1,8(t0)
-80000638:	01428313          	addi	t1,t0,20
-8000063c:	0042ae83          	lw	t4,4(t0)
-80000640:	005e9393          	slli	t2,t4,0x5
-80000644:	00730333          	add	t1,t1,t2
-80000648:	0005ae03          	lw	t3,0(a1)
-8000064c:	01c32023          	sw	t3,0(t1)
-80000650:	0045ae03          	lw	t3,4(a1)
-80000654:	01c32223          	sw	t3,4(t1)
-80000658:	0085ae03          	lw	t3,8(a1)
-8000065c:	01c32423          	sw	t3,8(t1)
-80000660:	00c5ae03          	lw	t3,12(a1)
-80000664:	01c32623          	sw	t3,12(t1)
-80000668:	0105ae03          	lw	t3,16(a1)
-8000066c:	01c32823          	sw	t3,16(t1)
-80000670:	0145ae03          	lw	t3,20(a1)
-80000674:	01c32a23          	sw	t3,20(t1)
-80000678:	001e8e93          	addi	t4,t4,1
-8000067c:	03200f13          	li	t5,50
-80000680:	01ee9463          	bne	t4,t5,80000688 <ec>
-80000684:	00000e93          	li	t4,0
+80000698 <queue_initialize>:
+80000698:	00050293          	mv	t0,a0
+8000069c:	00000313          	li	t1,0
+800006a0:	00700393          	li	t2,7
+800006a4:	0062a023          	sw	t1,0(t0)
+800006a8:	0062a223          	sw	t1,4(t0)
+800006ac:	0062a423          	sw	t1,8(t0)
+800006b0:	0072a623          	sw	t2,12(t0)
+800006b4:	0062a823          	sw	t1,16(t0)
+800006b8:	00008067          	ret
 
-80000688 <ec>:
-80000688:	01d2a223          	sw	t4,4(t0)
-8000068c:	00008067          	ret
+800006bc <queue_enqueue>:
+800006bc:	00050293          	mv	t0,a0
+800006c0:	0082a303          	lw	t1,8(t0)
+800006c4:	00130313          	addi	t1,t1,1
+800006c8:	0062a423          	sw	t1,8(t0)
+800006cc:	01428313          	addi	t1,t0,20
+800006d0:	0042ae83          	lw	t4,4(t0)
+800006d4:	005e9393          	slli	t2,t4,0x5
+800006d8:	00730333          	add	t1,t1,t2
+800006dc:	0005ae03          	lw	t3,0(a1)
+800006e0:	01c32023          	sw	t3,0(t1)
+800006e4:	0045ae03          	lw	t3,4(a1)
+800006e8:	01c32223          	sw	t3,4(t1)
+800006ec:	0085ae03          	lw	t3,8(a1)
+800006f0:	01c32423          	sw	t3,8(t1)
+800006f4:	00c5ae03          	lw	t3,12(a1)
+800006f8:	01c32623          	sw	t3,12(t1)
+800006fc:	0105ae03          	lw	t3,16(a1)
+80000700:	01c32823          	sw	t3,16(t1)
+80000704:	0145ae03          	lw	t3,20(a1)
+80000708:	01c32a23          	sw	t3,20(t1)
+8000070c:	001e8e93          	addi	t4,t4,1
+80000710:	03200f13          	li	t5,50
+80000714:	01ee9463          	bne	t4,t5,8000071c <ec>
+80000718:	00000e93          	li	t4,0
 
-80000690 <queue_dequeue>:
-80000690:	00050293          	mv	t0,a0
-80000694:	0082a303          	lw	t1,8(t0)
-80000698:	fff30313          	addi	t1,t1,-1
-8000069c:	0062a423          	sw	t1,8(t0)
-800006a0:	01428313          	addi	t1,t0,20
-800006a4:	0002ae83          	lw	t4,0(t0)
-800006a8:	03200f93          	li	t6,50
-800006ac:	000e8f13          	mv	t5,t4
-800006b0:	001f0f13          	addi	t5,t5,1
-800006b4:	01ff1463          	bne	t5,t6,800006bc <dc>
-800006b8:	00000f13          	li	t5,0
+8000071c <ec>:
+8000071c:	01d2a223          	sw	t4,4(t0)
+80000720:	00008067          	ret
 
-800006bc <dc>:
-800006bc:	01e2a023          	sw	t5,0(t0)
-800006c0:	005e9393          	slli	t2,t4,0x5
-800006c4:	00730333          	add	t1,t1,t2
-800006c8:	00032e03          	lw	t3,0(t1)
-800006cc:	01c5a023          	sw	t3,0(a1)
-800006d0:	00432e03          	lw	t3,4(t1)
-800006d4:	01c5a223          	sw	t3,4(a1)
-800006d8:	00832e03          	lw	t3,8(t1)
-800006dc:	01c5a423          	sw	t3,8(a1)
-800006e0:	00c32e03          	lw	t3,12(t1)
-800006e4:	01c5a623          	sw	t3,12(a1)
-800006e8:	01032e03          	lw	t3,16(t1)
-800006ec:	01c5a823          	sw	t3,16(a1)
-800006f0:	01432e03          	lw	t3,20(t1)
-800006f4:	01c5aa23          	sw	t3,20(a1)
-800006f8:	00008067          	ret
+80000724 <queue_dequeue>:
+80000724:	00050293          	mv	t0,a0
+80000728:	0082a303          	lw	t1,8(t0)
+8000072c:	00000013          	nop
+80000730:	00000013          	nop
+80000734:	00000013          	nop
+80000738:	00000013          	nop
+8000073c:	00000013          	nop
+80000740:	00000013          	nop
+80000744:	fff30313          	addi	t1,t1,-1
+80000748:	0062a423          	sw	t1,8(t0)
+8000074c:	01428313          	addi	t1,t0,20
+80000750:	0002ae83          	lw	t4,0(t0)
+80000754:	03200f93          	li	t6,50
+80000758:	000e8f13          	mv	t5,t4
+8000075c:	001f0f13          	addi	t5,t5,1
+80000760:	01ff1463          	bne	t5,t6,80000768 <dc>
+80000764:	00000f13          	li	t5,0
 
-800006fc <queue_isFull>:
-800006fc:	00050293          	mv	t0,a0
-80000700:	0082a303          	lw	t1,8(t0)
-80000704:	00000513          	li	a0,0
-80000708:	03200e13          	li	t3,50
-8000070c:	006e1463          	bne	t3,t1,80000714 <qf>
-80000710:	00150513          	addi	a0,a0,1
+80000768 <dc>:
+80000768:	01e2a023          	sw	t5,0(t0)
+8000076c:	005e9393          	slli	t2,t4,0x5
+80000770:	00730333          	add	t1,t1,t2
+80000774:	00032e03          	lw	t3,0(t1)
+80000778:	01c5a023          	sw	t3,0(a1)
+8000077c:	00432e03          	lw	t3,4(t1)
+80000780:	01c5a223          	sw	t3,4(a1)
+80000784:	00832e03          	lw	t3,8(t1)
+80000788:	01c5a423          	sw	t3,8(a1)
+8000078c:	00c32e03          	lw	t3,12(t1)
+80000790:	01c5a623          	sw	t3,12(a1)
+80000794:	01032e03          	lw	t3,16(t1)
+80000798:	01c5a823          	sw	t3,16(a1)
+8000079c:	01432e03          	lw	t3,20(t1)
+800007a0:	01c5aa23          	sw	t3,20(a1)
+800007a4:	00008067          	ret
 
-80000714 <qf>:
-80000714:	00008067          	ret
+800007a8 <queue_isFull>:
+800007a8:	00050293          	mv	t0,a0
+800007ac:	0082a303          	lw	t1,8(t0)
+800007b0:	00000513          	li	a0,0
+800007b4:	03200e13          	li	t3,50
+800007b8:	006e1463          	bne	t3,t1,800007c0 <qf>
+800007bc:	00150513          	addi	a0,a0,1
 
-80000718 <queue_isEmpty>:
-80000718:	00050293          	mv	t0,a0
-8000071c:	0082a303          	lw	t1,8(t0)
-80000720:	00000513          	li	a0,0
-80000724:	00000e13          	li	t3,0
-80000728:	006e1463          	bne	t3,t1,80000730 <qe>
-8000072c:	00150513          	addi	a0,a0,1
+800007c0 <qf>:
+800007c0:	00008067          	ret
 
-80000730 <qe>:
-80000730:	00008067          	ret
+800007c4 <queue_isEmpty>:
+800007c4:	00050293          	mv	t0,a0
+800007c8:	0082a303          	lw	t1,8(t0)
+800007cc:	00000513          	li	a0,0
+800007d0:	00000e13          	li	t3,0
+800007d4:	006e1463          	bne	t3,t1,800007dc <qe>
+800007d8:	00150513          	addi	a0,a0,1
 
-80000734 <queue_availableWarps>:
-80000734:	00050293          	mv	t0,a0
-80000738:	00c2a303          	lw	t1,12(t0)
-8000073c:	0102a383          	lw	t2,16(t0)
-80000740:	0063b533          	sltu	a0,t2,t1
-80000744:	00008067          	ret
+800007dc <qe>:
+800007dc:	00008067          	ret
 
-80000748 <vx_print_str>:
-80000748:	ff410113          	addi	sp,sp,-12
-8000074c:	00112023          	sw	ra,0(sp)
-80000750:	00b12223          	sw	a1,4(sp)
+800007e0 <queue_availableWarps>:
+800007e0:	00050293          	mv	t0,a0
+800007e4:	00c2a303          	lw	t1,12(t0)
+800007e8:	0102a383          	lw	t2,16(t0)
+800007ec:	0063b533          	sltu	a0,t2,t1
+800007f0:	00008067          	ret
 
-80000754 <bl>:
-80000754:	00054583          	lbu	a1,0(a0)
-80000758:	00058863          	beqz	a1,80000768 <be>
-8000075c:	01c000ef          	jal	ra,80000778 <vx_printc>
-80000760:	00150513          	addi	a0,a0,1
-80000764:	ff1ff06f          	j	80000754 <bl>
+800007f4 <vx_print_str>:
+800007f4:	ff410113          	addi	sp,sp,-12
+800007f8:	00112023          	sw	ra,0(sp)
+800007fc:	00b12223          	sw	a1,4(sp)
 
-80000768 <be>:
-80000768:	00012083          	lw	ra,0(sp)
-8000076c:	00412583          	lw	a1,4(sp)
-80000770:	00c10113          	addi	sp,sp,12
-80000774:	00008067          	ret
+80000800 <bl>:
+80000800:	00054583          	lbu	a1,0(a0)
+80000804:	00058863          	beqz	a1,80000814 <be>
+80000808:	01c000ef          	jal	ra,80000824 <vx_printc>
+8000080c:	00150513          	addi	a0,a0,1
+80000810:	ff1ff06f          	j	80000800 <bl>
 
-80000778 <vx_printc>:
-80000778:	000108b7          	lui	a7,0x10
-8000077c:	00b8a023          	sw	a1,0(a7) # 10000 <SIZE+0xffce>
-80000780:	00008067          	ret
+80000814 <be>:
+80000814:	00012083          	lw	ra,0(sp)
+80000818:	00412583          	lw	a1,4(sp)
+8000081c:	00c10113          	addi	sp,sp,12
+80000820:	00008067          	ret
 
-80000784 <vx_print_hex>:
-80000784:	fd010113          	addi	sp,sp,-48
-80000788:	02112623          	sw	ra,44(sp)
-8000078c:	02812423          	sw	s0,40(sp)
-80000790:	03010413          	addi	s0,sp,48
-80000794:	fca42e23          	sw	a0,-36(s0)
-80000798:	fdc42703          	lw	a4,-36(s0)
-8000079c:	00f00793          	li	a5,15
-800007a0:	02e7e463          	bltu	a5,a4,800007c8 <vx_print_hex+0x44>
-800007a4:	810007b7          	lui	a5,0x81000
-800007a8:	fdc42703          	lw	a4,-36(s0)
-800007ac:	00271713          	slli	a4,a4,0x2
-800007b0:	1bc78793          	addi	a5,a5,444 # 810001bc <main_sp+0xffffa800>
-800007b4:	00f707b3          	add	a5,a4,a5
-800007b8:	0007a783          	lw	a5,0(a5)
-800007bc:	00078513          	mv	a0,a5
-800007c0:	f89ff0ef          	jal	ra,80000748 <vx_print_str>
-800007c4:	0740006f          	j	80000838 <vx_print_hex+0xb4>
-800007c8:	02000793          	li	a5,32
-800007cc:	fef42623          	sw	a5,-20(s0)
-800007d0:	fe0405a3          	sb	zero,-21(s0)
-800007d4:	fec42783          	lw	a5,-20(s0)
-800007d8:	ffc78793          	addi	a5,a5,-4
-800007dc:	fdc42703          	lw	a4,-36(s0)
-800007e0:	00f757b3          	srl	a5,a4,a5
-800007e4:	00f7f793          	andi	a5,a5,15
-800007e8:	fef42223          	sw	a5,-28(s0)
-800007ec:	fe442783          	lw	a5,-28(s0)
-800007f0:	00078663          	beqz	a5,800007fc <vx_print_hex+0x78>
-800007f4:	00100793          	li	a5,1
-800007f8:	fef405a3          	sb	a5,-21(s0)
-800007fc:	feb44783          	lbu	a5,-21(s0)
-80000800:	02078263          	beqz	a5,80000824 <vx_print_hex+0xa0>
-80000804:	810007b7          	lui	a5,0x81000
-80000808:	fe442703          	lw	a4,-28(s0)
-8000080c:	00271713          	slli	a4,a4,0x2
-80000810:	1bc78793          	addi	a5,a5,444 # 810001bc <main_sp+0xffffa800>
-80000814:	00f707b3          	add	a5,a4,a5
-80000818:	0007a783          	lw	a5,0(a5)
-8000081c:	00078513          	mv	a0,a5
-80000820:	f29ff0ef          	jal	ra,80000748 <vx_print_str>
-80000824:	fec42783          	lw	a5,-20(s0)
-80000828:	ffc78793          	addi	a5,a5,-4
-8000082c:	fef42623          	sw	a5,-20(s0)
-80000830:	fec42783          	lw	a5,-20(s0)
-80000834:	faf040e3          	bgtz	a5,800007d4 <vx_print_hex+0x50>
-80000838:	02c12083          	lw	ra,44(sp)
-8000083c:	02812403          	lw	s0,40(sp)
-80000840:	03010113          	addi	sp,sp,48
-80000844:	00008067          	ret
+80000824 <vx_printc>:
+80000824:	000108b7          	lui	a7,0x10
+80000828:	00b8a023          	sw	a1,0(a7) # 10000 <SIZE+0xffce>
+8000082c:	00008067          	ret
 
-80000848 <vx_printf>:
-80000848:	fe010113          	addi	sp,sp,-32
-8000084c:	00112e23          	sw	ra,28(sp)
-80000850:	00812c23          	sw	s0,24(sp)
-80000854:	02010413          	addi	s0,sp,32
-80000858:	fea42623          	sw	a0,-20(s0)
-8000085c:	feb42423          	sw	a1,-24(s0)
-80000860:	fec42503          	lw	a0,-20(s0)
-80000864:	ee5ff0ef          	jal	ra,80000748 <vx_print_str>
-80000868:	fe842503          	lw	a0,-24(s0)
-8000086c:	f19ff0ef          	jal	ra,80000784 <vx_print_hex>
-80000870:	810007b7          	lui	a5,0x81000
-80000874:	08078513          	addi	a0,a5,128 # 81000080 <main_sp+0xffffa6c4>
-80000878:	ed1ff0ef          	jal	ra,80000748 <vx_print_str>
-8000087c:	00000013          	nop
-80000880:	01c12083          	lw	ra,28(sp)
-80000884:	01812403          	lw	s0,24(sp)
-80000888:	02010113          	addi	sp,sp,32
-8000088c:	00008067          	ret
+80000830 <vx_print_hex>:
+80000830:	fd010113          	addi	sp,sp,-48
+80000834:	02112623          	sw	ra,44(sp)
+80000838:	02812423          	sw	s0,40(sp)
+8000083c:	03010413          	addi	s0,sp,48
+80000840:	fca42e23          	sw	a0,-36(s0)
+80000844:	fdc42703          	lw	a4,-36(s0)
+80000848:	00f00793          	li	a5,15
+8000084c:	02e7e463          	bltu	a5,a4,80000874 <vx_print_hex+0x44>
+80000850:	810007b7          	lui	a5,0x81000
+80000854:	fdc42703          	lw	a4,-36(s0)
+80000858:	00271713          	slli	a4,a4,0x2
+8000085c:	1cc78793          	addi	a5,a5,460 # 810001cc <barrier_bool+0xfffd6ee4>
+80000860:	00f707b3          	add	a5,a4,a5
+80000864:	0007a783          	lw	a5,0(a5)
+80000868:	00078513          	mv	a0,a5
+8000086c:	f89ff0ef          	jal	ra,800007f4 <vx_print_str>
+80000870:	0740006f          	j	800008e4 <vx_print_hex+0xb4>
+80000874:	02000793          	li	a5,32
+80000878:	fef42623          	sw	a5,-20(s0)
+8000087c:	fe0405a3          	sb	zero,-21(s0)
+80000880:	fec42783          	lw	a5,-20(s0)
+80000884:	ffc78793          	addi	a5,a5,-4
+80000888:	fdc42703          	lw	a4,-36(s0)
+8000088c:	00f757b3          	srl	a5,a4,a5
+80000890:	00f7f793          	andi	a5,a5,15
+80000894:	fef42223          	sw	a5,-28(s0)
+80000898:	fe442783          	lw	a5,-28(s0)
+8000089c:	00078663          	beqz	a5,800008a8 <vx_print_hex+0x78>
+800008a0:	00100793          	li	a5,1
+800008a4:	fef405a3          	sb	a5,-21(s0)
+800008a8:	feb44783          	lbu	a5,-21(s0)
+800008ac:	02078263          	beqz	a5,800008d0 <vx_print_hex+0xa0>
+800008b0:	810007b7          	lui	a5,0x81000
+800008b4:	fe442703          	lw	a4,-28(s0)
+800008b8:	00271713          	slli	a4,a4,0x2
+800008bc:	1cc78793          	addi	a5,a5,460 # 810001cc <barrier_bool+0xfffd6ee4>
+800008c0:	00f707b3          	add	a5,a4,a5
+800008c4:	0007a783          	lw	a5,0(a5)
+800008c8:	00078513          	mv	a0,a5
+800008cc:	f29ff0ef          	jal	ra,800007f4 <vx_print_str>
+800008d0:	fec42783          	lw	a5,-20(s0)
+800008d4:	ffc78793          	addi	a5,a5,-4
+800008d8:	fef42623          	sw	a5,-20(s0)
+800008dc:	fec42783          	lw	a5,-20(s0)
+800008e0:	faf040e3          	bgtz	a5,80000880 <vx_print_hex+0x50>
+800008e4:	02c12083          	lw	ra,44(sp)
+800008e8:	02812403          	lw	s0,40(sp)
+800008ec:	03010113          	addi	sp,sp,48
+800008f0:	00008067          	ret
 
-80000890 <vx_sq_mat_mult>:
-80000890:	fd010113          	addi	sp,sp,-48
-80000894:	02112623          	sw	ra,44(sp)
-80000898:	02812423          	sw	s0,40(sp)
-8000089c:	03010413          	addi	s0,sp,48
-800008a0:	fca42e23          	sw	a0,-36(s0)
-800008a4:	fcb42c23          	sw	a1,-40(s0)
-800008a8:	fcc42a23          	sw	a2,-44(s0)
-800008ac:	fcd42823          	sw	a3,-48(s0)
-800008b0:	810037b7          	lui	a5,0x81003
-800008b4:	fdc42703          	lw	a4,-36(s0)
-800008b8:	94e7ae23          	sw	a4,-1700(a5) # 8100295c <main_sp+0xffffcfa0>
-800008bc:	810037b7          	lui	a5,0x81003
-800008c0:	95c78793          	addi	a5,a5,-1700 # 8100295c <main_sp+0xffffcfa0>
-800008c4:	fd842703          	lw	a4,-40(s0)
-800008c8:	00e7a223          	sw	a4,4(a5)
-800008cc:	810037b7          	lui	a5,0x81003
-800008d0:	95c78793          	addi	a5,a5,-1700 # 8100295c <main_sp+0xffffcfa0>
-800008d4:	fd442703          	lw	a4,-44(s0)
-800008d8:	00e7a423          	sw	a4,8(a5)
-800008dc:	810037b7          	lui	a5,0x81003
-800008e0:	95c78793          	addi	a5,a5,-1700 # 8100295c <main_sp+0xffffcfa0>
-800008e4:	fd042703          	lw	a4,-48(s0)
-800008e8:	00e7a623          	sw	a4,12(a5)
-800008ec:	8d9ff0ef          	jal	ra,800001c4 <vx_available_threads>
-800008f0:	fea42423          	sw	a0,-24(s0)
-800008f4:	fd042703          	lw	a4,-48(s0)
-800008f8:	fe842783          	lw	a5,-24(s0)
-800008fc:	02f757b3          	divu	a5,a4,a5
-80000900:	fef42623          	sw	a5,-20(s0)
-80000904:	fd042703          	lw	a4,-48(s0)
-80000908:	fe842783          	lw	a5,-24(s0)
-8000090c:	02f777b3          	remu	a5,a4,a5
-80000910:	00078863          	beqz	a5,80000920 <vx_sq_mat_mult+0x90>
-80000914:	fec42783          	lw	a5,-20(s0)
-80000918:	00178793          	addi	a5,a5,1
-8000091c:	fef42623          	sw	a5,-20(s0)
-80000920:	fec42583          	lw	a1,-20(s0)
-80000924:	810007b7          	lui	a5,0x81000
-80000928:	0c478513          	addi	a0,a5,196 # 810000c4 <main_sp+0xffffa708>
-8000092c:	f1dff0ef          	jal	ra,80000848 <vx_printf>
-80000930:	810037b7          	lui	a5,0x81003
-80000934:	95c78793          	addi	a5,a5,-1700 # 8100295c <main_sp+0xffffcfa0>
-80000938:	fec42703          	lw	a4,-20(s0)
-8000093c:	00e7a823          	sw	a4,16(a5)
-80000940:	fd042703          	lw	a4,-48(s0)
-80000944:	fe842783          	lw	a5,-24(s0)
-80000948:	02f76263          	bltu	a4,a5,8000096c <vx_sq_mat_mult+0xdc>
-8000094c:	810037b7          	lui	a5,0x81003
-80000950:	95c78693          	addi	a3,a5,-1700 # 8100295c <main_sp+0xffffcfa0>
-80000954:	800017b7          	lui	a5,0x80001
-80000958:	9c478613          	addi	a2,a5,-1596 # 800009c4 <main_sp+0xfeffb008>
-8000095c:	fe842583          	lw	a1,-24(s0)
-80000960:	fd042503          	lw	a0,-48(s0)
-80000964:	ac1ff0ef          	jal	ra,80000424 <vx_spawnWarps>
-80000968:	0200006f          	j	80000988 <vx_sq_mat_mult+0xf8>
-8000096c:	810037b7          	lui	a5,0x81003
-80000970:	95c78693          	addi	a3,a5,-1700 # 8100295c <main_sp+0xffffcfa0>
-80000974:	800017b7          	lui	a5,0x80001
-80000978:	9c478613          	addi	a2,a5,-1596 # 800009c4 <main_sp+0xfeffb008>
-8000097c:	fd042583          	lw	a1,-48(s0)
-80000980:	fd042503          	lw	a0,-48(s0)
-80000984:	aa1ff0ef          	jal	ra,80000424 <vx_spawnWarps>
-80000988:	835ff0ef          	jal	ra,800001bc <vx_available_warps>
-8000098c:	fea42223          	sw	a0,-28(s0)
+800008f4 <vx_printf>:
+800008f4:	fe010113          	addi	sp,sp,-32
+800008f8:	00112e23          	sw	ra,28(sp)
+800008fc:	00812c23          	sw	s0,24(sp)
+80000900:	02010413          	addi	s0,sp,32
+80000904:	fea42623          	sw	a0,-20(s0)
+80000908:	feb42423          	sw	a1,-24(s0)
+8000090c:	fec42503          	lw	a0,-20(s0)
+80000910:	ee5ff0ef          	jal	ra,800007f4 <vx_print_str>
+80000914:	fe842503          	lw	a0,-24(s0)
+80000918:	f19ff0ef          	jal	ra,80000830 <vx_print_hex>
+8000091c:	810007b7          	lui	a5,0x81000
+80000920:	09078513          	addi	a0,a5,144 # 81000090 <barrier_bool+0xfffd6da8>
+80000924:	ed1ff0ef          	jal	ra,800007f4 <vx_print_str>
+80000928:	00000013          	nop
+8000092c:	01c12083          	lw	ra,28(sp)
+80000930:	01812403          	lw	s0,24(sp)
+80000934:	02010113          	addi	sp,sp,32
+80000938:	00008067          	ret
+
+8000093c <vx_sq_mat_mult>:
+8000093c:	fd010113          	addi	sp,sp,-48
+80000940:	02112623          	sw	ra,44(sp)
+80000944:	02812423          	sw	s0,40(sp)
+80000948:	03010413          	addi	s0,sp,48
+8000094c:	fca42e23          	sw	a0,-36(s0)
+80000950:	fcb42c23          	sw	a1,-40(s0)
+80000954:	fcc42a23          	sw	a2,-44(s0)
+80000958:	fcd42823          	sw	a3,-48(s0)
+8000095c:	810267b7          	lui	a5,0x81026
+80000960:	fdc42703          	lw	a4,-36(s0)
+80000964:	1ce7ae23          	sw	a4,476(a5) # 810261dc <barrier_bool+0xffffcef4>
+80000968:	810267b7          	lui	a5,0x81026
+8000096c:	1dc78793          	addi	a5,a5,476 # 810261dc <barrier_bool+0xffffcef4>
+80000970:	fd842703          	lw	a4,-40(s0)
+80000974:	00e7a223          	sw	a4,4(a5)
+80000978:	810267b7          	lui	a5,0x81026
+8000097c:	1dc78793          	addi	a5,a5,476 # 810261dc <barrier_bool+0xffffcef4>
+80000980:	fd442703          	lw	a4,-44(s0)
+80000984:	00e7a423          	sw	a4,8(a5)
+80000988:	810267b7          	lui	a5,0x81026
+8000098c:	1dc78793          	addi	a5,a5,476 # 810261dc <barrier_bool+0xffffcef4>
 80000990:	fd042703          	lw	a4,-48(s0)
-80000994:	fe442783          	lw	a5,-28(s0)
-80000998:	00e7f863          	bgeu	a5,a4,800009a8 <vx_sq_mat_mult+0x118>
-8000099c:	fe442503          	lw	a0,-28(s0)
-800009a0:	b71ff0ef          	jal	ra,80000510 <vx_wait_for_warps>
-800009a4:	00c0006f          	j	800009b0 <vx_sq_mat_mult+0x120>
-800009a8:	fd042503          	lw	a0,-48(s0)
-800009ac:	b65ff0ef          	jal	ra,80000510 <vx_wait_for_warps>
-800009b0:	00000013          	nop
-800009b4:	02c12083          	lw	ra,44(sp)
-800009b8:	02812403          	lw	s0,40(sp)
-800009bc:	03010113          	addi	sp,sp,48
-800009c0:	00008067          	ret
+80000994:	00e7a623          	sw	a4,12(a5)
+80000998:	865ff0ef          	jal	ra,800001fc <vx_available_threads>
+8000099c:	fea42423          	sw	a0,-24(s0)
+800009a0:	fd042703          	lw	a4,-48(s0)
+800009a4:	fe842783          	lw	a5,-24(s0)
+800009a8:	02f757b3          	divu	a5,a4,a5
+800009ac:	fef42623          	sw	a5,-20(s0)
+800009b0:	fd042703          	lw	a4,-48(s0)
+800009b4:	fe842783          	lw	a5,-24(s0)
+800009b8:	02f777b3          	remu	a5,a4,a5
+800009bc:	00078863          	beqz	a5,800009cc <vx_sq_mat_mult+0x90>
+800009c0:	fec42783          	lw	a5,-20(s0)
+800009c4:	00178793          	addi	a5,a5,1
+800009c8:	fef42623          	sw	a5,-20(s0)
+800009cc:	fec42583          	lw	a1,-20(s0)
+800009d0:	810007b7          	lui	a5,0x81000
+800009d4:	0d478513          	addi	a0,a5,212 # 810000d4 <barrier_bool+0xfffd6dec>
+800009d8:	f1dff0ef          	jal	ra,800008f4 <vx_printf>
+800009dc:	810267b7          	lui	a5,0x81026
+800009e0:	1dc78793          	addi	a5,a5,476 # 810261dc <barrier_bool+0xffffcef4>
+800009e4:	fec42703          	lw	a4,-20(s0)
+800009e8:	00e7a823          	sw	a4,16(a5)
+800009ec:	fd042703          	lw	a4,-48(s0)
+800009f0:	fe842783          	lw	a5,-24(s0)
+800009f4:	02f76263          	bltu	a4,a5,80000a18 <vx_sq_mat_mult+0xdc>
+800009f8:	810267b7          	lui	a5,0x81026
+800009fc:	1dc78693          	addi	a3,a5,476 # 810261dc <barrier_bool+0xffffcef4>
+80000a00:	800017b7          	lui	a5,0x80001
+80000a04:	a7078613          	addi	a2,a5,-1424 # 80000a70 <barrier_bool+0xfefd7788>
+80000a08:	fe842583          	lw	a1,-24(s0)
+80000a0c:	fd042503          	lw	a0,-48(s0)
+80000a10:	aa5ff0ef          	jal	ra,800004b4 <vx_spawnWarps>
+80000a14:	0200006f          	j	80000a34 <vx_sq_mat_mult+0xf8>
+80000a18:	810267b7          	lui	a5,0x81026
+80000a1c:	1dc78693          	addi	a3,a5,476 # 810261dc <barrier_bool+0xffffcef4>
+80000a20:	800017b7          	lui	a5,0x80001
+80000a24:	a7078613          	addi	a2,a5,-1424 # 80000a70 <barrier_bool+0xfefd7788>
+80000a28:	fd042583          	lw	a1,-48(s0)
+80000a2c:	fd042503          	lw	a0,-48(s0)
+80000a30:	a85ff0ef          	jal	ra,800004b4 <vx_spawnWarps>
+80000a34:	fc0ff0ef          	jal	ra,800001f4 <vx_available_warps>
+80000a38:	fea42223          	sw	a0,-28(s0)
+80000a3c:	fd042703          	lw	a4,-48(s0)
+80000a40:	fe442783          	lw	a5,-28(s0)
+80000a44:	00e7f863          	bgeu	a5,a4,80000a54 <vx_sq_mat_mult+0x118>
+80000a48:	fe442503          	lw	a0,-28(s0)
+80000a4c:	b59ff0ef          	jal	ra,800005a4 <vx_wait_for_warps>
+80000a50:	00c0006f          	j	80000a5c <vx_sq_mat_mult+0x120>
+80000a54:	fd042503          	lw	a0,-48(s0)
+80000a58:	b4dff0ef          	jal	ra,800005a4 <vx_wait_for_warps>
+80000a5c:	00000013          	nop
+80000a60:	02c12083          	lw	ra,44(sp)
+80000a64:	02812403          	lw	s0,40(sp)
+80000a68:	03010113          	addi	sp,sp,48
+80000a6c:	00008067          	ret
 
-800009c4 <_vx_mat_mult>:
-800009c4:	fa010113          	addi	sp,sp,-96
-800009c8:	04112e23          	sw	ra,92(sp)
-800009cc:	04812c23          	sw	s0,88(sp)
-800009d0:	06010413          	addi	s0,sp,96
-800009d4:	faa42623          	sw	a0,-84(s0)
-800009d8:	fab42423          	sw	a1,-88(s0)
-800009dc:	c01ff0ef          	jal	ra,800005dc <vx_get_arg_struct>
-800009e0:	fca42c23          	sw	a0,-40(s0)
-800009e4:	fd842783          	lw	a5,-40(s0)
-800009e8:	0007a783          	lw	a5,0(a5)
-800009ec:	fcf42a23          	sw	a5,-44(s0)
-800009f0:	fd842783          	lw	a5,-40(s0)
-800009f4:	0047a783          	lw	a5,4(a5)
-800009f8:	fcf42823          	sw	a5,-48(s0)
-800009fc:	fd842783          	lw	a5,-40(s0)
-80000a00:	0087a783          	lw	a5,8(a5)
-80000a04:	fcf42623          	sw	a5,-52(s0)
-80000a08:	fd842783          	lw	a5,-40(s0)
-80000a0c:	0107a783          	lw	a5,16(a5)
-80000a10:	fef42623          	sw	a5,-20(s0)
-80000a14:	fec42703          	lw	a4,-20(s0)
-80000a18:	fac42783          	lw	a5,-84(s0)
-80000a1c:	02f707b3          	mul	a5,a4,a5
-80000a20:	fef42423          	sw	a5,-24(s0)
-80000a24:	fec42783          	lw	a5,-20(s0)
-80000a28:	00079a63          	bnez	a5,80000a3c <_vx_mat_mult+0x78>
-80000a2c:	00100793          	li	a5,1
-80000a30:	fef42623          	sw	a5,-20(s0)
-80000a34:	fac42783          	lw	a5,-84(s0)
-80000a38:	fef42423          	sw	a5,-24(s0)
-80000a3c:	fd842783          	lw	a5,-40(s0)
-80000a40:	00c7a783          	lw	a5,12(a5)
-80000a44:	fcf42423          	sw	a5,-56(s0)
-80000a48:	fe042223          	sw	zero,-28(s0)
-80000a4c:	0d80006f          	j	80000b24 <_vx_mat_mult+0x160>
-80000a50:	fe042023          	sw	zero,-32(s0)
-80000a54:	fc042e23          	sw	zero,-36(s0)
-80000a58:	0780006f          	j	80000ad0 <_vx_mat_mult+0x10c>
-80000a5c:	fa842703          	lw	a4,-88(s0)
-80000a60:	fc842783          	lw	a5,-56(s0)
-80000a64:	02f707b3          	mul	a5,a4,a5
-80000a68:	fdc42703          	lw	a4,-36(s0)
-80000a6c:	00f707b3          	add	a5,a4,a5
-80000a70:	fcf42223          	sw	a5,-60(s0)
-80000a74:	fc842703          	lw	a4,-56(s0)
-80000a78:	fdc42783          	lw	a5,-36(s0)
-80000a7c:	02f707b3          	mul	a5,a4,a5
-80000a80:	fe842703          	lw	a4,-24(s0)
-80000a84:	00f707b3          	add	a5,a4,a5
-80000a88:	fcf42023          	sw	a5,-64(s0)
-80000a8c:	fc442783          	lw	a5,-60(s0)
-80000a90:	00279793          	slli	a5,a5,0x2
-80000a94:	fd442703          	lw	a4,-44(s0)
-80000a98:	00f707b3          	add	a5,a4,a5
-80000a9c:	0007a703          	lw	a4,0(a5)
-80000aa0:	fc042783          	lw	a5,-64(s0)
-80000aa4:	00279793          	slli	a5,a5,0x2
-80000aa8:	fd042683          	lw	a3,-48(s0)
-80000aac:	00f687b3          	add	a5,a3,a5
-80000ab0:	0007a783          	lw	a5,0(a5)
-80000ab4:	02f707b3          	mul	a5,a4,a5
-80000ab8:	fe042703          	lw	a4,-32(s0)
-80000abc:	00f707b3          	add	a5,a4,a5
-80000ac0:	fef42023          	sw	a5,-32(s0)
-80000ac4:	fdc42783          	lw	a5,-36(s0)
-80000ac8:	00178793          	addi	a5,a5,1
-80000acc:	fcf42e23          	sw	a5,-36(s0)
-80000ad0:	fdc42703          	lw	a4,-36(s0)
-80000ad4:	fc842783          	lw	a5,-56(s0)
-80000ad8:	f8f762e3          	bltu	a4,a5,80000a5c <_vx_mat_mult+0x98>
-80000adc:	fa842703          	lw	a4,-88(s0)
-80000ae0:	fc842783          	lw	a5,-56(s0)
-80000ae4:	02f70733          	mul	a4,a4,a5
-80000ae8:	fe842783          	lw	a5,-24(s0)
-80000aec:	00f707b3          	add	a5,a4,a5
-80000af0:	faf42e23          	sw	a5,-68(s0)
-80000af4:	fbc42783          	lw	a5,-68(s0)
-80000af8:	00279793          	slli	a5,a5,0x2
-80000afc:	fcc42703          	lw	a4,-52(s0)
-80000b00:	00f707b3          	add	a5,a4,a5
-80000b04:	fe042703          	lw	a4,-32(s0)
-80000b08:	00e7a023          	sw	a4,0(a5)
-80000b0c:	fe842783          	lw	a5,-24(s0)
-80000b10:	00178793          	addi	a5,a5,1
-80000b14:	fef42423          	sw	a5,-24(s0)
-80000b18:	fe442783          	lw	a5,-28(s0)
-80000b1c:	00178793          	addi	a5,a5,1
-80000b20:	fef42223          	sw	a5,-28(s0)
-80000b24:	fe442783          	lw	a5,-28(s0)
-80000b28:	fec42703          	lw	a4,-20(s0)
-80000b2c:	f2e7e2e3          	bltu	a5,a4,80000a50 <_vx_mat_mult+0x8c>
-80000b30:	00000013          	nop
-80000b34:	05c12083          	lw	ra,92(sp)
-80000b38:	05812403          	lw	s0,88(sp)
-80000b3c:	06010113          	addi	sp,sp,96
-80000b40:	00008067          	ret
+80000a70 <_vx_mat_mult>:
+80000a70:	fa010113          	addi	sp,sp,-96
+80000a74:	04112e23          	sw	ra,92(sp)
+80000a78:	04812c23          	sw	s0,88(sp)
+80000a7c:	06010413          	addi	s0,sp,96
+80000a80:	faa42623          	sw	a0,-84(s0)
+80000a84:	fab42423          	sw	a1,-88(s0)
+80000a88:	be9ff0ef          	jal	ra,80000670 <vx_get_arg_struct>
+80000a8c:	fca42c23          	sw	a0,-40(s0)
+80000a90:	fd842783          	lw	a5,-40(s0)
+80000a94:	0007a783          	lw	a5,0(a5)
+80000a98:	fcf42a23          	sw	a5,-44(s0)
+80000a9c:	fd842783          	lw	a5,-40(s0)
+80000aa0:	0047a783          	lw	a5,4(a5)
+80000aa4:	fcf42823          	sw	a5,-48(s0)
+80000aa8:	fd842783          	lw	a5,-40(s0)
+80000aac:	0087a783          	lw	a5,8(a5)
+80000ab0:	fcf42623          	sw	a5,-52(s0)
+80000ab4:	fd842783          	lw	a5,-40(s0)
+80000ab8:	0107a783          	lw	a5,16(a5)
+80000abc:	fef42623          	sw	a5,-20(s0)
+80000ac0:	fec42703          	lw	a4,-20(s0)
+80000ac4:	fac42783          	lw	a5,-84(s0)
+80000ac8:	02f707b3          	mul	a5,a4,a5
+80000acc:	fef42423          	sw	a5,-24(s0)
+80000ad0:	fec42783          	lw	a5,-20(s0)
+80000ad4:	00079a63          	bnez	a5,80000ae8 <_vx_mat_mult+0x78>
+80000ad8:	00100793          	li	a5,1
+80000adc:	fef42623          	sw	a5,-20(s0)
+80000ae0:	fac42783          	lw	a5,-84(s0)
+80000ae4:	fef42423          	sw	a5,-24(s0)
+80000ae8:	fd842783          	lw	a5,-40(s0)
+80000aec:	00c7a783          	lw	a5,12(a5)
+80000af0:	fcf42423          	sw	a5,-56(s0)
+80000af4:	fe042223          	sw	zero,-28(s0)
+80000af8:	0d80006f          	j	80000bd0 <_vx_mat_mult+0x160>
+80000afc:	fe042023          	sw	zero,-32(s0)
+80000b00:	fc042e23          	sw	zero,-36(s0)
+80000b04:	0780006f          	j	80000b7c <_vx_mat_mult+0x10c>
+80000b08:	fa842703          	lw	a4,-88(s0)
+80000b0c:	fc842783          	lw	a5,-56(s0)
+80000b10:	02f707b3          	mul	a5,a4,a5
+80000b14:	fdc42703          	lw	a4,-36(s0)
+80000b18:	00f707b3          	add	a5,a4,a5
+80000b1c:	fcf42223          	sw	a5,-60(s0)
+80000b20:	fc842703          	lw	a4,-56(s0)
+80000b24:	fdc42783          	lw	a5,-36(s0)
+80000b28:	02f707b3          	mul	a5,a4,a5
+80000b2c:	fe842703          	lw	a4,-24(s0)
+80000b30:	00f707b3          	add	a5,a4,a5
+80000b34:	fcf42023          	sw	a5,-64(s0)
+80000b38:	fc442783          	lw	a5,-60(s0)
+80000b3c:	00279793          	slli	a5,a5,0x2
+80000b40:	fd442703          	lw	a4,-44(s0)
+80000b44:	00f707b3          	add	a5,a4,a5
+80000b48:	0007a703          	lw	a4,0(a5)
+80000b4c:	fc042783          	lw	a5,-64(s0)
+80000b50:	00279793          	slli	a5,a5,0x2
+80000b54:	fd042683          	lw	a3,-48(s0)
+80000b58:	00f687b3          	add	a5,a3,a5
+80000b5c:	0007a783          	lw	a5,0(a5)
+80000b60:	02f707b3          	mul	a5,a4,a5
+80000b64:	fe042703          	lw	a4,-32(s0)
+80000b68:	00f707b3          	add	a5,a4,a5
+80000b6c:	fef42023          	sw	a5,-32(s0)
+80000b70:	fdc42783          	lw	a5,-36(s0)
+80000b74:	00178793          	addi	a5,a5,1
+80000b78:	fcf42e23          	sw	a5,-36(s0)
+80000b7c:	fdc42703          	lw	a4,-36(s0)
+80000b80:	fc842783          	lw	a5,-56(s0)
+80000b84:	f8f762e3          	bltu	a4,a5,80000b08 <_vx_mat_mult+0x98>
+80000b88:	fa842703          	lw	a4,-88(s0)
+80000b8c:	fc842783          	lw	a5,-56(s0)
+80000b90:	02f70733          	mul	a4,a4,a5
+80000b94:	fe842783          	lw	a5,-24(s0)
+80000b98:	00f707b3          	add	a5,a4,a5
+80000b9c:	faf42e23          	sw	a5,-68(s0)
+80000ba0:	fbc42783          	lw	a5,-68(s0)
+80000ba4:	00279793          	slli	a5,a5,0x2
+80000ba8:	fcc42703          	lw	a4,-52(s0)
+80000bac:	00f707b3          	add	a5,a4,a5
+80000bb0:	fe042703          	lw	a4,-32(s0)
+80000bb4:	00e7a023          	sw	a4,0(a5)
+80000bb8:	fe842783          	lw	a5,-24(s0)
+80000bbc:	00178793          	addi	a5,a5,1
+80000bc0:	fef42423          	sw	a5,-24(s0)
+80000bc4:	fe442783          	lw	a5,-28(s0)
+80000bc8:	00178793          	addi	a5,a5,1
+80000bcc:	fef42223          	sw	a5,-28(s0)
+80000bd0:	fe442783          	lw	a5,-28(s0)
+80000bd4:	fec42703          	lw	a4,-20(s0)
+80000bd8:	f2e7e2e3          	bltu	a5,a4,80000afc <_vx_mat_mult+0x8c>
+80000bdc:	00000013          	nop
+80000be0:	05c12083          	lw	ra,92(sp)
+80000be4:	05812403          	lw	s0,88(sp)
+80000be8:	06010113          	addi	sp,sp,96
+80000bec:	00008067          	ret
 
-80000b44 <vx_mat_add>:
-80000b44:	fc010113          	addi	sp,sp,-64
-80000b48:	02112e23          	sw	ra,60(sp)
-80000b4c:	02812c23          	sw	s0,56(sp)
-80000b50:	04010413          	addi	s0,sp,64
-80000b54:	fca42e23          	sw	a0,-36(s0)
-80000b58:	fcb42c23          	sw	a1,-40(s0)
-80000b5c:	fcc42a23          	sw	a2,-44(s0)
-80000b60:	fcd42823          	sw	a3,-48(s0)
-80000b64:	fce42623          	sw	a4,-52(s0)
-80000b68:	810037b7          	lui	a5,0x81003
-80000b6c:	fdc42703          	lw	a4,-36(s0)
-80000b70:	96e7a823          	sw	a4,-1680(a5) # 81002970 <main_sp+0xffffcfb4>
-80000b74:	810037b7          	lui	a5,0x81003
-80000b78:	97078793          	addi	a5,a5,-1680 # 81002970 <main_sp+0xffffcfb4>
-80000b7c:	fd842703          	lw	a4,-40(s0)
-80000b80:	00e7a223          	sw	a4,4(a5)
-80000b84:	810037b7          	lui	a5,0x81003
-80000b88:	97078793          	addi	a5,a5,-1680 # 81002970 <main_sp+0xffffcfb4>
-80000b8c:	fd442703          	lw	a4,-44(s0)
-80000b90:	00e7a423          	sw	a4,8(a5)
-80000b94:	810037b7          	lui	a5,0x81003
-80000b98:	97078793          	addi	a5,a5,-1680 # 81002970 <main_sp+0xffffcfb4>
-80000b9c:	fcc42703          	lw	a4,-52(s0)
-80000ba0:	00e7a623          	sw	a4,12(a5)
-80000ba4:	810037b7          	lui	a5,0x81003
-80000ba8:	97078793          	addi	a5,a5,-1680 # 81002970 <main_sp+0xffffcfb4>
-80000bac:	fd042703          	lw	a4,-48(s0)
-80000bb0:	00e7a823          	sw	a4,16(a5)
-80000bb4:	e10ff0ef          	jal	ra,800001c4 <vx_available_threads>
-80000bb8:	fea42423          	sw	a0,-24(s0)
-80000bbc:	fcc42703          	lw	a4,-52(s0)
-80000bc0:	fe842783          	lw	a5,-24(s0)
-80000bc4:	02f757b3          	divu	a5,a4,a5
-80000bc8:	fef42623          	sw	a5,-20(s0)
-80000bcc:	fcc42703          	lw	a4,-52(s0)
-80000bd0:	fe842783          	lw	a5,-24(s0)
-80000bd4:	02f777b3          	remu	a5,a4,a5
-80000bd8:	00078863          	beqz	a5,80000be8 <vx_mat_add+0xa4>
-80000bdc:	fec42783          	lw	a5,-20(s0)
-80000be0:	00178793          	addi	a5,a5,1
-80000be4:	fef42623          	sw	a5,-20(s0)
-80000be8:	810037b7          	lui	a5,0x81003
-80000bec:	97078793          	addi	a5,a5,-1680 # 81002970 <main_sp+0xffffcfb4>
-80000bf0:	fec42703          	lw	a4,-20(s0)
-80000bf4:	00e7aa23          	sw	a4,20(a5)
-80000bf8:	fcc42703          	lw	a4,-52(s0)
-80000bfc:	fe842783          	lw	a5,-24(s0)
-80000c00:	02f76263          	bltu	a4,a5,80000c24 <vx_mat_add+0xe0>
-80000c04:	810037b7          	lui	a5,0x81003
-80000c08:	97078693          	addi	a3,a5,-1680 # 81002970 <main_sp+0xffffcfb4>
-80000c0c:	800017b7          	lui	a5,0x80001
-80000c10:	c7c78613          	addi	a2,a5,-900 # 80000c7c <main_sp+0xfeffb2c0>
-80000c14:	fe842583          	lw	a1,-24(s0)
-80000c18:	fd042503          	lw	a0,-48(s0)
-80000c1c:	809ff0ef          	jal	ra,80000424 <vx_spawnWarps>
-80000c20:	0200006f          	j	80000c40 <vx_mat_add+0xfc>
-80000c24:	810037b7          	lui	a5,0x81003
-80000c28:	97078693          	addi	a3,a5,-1680 # 81002970 <main_sp+0xffffcfb4>
-80000c2c:	800017b7          	lui	a5,0x80001
-80000c30:	c7c78613          	addi	a2,a5,-900 # 80000c7c <main_sp+0xfeffb2c0>
-80000c34:	fcc42583          	lw	a1,-52(s0)
-80000c38:	fd042503          	lw	a0,-48(s0)
-80000c3c:	fe8ff0ef          	jal	ra,80000424 <vx_spawnWarps>
-80000c40:	d7cff0ef          	jal	ra,800001bc <vx_available_warps>
-80000c44:	fea42223          	sw	a0,-28(s0)
-80000c48:	fd042703          	lw	a4,-48(s0)
-80000c4c:	fe442783          	lw	a5,-28(s0)
-80000c50:	00e7f863          	bgeu	a5,a4,80000c60 <vx_mat_add+0x11c>
-80000c54:	fe442503          	lw	a0,-28(s0)
-80000c58:	8b9ff0ef          	jal	ra,80000510 <vx_wait_for_warps>
-80000c5c:	00c0006f          	j	80000c68 <vx_mat_add+0x124>
-80000c60:	fd042503          	lw	a0,-48(s0)
-80000c64:	8adff0ef          	jal	ra,80000510 <vx_wait_for_warps>
-80000c68:	00000013          	nop
-80000c6c:	03c12083          	lw	ra,60(sp)
-80000c70:	03812403          	lw	s0,56(sp)
-80000c74:	04010113          	addi	sp,sp,64
-80000c78:	00008067          	ret
+80000bf0 <vx_mat_add>:
+80000bf0:	fc010113          	addi	sp,sp,-64
+80000bf4:	02112e23          	sw	ra,60(sp)
+80000bf8:	02812c23          	sw	s0,56(sp)
+80000bfc:	04010413          	addi	s0,sp,64
+80000c00:	fca42e23          	sw	a0,-36(s0)
+80000c04:	fcb42c23          	sw	a1,-40(s0)
+80000c08:	fcc42a23          	sw	a2,-44(s0)
+80000c0c:	fcd42823          	sw	a3,-48(s0)
+80000c10:	fce42623          	sw	a4,-52(s0)
+80000c14:	810267b7          	lui	a5,0x81026
+80000c18:	fdc42703          	lw	a4,-36(s0)
+80000c1c:	1ee7a823          	sw	a4,496(a5) # 810261f0 <barrier_bool+0xffffcf08>
+80000c20:	810267b7          	lui	a5,0x81026
+80000c24:	1f078793          	addi	a5,a5,496 # 810261f0 <barrier_bool+0xffffcf08>
+80000c28:	fd842703          	lw	a4,-40(s0)
+80000c2c:	00e7a223          	sw	a4,4(a5)
+80000c30:	810267b7          	lui	a5,0x81026
+80000c34:	1f078793          	addi	a5,a5,496 # 810261f0 <barrier_bool+0xffffcf08>
+80000c38:	fd442703          	lw	a4,-44(s0)
+80000c3c:	00e7a423          	sw	a4,8(a5)
+80000c40:	810267b7          	lui	a5,0x81026
+80000c44:	1f078793          	addi	a5,a5,496 # 810261f0 <barrier_bool+0xffffcf08>
+80000c48:	fcc42703          	lw	a4,-52(s0)
+80000c4c:	00e7a623          	sw	a4,12(a5)
+80000c50:	810267b7          	lui	a5,0x81026
+80000c54:	1f078793          	addi	a5,a5,496 # 810261f0 <barrier_bool+0xffffcf08>
+80000c58:	fd042703          	lw	a4,-48(s0)
+80000c5c:	00e7a823          	sw	a4,16(a5)
+80000c60:	d9cff0ef          	jal	ra,800001fc <vx_available_threads>
+80000c64:	fea42423          	sw	a0,-24(s0)
+80000c68:	fcc42703          	lw	a4,-52(s0)
+80000c6c:	fe842783          	lw	a5,-24(s0)
+80000c70:	02f757b3          	divu	a5,a4,a5
+80000c74:	fef42623          	sw	a5,-20(s0)
+80000c78:	fcc42703          	lw	a4,-52(s0)
+80000c7c:	fe842783          	lw	a5,-24(s0)
+80000c80:	02f777b3          	remu	a5,a4,a5
+80000c84:	00078863          	beqz	a5,80000c94 <vx_mat_add+0xa4>
+80000c88:	fec42783          	lw	a5,-20(s0)
+80000c8c:	00178793          	addi	a5,a5,1
+80000c90:	fef42623          	sw	a5,-20(s0)
+80000c94:	810267b7          	lui	a5,0x81026
+80000c98:	1f078793          	addi	a5,a5,496 # 810261f0 <barrier_bool+0xffffcf08>
+80000c9c:	fec42703          	lw	a4,-20(s0)
+80000ca0:	00e7aa23          	sw	a4,20(a5)
+80000ca4:	fcc42703          	lw	a4,-52(s0)
+80000ca8:	fe842783          	lw	a5,-24(s0)
+80000cac:	02f76263          	bltu	a4,a5,80000cd0 <vx_mat_add+0xe0>
+80000cb0:	810267b7          	lui	a5,0x81026
+80000cb4:	1f078693          	addi	a3,a5,496 # 810261f0 <barrier_bool+0xffffcf08>
+80000cb8:	800017b7          	lui	a5,0x80001
+80000cbc:	d2878613          	addi	a2,a5,-728 # 80000d28 <barrier_bool+0xfefd7a40>
+80000cc0:	fe842583          	lw	a1,-24(s0)
+80000cc4:	fd042503          	lw	a0,-48(s0)
+80000cc8:	fecff0ef          	jal	ra,800004b4 <vx_spawnWarps>
+80000ccc:	0200006f          	j	80000cec <vx_mat_add+0xfc>
+80000cd0:	810267b7          	lui	a5,0x81026
+80000cd4:	1f078693          	addi	a3,a5,496 # 810261f0 <barrier_bool+0xffffcf08>
+80000cd8:	800017b7          	lui	a5,0x80001
+80000cdc:	d2878613          	addi	a2,a5,-728 # 80000d28 <barrier_bool+0xfefd7a40>
+80000ce0:	fcc42583          	lw	a1,-52(s0)
+80000ce4:	fd042503          	lw	a0,-48(s0)
+80000ce8:	fccff0ef          	jal	ra,800004b4 <vx_spawnWarps>
+80000cec:	d08ff0ef          	jal	ra,800001f4 <vx_available_warps>
+80000cf0:	fea42223          	sw	a0,-28(s0)
+80000cf4:	fd042703          	lw	a4,-48(s0)
+80000cf8:	fe442783          	lw	a5,-28(s0)
+80000cfc:	00e7f863          	bgeu	a5,a4,80000d0c <vx_mat_add+0x11c>
+80000d00:	fe442503          	lw	a0,-28(s0)
+80000d04:	8a1ff0ef          	jal	ra,800005a4 <vx_wait_for_warps>
+80000d08:	00c0006f          	j	80000d14 <vx_mat_add+0x124>
+80000d0c:	fd042503          	lw	a0,-48(s0)
+80000d10:	895ff0ef          	jal	ra,800005a4 <vx_wait_for_warps>
+80000d14:	00000013          	nop
+80000d18:	03c12083          	lw	ra,60(sp)
+80000d1c:	03812403          	lw	s0,56(sp)
+80000d20:	04010113          	addi	sp,sp,64
+80000d24:	00008067          	ret
 
-80000c7c <_vx_mat_add>:
-80000c7c:	fb010113          	addi	sp,sp,-80
-80000c80:	04112623          	sw	ra,76(sp)
-80000c84:	04812423          	sw	s0,72(sp)
-80000c88:	05010413          	addi	s0,sp,80
-80000c8c:	faa42e23          	sw	a0,-68(s0)
-80000c90:	fab42c23          	sw	a1,-72(s0)
-80000c94:	949ff0ef          	jal	ra,800005dc <vx_get_arg_struct>
-80000c98:	fea42023          	sw	a0,-32(s0)
-80000c9c:	fe042783          	lw	a5,-32(s0)
-80000ca0:	0007a783          	lw	a5,0(a5)
-80000ca4:	fcf42e23          	sw	a5,-36(s0)
-80000ca8:	fe042783          	lw	a5,-32(s0)
-80000cac:	0047a783          	lw	a5,4(a5)
-80000cb0:	fcf42c23          	sw	a5,-40(s0)
-80000cb4:	fe042783          	lw	a5,-32(s0)
-80000cb8:	0087a783          	lw	a5,8(a5)
-80000cbc:	fcf42a23          	sw	a5,-44(s0)
-80000cc0:	fe042783          	lw	a5,-32(s0)
-80000cc4:	0147a783          	lw	a5,20(a5)
-80000cc8:	fef42623          	sw	a5,-20(s0)
-80000ccc:	fec42703          	lw	a4,-20(s0)
-80000cd0:	fbc42783          	lw	a5,-68(s0)
-80000cd4:	02f707b3          	mul	a5,a4,a5
-80000cd8:	fef42423          	sw	a5,-24(s0)
-80000cdc:	fec42783          	lw	a5,-20(s0)
-80000ce0:	00079a63          	bnez	a5,80000cf4 <_vx_mat_add+0x78>
-80000ce4:	00100793          	li	a5,1
-80000ce8:	fef42623          	sw	a5,-20(s0)
-80000cec:	fbc42783          	lw	a5,-68(s0)
-80000cf0:	fef42423          	sw	a5,-24(s0)
-80000cf4:	fe042783          	lw	a5,-32(s0)
-80000cf8:	00c7a783          	lw	a5,12(a5)
-80000cfc:	fcf42823          	sw	a5,-48(s0)
-80000d00:	fe042223          	sw	zero,-28(s0)
-80000d04:	0c00006f          	j	80000dc4 <_vx_mat_add+0x148>
-80000d08:	fb842703          	lw	a4,-72(s0)
-80000d0c:	fd042783          	lw	a5,-48(s0)
-80000d10:	02f70733          	mul	a4,a4,a5
-80000d14:	fe842783          	lw	a5,-24(s0)
-80000d18:	00f707b3          	add	a5,a4,a5
-80000d1c:	fcf42623          	sw	a5,-52(s0)
-80000d20:	fe842703          	lw	a4,-24(s0)
-80000d24:	fd042783          	lw	a5,-48(s0)
-80000d28:	00f737b3          	sltu	a5,a4,a5
-80000d2c:	0ff7f793          	andi	a5,a5,255
-80000d30:	fcf42423          	sw	a5,-56(s0)
-80000d34:	fc842783          	lw	a5,-56(s0)
-80000d38:	0017b793          	seqz	a5,a5
-80000d3c:	fcf403a3          	sb	a5,-57(s0)
-80000d40:	fc744783          	lbu	a5,-57(s0)
-80000d44:	00078f13          	mv	t5,a5
-80000d48:	800017b7          	lui	a5,0x80001
-80000d4c:	db078f93          	addi	t6,a5,-592 # 80000db0 <main_sp+0xfeffb3f4>
-80000d50:	000f206b          	0xf206b
-80000d54:	01ff707b          	0x1ff707b
-80000d58:	fcc42783          	lw	a5,-52(s0)
-80000d5c:	00279793          	slli	a5,a5,0x2
-80000d60:	fdc42703          	lw	a4,-36(s0)
-80000d64:	00f707b3          	add	a5,a4,a5
-80000d68:	0007a683          	lw	a3,0(a5)
-80000d6c:	fcc42783          	lw	a5,-52(s0)
-80000d70:	00279793          	slli	a5,a5,0x2
-80000d74:	fd842703          	lw	a4,-40(s0)
-80000d78:	00f707b3          	add	a5,a4,a5
-80000d7c:	0007a703          	lw	a4,0(a5)
-80000d80:	fcc42783          	lw	a5,-52(s0)
-80000d84:	00279793          	slli	a5,a5,0x2
-80000d88:	fd442603          	lw	a2,-44(s0)
-80000d8c:	00f607b3          	add	a5,a2,a5
-80000d90:	00e68733          	add	a4,a3,a4
-80000d94:	00e7a023          	sw	a4,0(a5)
-80000d98:	fe842783          	lw	a5,-24(s0)
-80000d9c:	00178793          	addi	a5,a5,1
-80000da0:	fef42423          	sw	a5,-24(s0)
-80000da4:	800017b7          	lui	a5,0x80001
-80000da8:	db478e13          	addi	t3,a5,-588 # 80000db4 <main_sp+0xfeffb3f8>
-80000dac:	000e0067          	jr	t3
-80000db0:	00000013          	nop
-80000db4:	0000306b          	0x306b
-80000db8:	fe442783          	lw	a5,-28(s0)
-80000dbc:	00178793          	addi	a5,a5,1
-80000dc0:	fef42223          	sw	a5,-28(s0)
-80000dc4:	fe442783          	lw	a5,-28(s0)
-80000dc8:	fec42703          	lw	a4,-20(s0)
-80000dcc:	f2e7eee3          	bltu	a5,a4,80000d08 <_vx_mat_add+0x8c>
-80000dd0:	00000013          	nop
-80000dd4:	04c12083          	lw	ra,76(sp)
-80000dd8:	04812403          	lw	s0,72(sp)
-80000ddc:	05010113          	addi	sp,sp,80
-80000de0:	00008067          	ret
-
-80000de4 <vx_mat_sub>:
-80000de4:	fc010113          	addi	sp,sp,-64
-80000de8:	02112e23          	sw	ra,60(sp)
-80000dec:	02812c23          	sw	s0,56(sp)
-80000df0:	04010413          	addi	s0,sp,64
-80000df4:	fca42e23          	sw	a0,-36(s0)
-80000df8:	fcb42c23          	sw	a1,-40(s0)
-80000dfc:	fcc42a23          	sw	a2,-44(s0)
-80000e00:	fcd42823          	sw	a3,-48(s0)
-80000e04:	fce42623          	sw	a4,-52(s0)
-80000e08:	810037b7          	lui	a5,0x81003
+80000d28 <_vx_mat_add>:
+80000d28:	fb010113          	addi	sp,sp,-80
+80000d2c:	04112623          	sw	ra,76(sp)
+80000d30:	04812423          	sw	s0,72(sp)
+80000d34:	05010413          	addi	s0,sp,80
+80000d38:	faa42e23          	sw	a0,-68(s0)
+80000d3c:	fab42c23          	sw	a1,-72(s0)
+80000d40:	931ff0ef          	jal	ra,80000670 <vx_get_arg_struct>
+80000d44:	fea42023          	sw	a0,-32(s0)
+80000d48:	fe042783          	lw	a5,-32(s0)
+80000d4c:	0007a783          	lw	a5,0(a5)
+80000d50:	fcf42e23          	sw	a5,-36(s0)
+80000d54:	fe042783          	lw	a5,-32(s0)
+80000d58:	0047a783          	lw	a5,4(a5)
+80000d5c:	fcf42c23          	sw	a5,-40(s0)
+80000d60:	fe042783          	lw	a5,-32(s0)
+80000d64:	0087a783          	lw	a5,8(a5)
+80000d68:	fcf42a23          	sw	a5,-44(s0)
+80000d6c:	fe042783          	lw	a5,-32(s0)
+80000d70:	0147a783          	lw	a5,20(a5)
+80000d74:	fef42623          	sw	a5,-20(s0)
+80000d78:	fec42703          	lw	a4,-20(s0)
+80000d7c:	fbc42783          	lw	a5,-68(s0)
+80000d80:	02f707b3          	mul	a5,a4,a5
+80000d84:	fef42423          	sw	a5,-24(s0)
+80000d88:	fec42783          	lw	a5,-20(s0)
+80000d8c:	00079a63          	bnez	a5,80000da0 <_vx_mat_add+0x78>
+80000d90:	00100793          	li	a5,1
+80000d94:	fef42623          	sw	a5,-20(s0)
+80000d98:	fbc42783          	lw	a5,-68(s0)
+80000d9c:	fef42423          	sw	a5,-24(s0)
+80000da0:	fe042783          	lw	a5,-32(s0)
+80000da4:	00c7a783          	lw	a5,12(a5)
+80000da8:	fcf42823          	sw	a5,-48(s0)
+80000dac:	fe042223          	sw	zero,-28(s0)
+80000db0:	0c00006f          	j	80000e70 <_vx_mat_add+0x148>
+80000db4:	fb842703          	lw	a4,-72(s0)
+80000db8:	fd042783          	lw	a5,-48(s0)
+80000dbc:	02f70733          	mul	a4,a4,a5
+80000dc0:	fe842783          	lw	a5,-24(s0)
+80000dc4:	00f707b3          	add	a5,a4,a5
+80000dc8:	fcf42623          	sw	a5,-52(s0)
+80000dcc:	fe842703          	lw	a4,-24(s0)
+80000dd0:	fd042783          	lw	a5,-48(s0)
+80000dd4:	00f737b3          	sltu	a5,a4,a5
+80000dd8:	0ff7f793          	andi	a5,a5,255
+80000ddc:	fcf42423          	sw	a5,-56(s0)
+80000de0:	fc842783          	lw	a5,-56(s0)
+80000de4:	0017b793          	seqz	a5,a5
+80000de8:	fcf403a3          	sb	a5,-57(s0)
+80000dec:	fc744783          	lbu	a5,-57(s0)
+80000df0:	00078f13          	mv	t5,a5
+80000df4:	800017b7          	lui	a5,0x80001
+80000df8:	e5c78f93          	addi	t6,a5,-420 # 80000e5c <barrier_bool+0xfefd7b74>
+80000dfc:	000f206b          	0xf206b
+80000e00:	01ff707b          	0x1ff707b
+80000e04:	fcc42783          	lw	a5,-52(s0)
+80000e08:	00279793          	slli	a5,a5,0x2
 80000e0c:	fdc42703          	lw	a4,-36(s0)
-80000e10:	96e7a823          	sw	a4,-1680(a5) # 81002970 <main_sp+0xffffcfb4>
-80000e14:	810037b7          	lui	a5,0x81003
-80000e18:	97078793          	addi	a5,a5,-1680 # 81002970 <main_sp+0xffffcfb4>
-80000e1c:	fd842703          	lw	a4,-40(s0)
-80000e20:	00e7a223          	sw	a4,4(a5)
-80000e24:	810037b7          	lui	a5,0x81003
-80000e28:	97078793          	addi	a5,a5,-1680 # 81002970 <main_sp+0xffffcfb4>
-80000e2c:	fd442703          	lw	a4,-44(s0)
-80000e30:	00e7a423          	sw	a4,8(a5)
-80000e34:	810037b7          	lui	a5,0x81003
-80000e38:	97078793          	addi	a5,a5,-1680 # 81002970 <main_sp+0xffffcfb4>
-80000e3c:	fcc42703          	lw	a4,-52(s0)
-80000e40:	00e7a623          	sw	a4,12(a5)
-80000e44:	810037b7          	lui	a5,0x81003
-80000e48:	97078793          	addi	a5,a5,-1680 # 81002970 <main_sp+0xffffcfb4>
-80000e4c:	fd042703          	lw	a4,-48(s0)
-80000e50:	00e7a823          	sw	a4,16(a5)
-80000e54:	b70ff0ef          	jal	ra,800001c4 <vx_available_threads>
-80000e58:	fea42423          	sw	a0,-24(s0)
-80000e5c:	fcc42703          	lw	a4,-52(s0)
-80000e60:	fe842783          	lw	a5,-24(s0)
-80000e64:	02f757b3          	divu	a5,a4,a5
-80000e68:	fef42623          	sw	a5,-20(s0)
-80000e6c:	fcc42703          	lw	a4,-52(s0)
-80000e70:	fe842783          	lw	a5,-24(s0)
-80000e74:	02f777b3          	remu	a5,a4,a5
-80000e78:	00078863          	beqz	a5,80000e88 <vx_mat_sub+0xa4>
-80000e7c:	fec42783          	lw	a5,-20(s0)
-80000e80:	00178793          	addi	a5,a5,1
-80000e84:	fef42623          	sw	a5,-20(s0)
-80000e88:	810037b7          	lui	a5,0x81003
-80000e8c:	97078793          	addi	a5,a5,-1680 # 81002970 <main_sp+0xffffcfb4>
-80000e90:	fec42703          	lw	a4,-20(s0)
-80000e94:	00e7aa23          	sw	a4,20(a5)
-80000e98:	fcc42703          	lw	a4,-52(s0)
-80000e9c:	fe842783          	lw	a5,-24(s0)
-80000ea0:	02f76263          	bltu	a4,a5,80000ec4 <vx_mat_sub+0xe0>
-80000ea4:	810037b7          	lui	a5,0x81003
-80000ea8:	97078693          	addi	a3,a5,-1680 # 81002970 <main_sp+0xffffcfb4>
-80000eac:	800017b7          	lui	a5,0x80001
-80000eb0:	f1c78613          	addi	a2,a5,-228 # 80000f1c <main_sp+0xfeffb560>
-80000eb4:	fe842583          	lw	a1,-24(s0)
-80000eb8:	fd042503          	lw	a0,-48(s0)
-80000ebc:	d68ff0ef          	jal	ra,80000424 <vx_spawnWarps>
-80000ec0:	0200006f          	j	80000ee0 <vx_mat_sub+0xfc>
-80000ec4:	810037b7          	lui	a5,0x81003
-80000ec8:	97078693          	addi	a3,a5,-1680 # 81002970 <main_sp+0xffffcfb4>
-80000ecc:	800017b7          	lui	a5,0x80001
-80000ed0:	f1c78613          	addi	a2,a5,-228 # 80000f1c <main_sp+0xfeffb560>
-80000ed4:	fcc42583          	lw	a1,-52(s0)
-80000ed8:	fd042503          	lw	a0,-48(s0)
-80000edc:	d48ff0ef          	jal	ra,80000424 <vx_spawnWarps>
-80000ee0:	adcff0ef          	jal	ra,800001bc <vx_available_warps>
-80000ee4:	fea42223          	sw	a0,-28(s0)
-80000ee8:	fd042703          	lw	a4,-48(s0)
-80000eec:	fe442783          	lw	a5,-28(s0)
-80000ef0:	00e7f863          	bgeu	a5,a4,80000f00 <vx_mat_sub+0x11c>
-80000ef4:	fe442503          	lw	a0,-28(s0)
-80000ef8:	e18ff0ef          	jal	ra,80000510 <vx_wait_for_warps>
-80000efc:	00c0006f          	j	80000f08 <vx_mat_sub+0x124>
-80000f00:	fd042503          	lw	a0,-48(s0)
-80000f04:	e0cff0ef          	jal	ra,80000510 <vx_wait_for_warps>
-80000f08:	00000013          	nop
-80000f0c:	03c12083          	lw	ra,60(sp)
-80000f10:	03812403          	lw	s0,56(sp)
-80000f14:	04010113          	addi	sp,sp,64
-80000f18:	00008067          	ret
+80000e10:	00f707b3          	add	a5,a4,a5
+80000e14:	0007a683          	lw	a3,0(a5)
+80000e18:	fcc42783          	lw	a5,-52(s0)
+80000e1c:	00279793          	slli	a5,a5,0x2
+80000e20:	fd842703          	lw	a4,-40(s0)
+80000e24:	00f707b3          	add	a5,a4,a5
+80000e28:	0007a703          	lw	a4,0(a5)
+80000e2c:	fcc42783          	lw	a5,-52(s0)
+80000e30:	00279793          	slli	a5,a5,0x2
+80000e34:	fd442603          	lw	a2,-44(s0)
+80000e38:	00f607b3          	add	a5,a2,a5
+80000e3c:	00e68733          	add	a4,a3,a4
+80000e40:	00e7a023          	sw	a4,0(a5)
+80000e44:	fe842783          	lw	a5,-24(s0)
+80000e48:	00178793          	addi	a5,a5,1
+80000e4c:	fef42423          	sw	a5,-24(s0)
+80000e50:	800017b7          	lui	a5,0x80001
+80000e54:	e6078e13          	addi	t3,a5,-416 # 80000e60 <barrier_bool+0xfefd7b78>
+80000e58:	000e0067          	jr	t3
+80000e5c:	00000013          	nop
+80000e60:	0000306b          	0x306b
+80000e64:	fe442783          	lw	a5,-28(s0)
+80000e68:	00178793          	addi	a5,a5,1
+80000e6c:	fef42223          	sw	a5,-28(s0)
+80000e70:	fe442783          	lw	a5,-28(s0)
+80000e74:	fec42703          	lw	a4,-20(s0)
+80000e78:	f2e7eee3          	bltu	a5,a4,80000db4 <_vx_mat_add+0x8c>
+80000e7c:	00000013          	nop
+80000e80:	04c12083          	lw	ra,76(sp)
+80000e84:	04812403          	lw	s0,72(sp)
+80000e88:	05010113          	addi	sp,sp,80
+80000e8c:	00008067          	ret
 
-80000f1c <_vx_mat_sub>:
-80000f1c:	fb010113          	addi	sp,sp,-80
-80000f20:	04112623          	sw	ra,76(sp)
-80000f24:	04812423          	sw	s0,72(sp)
-80000f28:	05010413          	addi	s0,sp,80
-80000f2c:	faa42e23          	sw	a0,-68(s0)
-80000f30:	fab42c23          	sw	a1,-72(s0)
-80000f34:	ea8ff0ef          	jal	ra,800005dc <vx_get_arg_struct>
-80000f38:	fea42023          	sw	a0,-32(s0)
-80000f3c:	fe042783          	lw	a5,-32(s0)
-80000f40:	0007a783          	lw	a5,0(a5)
-80000f44:	fcf42e23          	sw	a5,-36(s0)
-80000f48:	fe042783          	lw	a5,-32(s0)
-80000f4c:	0047a783          	lw	a5,4(a5)
-80000f50:	fcf42c23          	sw	a5,-40(s0)
-80000f54:	fe042783          	lw	a5,-32(s0)
-80000f58:	0087a783          	lw	a5,8(a5)
-80000f5c:	fcf42a23          	sw	a5,-44(s0)
-80000f60:	fe042783          	lw	a5,-32(s0)
-80000f64:	0147a783          	lw	a5,20(a5)
-80000f68:	fef42623          	sw	a5,-20(s0)
-80000f6c:	fec42703          	lw	a4,-20(s0)
-80000f70:	fbc42783          	lw	a5,-68(s0)
-80000f74:	02f707b3          	mul	a5,a4,a5
-80000f78:	fef42423          	sw	a5,-24(s0)
-80000f7c:	fec42783          	lw	a5,-20(s0)
-80000f80:	00079a63          	bnez	a5,80000f94 <_vx_mat_sub+0x78>
-80000f84:	00100793          	li	a5,1
-80000f88:	fef42623          	sw	a5,-20(s0)
-80000f8c:	fbc42783          	lw	a5,-68(s0)
-80000f90:	fef42423          	sw	a5,-24(s0)
-80000f94:	fe042783          	lw	a5,-32(s0)
-80000f98:	00c7a783          	lw	a5,12(a5)
-80000f9c:	fcf42823          	sw	a5,-48(s0)
-80000fa0:	fe042223          	sw	zero,-28(s0)
-80000fa4:	0c00006f          	j	80001064 <_vx_mat_sub+0x148>
-80000fa8:	fb842703          	lw	a4,-72(s0)
-80000fac:	fd042783          	lw	a5,-48(s0)
-80000fb0:	02f70733          	mul	a4,a4,a5
-80000fb4:	fe842783          	lw	a5,-24(s0)
-80000fb8:	00f707b3          	add	a5,a4,a5
-80000fbc:	fcf42623          	sw	a5,-52(s0)
-80000fc0:	fe842703          	lw	a4,-24(s0)
-80000fc4:	fd042783          	lw	a5,-48(s0)
-80000fc8:	00f737b3          	sltu	a5,a4,a5
-80000fcc:	0ff7f793          	andi	a5,a5,255
-80000fd0:	fcf42423          	sw	a5,-56(s0)
-80000fd4:	fc842783          	lw	a5,-56(s0)
-80000fd8:	0017b793          	seqz	a5,a5
-80000fdc:	fcf403a3          	sb	a5,-57(s0)
-80000fe0:	fc744783          	lbu	a5,-57(s0)
-80000fe4:	00078f13          	mv	t5,a5
-80000fe8:	800017b7          	lui	a5,0x80001
-80000fec:	05078f93          	addi	t6,a5,80 # 80001050 <main_sp+0xfeffb694>
-80000ff0:	000f206b          	0xf206b
-80000ff4:	01ff707b          	0x1ff707b
-80000ff8:	fcc42783          	lw	a5,-52(s0)
-80000ffc:	00279793          	slli	a5,a5,0x2
-80001000:	fdc42703          	lw	a4,-36(s0)
-80001004:	00f707b3          	add	a5,a4,a5
-80001008:	0007a683          	lw	a3,0(a5)
-8000100c:	fcc42783          	lw	a5,-52(s0)
-80001010:	00279793          	slli	a5,a5,0x2
-80001014:	fd842703          	lw	a4,-40(s0)
-80001018:	00f707b3          	add	a5,a4,a5
-8000101c:	0007a703          	lw	a4,0(a5)
-80001020:	fcc42783          	lw	a5,-52(s0)
-80001024:	00279793          	slli	a5,a5,0x2
-80001028:	fd442603          	lw	a2,-44(s0)
-8000102c:	00f607b3          	add	a5,a2,a5
-80001030:	40e68733          	sub	a4,a3,a4
-80001034:	00e7a023          	sw	a4,0(a5)
-80001038:	fe842783          	lw	a5,-24(s0)
-8000103c:	00178793          	addi	a5,a5,1
-80001040:	fef42423          	sw	a5,-24(s0)
-80001044:	800017b7          	lui	a5,0x80001
-80001048:	05478e13          	addi	t3,a5,84 # 80001054 <main_sp+0xfeffb698>
-8000104c:	000e0067          	jr	t3
-80001050:	00000013          	nop
-80001054:	0000306b          	0x306b
-80001058:	fe442783          	lw	a5,-28(s0)
-8000105c:	00178793          	addi	a5,a5,1
-80001060:	fef42223          	sw	a5,-28(s0)
-80001064:	fe442783          	lw	a5,-28(s0)
-80001068:	fec42703          	lw	a4,-20(s0)
-8000106c:	f2e7eee3          	bltu	a5,a4,80000fa8 <_vx_mat_sub+0x8c>
-80001070:	00000013          	nop
-80001074:	04c12083          	lw	ra,76(sp)
-80001078:	04812403          	lw	s0,72(sp)
-8000107c:	05010113          	addi	sp,sp,80
-80001080:	00008067          	ret
+80000e90 <vx_mat_sub>:
+80000e90:	fc010113          	addi	sp,sp,-64
+80000e94:	02112e23          	sw	ra,60(sp)
+80000e98:	02812c23          	sw	s0,56(sp)
+80000e9c:	04010413          	addi	s0,sp,64
+80000ea0:	fca42e23          	sw	a0,-36(s0)
+80000ea4:	fcb42c23          	sw	a1,-40(s0)
+80000ea8:	fcc42a23          	sw	a2,-44(s0)
+80000eac:	fcd42823          	sw	a3,-48(s0)
+80000eb0:	fce42623          	sw	a4,-52(s0)
+80000eb4:	810267b7          	lui	a5,0x81026
+80000eb8:	fdc42703          	lw	a4,-36(s0)
+80000ebc:	1ee7a823          	sw	a4,496(a5) # 810261f0 <barrier_bool+0xffffcf08>
+80000ec0:	810267b7          	lui	a5,0x81026
+80000ec4:	1f078793          	addi	a5,a5,496 # 810261f0 <barrier_bool+0xffffcf08>
+80000ec8:	fd842703          	lw	a4,-40(s0)
+80000ecc:	00e7a223          	sw	a4,4(a5)
+80000ed0:	810267b7          	lui	a5,0x81026
+80000ed4:	1f078793          	addi	a5,a5,496 # 810261f0 <barrier_bool+0xffffcf08>
+80000ed8:	fd442703          	lw	a4,-44(s0)
+80000edc:	00e7a423          	sw	a4,8(a5)
+80000ee0:	810267b7          	lui	a5,0x81026
+80000ee4:	1f078793          	addi	a5,a5,496 # 810261f0 <barrier_bool+0xffffcf08>
+80000ee8:	fcc42703          	lw	a4,-52(s0)
+80000eec:	00e7a623          	sw	a4,12(a5)
+80000ef0:	810267b7          	lui	a5,0x81026
+80000ef4:	1f078793          	addi	a5,a5,496 # 810261f0 <barrier_bool+0xffffcf08>
+80000ef8:	fd042703          	lw	a4,-48(s0)
+80000efc:	00e7a823          	sw	a4,16(a5)
+80000f00:	afcff0ef          	jal	ra,800001fc <vx_available_threads>
+80000f04:	fea42423          	sw	a0,-24(s0)
+80000f08:	fcc42703          	lw	a4,-52(s0)
+80000f0c:	fe842783          	lw	a5,-24(s0)
+80000f10:	02f757b3          	divu	a5,a4,a5
+80000f14:	fef42623          	sw	a5,-20(s0)
+80000f18:	fcc42703          	lw	a4,-52(s0)
+80000f1c:	fe842783          	lw	a5,-24(s0)
+80000f20:	02f777b3          	remu	a5,a4,a5
+80000f24:	00078863          	beqz	a5,80000f34 <vx_mat_sub+0xa4>
+80000f28:	fec42783          	lw	a5,-20(s0)
+80000f2c:	00178793          	addi	a5,a5,1
+80000f30:	fef42623          	sw	a5,-20(s0)
+80000f34:	810267b7          	lui	a5,0x81026
+80000f38:	1f078793          	addi	a5,a5,496 # 810261f0 <barrier_bool+0xffffcf08>
+80000f3c:	fec42703          	lw	a4,-20(s0)
+80000f40:	00e7aa23          	sw	a4,20(a5)
+80000f44:	fcc42703          	lw	a4,-52(s0)
+80000f48:	fe842783          	lw	a5,-24(s0)
+80000f4c:	02f76263          	bltu	a4,a5,80000f70 <vx_mat_sub+0xe0>
+80000f50:	810267b7          	lui	a5,0x81026
+80000f54:	1f078693          	addi	a3,a5,496 # 810261f0 <barrier_bool+0xffffcf08>
+80000f58:	800017b7          	lui	a5,0x80001
+80000f5c:	fc878613          	addi	a2,a5,-56 # 80000fc8 <barrier_bool+0xfefd7ce0>
+80000f60:	fe842583          	lw	a1,-24(s0)
+80000f64:	fd042503          	lw	a0,-48(s0)
+80000f68:	d4cff0ef          	jal	ra,800004b4 <vx_spawnWarps>
+80000f6c:	0200006f          	j	80000f8c <vx_mat_sub+0xfc>
+80000f70:	810267b7          	lui	a5,0x81026
+80000f74:	1f078693          	addi	a3,a5,496 # 810261f0 <barrier_bool+0xffffcf08>
+80000f78:	800017b7          	lui	a5,0x80001
+80000f7c:	fc878613          	addi	a2,a5,-56 # 80000fc8 <barrier_bool+0xfefd7ce0>
+80000f80:	fcc42583          	lw	a1,-52(s0)
+80000f84:	fd042503          	lw	a0,-48(s0)
+80000f88:	d2cff0ef          	jal	ra,800004b4 <vx_spawnWarps>
+80000f8c:	a68ff0ef          	jal	ra,800001f4 <vx_available_warps>
+80000f90:	fea42223          	sw	a0,-28(s0)
+80000f94:	fd042703          	lw	a4,-48(s0)
+80000f98:	fe442783          	lw	a5,-28(s0)
+80000f9c:	00e7f863          	bgeu	a5,a4,80000fac <vx_mat_sub+0x11c>
+80000fa0:	fe442503          	lw	a0,-28(s0)
+80000fa4:	e00ff0ef          	jal	ra,800005a4 <vx_wait_for_warps>
+80000fa8:	00c0006f          	j	80000fb4 <vx_mat_sub+0x124>
+80000fac:	fd042503          	lw	a0,-48(s0)
+80000fb0:	df4ff0ef          	jal	ra,800005a4 <vx_wait_for_warps>
+80000fb4:	00000013          	nop
+80000fb8:	03c12083          	lw	ra,60(sp)
+80000fbc:	03812403          	lw	s0,56(sp)
+80000fc0:	04010113          	addi	sp,sp,64
+80000fc4:	00008067          	ret
 
-80001084 <vx_e_mat_add>:
-80001084:	fc010113          	addi	sp,sp,-64
-80001088:	02112e23          	sw	ra,60(sp)
-8000108c:	02812c23          	sw	s0,56(sp)
-80001090:	04010413          	addi	s0,sp,64
-80001094:	fca42e23          	sw	a0,-36(s0)
-80001098:	fcb42c23          	sw	a1,-40(s0)
-8000109c:	fcc42a23          	sw	a2,-44(s0)
-800010a0:	fcd42823          	sw	a3,-48(s0)
-800010a4:	fce42623          	sw	a4,-52(s0)
-800010a8:	810037b7          	lui	a5,0x81003
+80000fc8 <_vx_mat_sub>:
+80000fc8:	fb010113          	addi	sp,sp,-80
+80000fcc:	04112623          	sw	ra,76(sp)
+80000fd0:	04812423          	sw	s0,72(sp)
+80000fd4:	05010413          	addi	s0,sp,80
+80000fd8:	faa42e23          	sw	a0,-68(s0)
+80000fdc:	fab42c23          	sw	a1,-72(s0)
+80000fe0:	e90ff0ef          	jal	ra,80000670 <vx_get_arg_struct>
+80000fe4:	fea42023          	sw	a0,-32(s0)
+80000fe8:	fe042783          	lw	a5,-32(s0)
+80000fec:	0007a783          	lw	a5,0(a5)
+80000ff0:	fcf42e23          	sw	a5,-36(s0)
+80000ff4:	fe042783          	lw	a5,-32(s0)
+80000ff8:	0047a783          	lw	a5,4(a5)
+80000ffc:	fcf42c23          	sw	a5,-40(s0)
+80001000:	fe042783          	lw	a5,-32(s0)
+80001004:	0087a783          	lw	a5,8(a5)
+80001008:	fcf42a23          	sw	a5,-44(s0)
+8000100c:	fe042783          	lw	a5,-32(s0)
+80001010:	0147a783          	lw	a5,20(a5)
+80001014:	fef42623          	sw	a5,-20(s0)
+80001018:	fec42703          	lw	a4,-20(s0)
+8000101c:	fbc42783          	lw	a5,-68(s0)
+80001020:	02f707b3          	mul	a5,a4,a5
+80001024:	fef42423          	sw	a5,-24(s0)
+80001028:	fec42783          	lw	a5,-20(s0)
+8000102c:	00079a63          	bnez	a5,80001040 <_vx_mat_sub+0x78>
+80001030:	00100793          	li	a5,1
+80001034:	fef42623          	sw	a5,-20(s0)
+80001038:	fbc42783          	lw	a5,-68(s0)
+8000103c:	fef42423          	sw	a5,-24(s0)
+80001040:	fe042783          	lw	a5,-32(s0)
+80001044:	00c7a783          	lw	a5,12(a5)
+80001048:	fcf42823          	sw	a5,-48(s0)
+8000104c:	fe042223          	sw	zero,-28(s0)
+80001050:	0c00006f          	j	80001110 <_vx_mat_sub+0x148>
+80001054:	fb842703          	lw	a4,-72(s0)
+80001058:	fd042783          	lw	a5,-48(s0)
+8000105c:	02f70733          	mul	a4,a4,a5
+80001060:	fe842783          	lw	a5,-24(s0)
+80001064:	00f707b3          	add	a5,a4,a5
+80001068:	fcf42623          	sw	a5,-52(s0)
+8000106c:	fe842703          	lw	a4,-24(s0)
+80001070:	fd042783          	lw	a5,-48(s0)
+80001074:	00f737b3          	sltu	a5,a4,a5
+80001078:	0ff7f793          	andi	a5,a5,255
+8000107c:	fcf42423          	sw	a5,-56(s0)
+80001080:	fc842783          	lw	a5,-56(s0)
+80001084:	0017b793          	seqz	a5,a5
+80001088:	fcf403a3          	sb	a5,-57(s0)
+8000108c:	fc744783          	lbu	a5,-57(s0)
+80001090:	00078f13          	mv	t5,a5
+80001094:	800017b7          	lui	a5,0x80001
+80001098:	0fc78f93          	addi	t6,a5,252 # 800010fc <barrier_bool+0xfefd7e14>
+8000109c:	000f206b          	0xf206b
+800010a0:	01ff707b          	0x1ff707b
+800010a4:	fcc42783          	lw	a5,-52(s0)
+800010a8:	00279793          	slli	a5,a5,0x2
 800010ac:	fdc42703          	lw	a4,-36(s0)
-800010b0:	98e7a423          	sw	a4,-1656(a5) # 81002988 <main_sp+0xffffcfcc>
-800010b4:	810037b7          	lui	a5,0x81003
-800010b8:	98878793          	addi	a5,a5,-1656 # 81002988 <main_sp+0xffffcfcc>
-800010bc:	fd842703          	lw	a4,-40(s0)
-800010c0:	00e7a223          	sw	a4,4(a5)
-800010c4:	810037b7          	lui	a5,0x81003
-800010c8:	98878793          	addi	a5,a5,-1656 # 81002988 <main_sp+0xffffcfcc>
-800010cc:	fd442703          	lw	a4,-44(s0)
-800010d0:	00e7a423          	sw	a4,8(a5)
-800010d4:	810037b7          	lui	a5,0x81003
-800010d8:	98878793          	addi	a5,a5,-1656 # 81002988 <main_sp+0xffffcfcc>
-800010dc:	fcc42703          	lw	a4,-52(s0)
-800010e0:	00e7a623          	sw	a4,12(a5)
-800010e4:	810037b7          	lui	a5,0x81003
-800010e8:	98878793          	addi	a5,a5,-1656 # 81002988 <main_sp+0xffffcfcc>
-800010ec:	fd042703          	lw	a4,-48(s0)
-800010f0:	00e7a823          	sw	a4,16(a5)
-800010f4:	8d0ff0ef          	jal	ra,800001c4 <vx_available_threads>
-800010f8:	fea42423          	sw	a0,-24(s0)
-800010fc:	fcc42703          	lw	a4,-52(s0)
-80001100:	fe842783          	lw	a5,-24(s0)
-80001104:	02f757b3          	divu	a5,a4,a5
-80001108:	fef42623          	sw	a5,-20(s0)
-8000110c:	fcc42703          	lw	a4,-52(s0)
-80001110:	fe842783          	lw	a5,-24(s0)
-80001114:	02f777b3          	remu	a5,a4,a5
-80001118:	00078863          	beqz	a5,80001128 <vx_e_mat_add+0xa4>
-8000111c:	fec42783          	lw	a5,-20(s0)
-80001120:	00178793          	addi	a5,a5,1
-80001124:	fef42623          	sw	a5,-20(s0)
-80001128:	810037b7          	lui	a5,0x81003
-8000112c:	98878793          	addi	a5,a5,-1656 # 81002988 <main_sp+0xffffcfcc>
-80001130:	fec42703          	lw	a4,-20(s0)
-80001134:	00e7aa23          	sw	a4,20(a5)
-80001138:	fcc42703          	lw	a4,-52(s0)
-8000113c:	fe842783          	lw	a5,-24(s0)
-80001140:	02f76263          	bltu	a4,a5,80001164 <vx_e_mat_add+0xe0>
-80001144:	810037b7          	lui	a5,0x81003
-80001148:	98878693          	addi	a3,a5,-1656 # 81002988 <main_sp+0xffffcfcc>
-8000114c:	800017b7          	lui	a5,0x80001
-80001150:	1bc78613          	addi	a2,a5,444 # 800011bc <main_sp+0xfeffb800>
-80001154:	fe842583          	lw	a1,-24(s0)
-80001158:	fd042503          	lw	a0,-48(s0)
-8000115c:	ac8ff0ef          	jal	ra,80000424 <vx_spawnWarps>
-80001160:	0200006f          	j	80001180 <vx_e_mat_add+0xfc>
-80001164:	810037b7          	lui	a5,0x81003
-80001168:	98878693          	addi	a3,a5,-1656 # 81002988 <main_sp+0xffffcfcc>
-8000116c:	800017b7          	lui	a5,0x80001
-80001170:	1bc78613          	addi	a2,a5,444 # 800011bc <main_sp+0xfeffb800>
-80001174:	fcc42583          	lw	a1,-52(s0)
-80001178:	fd042503          	lw	a0,-48(s0)
-8000117c:	aa8ff0ef          	jal	ra,80000424 <vx_spawnWarps>
-80001180:	83cff0ef          	jal	ra,800001bc <vx_available_warps>
-80001184:	fea42223          	sw	a0,-28(s0)
-80001188:	fd042703          	lw	a4,-48(s0)
-8000118c:	fe442783          	lw	a5,-28(s0)
-80001190:	00e7f863          	bgeu	a5,a4,800011a0 <vx_e_mat_add+0x11c>
-80001194:	fe442503          	lw	a0,-28(s0)
-80001198:	b78ff0ef          	jal	ra,80000510 <vx_wait_for_warps>
-8000119c:	00c0006f          	j	800011a8 <vx_e_mat_add+0x124>
-800011a0:	fd042503          	lw	a0,-48(s0)
-800011a4:	b6cff0ef          	jal	ra,80000510 <vx_wait_for_warps>
-800011a8:	00000013          	nop
-800011ac:	03c12083          	lw	ra,60(sp)
-800011b0:	03812403          	lw	s0,56(sp)
-800011b4:	04010113          	addi	sp,sp,64
-800011b8:	00008067          	ret
+800010b0:	00f707b3          	add	a5,a4,a5
+800010b4:	0007a683          	lw	a3,0(a5)
+800010b8:	fcc42783          	lw	a5,-52(s0)
+800010bc:	00279793          	slli	a5,a5,0x2
+800010c0:	fd842703          	lw	a4,-40(s0)
+800010c4:	00f707b3          	add	a5,a4,a5
+800010c8:	0007a703          	lw	a4,0(a5)
+800010cc:	fcc42783          	lw	a5,-52(s0)
+800010d0:	00279793          	slli	a5,a5,0x2
+800010d4:	fd442603          	lw	a2,-44(s0)
+800010d8:	00f607b3          	add	a5,a2,a5
+800010dc:	40e68733          	sub	a4,a3,a4
+800010e0:	00e7a023          	sw	a4,0(a5)
+800010e4:	fe842783          	lw	a5,-24(s0)
+800010e8:	00178793          	addi	a5,a5,1
+800010ec:	fef42423          	sw	a5,-24(s0)
+800010f0:	800017b7          	lui	a5,0x80001
+800010f4:	10078e13          	addi	t3,a5,256 # 80001100 <barrier_bool+0xfefd7e18>
+800010f8:	000e0067          	jr	t3
+800010fc:	00000013          	nop
+80001100:	0000306b          	0x306b
+80001104:	fe442783          	lw	a5,-28(s0)
+80001108:	00178793          	addi	a5,a5,1
+8000110c:	fef42223          	sw	a5,-28(s0)
+80001110:	fe442783          	lw	a5,-28(s0)
+80001114:	fec42703          	lw	a4,-20(s0)
+80001118:	f2e7eee3          	bltu	a5,a4,80001054 <_vx_mat_sub+0x8c>
+8000111c:	00000013          	nop
+80001120:	04c12083          	lw	ra,76(sp)
+80001124:	04812403          	lw	s0,72(sp)
+80001128:	05010113          	addi	sp,sp,80
+8000112c:	00008067          	ret
 
-800011bc <_vx_e_mat_add>:
-800011bc:	fb010113          	addi	sp,sp,-80
-800011c0:	04112623          	sw	ra,76(sp)
-800011c4:	04812423          	sw	s0,72(sp)
-800011c8:	05010413          	addi	s0,sp,80
-800011cc:	faa42e23          	sw	a0,-68(s0)
-800011d0:	fab42c23          	sw	a1,-72(s0)
-800011d4:	c08ff0ef          	jal	ra,800005dc <vx_get_arg_struct>
-800011d8:	fea42023          	sw	a0,-32(s0)
-800011dc:	fe042783          	lw	a5,-32(s0)
-800011e0:	0007a783          	lw	a5,0(a5)
-800011e4:	fcf42e23          	sw	a5,-36(s0)
-800011e8:	fe042783          	lw	a5,-32(s0)
-800011ec:	0047a783          	lw	a5,4(a5)
-800011f0:	0007a783          	lw	a5,0(a5)
-800011f4:	fcf42c23          	sw	a5,-40(s0)
-800011f8:	fe042783          	lw	a5,-32(s0)
-800011fc:	0087a783          	lw	a5,8(a5)
-80001200:	fcf42a23          	sw	a5,-44(s0)
-80001204:	fe042783          	lw	a5,-32(s0)
-80001208:	0147a783          	lw	a5,20(a5)
-8000120c:	fef42623          	sw	a5,-20(s0)
-80001210:	fec42703          	lw	a4,-20(s0)
-80001214:	fbc42783          	lw	a5,-68(s0)
-80001218:	02f707b3          	mul	a5,a4,a5
-8000121c:	fef42423          	sw	a5,-24(s0)
-80001220:	fec42783          	lw	a5,-20(s0)
-80001224:	00079a63          	bnez	a5,80001238 <_vx_e_mat_add+0x7c>
-80001228:	00100793          	li	a5,1
-8000122c:	fef42623          	sw	a5,-20(s0)
-80001230:	fbc42783          	lw	a5,-68(s0)
-80001234:	fef42423          	sw	a5,-24(s0)
-80001238:	fe042783          	lw	a5,-32(s0)
-8000123c:	00c7a783          	lw	a5,12(a5)
-80001240:	fcf42823          	sw	a5,-48(s0)
-80001244:	fe042223          	sw	zero,-28(s0)
-80001248:	0b00006f          	j	800012f8 <_vx_e_mat_add+0x13c>
-8000124c:	fb842703          	lw	a4,-72(s0)
-80001250:	fd042783          	lw	a5,-48(s0)
-80001254:	02f70733          	mul	a4,a4,a5
-80001258:	fe842783          	lw	a5,-24(s0)
-8000125c:	00f707b3          	add	a5,a4,a5
-80001260:	fcf42623          	sw	a5,-52(s0)
-80001264:	fe842703          	lw	a4,-24(s0)
-80001268:	fd042783          	lw	a5,-48(s0)
-8000126c:	00f737b3          	sltu	a5,a4,a5
-80001270:	0ff7f793          	andi	a5,a5,255
-80001274:	fcf42423          	sw	a5,-56(s0)
-80001278:	fc842783          	lw	a5,-56(s0)
-8000127c:	0017b793          	seqz	a5,a5
-80001280:	fcf403a3          	sb	a5,-57(s0)
-80001284:	fc744783          	lbu	a5,-57(s0)
-80001288:	00078f13          	mv	t5,a5
-8000128c:	800017b7          	lui	a5,0x80001
-80001290:	2e478f93          	addi	t6,a5,740 # 800012e4 <main_sp+0xfeffb928>
-80001294:	000f206b          	0xf206b
-80001298:	01ff707b          	0x1ff707b
-8000129c:	fcc42783          	lw	a5,-52(s0)
-800012a0:	00279793          	slli	a5,a5,0x2
-800012a4:	fdc42703          	lw	a4,-36(s0)
-800012a8:	00f707b3          	add	a5,a4,a5
-800012ac:	0007a683          	lw	a3,0(a5)
-800012b0:	fcc42783          	lw	a5,-52(s0)
-800012b4:	00279793          	slli	a5,a5,0x2
-800012b8:	fd442703          	lw	a4,-44(s0)
-800012bc:	00f707b3          	add	a5,a4,a5
-800012c0:	fd842703          	lw	a4,-40(s0)
-800012c4:	00e68733          	add	a4,a3,a4
-800012c8:	00e7a023          	sw	a4,0(a5)
-800012cc:	fe842783          	lw	a5,-24(s0)
-800012d0:	00178793          	addi	a5,a5,1
-800012d4:	fef42423          	sw	a5,-24(s0)
-800012d8:	800017b7          	lui	a5,0x80001
-800012dc:	2e878e13          	addi	t3,a5,744 # 800012e8 <main_sp+0xfeffb92c>
-800012e0:	000e0067          	jr	t3
-800012e4:	00000013          	nop
-800012e8:	0000306b          	0x306b
-800012ec:	fe442783          	lw	a5,-28(s0)
-800012f0:	00178793          	addi	a5,a5,1
-800012f4:	fef42223          	sw	a5,-28(s0)
-800012f8:	fe442783          	lw	a5,-28(s0)
-800012fc:	fec42703          	lw	a4,-20(s0)
-80001300:	f4e7e6e3          	bltu	a5,a4,8000124c <_vx_e_mat_add+0x90>
-80001304:	00000013          	nop
-80001308:	04c12083          	lw	ra,76(sp)
-8000130c:	04812403          	lw	s0,72(sp)
-80001310:	05010113          	addi	sp,sp,80
-80001314:	00008067          	ret
+80001130 <vx_e_mat_add>:
+80001130:	fc010113          	addi	sp,sp,-64
+80001134:	02112e23          	sw	ra,60(sp)
+80001138:	02812c23          	sw	s0,56(sp)
+8000113c:	04010413          	addi	s0,sp,64
+80001140:	fca42e23          	sw	a0,-36(s0)
+80001144:	fcb42c23          	sw	a1,-40(s0)
+80001148:	fcc42a23          	sw	a2,-44(s0)
+8000114c:	fcd42823          	sw	a3,-48(s0)
+80001150:	fce42623          	sw	a4,-52(s0)
+80001154:	810267b7          	lui	a5,0x81026
+80001158:	fdc42703          	lw	a4,-36(s0)
+8000115c:	20e7a423          	sw	a4,520(a5) # 81026208 <barrier_bool+0xffffcf20>
+80001160:	810267b7          	lui	a5,0x81026
+80001164:	20878793          	addi	a5,a5,520 # 81026208 <barrier_bool+0xffffcf20>
+80001168:	fd842703          	lw	a4,-40(s0)
+8000116c:	00e7a223          	sw	a4,4(a5)
+80001170:	810267b7          	lui	a5,0x81026
+80001174:	20878793          	addi	a5,a5,520 # 81026208 <barrier_bool+0xffffcf20>
+80001178:	fd442703          	lw	a4,-44(s0)
+8000117c:	00e7a423          	sw	a4,8(a5)
+80001180:	810267b7          	lui	a5,0x81026
+80001184:	20878793          	addi	a5,a5,520 # 81026208 <barrier_bool+0xffffcf20>
+80001188:	fcc42703          	lw	a4,-52(s0)
+8000118c:	00e7a623          	sw	a4,12(a5)
+80001190:	810267b7          	lui	a5,0x81026
+80001194:	20878793          	addi	a5,a5,520 # 81026208 <barrier_bool+0xffffcf20>
+80001198:	fd042703          	lw	a4,-48(s0)
+8000119c:	00e7a823          	sw	a4,16(a5)
+800011a0:	85cff0ef          	jal	ra,800001fc <vx_available_threads>
+800011a4:	fea42423          	sw	a0,-24(s0)
+800011a8:	fcc42703          	lw	a4,-52(s0)
+800011ac:	fe842783          	lw	a5,-24(s0)
+800011b0:	02f757b3          	divu	a5,a4,a5
+800011b4:	fef42623          	sw	a5,-20(s0)
+800011b8:	fcc42703          	lw	a4,-52(s0)
+800011bc:	fe842783          	lw	a5,-24(s0)
+800011c0:	02f777b3          	remu	a5,a4,a5
+800011c4:	00078863          	beqz	a5,800011d4 <vx_e_mat_add+0xa4>
+800011c8:	fec42783          	lw	a5,-20(s0)
+800011cc:	00178793          	addi	a5,a5,1
+800011d0:	fef42623          	sw	a5,-20(s0)
+800011d4:	810267b7          	lui	a5,0x81026
+800011d8:	20878793          	addi	a5,a5,520 # 81026208 <barrier_bool+0xffffcf20>
+800011dc:	fec42703          	lw	a4,-20(s0)
+800011e0:	00e7aa23          	sw	a4,20(a5)
+800011e4:	fcc42703          	lw	a4,-52(s0)
+800011e8:	fe842783          	lw	a5,-24(s0)
+800011ec:	02f76263          	bltu	a4,a5,80001210 <vx_e_mat_add+0xe0>
+800011f0:	810267b7          	lui	a5,0x81026
+800011f4:	20878693          	addi	a3,a5,520 # 81026208 <barrier_bool+0xffffcf20>
+800011f8:	800017b7          	lui	a5,0x80001
+800011fc:	26878613          	addi	a2,a5,616 # 80001268 <barrier_bool+0xfefd7f80>
+80001200:	fe842583          	lw	a1,-24(s0)
+80001204:	fd042503          	lw	a0,-48(s0)
+80001208:	aacff0ef          	jal	ra,800004b4 <vx_spawnWarps>
+8000120c:	0200006f          	j	8000122c <vx_e_mat_add+0xfc>
+80001210:	810267b7          	lui	a5,0x81026
+80001214:	20878693          	addi	a3,a5,520 # 81026208 <barrier_bool+0xffffcf20>
+80001218:	800017b7          	lui	a5,0x80001
+8000121c:	26878613          	addi	a2,a5,616 # 80001268 <barrier_bool+0xfefd7f80>
+80001220:	fcc42583          	lw	a1,-52(s0)
+80001224:	fd042503          	lw	a0,-48(s0)
+80001228:	a8cff0ef          	jal	ra,800004b4 <vx_spawnWarps>
+8000122c:	fc9fe0ef          	jal	ra,800001f4 <vx_available_warps>
+80001230:	fea42223          	sw	a0,-28(s0)
+80001234:	fd042703          	lw	a4,-48(s0)
+80001238:	fe442783          	lw	a5,-28(s0)
+8000123c:	00e7f863          	bgeu	a5,a4,8000124c <vx_e_mat_add+0x11c>
+80001240:	fe442503          	lw	a0,-28(s0)
+80001244:	b60ff0ef          	jal	ra,800005a4 <vx_wait_for_warps>
+80001248:	00c0006f          	j	80001254 <vx_e_mat_add+0x124>
+8000124c:	fd042503          	lw	a0,-48(s0)
+80001250:	b54ff0ef          	jal	ra,800005a4 <vx_wait_for_warps>
+80001254:	00000013          	nop
+80001258:	03c12083          	lw	ra,60(sp)
+8000125c:	03812403          	lw	s0,56(sp)
+80001260:	04010113          	addi	sp,sp,64
+80001264:	00008067          	ret
 
-80001318 <vx_e_mat_mult>:
-80001318:	fc010113          	addi	sp,sp,-64
-8000131c:	02112e23          	sw	ra,60(sp)
-80001320:	02812c23          	sw	s0,56(sp)
-80001324:	04010413          	addi	s0,sp,64
-80001328:	fca42e23          	sw	a0,-36(s0)
-8000132c:	fcb42c23          	sw	a1,-40(s0)
-80001330:	fcc42a23          	sw	a2,-44(s0)
-80001334:	fcd42823          	sw	a3,-48(s0)
-80001338:	fce42623          	sw	a4,-52(s0)
-8000133c:	810037b7          	lui	a5,0x81003
-80001340:	fdc42703          	lw	a4,-36(s0)
-80001344:	98e7a423          	sw	a4,-1656(a5) # 81002988 <main_sp+0xffffcfcc>
-80001348:	810037b7          	lui	a5,0x81003
-8000134c:	98878793          	addi	a5,a5,-1656 # 81002988 <main_sp+0xffffcfcc>
-80001350:	fd842703          	lw	a4,-40(s0)
-80001354:	00e7a223          	sw	a4,4(a5)
-80001358:	810037b7          	lui	a5,0x81003
-8000135c:	98878793          	addi	a5,a5,-1656 # 81002988 <main_sp+0xffffcfcc>
-80001360:	fd442703          	lw	a4,-44(s0)
-80001364:	00e7a423          	sw	a4,8(a5)
-80001368:	810037b7          	lui	a5,0x81003
-8000136c:	98878793          	addi	a5,a5,-1656 # 81002988 <main_sp+0xffffcfcc>
-80001370:	fcc42703          	lw	a4,-52(s0)
-80001374:	00e7a623          	sw	a4,12(a5)
-80001378:	810037b7          	lui	a5,0x81003
-8000137c:	98878793          	addi	a5,a5,-1656 # 81002988 <main_sp+0xffffcfcc>
-80001380:	fd042703          	lw	a4,-48(s0)
-80001384:	00e7a823          	sw	a4,16(a5)
-80001388:	e3dfe0ef          	jal	ra,800001c4 <vx_available_threads>
-8000138c:	fea42423          	sw	a0,-24(s0)
-80001390:	fcc42703          	lw	a4,-52(s0)
-80001394:	fe842783          	lw	a5,-24(s0)
-80001398:	02f757b3          	divu	a5,a4,a5
-8000139c:	fef42623          	sw	a5,-20(s0)
-800013a0:	fcc42703          	lw	a4,-52(s0)
-800013a4:	fe842783          	lw	a5,-24(s0)
-800013a8:	02f777b3          	remu	a5,a4,a5
-800013ac:	00078863          	beqz	a5,800013bc <vx_e_mat_mult+0xa4>
-800013b0:	fec42783          	lw	a5,-20(s0)
-800013b4:	00178793          	addi	a5,a5,1
-800013b8:	fef42623          	sw	a5,-20(s0)
-800013bc:	810037b7          	lui	a5,0x81003
-800013c0:	98878793          	addi	a5,a5,-1656 # 81002988 <main_sp+0xffffcfcc>
-800013c4:	fec42703          	lw	a4,-20(s0)
-800013c8:	00e7aa23          	sw	a4,20(a5)
-800013cc:	fcc42703          	lw	a4,-52(s0)
-800013d0:	fe842783          	lw	a5,-24(s0)
-800013d4:	02f76263          	bltu	a4,a5,800013f8 <vx_e_mat_mult+0xe0>
-800013d8:	810037b7          	lui	a5,0x81003
-800013dc:	98878693          	addi	a3,a5,-1656 # 81002988 <main_sp+0xffffcfcc>
-800013e0:	800017b7          	lui	a5,0x80001
-800013e4:	45078613          	addi	a2,a5,1104 # 80001450 <main_sp+0xfeffba94>
-800013e8:	fe842583          	lw	a1,-24(s0)
-800013ec:	fd042503          	lw	a0,-48(s0)
-800013f0:	834ff0ef          	jal	ra,80000424 <vx_spawnWarps>
-800013f4:	0200006f          	j	80001414 <vx_e_mat_mult+0xfc>
-800013f8:	810037b7          	lui	a5,0x81003
-800013fc:	98878693          	addi	a3,a5,-1656 # 81002988 <main_sp+0xffffcfcc>
-80001400:	800017b7          	lui	a5,0x80001
-80001404:	45078613          	addi	a2,a5,1104 # 80001450 <main_sp+0xfeffba94>
-80001408:	fcc42583          	lw	a1,-52(s0)
-8000140c:	fd042503          	lw	a0,-48(s0)
-80001410:	814ff0ef          	jal	ra,80000424 <vx_spawnWarps>
-80001414:	da9fe0ef          	jal	ra,800001bc <vx_available_warps>
-80001418:	fea42223          	sw	a0,-28(s0)
-8000141c:	fd042703          	lw	a4,-48(s0)
-80001420:	fe442783          	lw	a5,-28(s0)
-80001424:	00e7f863          	bgeu	a5,a4,80001434 <vx_e_mat_mult+0x11c>
-80001428:	fe442503          	lw	a0,-28(s0)
-8000142c:	8e4ff0ef          	jal	ra,80000510 <vx_wait_for_warps>
-80001430:	00c0006f          	j	8000143c <vx_e_mat_mult+0x124>
-80001434:	fd042503          	lw	a0,-48(s0)
-80001438:	8d8ff0ef          	jal	ra,80000510 <vx_wait_for_warps>
-8000143c:	00000013          	nop
-80001440:	03c12083          	lw	ra,60(sp)
-80001444:	03812403          	lw	s0,56(sp)
-80001448:	04010113          	addi	sp,sp,64
-8000144c:	00008067          	ret
+80001268 <_vx_e_mat_add>:
+80001268:	fb010113          	addi	sp,sp,-80
+8000126c:	04112623          	sw	ra,76(sp)
+80001270:	04812423          	sw	s0,72(sp)
+80001274:	05010413          	addi	s0,sp,80
+80001278:	faa42e23          	sw	a0,-68(s0)
+8000127c:	fab42c23          	sw	a1,-72(s0)
+80001280:	bf0ff0ef          	jal	ra,80000670 <vx_get_arg_struct>
+80001284:	fea42023          	sw	a0,-32(s0)
+80001288:	fe042783          	lw	a5,-32(s0)
+8000128c:	0007a783          	lw	a5,0(a5)
+80001290:	fcf42e23          	sw	a5,-36(s0)
+80001294:	fe042783          	lw	a5,-32(s0)
+80001298:	0047a783          	lw	a5,4(a5)
+8000129c:	0007a783          	lw	a5,0(a5)
+800012a0:	fcf42c23          	sw	a5,-40(s0)
+800012a4:	fe042783          	lw	a5,-32(s0)
+800012a8:	0087a783          	lw	a5,8(a5)
+800012ac:	fcf42a23          	sw	a5,-44(s0)
+800012b0:	fe042783          	lw	a5,-32(s0)
+800012b4:	0147a783          	lw	a5,20(a5)
+800012b8:	fef42623          	sw	a5,-20(s0)
+800012bc:	fec42703          	lw	a4,-20(s0)
+800012c0:	fbc42783          	lw	a5,-68(s0)
+800012c4:	02f707b3          	mul	a5,a4,a5
+800012c8:	fef42423          	sw	a5,-24(s0)
+800012cc:	fec42783          	lw	a5,-20(s0)
+800012d0:	00079a63          	bnez	a5,800012e4 <_vx_e_mat_add+0x7c>
+800012d4:	00100793          	li	a5,1
+800012d8:	fef42623          	sw	a5,-20(s0)
+800012dc:	fbc42783          	lw	a5,-68(s0)
+800012e0:	fef42423          	sw	a5,-24(s0)
+800012e4:	fe042783          	lw	a5,-32(s0)
+800012e8:	00c7a783          	lw	a5,12(a5)
+800012ec:	fcf42823          	sw	a5,-48(s0)
+800012f0:	fe042223          	sw	zero,-28(s0)
+800012f4:	0b00006f          	j	800013a4 <_vx_e_mat_add+0x13c>
+800012f8:	fb842703          	lw	a4,-72(s0)
+800012fc:	fd042783          	lw	a5,-48(s0)
+80001300:	02f70733          	mul	a4,a4,a5
+80001304:	fe842783          	lw	a5,-24(s0)
+80001308:	00f707b3          	add	a5,a4,a5
+8000130c:	fcf42623          	sw	a5,-52(s0)
+80001310:	fe842703          	lw	a4,-24(s0)
+80001314:	fd042783          	lw	a5,-48(s0)
+80001318:	00f737b3          	sltu	a5,a4,a5
+8000131c:	0ff7f793          	andi	a5,a5,255
+80001320:	fcf42423          	sw	a5,-56(s0)
+80001324:	fc842783          	lw	a5,-56(s0)
+80001328:	0017b793          	seqz	a5,a5
+8000132c:	fcf403a3          	sb	a5,-57(s0)
+80001330:	fc744783          	lbu	a5,-57(s0)
+80001334:	00078f13          	mv	t5,a5
+80001338:	800017b7          	lui	a5,0x80001
+8000133c:	39078f93          	addi	t6,a5,912 # 80001390 <barrier_bool+0xfefd80a8>
+80001340:	000f206b          	0xf206b
+80001344:	01ff707b          	0x1ff707b
+80001348:	fcc42783          	lw	a5,-52(s0)
+8000134c:	00279793          	slli	a5,a5,0x2
+80001350:	fdc42703          	lw	a4,-36(s0)
+80001354:	00f707b3          	add	a5,a4,a5
+80001358:	0007a683          	lw	a3,0(a5)
+8000135c:	fcc42783          	lw	a5,-52(s0)
+80001360:	00279793          	slli	a5,a5,0x2
+80001364:	fd442703          	lw	a4,-44(s0)
+80001368:	00f707b3          	add	a5,a4,a5
+8000136c:	fd842703          	lw	a4,-40(s0)
+80001370:	00e68733          	add	a4,a3,a4
+80001374:	00e7a023          	sw	a4,0(a5)
+80001378:	fe842783          	lw	a5,-24(s0)
+8000137c:	00178793          	addi	a5,a5,1
+80001380:	fef42423          	sw	a5,-24(s0)
+80001384:	800017b7          	lui	a5,0x80001
+80001388:	39478e13          	addi	t3,a5,916 # 80001394 <barrier_bool+0xfefd80ac>
+8000138c:	000e0067          	jr	t3
+80001390:	00000013          	nop
+80001394:	0000306b          	0x306b
+80001398:	fe442783          	lw	a5,-28(s0)
+8000139c:	00178793          	addi	a5,a5,1
+800013a0:	fef42223          	sw	a5,-28(s0)
+800013a4:	fe442783          	lw	a5,-28(s0)
+800013a8:	fec42703          	lw	a4,-20(s0)
+800013ac:	f4e7e6e3          	bltu	a5,a4,800012f8 <_vx_e_mat_add+0x90>
+800013b0:	00000013          	nop
+800013b4:	04c12083          	lw	ra,76(sp)
+800013b8:	04812403          	lw	s0,72(sp)
+800013bc:	05010113          	addi	sp,sp,80
+800013c0:	00008067          	ret
 
-80001450 <_vx_e_mat_mult>:
-80001450:	fb010113          	addi	sp,sp,-80
-80001454:	04112623          	sw	ra,76(sp)
-80001458:	04812423          	sw	s0,72(sp)
-8000145c:	05010413          	addi	s0,sp,80
-80001460:	faa42e23          	sw	a0,-68(s0)
-80001464:	fab42c23          	sw	a1,-72(s0)
-80001468:	974ff0ef          	jal	ra,800005dc <vx_get_arg_struct>
-8000146c:	fea42023          	sw	a0,-32(s0)
-80001470:	fe042783          	lw	a5,-32(s0)
-80001474:	0007a783          	lw	a5,0(a5)
-80001478:	fcf42e23          	sw	a5,-36(s0)
-8000147c:	fe042783          	lw	a5,-32(s0)
-80001480:	0047a783          	lw	a5,4(a5)
-80001484:	0007a783          	lw	a5,0(a5)
-80001488:	fcf42c23          	sw	a5,-40(s0)
-8000148c:	fe042783          	lw	a5,-32(s0)
-80001490:	0087a783          	lw	a5,8(a5)
-80001494:	fcf42a23          	sw	a5,-44(s0)
-80001498:	fe042783          	lw	a5,-32(s0)
-8000149c:	0147a783          	lw	a5,20(a5)
-800014a0:	fef42623          	sw	a5,-20(s0)
-800014a4:	fec42703          	lw	a4,-20(s0)
-800014a8:	fbc42783          	lw	a5,-68(s0)
-800014ac:	02f707b3          	mul	a5,a4,a5
-800014b0:	fef42423          	sw	a5,-24(s0)
-800014b4:	fec42783          	lw	a5,-20(s0)
-800014b8:	00079a63          	bnez	a5,800014cc <_vx_e_mat_mult+0x7c>
-800014bc:	00100793          	li	a5,1
-800014c0:	fef42623          	sw	a5,-20(s0)
-800014c4:	fbc42783          	lw	a5,-68(s0)
-800014c8:	fef42423          	sw	a5,-24(s0)
-800014cc:	fe042783          	lw	a5,-32(s0)
-800014d0:	00c7a783          	lw	a5,12(a5)
-800014d4:	fcf42823          	sw	a5,-48(s0)
-800014d8:	fe042223          	sw	zero,-28(s0)
-800014dc:	0b00006f          	j	8000158c <_vx_e_mat_mult+0x13c>
-800014e0:	fb842703          	lw	a4,-72(s0)
-800014e4:	fd042783          	lw	a5,-48(s0)
-800014e8:	02f70733          	mul	a4,a4,a5
-800014ec:	fe842783          	lw	a5,-24(s0)
-800014f0:	00f707b3          	add	a5,a4,a5
-800014f4:	fcf42623          	sw	a5,-52(s0)
-800014f8:	fe842703          	lw	a4,-24(s0)
-800014fc:	fd042783          	lw	a5,-48(s0)
-80001500:	00f737b3          	sltu	a5,a4,a5
-80001504:	0ff7f793          	andi	a5,a5,255
-80001508:	fcf42423          	sw	a5,-56(s0)
-8000150c:	fc842783          	lw	a5,-56(s0)
-80001510:	0017b793          	seqz	a5,a5
-80001514:	fcf403a3          	sb	a5,-57(s0)
-80001518:	fc744783          	lbu	a5,-57(s0)
-8000151c:	00078f13          	mv	t5,a5
-80001520:	800017b7          	lui	a5,0x80001
-80001524:	57878f93          	addi	t6,a5,1400 # 80001578 <main_sp+0xfeffbbbc>
-80001528:	000f206b          	0xf206b
-8000152c:	01ff707b          	0x1ff707b
-80001530:	fcc42783          	lw	a5,-52(s0)
-80001534:	00279793          	slli	a5,a5,0x2
-80001538:	fdc42703          	lw	a4,-36(s0)
-8000153c:	00f707b3          	add	a5,a4,a5
-80001540:	0007a683          	lw	a3,0(a5)
-80001544:	fcc42783          	lw	a5,-52(s0)
-80001548:	00279793          	slli	a5,a5,0x2
-8000154c:	fd442703          	lw	a4,-44(s0)
-80001550:	00f707b3          	add	a5,a4,a5
-80001554:	fd842703          	lw	a4,-40(s0)
-80001558:	02e68733          	mul	a4,a3,a4
-8000155c:	00e7a023          	sw	a4,0(a5)
-80001560:	fe842783          	lw	a5,-24(s0)
-80001564:	00178793          	addi	a5,a5,1
-80001568:	fef42423          	sw	a5,-24(s0)
-8000156c:	800017b7          	lui	a5,0x80001
-80001570:	57c78e13          	addi	t3,a5,1404 # 8000157c <main_sp+0xfeffbbc0>
-80001574:	000e0067          	jr	t3
-80001578:	00000013          	nop
-8000157c:	0000306b          	0x306b
-80001580:	fe442783          	lw	a5,-28(s0)
-80001584:	00178793          	addi	a5,a5,1
-80001588:	fef42223          	sw	a5,-28(s0)
-8000158c:	fe442783          	lw	a5,-28(s0)
-80001590:	fec42703          	lw	a4,-20(s0)
-80001594:	f4e7e6e3          	bltu	a5,a4,800014e0 <_vx_e_mat_mult+0x90>
-80001598:	00000013          	nop
-8000159c:	04c12083          	lw	ra,76(sp)
-800015a0:	04812403          	lw	s0,72(sp)
-800015a4:	05010113          	addi	sp,sp,80
-800015a8:	00008067          	ret
+800013c4 <vx_e_mat_mult>:
+800013c4:	fc010113          	addi	sp,sp,-64
+800013c8:	02112e23          	sw	ra,60(sp)
+800013cc:	02812c23          	sw	s0,56(sp)
+800013d0:	04010413          	addi	s0,sp,64
+800013d4:	fca42e23          	sw	a0,-36(s0)
+800013d8:	fcb42c23          	sw	a1,-40(s0)
+800013dc:	fcc42a23          	sw	a2,-44(s0)
+800013e0:	fcd42823          	sw	a3,-48(s0)
+800013e4:	fce42623          	sw	a4,-52(s0)
+800013e8:	810267b7          	lui	a5,0x81026
+800013ec:	fdc42703          	lw	a4,-36(s0)
+800013f0:	20e7a423          	sw	a4,520(a5) # 81026208 <barrier_bool+0xffffcf20>
+800013f4:	810267b7          	lui	a5,0x81026
+800013f8:	20878793          	addi	a5,a5,520 # 81026208 <barrier_bool+0xffffcf20>
+800013fc:	fd842703          	lw	a4,-40(s0)
+80001400:	00e7a223          	sw	a4,4(a5)
+80001404:	810267b7          	lui	a5,0x81026
+80001408:	20878793          	addi	a5,a5,520 # 81026208 <barrier_bool+0xffffcf20>
+8000140c:	fd442703          	lw	a4,-44(s0)
+80001410:	00e7a423          	sw	a4,8(a5)
+80001414:	810267b7          	lui	a5,0x81026
+80001418:	20878793          	addi	a5,a5,520 # 81026208 <barrier_bool+0xffffcf20>
+8000141c:	fcc42703          	lw	a4,-52(s0)
+80001420:	00e7a623          	sw	a4,12(a5)
+80001424:	810267b7          	lui	a5,0x81026
+80001428:	20878793          	addi	a5,a5,520 # 81026208 <barrier_bool+0xffffcf20>
+8000142c:	fd042703          	lw	a4,-48(s0)
+80001430:	00e7a823          	sw	a4,16(a5)
+80001434:	dc9fe0ef          	jal	ra,800001fc <vx_available_threads>
+80001438:	fea42423          	sw	a0,-24(s0)
+8000143c:	fcc42703          	lw	a4,-52(s0)
+80001440:	fe842783          	lw	a5,-24(s0)
+80001444:	02f757b3          	divu	a5,a4,a5
+80001448:	fef42623          	sw	a5,-20(s0)
+8000144c:	fcc42703          	lw	a4,-52(s0)
+80001450:	fe842783          	lw	a5,-24(s0)
+80001454:	02f777b3          	remu	a5,a4,a5
+80001458:	00078863          	beqz	a5,80001468 <vx_e_mat_mult+0xa4>
+8000145c:	fec42783          	lw	a5,-20(s0)
+80001460:	00178793          	addi	a5,a5,1
+80001464:	fef42623          	sw	a5,-20(s0)
+80001468:	810267b7          	lui	a5,0x81026
+8000146c:	20878793          	addi	a5,a5,520 # 81026208 <barrier_bool+0xffffcf20>
+80001470:	fec42703          	lw	a4,-20(s0)
+80001474:	00e7aa23          	sw	a4,20(a5)
+80001478:	fcc42703          	lw	a4,-52(s0)
+8000147c:	fe842783          	lw	a5,-24(s0)
+80001480:	02f76263          	bltu	a4,a5,800014a4 <vx_e_mat_mult+0xe0>
+80001484:	810267b7          	lui	a5,0x81026
+80001488:	20878693          	addi	a3,a5,520 # 81026208 <barrier_bool+0xffffcf20>
+8000148c:	800017b7          	lui	a5,0x80001
+80001490:	4fc78613          	addi	a2,a5,1276 # 800014fc <barrier_bool+0xfefd8214>
+80001494:	fe842583          	lw	a1,-24(s0)
+80001498:	fd042503          	lw	a0,-48(s0)
+8000149c:	818ff0ef          	jal	ra,800004b4 <vx_spawnWarps>
+800014a0:	0200006f          	j	800014c0 <vx_e_mat_mult+0xfc>
+800014a4:	810267b7          	lui	a5,0x81026
+800014a8:	20878693          	addi	a3,a5,520 # 81026208 <barrier_bool+0xffffcf20>
+800014ac:	800017b7          	lui	a5,0x80001
+800014b0:	4fc78613          	addi	a2,a5,1276 # 800014fc <barrier_bool+0xfefd8214>
+800014b4:	fcc42583          	lw	a1,-52(s0)
+800014b8:	fd042503          	lw	a0,-48(s0)
+800014bc:	ff9fe0ef          	jal	ra,800004b4 <vx_spawnWarps>
+800014c0:	d35fe0ef          	jal	ra,800001f4 <vx_available_warps>
+800014c4:	fea42223          	sw	a0,-28(s0)
+800014c8:	fd042703          	lw	a4,-48(s0)
+800014cc:	fe442783          	lw	a5,-28(s0)
+800014d0:	00e7f863          	bgeu	a5,a4,800014e0 <vx_e_mat_mult+0x11c>
+800014d4:	fe442503          	lw	a0,-28(s0)
+800014d8:	8ccff0ef          	jal	ra,800005a4 <vx_wait_for_warps>
+800014dc:	00c0006f          	j	800014e8 <vx_e_mat_mult+0x124>
+800014e0:	fd042503          	lw	a0,-48(s0)
+800014e4:	8c0ff0ef          	jal	ra,800005a4 <vx_wait_for_warps>
+800014e8:	00000013          	nop
+800014ec:	03c12083          	lw	ra,60(sp)
+800014f0:	03812403          	lw	s0,56(sp)
+800014f4:	04010113          	addi	sp,sp,64
+800014f8:	00008067          	ret
 
-800015ac <initialize_mats>:
-800015ac:	fe010113          	addi	sp,sp,-32
-800015b0:	00812e23          	sw	s0,28(sp)
-800015b4:	02010413          	addi	s0,sp,32
-800015b8:	fe042623          	sw	zero,-20(s0)
-800015bc:	0480006f          	j	80001604 <initialize_mats+0x58>
-800015c0:	810037b7          	lui	a5,0x81003
-800015c4:	fec42703          	lw	a4,-20(s0)
-800015c8:	00271713          	slli	a4,a4,0x2
-800015cc:	9a078793          	addi	a5,a5,-1632 # 810029a0 <main_sp+0xffffcfe4>
-800015d0:	00f707b3          	add	a5,a4,a5
-800015d4:	00300713          	li	a4,3
-800015d8:	00e7a023          	sw	a4,0(a5)
-800015dc:	810047b7          	lui	a5,0x81004
-800015e0:	fec42703          	lw	a4,-20(s0)
-800015e4:	00271713          	slli	a4,a4,0x2
-800015e8:	9a078793          	addi	a5,a5,-1632 # 810039a0 <main_sp+0xffffdfe4>
-800015ec:	00f707b3          	add	a5,a4,a5
-800015f0:	00200713          	li	a4,2
-800015f4:	00e7a023          	sw	a4,0(a5)
-800015f8:	fec42783          	lw	a5,-20(s0)
-800015fc:	00178793          	addi	a5,a5,1
-80001600:	fef42623          	sw	a5,-20(s0)
-80001604:	fec42703          	lw	a4,-20(s0)
-80001608:	0ff00793          	li	a5,255
-8000160c:	fae7dae3          	bge	a5,a4,800015c0 <initialize_mats+0x14>
-80001610:	00000013          	nop
-80001614:	01c12403          	lw	s0,28(sp)
-80001618:	02010113          	addi	sp,sp,32
-8000161c:	00008067          	ret
+800014fc <_vx_e_mat_mult>:
+800014fc:	fb010113          	addi	sp,sp,-80
+80001500:	04112623          	sw	ra,76(sp)
+80001504:	04812423          	sw	s0,72(sp)
+80001508:	05010413          	addi	s0,sp,80
+8000150c:	faa42e23          	sw	a0,-68(s0)
+80001510:	fab42c23          	sw	a1,-72(s0)
+80001514:	95cff0ef          	jal	ra,80000670 <vx_get_arg_struct>
+80001518:	fea42023          	sw	a0,-32(s0)
+8000151c:	fe042783          	lw	a5,-32(s0)
+80001520:	0007a783          	lw	a5,0(a5)
+80001524:	fcf42e23          	sw	a5,-36(s0)
+80001528:	fe042783          	lw	a5,-32(s0)
+8000152c:	0047a783          	lw	a5,4(a5)
+80001530:	0007a783          	lw	a5,0(a5)
+80001534:	fcf42c23          	sw	a5,-40(s0)
+80001538:	fe042783          	lw	a5,-32(s0)
+8000153c:	0087a783          	lw	a5,8(a5)
+80001540:	fcf42a23          	sw	a5,-44(s0)
+80001544:	fe042783          	lw	a5,-32(s0)
+80001548:	0147a783          	lw	a5,20(a5)
+8000154c:	fef42623          	sw	a5,-20(s0)
+80001550:	fec42703          	lw	a4,-20(s0)
+80001554:	fbc42783          	lw	a5,-68(s0)
+80001558:	02f707b3          	mul	a5,a4,a5
+8000155c:	fef42423          	sw	a5,-24(s0)
+80001560:	fec42783          	lw	a5,-20(s0)
+80001564:	00079a63          	bnez	a5,80001578 <_vx_e_mat_mult+0x7c>
+80001568:	00100793          	li	a5,1
+8000156c:	fef42623          	sw	a5,-20(s0)
+80001570:	fbc42783          	lw	a5,-68(s0)
+80001574:	fef42423          	sw	a5,-24(s0)
+80001578:	fe042783          	lw	a5,-32(s0)
+8000157c:	00c7a783          	lw	a5,12(a5)
+80001580:	fcf42823          	sw	a5,-48(s0)
+80001584:	fe042223          	sw	zero,-28(s0)
+80001588:	0b00006f          	j	80001638 <_vx_e_mat_mult+0x13c>
+8000158c:	fb842703          	lw	a4,-72(s0)
+80001590:	fd042783          	lw	a5,-48(s0)
+80001594:	02f70733          	mul	a4,a4,a5
+80001598:	fe842783          	lw	a5,-24(s0)
+8000159c:	00f707b3          	add	a5,a4,a5
+800015a0:	fcf42623          	sw	a5,-52(s0)
+800015a4:	fe842703          	lw	a4,-24(s0)
+800015a8:	fd042783          	lw	a5,-48(s0)
+800015ac:	00f737b3          	sltu	a5,a4,a5
+800015b0:	0ff7f793          	andi	a5,a5,255
+800015b4:	fcf42423          	sw	a5,-56(s0)
+800015b8:	fc842783          	lw	a5,-56(s0)
+800015bc:	0017b793          	seqz	a5,a5
+800015c0:	fcf403a3          	sb	a5,-57(s0)
+800015c4:	fc744783          	lbu	a5,-57(s0)
+800015c8:	00078f13          	mv	t5,a5
+800015cc:	800017b7          	lui	a5,0x80001
+800015d0:	62478f93          	addi	t6,a5,1572 # 80001624 <barrier_bool+0xfefd833c>
+800015d4:	000f206b          	0xf206b
+800015d8:	01ff707b          	0x1ff707b
+800015dc:	fcc42783          	lw	a5,-52(s0)
+800015e0:	00279793          	slli	a5,a5,0x2
+800015e4:	fdc42703          	lw	a4,-36(s0)
+800015e8:	00f707b3          	add	a5,a4,a5
+800015ec:	0007a683          	lw	a3,0(a5)
+800015f0:	fcc42783          	lw	a5,-52(s0)
+800015f4:	00279793          	slli	a5,a5,0x2
+800015f8:	fd442703          	lw	a4,-44(s0)
+800015fc:	00f707b3          	add	a5,a4,a5
+80001600:	fd842703          	lw	a4,-40(s0)
+80001604:	02e68733          	mul	a4,a3,a4
+80001608:	00e7a023          	sw	a4,0(a5)
+8000160c:	fe842783          	lw	a5,-24(s0)
+80001610:	00178793          	addi	a5,a5,1
+80001614:	fef42423          	sw	a5,-24(s0)
+80001618:	800017b7          	lui	a5,0x80001
+8000161c:	62878e13          	addi	t3,a5,1576 # 80001628 <barrier_bool+0xfefd8340>
+80001620:	000e0067          	jr	t3
+80001624:	00000013          	nop
+80001628:	0000306b          	0x306b
+8000162c:	fe442783          	lw	a5,-28(s0)
+80001630:	00178793          	addi	a5,a5,1
+80001634:	fef42223          	sw	a5,-28(s0)
+80001638:	fe442783          	lw	a5,-28(s0)
+8000163c:	fec42703          	lw	a4,-20(s0)
+80001640:	f4e7e6e3          	bltu	a5,a4,8000158c <_vx_e_mat_mult+0x90>
+80001644:	00000013          	nop
+80001648:	04c12083          	lw	ra,76(sp)
+8000164c:	04812403          	lw	s0,72(sp)
+80001650:	05010113          	addi	sp,sp,80
+80001654:	00008067          	ret
 
-80001620 <print_matrix>:
-80001620:	fd010113          	addi	sp,sp,-48
-80001624:	02112623          	sw	ra,44(sp)
-80001628:	02812423          	sw	s0,40(sp)
-8000162c:	03010413          	addi	s0,sp,48
-80001630:	fca42e23          	sw	a0,-36(s0)
-80001634:	810007b7          	lui	a5,0x81000
-80001638:	11078513          	addi	a0,a5,272 # 81000110 <main_sp+0xffffa754>
-8000163c:	90cff0ef          	jal	ra,80000748 <vx_print_str>
-80001640:	fe042623          	sw	zero,-20(s0)
-80001644:	0580006f          	j	8000169c <print_matrix+0x7c>
-80001648:	fec42783          	lw	a5,-20(s0)
-8000164c:	00078e63          	beqz	a5,80001668 <print_matrix+0x48>
-80001650:	fec42783          	lw	a5,-20(s0)
-80001654:	00f7f793          	andi	a5,a5,15
-80001658:	00079863          	bnez	a5,80001668 <print_matrix+0x48>
-8000165c:	810007b7          	lui	a5,0x81000
-80001660:	13478513          	addi	a0,a5,308 # 81000134 <main_sp+0xffffa778>
-80001664:	8e4ff0ef          	jal	ra,80000748 <vx_print_str>
-80001668:	fec42783          	lw	a5,-20(s0)
-8000166c:	00279793          	slli	a5,a5,0x2
-80001670:	fdc42703          	lw	a4,-36(s0)
-80001674:	00f707b3          	add	a5,a4,a5
-80001678:	0007a783          	lw	a5,0(a5)
-8000167c:	00078513          	mv	a0,a5
-80001680:	904ff0ef          	jal	ra,80000784 <vx_print_hex>
-80001684:	810007b7          	lui	a5,0x81000
-80001688:	13878513          	addi	a0,a5,312 # 81000138 <main_sp+0xffffa77c>
-8000168c:	8bcff0ef          	jal	ra,80000748 <vx_print_str>
-80001690:	fec42783          	lw	a5,-20(s0)
-80001694:	00178793          	addi	a5,a5,1
-80001698:	fef42623          	sw	a5,-20(s0)
-8000169c:	fec42703          	lw	a4,-20(s0)
-800016a0:	0ff00793          	li	a5,255
-800016a4:	fae7d2e3          	bge	a5,a4,80001648 <print_matrix+0x28>
-800016a8:	810007b7          	lui	a5,0x81000
-800016ac:	13c78513          	addi	a0,a5,316 # 8100013c <main_sp+0xffffa780>
-800016b0:	898ff0ef          	jal	ra,80000748 <vx_print_str>
-800016b4:	00000013          	nop
-800016b8:	02c12083          	lw	ra,44(sp)
-800016bc:	02812403          	lw	s0,40(sp)
-800016c0:	03010113          	addi	sp,sp,48
-800016c4:	00008067          	ret
+80001658 <sleep>:
+80001658:	fd010113          	addi	sp,sp,-48
+8000165c:	02812623          	sw	s0,44(sp)
+80001660:	03010413          	addi	s0,sp,48
+80001664:	fca42e23          	sw	a0,-36(s0)
+80001668:	fe042623          	sw	zero,-20(s0)
+8000166c:	0100006f          	j	8000167c <sleep+0x24>
+80001670:	fec42783          	lw	a5,-20(s0)
+80001674:	00178793          	addi	a5,a5,1
+80001678:	fef42623          	sw	a5,-20(s0)
+8000167c:	fec42703          	lw	a4,-20(s0)
+80001680:	fdc42783          	lw	a5,-36(s0)
+80001684:	fef746e3          	blt	a4,a5,80001670 <sleep+0x18>
+80001688:	00000013          	nop
+8000168c:	02c12403          	lw	s0,44(sp)
+80001690:	03010113          	addi	sp,sp,48
+80001694:	00008067          	ret
 
-800016c8 <main>:
-800016c8:	ff010113          	addi	sp,sp,-16
-800016cc:	00112623          	sw	ra,12(sp)
-800016d0:	00812423          	sw	s0,8(sp)
-800016d4:	01010413          	addi	s0,sp,16
-800016d8:	ed5ff0ef          	jal	ra,800015ac <initialize_mats>
-800016dc:	01000693          	li	a3,16
-800016e0:	810057b7          	lui	a5,0x81005
-800016e4:	9a078613          	addi	a2,a5,-1632 # 810049a0 <main_sp+0xffffefe4>
-800016e8:	810047b7          	lui	a5,0x81004
-800016ec:	9a078593          	addi	a1,a5,-1632 # 810039a0 <main_sp+0xffffdfe4>
-800016f0:	810037b7          	lui	a5,0x81003
-800016f4:	9a078513          	addi	a0,a5,-1632 # 810029a0 <main_sp+0xffffcfe4>
-800016f8:	998ff0ef          	jal	ra,80000890 <vx_sq_mat_mult>
-800016fc:	810007b7          	lui	a5,0x81000
-80001700:	16078513          	addi	a0,a5,352 # 81000160 <main_sp+0xffffa7a4>
-80001704:	844ff0ef          	jal	ra,80000748 <vx_print_str>
-80001708:	810057b7          	lui	a5,0x81005
-8000170c:	9a078513          	addi	a0,a5,-1632 # 810049a0 <main_sp+0xffffefe4>
-80001710:	f11ff0ef          	jal	ra,80001620 <print_matrix>
-80001714:	00000793          	li	a5,0
-80001718:	00078513          	mv	a0,a5
-8000171c:	00c12083          	lw	ra,12(sp)
-80001720:	00812403          	lw	s0,8(sp)
-80001724:	01010113          	addi	sp,sp,16
-80001728:	00008067          	ret
+80001698 <barrier>:
+80001698:	fd010113          	addi	sp,sp,-48
+8000169c:	02112623          	sw	ra,44(sp)
+800016a0:	02812423          	sw	s0,40(sp)
+800016a4:	03010413          	addi	s0,sp,48
+800016a8:	fca42e23          	sw	a0,-36(s0)
+800016ac:	fcb42c23          	sw	a1,-40(s0)
+800016b0:	810267b7          	lui	a5,0x81026
+800016b4:	22078713          	addi	a4,a5,544 # 81026220 <barrier_bool+0xffffcf38>
+800016b8:	fdc42783          	lw	a5,-36(s0)
+800016bc:	00f707b3          	add	a5,a4,a5
+800016c0:	00100713          	li	a4,1
+800016c4:	00e78023          	sb	a4,0(a5)
+800016c8:	fdc42783          	lw	a5,-36(s0)
+800016cc:	0c079063          	bnez	a5,8000178c <barrier+0xf4>
+800016d0:	fe0401a3          	sb	zero,-29(s0)
+800016d4:	fe042623          	sw	zero,-20(s0)
+800016d8:	0a80006f          	j	80001780 <barrier+0xe8>
+800016dc:	fe042623          	sw	zero,-20(s0)
+800016e0:	fe042423          	sw	zero,-24(s0)
+800016e4:	0340006f          	j	80001718 <barrier+0x80>
+800016e8:	810267b7          	lui	a5,0x81026
+800016ec:	22078713          	addi	a4,a5,544 # 81026220 <barrier_bool+0xffffcf38>
+800016f0:	fe842783          	lw	a5,-24(s0)
+800016f4:	00f707b3          	add	a5,a4,a5
+800016f8:	0007c783          	lbu	a5,0(a5)
+800016fc:	00078863          	beqz	a5,8000170c <barrier+0x74>
+80001700:	fec42783          	lw	a5,-20(s0)
+80001704:	00178793          	addi	a5,a5,1
+80001708:	fef42623          	sw	a5,-20(s0)
+8000170c:	fe842783          	lw	a5,-24(s0)
+80001710:	00178793          	addi	a5,a5,1
+80001714:	fef42423          	sw	a5,-24(s0)
+80001718:	fe842703          	lw	a4,-24(s0)
+8000171c:	fd842783          	lw	a5,-40(s0)
+80001720:	fcf744e3          	blt	a4,a5,800016e8 <barrier+0x50>
+80001724:	fec42703          	lw	a4,-20(s0)
+80001728:	fd842783          	lw	a5,-40(s0)
+8000172c:	04f71a63          	bne	a4,a5,80001780 <barrier+0xe8>
+80001730:	fe042223          	sw	zero,-28(s0)
+80001734:	0400006f          	j	80001774 <barrier+0xdc>
+80001738:	810267b7          	lui	a5,0x81026
+8000173c:	22078713          	addi	a4,a5,544 # 81026220 <barrier_bool+0xffffcf38>
+80001740:	fe442783          	lw	a5,-28(s0)
+80001744:	00f707b3          	add	a5,a4,a5
+80001748:	00078023          	sb	zero,0(a5)
+8000174c:	810297b7          	lui	a5,0x81029
+80001750:	00100713          	li	a4,1
+80001754:	2ee78423          	sb	a4,744(a5) # 810292e8 <barrier_bool+0x0>
+80001758:	04600513          	li	a0,70
+8000175c:	efdff0ef          	jal	ra,80001658 <sleep>
+80001760:	810297b7          	lui	a5,0x81029
+80001764:	2e078423          	sb	zero,744(a5) # 810292e8 <barrier_bool+0x0>
+80001768:	fe442783          	lw	a5,-28(s0)
+8000176c:	00178793          	addi	a5,a5,1
+80001770:	fef42223          	sw	a5,-28(s0)
+80001774:	fe442703          	lw	a4,-28(s0)
+80001778:	fd842783          	lw	a5,-40(s0)
+8000177c:	faf74ee3          	blt	a4,a5,80001738 <barrier+0xa0>
+80001780:	fe344783          	lbu	a5,-29(s0)
+80001784:	f4079ce3          	bnez	a5,800016dc <barrier+0x44>
+80001788:	0240006f          	j	800017ac <barrier+0x114>
+8000178c:	00000013          	nop
+80001790:	810297b7          	lui	a5,0x81029
+80001794:	2e87c783          	lbu	a5,744(a5) # 810292e8 <barrier_bool+0x0>
+80001798:	0017c793          	xori	a5,a5,1
+8000179c:	0ff7f793          	andi	a5,a5,255
+800017a0:	fe0798e3          	bnez	a5,80001790 <barrier+0xf8>
+800017a4:	06400513          	li	a0,100
+800017a8:	eb1ff0ef          	jal	ra,80001658 <sleep>
+800017ac:	00000013          	nop
+800017b0:	02c12083          	lw	ra,44(sp)
+800017b4:	02812403          	lw	s0,40(sp)
+800017b8:	03010113          	addi	sp,sp,48
+800017bc:	00008067          	ret
+
+800017c0 <initialize_mats>:
+800017c0:	fe010113          	addi	sp,sp,-32
+800017c4:	00812e23          	sw	s0,28(sp)
+800017c8:	02010413          	addi	s0,sp,32
+800017cc:	fe042623          	sw	zero,-20(s0)
+800017d0:	0480006f          	j	80001818 <initialize_mats+0x58>
+800017d4:	810267b7          	lui	a5,0x81026
+800017d8:	fec42703          	lw	a4,-20(s0)
+800017dc:	00271713          	slli	a4,a4,0x2
+800017e0:	24078793          	addi	a5,a5,576 # 81026240 <barrier_bool+0xffffcf58>
+800017e4:	00f707b3          	add	a5,a4,a5
+800017e8:	00300713          	li	a4,3
+800017ec:	00e7a023          	sw	a4,0(a5)
+800017f0:	810277b7          	lui	a5,0x81027
+800017f4:	fec42703          	lw	a4,-20(s0)
+800017f8:	00271713          	slli	a4,a4,0x2
+800017fc:	24078793          	addi	a5,a5,576 # 81027240 <barrier_bool+0xffffdf58>
+80001800:	00f707b3          	add	a5,a4,a5
+80001804:	00200713          	li	a4,2
+80001808:	00e7a023          	sw	a4,0(a5)
+8000180c:	fec42783          	lw	a5,-20(s0)
+80001810:	00178793          	addi	a5,a5,1
+80001814:	fef42623          	sw	a5,-20(s0)
+80001818:	fec42703          	lw	a4,-20(s0)
+8000181c:	0ff00793          	li	a5,255
+80001820:	fae7dae3          	bge	a5,a4,800017d4 <initialize_mats+0x14>
+80001824:	00000013          	nop
+80001828:	01c12403          	lw	s0,28(sp)
+8000182c:	02010113          	addi	sp,sp,32
+80001830:	00008067          	ret
+
+80001834 <print_matrix>:
+80001834:	fd010113          	addi	sp,sp,-48
+80001838:	02112623          	sw	ra,44(sp)
+8000183c:	02812423          	sw	s0,40(sp)
+80001840:	03010413          	addi	s0,sp,48
+80001844:	fca42e23          	sw	a0,-36(s0)
+80001848:	810007b7          	lui	a5,0x81000
+8000184c:	12078513          	addi	a0,a5,288 # 81000120 <barrier_bool+0xfffd6e38>
+80001850:	fa5fe0ef          	jal	ra,800007f4 <vx_print_str>
+80001854:	fe042623          	sw	zero,-20(s0)
+80001858:	0580006f          	j	800018b0 <print_matrix+0x7c>
+8000185c:	fec42783          	lw	a5,-20(s0)
+80001860:	00078e63          	beqz	a5,8000187c <print_matrix+0x48>
+80001864:	fec42783          	lw	a5,-20(s0)
+80001868:	00f7f793          	andi	a5,a5,15
+8000186c:	00079863          	bnez	a5,8000187c <print_matrix+0x48>
+80001870:	810007b7          	lui	a5,0x81000
+80001874:	14478513          	addi	a0,a5,324 # 81000144 <barrier_bool+0xfffd6e5c>
+80001878:	f7dfe0ef          	jal	ra,800007f4 <vx_print_str>
+8000187c:	fec42783          	lw	a5,-20(s0)
+80001880:	00279793          	slli	a5,a5,0x2
+80001884:	fdc42703          	lw	a4,-36(s0)
+80001888:	00f707b3          	add	a5,a4,a5
+8000188c:	0007a783          	lw	a5,0(a5)
+80001890:	00078513          	mv	a0,a5
+80001894:	f9dfe0ef          	jal	ra,80000830 <vx_print_hex>
+80001898:	810007b7          	lui	a5,0x81000
+8000189c:	14878513          	addi	a0,a5,328 # 81000148 <barrier_bool+0xfffd6e60>
+800018a0:	f55fe0ef          	jal	ra,800007f4 <vx_print_str>
+800018a4:	fec42783          	lw	a5,-20(s0)
+800018a8:	00178793          	addi	a5,a5,1
+800018ac:	fef42623          	sw	a5,-20(s0)
+800018b0:	fec42703          	lw	a4,-20(s0)
+800018b4:	0ff00793          	li	a5,255
+800018b8:	fae7d2e3          	bge	a5,a4,8000185c <print_matrix+0x28>
+800018bc:	810007b7          	lui	a5,0x81000
+800018c0:	14c78513          	addi	a0,a5,332 # 8100014c <barrier_bool+0xfffd6e64>
+800018c4:	f31fe0ef          	jal	ra,800007f4 <vx_print_str>
+800018c8:	00000013          	nop
+800018cc:	02c12083          	lw	ra,44(sp)
+800018d0:	02812403          	lw	s0,40(sp)
+800018d4:	03010113          	addi	sp,sp,48
+800018d8:	00008067          	ret
+
+800018dc <main>:
+800018dc:	ff010113          	addi	sp,sp,-16
+800018e0:	00112623          	sw	ra,12(sp)
+800018e4:	00812423          	sw	s0,8(sp)
+800018e8:	01010413          	addi	s0,sp,16
+800018ec:	ed5ff0ef          	jal	ra,800017c0 <initialize_mats>
+800018f0:	01000693          	li	a3,16
+800018f4:	810287b7          	lui	a5,0x81028
+800018f8:	24078613          	addi	a2,a5,576 # 81028240 <barrier_bool+0xffffef58>
+800018fc:	810277b7          	lui	a5,0x81027
+80001900:	24078593          	addi	a1,a5,576 # 81027240 <barrier_bool+0xffffdf58>
+80001904:	810267b7          	lui	a5,0x81026
+80001908:	24078513          	addi	a0,a5,576 # 81026240 <barrier_bool+0xffffcf58>
+8000190c:	830ff0ef          	jal	ra,8000093c <vx_sq_mat_mult>
+80001910:	810007b7          	lui	a5,0x81000
+80001914:	17078513          	addi	a0,a5,368 # 81000170 <barrier_bool+0xfffd6e88>
+80001918:	eddfe0ef          	jal	ra,800007f4 <vx_print_str>
+8000191c:	810287b7          	lui	a5,0x81028
+80001920:	24078513          	addi	a0,a5,576 # 81028240 <barrier_bool+0xffffef58>
+80001924:	f11ff0ef          	jal	ra,80001834 <print_matrix>
+80001928:	00000793          	li	a5,0
+8000192c:	00078513          	mv	a0,a5
+80001930:	00c12083          	lw	ra,12(sp)
+80001934:	00812403          	lw	s0,8(sp)
+80001938:	01010113          	addi	sp,sp,16
+8000193c:	00008067          	ret
 
 Disassembly of section .rodata:
 
@@ -1606,206 +1743,205 @@ Disassembly of section .rodata:
 8100002a:	0000                	unimp
 8100002c:	0062                	c.slli	zero,0x18
 8100002e:	0000                	unimp
-81000030:	00000063          	beqz	zero,81000030 <main+0xffe968>
+81000030:	00000063          	beqz	zero,81000030 <main+0xffe754>
 81000034:	0064                	addi	s1,sp,12
 81000036:	0000                	unimp
 81000038:	0065                	c.nop	25
 8100003a:	0000                	unimp
 8100003c:	0066                	c.slli	zero,0x19
 8100003e:	0000                	unimp
-81000040:	0030                	addi	a2,sp,8
-81000042:	0000                	unimp
-81000044:	0031                	c.nop	12
-81000046:	0000                	unimp
-81000048:	0032                	c.slli	zero,0xc
-8100004a:	0000                	unimp
-8100004c:	00000033          	add	zero,zero,zero
-81000050:	0034                	addi	a3,sp,8
+81000040:	6552                	flw	fa0,20(sp)
+81000042:	65686373          	csrrsi	t1,0x656,16
+81000046:	7564                	flw	fs1,108(a0)
+81000048:	656c                	flw	fa1,76(a0)
+8100004a:	203a                	fld	ft0,392(sp)
+8100004c:	0000                	unimp
+8100004e:	0000                	unimp
+81000050:	0030                	addi	a2,sp,8
 81000052:	0000                	unimp
-81000054:	0035                	c.nop	13
+81000054:	0031                	c.nop	12
 81000056:	0000                	unimp
-81000058:	0036                	c.slli	zero,0xd
+81000058:	0032                	c.slli	zero,0xc
 8100005a:	0000                	unimp
-8100005c:	00000037          	lui	zero,0x0
-81000060:	0038                	addi	a4,sp,8
+8100005c:	00000033          	add	zero,zero,zero
+81000060:	0034                	addi	a3,sp,8
 81000062:	0000                	unimp
-81000064:	0039                	c.nop	14
+81000064:	0035                	c.nop	13
 81000066:	0000                	unimp
-81000068:	0061                	c.nop	24
+81000068:	0036                	c.slli	zero,0xd
 8100006a:	0000                	unimp
-8100006c:	0062                	c.slli	zero,0x18
-8100006e:	0000                	unimp
-81000070:	00000063          	beqz	zero,81000070 <main+0xffe9a8>
-81000074:	0064                	addi	s1,sp,12
+8100006c:	00000037          	lui	zero,0x0
+81000070:	0038                	addi	a4,sp,8
+81000072:	0000                	unimp
+81000074:	0039                	c.nop	14
 81000076:	0000                	unimp
-81000078:	0065                	c.nop	25
+81000078:	0061                	c.nop	24
 8100007a:	0000                	unimp
-8100007c:	0066                	c.slli	zero,0x19
+8100007c:	0062                	c.slli	zero,0x18
 8100007e:	0000                	unimp
-81000080:	000a                	c.slli	zero,0x2
-81000082:	0000                	unimp
-81000084:	0030                	addi	a2,sp,8
+81000080:	00000063          	beqz	zero,81000080 <main+0xffe7a4>
+81000084:	0064                	addi	s1,sp,12
 81000086:	0000                	unimp
-81000088:	0031                	c.nop	12
+81000088:	0065                	c.nop	25
 8100008a:	0000                	unimp
-8100008c:	0032                	c.slli	zero,0xc
+8100008c:	0066                	c.slli	zero,0x19
 8100008e:	0000                	unimp
-81000090:	00000033          	add	zero,zero,zero
-81000094:	0034                	addi	a3,sp,8
+81000090:	000a                	c.slli	zero,0x2
+81000092:	0000                	unimp
+81000094:	0030                	addi	a2,sp,8
 81000096:	0000                	unimp
-81000098:	0035                	c.nop	13
+81000098:	0031                	c.nop	12
 8100009a:	0000                	unimp
-8100009c:	0036                	c.slli	zero,0xd
+8100009c:	0032                	c.slli	zero,0xc
 8100009e:	0000                	unimp
-810000a0:	00000037          	lui	zero,0x0
-810000a4:	0038                	addi	a4,sp,8
+810000a0:	00000033          	add	zero,zero,zero
+810000a4:	0034                	addi	a3,sp,8
 810000a6:	0000                	unimp
-810000a8:	0039                	c.nop	14
+810000a8:	0035                	c.nop	13
 810000aa:	0000                	unimp
-810000ac:	0061                	c.nop	24
+810000ac:	0036                	c.slli	zero,0xd
 810000ae:	0000                	unimp
-810000b0:	0062                	c.slli	zero,0x18
-810000b2:	0000                	unimp
-810000b4:	00000063          	beqz	zero,810000b4 <main+0xffe9ec>
-810000b8:	0064                	addi	s1,sp,12
+810000b0:	00000037          	lui	zero,0x0
+810000b4:	0038                	addi	a4,sp,8
+810000b6:	0000                	unimp
+810000b8:	0039                	c.nop	14
 810000ba:	0000                	unimp
-810000bc:	0065                	c.nop	25
+810000bc:	0061                	c.nop	24
 810000be:	0000                	unimp
-810000c0:	0066                	c.slli	zero,0x19
+810000c0:	0062                	c.slli	zero,0x18
 810000c2:	0000                	unimp
-810000c4:	7366664f          	fnmadd.d	fa2,fa2,fs6,fa4,unknown
-810000c8:	7465                	lui	s0,0xffff9
-810000ca:	203a                	fld	ft0,392(sp)
-810000cc:	0000                	unimp
+810000c4:	00000063          	beqz	zero,810000c4 <main+0xffe7e8>
+810000c8:	0064                	addi	s1,sp,12
+810000ca:	0000                	unimp
+810000cc:	0065                	c.nop	25
 810000ce:	0000                	unimp
-810000d0:	0030                	addi	a2,sp,8
+810000d0:	0066                	c.slli	zero,0x19
 810000d2:	0000                	unimp
-810000d4:	0031                	c.nop	12
-810000d6:	0000                	unimp
-810000d8:	0032                	c.slli	zero,0xc
-810000da:	0000                	unimp
-810000dc:	00000033          	add	zero,zero,zero
-810000e0:	0034                	addi	a3,sp,8
+810000d4:	7366664f          	fnmadd.d	fa2,fa2,fs6,fa4,unknown
+810000d8:	7465                	lui	s0,0xffff9
+810000da:	203a                	fld	ft0,392(sp)
+810000dc:	0000                	unimp
+810000de:	0000                	unimp
+810000e0:	0030                	addi	a2,sp,8
 810000e2:	0000                	unimp
-810000e4:	0035                	c.nop	13
+810000e4:	0031                	c.nop	12
 810000e6:	0000                	unimp
-810000e8:	0036                	c.slli	zero,0xd
+810000e8:	0032                	c.slli	zero,0xc
 810000ea:	0000                	unimp
-810000ec:	00000037          	lui	zero,0x0
-810000f0:	0038                	addi	a4,sp,8
+810000ec:	00000033          	add	zero,zero,zero
+810000f0:	0034                	addi	a3,sp,8
 810000f2:	0000                	unimp
-810000f4:	0039                	c.nop	14
+810000f4:	0035                	c.nop	13
 810000f6:	0000                	unimp
-810000f8:	0061                	c.nop	24
+810000f8:	0036                	c.slli	zero,0xd
 810000fa:	0000                	unimp
-810000fc:	0062                	c.slli	zero,0x18
-810000fe:	0000                	unimp
-81000100:	00000063          	beqz	zero,81000100 <main+0xffea38>
-81000104:	0064                	addi	s1,sp,12
+810000fc:	00000037          	lui	zero,0x0
+81000100:	0038                	addi	a4,sp,8
+81000102:	0000                	unimp
+81000104:	0039                	c.nop	14
 81000106:	0000                	unimp
-81000108:	0065                	c.nop	25
+81000108:	0061                	c.nop	24
 8100010a:	0000                	unimp
-8100010c:	0066                	c.slli	zero,0x19
+8100010c:	0062                	c.slli	zero,0x18
 8100010e:	0000                	unimp
-81000110:	2d2d                	jal	8100074a <q+0x42e>
-81000112:	2d2d                	jal	8100074c <q+0x430>
-81000114:	2d2d                	jal	8100074e <q+0x432>
-81000116:	2d2d                	jal	81000750 <q+0x434>
-81000118:	2d2d                	jal	81000752 <q+0x436>
-8100011a:	2d2d                	jal	81000754 <q+0x438>
-8100011c:	2d2d                	jal	81000756 <q+0x43a>
-8100011e:	2d2d                	jal	81000758 <q+0x43c>
-81000120:	2d2d                	jal	8100075a <q+0x43e>
-81000122:	2d2d                	jal	8100075c <q+0x440>
-81000124:	2d2d                	jal	8100075e <q+0x442>
-81000126:	2d2d                	jal	81000760 <q+0x444>
-81000128:	2d2d                	jal	81000762 <q+0x446>
-8100012a:	2d2d                	jal	81000764 <q+0x448>
-8100012c:	2d2d                	jal	81000766 <q+0x44a>
-8100012e:	0a2d                	addi	s4,s4,11
-81000130:	0000                	unimp
-81000132:	0000                	unimp
-81000134:	000a                	c.slli	zero,0x2
-81000136:	0000                	unimp
-81000138:	0020                	addi	s0,sp,8
-8100013a:	0000                	unimp
-8100013c:	2d0a                	fld	fs10,128(sp)
-8100013e:	2d2d                	jal	81000778 <q+0x45c>
-81000140:	2d2d                	jal	8100077a <q+0x45e>
-81000142:	2d2d                	jal	8100077c <q+0x460>
-81000144:	2d2d                	jal	8100077e <q+0x462>
-81000146:	2d2d                	jal	81000780 <q+0x464>
-81000148:	2d2d                	jal	81000782 <q+0x466>
-8100014a:	2d2d                	jal	81000784 <q+0x468>
-8100014c:	2d2d                	jal	81000786 <q+0x46a>
-8100014e:	2d2d                	jal	81000788 <q+0x46c>
-81000150:	2d2d                	jal	8100078a <q+0x46e>
-81000152:	2d2d                	jal	8100078c <q+0x470>
-81000154:	2d2d                	jal	8100078e <q+0x472>
-81000156:	2d2d                	jal	81000790 <q+0x474>
-81000158:	2d2d                	jal	81000792 <q+0x476>
-8100015a:	2d2d                	jal	81000794 <q+0x478>
-8100015c:	000a                	c.slli	zero,0x2
-8100015e:	0000                	unimp
-81000160:	0a0a                	slli	s4,s4,0x2
-81000162:	614d                	addi	sp,sp,176
-81000164:	7274                	flw	fa3,100(a2)
-81000166:	7869                	lui	a6,0xffffa
-81000168:	6d20                	flw	fs0,88(a0)
-8100016a:	6c75                	lui	s8,0x1d
-8100016c:	6974                	flw	fa3,84(a0)
-8100016e:	6c70                	flw	fa2,92(s0)
-81000170:	6369                	lui	t1,0x1a
-81000172:	7461                	lui	s0,0xffff8
-81000174:	6f69                	lui	t5,0x1a
-81000176:	0a6e                	slli	s4,s4,0x1b
+81000110:	00000063          	beqz	zero,81000110 <main+0xffe834>
+81000114:	0064                	addi	s1,sp,12
+81000116:	0000                	unimp
+81000118:	0065                	c.nop	25
+8100011a:	0000                	unimp
+8100011c:	0066                	c.slli	zero,0x19
+8100011e:	0000                	unimp
+81000120:	2d2d                	jal	8100075a <q+0x326>
+81000122:	2d2d                	jal	8100075c <q+0x328>
+81000124:	2d2d                	jal	8100075e <q+0x32a>
+81000126:	2d2d                	jal	81000760 <q+0x32c>
+81000128:	2d2d                	jal	81000762 <q+0x32e>
+8100012a:	2d2d                	jal	81000764 <q+0x330>
+8100012c:	2d2d                	jal	81000766 <q+0x332>
+8100012e:	2d2d                	jal	81000768 <q+0x334>
+81000130:	2d2d                	jal	8100076a <q+0x336>
+81000132:	2d2d                	jal	8100076c <q+0x338>
+81000134:	2d2d                	jal	8100076e <q+0x33a>
+81000136:	2d2d                	jal	81000770 <q+0x33c>
+81000138:	2d2d                	jal	81000772 <q+0x33e>
+8100013a:	2d2d                	jal	81000774 <q+0x340>
+8100013c:	2d2d                	jal	81000776 <q+0x342>
+8100013e:	0a2d                	addi	s4,s4,11
+81000140:	0000                	unimp
+81000142:	0000                	unimp
+81000144:	000a                	c.slli	zero,0x2
+81000146:	0000                	unimp
+81000148:	0020                	addi	s0,sp,8
+8100014a:	0000                	unimp
+8100014c:	2d0a                	fld	fs10,128(sp)
+8100014e:	2d2d                	jal	81000788 <q+0x354>
+81000150:	2d2d                	jal	8100078a <q+0x356>
+81000152:	2d2d                	jal	8100078c <q+0x358>
+81000154:	2d2d                	jal	8100078e <q+0x35a>
+81000156:	2d2d                	jal	81000790 <q+0x35c>
+81000158:	2d2d                	jal	81000792 <q+0x35e>
+8100015a:	2d2d                	jal	81000794 <q+0x360>
+8100015c:	2d2d                	jal	81000796 <q+0x362>
+8100015e:	2d2d                	jal	81000798 <q+0x364>
+81000160:	2d2d                	jal	8100079a <q+0x366>
+81000162:	2d2d                	jal	8100079c <q+0x368>
+81000164:	2d2d                	jal	8100079e <q+0x36a>
+81000166:	2d2d                	jal	810007a0 <q+0x36c>
+81000168:	2d2d                	jal	810007a2 <q+0x36e>
+8100016a:	2d2d                	jal	810007a4 <q+0x370>
+8100016c:	000a                	c.slli	zero,0x2
+8100016e:	0000                	unimp
+81000170:	0a0a                	slli	s4,s4,0x2
+81000172:	614d                	addi	sp,sp,176
+81000174:	7274                	flw	fa3,100(a2)
+81000176:	7869                	lui	a6,0xffffa
+81000178:	6d20                	flw	fs0,88(a0)
+8100017a:	6c75                	lui	s8,0x1d
+8100017c:	6974                	flw	fa3,84(a0)
+8100017e:	6c70                	flw	fa2,92(s0)
+81000180:	6369                	lui	t1,0x1a
+81000182:	7461                	lui	s0,0xffff8
+81000184:	6f69                	lui	t5,0x1a
+81000186:	0a6e                	slli	s4,s4,0x1b
 	...
 
 Disassembly of section .data:
 
-8100017c <hextoa>:
-8100017c:	0000                	unimp
-8100017e:	8100                	0x8100
-81000180:	0004                	0x4
-81000182:	8100                	0x8100
-81000184:	0008                	0x8
-81000186:	8100                	0x8100
-81000188:	000c                	0xc
-8100018a:	8100                	0x8100
-8100018c:	0010                	0x10
+8100018c <hextoa>:
+8100018c:	0000                	unimp
 8100018e:	8100                	0x8100
-81000190:	0014                	0x14
+81000190:	0004                	0x4
 81000192:	8100                	0x8100
-81000194:	0018                	0x18
+81000194:	0008                	0x8
 81000196:	8100                	0x8100
-81000198:	001c                	0x1c
+81000198:	000c                	0xc
 8100019a:	8100                	0x8100
-8100019c:	0020                	addi	s0,sp,8
+8100019c:	0010                	0x10
 8100019e:	8100                	0x8100
-810001a0:	0024                	addi	s1,sp,8
+810001a0:	0014                	0x14
 810001a2:	8100                	0x8100
-810001a4:	0028                	addi	a0,sp,8
+810001a4:	0018                	0x18
 810001a6:	8100                	0x8100
-810001a8:	002c                	addi	a1,sp,8
+810001a8:	001c                	0x1c
 810001aa:	8100                	0x8100
-810001ac:	0030                	addi	a2,sp,8
+810001ac:	0020                	addi	s0,sp,8
 810001ae:	8100                	0x8100
-810001b0:	0034                	addi	a3,sp,8
+810001b0:	0024                	addi	s1,sp,8
 810001b2:	8100                	0x8100
-810001b4:	0038                	addi	a4,sp,8
+810001b4:	0028                	addi	a0,sp,8
 810001b6:	8100                	0x8100
-810001b8:	003c                	addi	a5,sp,8
+810001b8:	002c                	addi	a1,sp,8
 810001ba:	8100                	0x8100
-
-810001bc <hextoa>:
-810001bc:	0040                	addi	s0,sp,4
+810001bc:	0030                	addi	a2,sp,8
 810001be:	8100                	0x8100
-810001c0:	0044                	addi	s1,sp,4
+810001c0:	0034                	addi	a3,sp,8
 810001c2:	8100                	0x8100
-810001c4:	0048                	addi	a0,sp,4
+810001c4:	0038                	addi	a4,sp,8
 810001c6:	8100                	0x8100
-810001c8:	004c                	addi	a1,sp,4
+810001c8:	003c                	addi	a5,sp,8
 810001ca:	8100                	0x8100
+
+810001cc <hextoa>:
 810001cc:	0050                	addi	a2,sp,4
 810001ce:	8100                	0x8100
 810001d0:	0054                	addi	a3,sp,4
@@ -1830,16 +1966,16 @@ Disassembly of section .data:
 810001f6:	8100                	0x8100
 810001f8:	007c                	addi	a5,sp,12
 810001fa:	8100                	0x8100
-
-810001fc <hextoa>:
-810001fc:	0084                	addi	s1,sp,64
+810001fc:	0080                	addi	s0,sp,64
 810001fe:	8100                	0x8100
-81000200:	0088                	addi	a0,sp,64
+81000200:	0084                	addi	s1,sp,64
 81000202:	8100                	0x8100
-81000204:	008c                	addi	a1,sp,64
+81000204:	0088                	addi	a0,sp,64
 81000206:	8100                	0x8100
-81000208:	0090                	addi	a2,sp,64
+81000208:	008c                	addi	a1,sp,64
 8100020a:	8100                	0x8100
+
+8100020c <hextoa>:
 8100020c:	0094                	addi	a3,sp,64
 8100020e:	8100                	0x8100
 81000210:	0098                	addi	a4,sp,64
@@ -1864,16 +2000,16 @@ Disassembly of section .data:
 81000236:	8100                	0x8100
 81000238:	00c0                	addi	s0,sp,68
 8100023a:	8100                	0x8100
-
-8100023c <hextoa>:
-8100023c:	00d0                	addi	a2,sp,68
+8100023c:	00c4                	addi	s1,sp,68
 8100023e:	8100                	0x8100
-81000240:	00d4                	addi	a3,sp,68
+81000240:	00c8                	addi	a0,sp,68
 81000242:	8100                	0x8100
-81000244:	00d8                	addi	a4,sp,68
+81000244:	00cc                	addi	a1,sp,68
 81000246:	8100                	0x8100
-81000248:	00dc                	addi	a5,sp,68
+81000248:	00d0                	addi	a2,sp,68
 8100024a:	8100                	0x8100
+
+8100024c <hextoa>:
 8100024c:	00e0                	addi	s0,sp,76
 8100024e:	8100                	0x8100
 81000250:	00e4                	addi	s1,sp,76
@@ -1898,52 +2034,68 @@ Disassembly of section .data:
 81000276:	8100                	0x8100
 81000278:	010c                	addi	a1,sp,128
 8100027a:	8100                	0x8100
+8100027c:	0110                	addi	a2,sp,128
+8100027e:	8100                	0x8100
+81000280:	0114                	addi	a3,sp,128
+81000282:	8100                	0x8100
+81000284:	0118                	addi	a4,sp,128
+81000286:	8100                	0x8100
+81000288:	011c                	addi	a5,sp,128
+8100028a:	8100                	0x8100
 
 Disassembly of section .bss:
 
-8100027c <done>:
+8100028c <done>:
 	...
 
-81000298 <main_sp>:
-81000298:	0000                	unimp
+81000330 <main_sp>:
+81000330:	0000                	unimp
 	...
 
-8100029c <context>:
+81000334 <context>:
 	...
 
-8100031c <q>:
+81000434 <q>:
 	...
 
-8100293c <done>:
+81026134 <done>:
 	...
 
-81002958 <main_sp>:
-81002958:	0000                	unimp
+810261d8 <main_sp>:
+810261d8:	0000                	unimp
 	...
 
-8100295c <mat_mult_args>:
+810261dc <mat_mult_args>:
 	...
 
-81002970 <mat_r_args>:
+810261f0 <mat_r_args>:
 	...
 
-81002988 <mat_e_args>:
+81026208 <mat_e_args>:
 	...
 
-810029a0 <x>:
+81026220 <barriers>:
 	...
 
-810039a0 <y>:
+81026240 <x>:
 	...
 
-810049a0 <z>:
+81027240 <y>:
 	...
 
-810059a0 <done>:
+81028240 <z>:
 	...
 
-810059bc <main_sp>:
-810059bc:	0000                	unimp
+81029240 <done>:
+	...
+
+810292e4 <main_sp>:
+810292e4:	0000                	unimp
+	...
+
+Disassembly of section .sbss:
+
+810292e8 <barrier_bool>:
 	...
 
 Disassembly of section .comment:
diff --git a/kernel/vortex_test.elf b/kernel/vortex_test.elf
index 68431a84..38dd847f 100755
Binary files a/kernel/vortex_test.elf and b/kernel/vortex_test.elf differ
diff --git a/kernel/vortex_test.hex b/kernel/vortex_test.hex
index e3063c3e..26fccb24 100644
--- a/kernel/vortex_test.hex
+++ b/kernel/vortex_test.hex
@@ -1,415 +1,449 @@
 :0200000480007A
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 :10003000130F01009303050013051000635C7500A6
 :1000400013010180130305006B5003001305150015
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diff --git a/kernel/vx_os/vx_back/vx_back.c b/kernel/vx_os/vx_back/vx_back.c
index 9f3d7cee..2217d26b 100644
--- a/kernel/vx_os/vx_back/vx_back.c
+++ b/kernel/vx_os/vx_back/vx_back.c
@@ -6,7 +6,7 @@
 void vx_before_main()
 {
 	// unsigned num_available_warps = vx_available_warps();
-	for (int i = 0; i < 8; i++)
+	for (int i = 0; i < 32; i++)
 	{
 		queue_initialize(q + i);
 	}
@@ -15,9 +15,20 @@ void vx_before_main()
 void vx_reschedule_warps()
 {
 
-
 	register unsigned curr_warp asm("s10");
-	// vx_printf("Reschedule: ", curr_warp);
+	vx_printf("Reschedule: ", curr_warp);
+	asm __volatile__("nop");
+	asm __volatile__("nop");
+	asm __volatile__("nop");
+	asm __volatile__("nop");
+	asm __volatile__("nop");
+	asm __volatile__("nop");
+	asm __volatile__("nop");
+	asm __volatile__("nop");
+	asm __volatile__("nop");
+	asm __volatile__("nop");
+	asm __volatile__("nop");
+	asm __volatile__("nop");
 
 	if (queue_isEmpty(q+curr_warp))
 	{
@@ -38,7 +49,7 @@ void vx_reschedule_warps()
 	asm __volatile__("mv sp,%0"::"r" (j.base_sp):);
 	vx_createThreads(j.n_threads, j.wid, j.func_ptr, j.args, j.assigned_warp);
 
-	ECALL;
+	ECALL; // should never reach this
 
 }
 
@@ -133,6 +144,7 @@ void vx_wait_for_warps(unsigned num_wait)
 				num += 1;
 			}
 		}
+		// vx_printf("Found: ", num);
 	}
 
 	// vx_printf("num found: ", num);
diff --git a/kernel/vx_os/vx_back/vx_back.h b/kernel/vx_os/vx_back/vx_back.h
index c31b1dea..342bbf38 100644
--- a/kernel/vx_os/vx_back/vx_back.h
+++ b/kernel/vx_os/vx_back/vx_back.h
@@ -29,11 +29,11 @@
 #define __end_if AFTER:\
 			   JOIN;
 
-static int done[] = {0, 0, 0, 0, 0, 0, 0};
+static int done[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
 
 static int main_sp[1];
 
-unsigned context[32];
+unsigned context[64];
 void  vx_save_context(void);
 void  vx_load_context(void);
 
diff --git a/kernel/vx_os/vx_back/vx_back.s b/kernel/vx_os/vx_back/vx_back.s
index c913d2d8..ca10756d 100644
--- a/kernel/vx_os/vx_back/vx_back.s
+++ b/kernel/vx_os/vx_back/vx_back.s
@@ -6,9 +6,9 @@
 .type _start, @function
 .global _start
 _start:
-    li a0, 2          # Num Warps
+    li a0, 8          # Num Warps
     csrw 0x20, a0     # Setting the number of available warps 
-    li a0, 2          # Num Threads
+    li a0, 4          # Num Threads
     csrw 0x21, a0     # Setting the number of available threads
     csrw mhartid,zero
     csrw misa,zero
@@ -46,7 +46,21 @@ loop_done:
     li    a0,0   # setting tid = 0 for main thread
     mv    t6,a2  # setting func_addr 
     mv    s11,t2 # setting num_threads to spawn
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
     .word 0x1bfe0eb
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
     la     a0, vx_reschedule_warps
     .word 0x5406b
 
diff --git a/kernel/vx_os/vx_util/queue.h b/kernel/vx_os/vx_util/queue.h
index 6793d467..48262897 100644
--- a/kernel/vx_os/vx_util/queue.h
+++ b/kernel/vx_os/vx_util/queue.h
@@ -5,8 +5,8 @@
 
 
 
-#define SIZE 50
-#define WARPS 7
+#define SIZE 100
+#define WARPS 8
 
 
 typedef struct Job_t
@@ -31,7 +31,7 @@ typedef struct Queue_t
 
 } Queue;
 
-Queue q[8];
+Queue q[64];
 
 void queue_initialize(Queue *);
 
diff --git a/kernel/vx_os/vx_util/queue.s b/kernel/vx_os/vx_util/queue.s
index 6fcec494..d9b25891 100644
--- a/kernel/vx_os/vx_util/queue.s
+++ b/kernel/vx_os/vx_util/queue.s
@@ -58,6 +58,12 @@ ec:
 queue_dequeue:
 	mv   t0, a0       # loading base address of q
 	lw   t1, 8 (t0)  # t1 = num_j
+	nop
+	nop
+	nop
+	nop
+	nop
+	nop
 	addi t1, t1, -1  # --t1
 	sw   t1, 8 (t0)  # num_j = t1
 	addi t1, t0, 20  # t1 = jobs_addr
diff --git a/rtl/VX_context.v b/rtl/VX_context.v
index eebe0b99..90267521 100644
--- a/rtl/VX_context.v
+++ b/rtl/VX_context.v
@@ -3,7 +3,9 @@
 
 module VX_context (
   input wire        clk,
+  /* verilator lint_off UNUSED */
   input wire        in_warp,
+  /* verilator lint_on UNUSED */
   input wire        in_wb_warp,
   input wire        in_valid[`NT_M1:0],
   input wire        in_write_register,
diff --git a/rtl/VX_context_slave.v b/rtl/VX_context_slave.v
index fc5c4d0b..59d77c19 100644
--- a/rtl/VX_context_slave.v
+++ b/rtl/VX_context_slave.v
@@ -3,7 +3,9 @@
 
 module VX_context_slave (
   input wire        clk,
+  /* verilator lint_off UNUSED */
   input wire        in_warp,
+  /* verilator lint_on UNUSED */
   input wire        in_wb_warp,
   input wire        in_valid[`NT_M1:0],
   input wire        in_write_register,
diff --git a/rtl/VX_decode.v b/rtl/VX_decode.v
index c9b0115a..ae7bfe9b 100644
--- a/rtl/VX_decode.v
+++ b/rtl/VX_decode.v
@@ -19,6 +19,9 @@ module VX_decode(
 	input wire[31:0]      in_src1_fwd_data[`NT_M1:0],
 	input wire            in_src2_fwd,
 	input wire[31:0]      in_src2_fwd_data[`NT_M1:0],
+	/* verilator lint_off UNUSED */
+	input wire[`NW_M1:0]  in_which_wspawn,
+	/* verilator lint_on UNUSED */
 
 	input wire[`NW_M1:0]  in_warp_num,
 
@@ -111,78 +114,181 @@ module VX_decode(
 		reg[4:0]   alu_op;
 		reg[4:0]   mul_alu;
 
+		/* verilator lint_off UNUSED */
 		wire[31:0] w0_t0_registers[31:0];
+		/* verilator lint_on UNUSED */
+
 
-		wire       context_zero_valid = (in_wb_warp_num == 0);
-		wire[31:0] zero_a_reg_data[`NT_M1:0];
-		wire[31:0] zero_b_reg_data[`NT_M1:0];
-		reg        zero_clone_stall;
 
 		// always @(*) begin
 		// 	$display("DECODE WARP: %h", in_warp_num);
 		// end
 
-		wire curr_warp_zero  = in_warp_num == 0;
-		wire curr_warp_one   = in_warp_num == 1;
 
 		// always @(*) begin
 		// 	$display("DECODE WARP: %h PC: %h",in_warp_num, in_curr_PC);
 		// end
 
-		VX_context VX_Context_zero(
-			.clk              (clk),
-			.in_warp          (curr_warp_zero),
-			.in_wb_warp       (context_zero_valid),
-			.in_valid         (in_wb_valid),
-			.in_rd            (in_rd),
-			.in_src1          (out_rs1),
-			.in_src2          (out_rs2),
-			.in_curr_PC       (in_curr_PC),
-			.in_is_clone      (is_clone),
-			.in_is_jal        (is_jal),
-			.in_src1_fwd      (in_src1_fwd),
-			.in_src1_fwd_data (in_src1_fwd_data),
-			.in_src2_fwd      (in_src2_fwd),
-			.in_src2_fwd_data (in_src2_fwd_data),
-			.in_write_register(write_register),
-			.in_write_data    (in_write_data),
-			.out_a_reg_data   (zero_a_reg_data),
-			.out_b_reg_data   (zero_b_reg_data),
-			.out_clone_stall  (zero_clone_stall),
-			.w0_t0_registers  (w0_t0_registers)
-		);
+		`ifdef ONLY
 
-		wire       context_one_valid = (in_wb_warp_num == 1);
-		wire[31:0] one_a_reg_data[`NT_M1:0];
-		wire[31:0] one_b_reg_data[`NT_M1:0];
-		reg        one_clone_stall;
-		VX_context_slave VX_Context_one(
-			.clk              (clk),
-			.in_warp          (curr_warp_one),
-			.in_wb_warp       (context_one_valid),
-			.in_valid         (in_wb_valid),
-			.in_rd            (in_rd),
-			.in_src1          (out_rs1),
-			.in_src2          (out_rs2),
-			.in_curr_PC       (in_curr_PC),
-			.in_is_clone      (is_clone),
-			.in_is_jal        (is_jal),
-			.in_src1_fwd      (in_src1_fwd),
-			.in_src1_fwd_data (in_src1_fwd_data),
-			.in_src2_fwd      (in_src2_fwd),
-			.in_src2_fwd_data (in_src2_fwd_data),
-			.in_write_register(write_register),
-			.in_write_data    (in_write_data),
-			.in_wspawn_regs   (w0_t0_registers),
-			.in_wspawn        (is_wspawn),
-			.out_a_reg_data   (one_a_reg_data),
-			.out_b_reg_data   (one_b_reg_data),
-			.out_clone_stall  (one_clone_stall)
-		);
+			wire[31:0] glob_a_reg_data[`NT_M1:0];
+			wire[31:0] glob_b_reg_data[`NT_M1:0];
+			reg        glob_clone_stall;
 
-		assign out_a_reg_data  = curr_warp_zero ? zero_a_reg_data  : one_a_reg_data;
-		assign out_b_reg_data  = curr_warp_zero ? zero_b_reg_data  : one_b_reg_data;
-		assign out_clone_stall = zero_clone_stall || one_clone_stall;
+			wire       curr_warp_zero     = in_warp_num == 0;
+			wire       context_zero_valid = (in_wb_warp_num == 0);
+			wire       real_zero_isclone  = is_clone  && (in_warp_num == 0);  
+			VX_context VX_Context_zero(
+				.clk              (clk),
+				.in_warp          (curr_warp_zero),
+				.in_wb_warp       (context_zero_valid),
+				.in_valid         (in_wb_valid),
+				.in_rd            (in_rd),
+				.in_src1          (out_rs1),
+				.in_src2          (out_rs2),
+				.in_curr_PC       (in_curr_PC),
+				.in_is_clone      (real_zero_isclone),
+				.in_is_jal        (is_jal),
+				.in_src1_fwd      (in_src1_fwd),
+				.in_src1_fwd_data (in_src1_fwd_data),
+				.in_src2_fwd      (in_src2_fwd),
+				.in_src2_fwd_data (in_src2_fwd_data),
+				.in_write_register(write_register),
+				.in_write_data    (in_write_data),
+				.out_a_reg_data   (glob_a_reg_data),
+				.out_b_reg_data   (glob_b_reg_data),
+				.out_clone_stall  (glob_clone_stall),
+				.w0_t0_registers  (w0_t0_registers)
+			);
+
+
+			assign out_a_reg_data  = glob_a_reg_data;
+			assign out_b_reg_data  = glob_b_reg_data;
+			assign out_clone_stall = glob_clone_stall;
+
+		`else 
+
+			wire[31:0] glob_a_reg_data[`NW-1:0][`NT_M1:0];
+			wire[31:0] glob_b_reg_data[`NW-1:0][`NT_M1:0];
+			reg        glob_clone_stall[`NW-1:0];
+
+			wire       curr_warp_zero     = in_warp_num == 0;
+			wire       context_zero_valid = (in_wb_warp_num == 0);
+			wire       real_zero_isclone  = is_clone  && (in_warp_num == 0);  
+			VX_context VX_Context_zero(
+				.clk              (clk),
+				.in_warp          (curr_warp_zero),
+				.in_wb_warp       (context_zero_valid),
+				.in_valid         (in_wb_valid),
+				.in_rd            (in_rd),
+				.in_src1          (out_rs1),
+				.in_src2          (out_rs2),
+				.in_curr_PC       (in_curr_PC),
+				.in_is_clone      (real_zero_isclone),
+				.in_is_jal        (is_jal),
+				.in_src1_fwd      (in_src1_fwd),
+				.in_src1_fwd_data (in_src1_fwd_data),
+				.in_src2_fwd      (in_src2_fwd),
+				.in_src2_fwd_data (in_src2_fwd_data),
+				.in_write_register(write_register),
+				.in_write_data    (in_write_data),
+				.out_a_reg_data   (glob_a_reg_data[0]),
+				.out_b_reg_data   (glob_b_reg_data[0]),
+				.out_clone_stall  (glob_clone_stall[0]),
+				.w0_t0_registers  (w0_t0_registers)
+			);
+
+			genvar r;
+			generate
+				for (r = 1; r < `NW; r = r + 1) begin
+					wire context_glob_valid = (in_wb_warp_num == r);
+					wire curr_warp_glob     = in_warp_num == r;
+					wire real_wspawn        = is_wspawn && (in_which_wspawn == r); 
+					wire real_isclone       = is_clone  && (in_warp_num == r);      
+					VX_context_slave VX_Context_one(
+						.clk              (clk),
+						.in_warp          (curr_warp_glob),
+						.in_wb_warp       (context_glob_valid),
+						.in_valid         (in_wb_valid),
+						.in_rd            (in_rd),
+						.in_src1          (out_rs1),
+						.in_src2          (out_rs2),
+						.in_curr_PC       (in_curr_PC),
+						.in_is_clone      (real_isclone),
+						.in_is_jal        (is_jal),
+						.in_src1_fwd      (in_src1_fwd),
+						.in_src1_fwd_data (in_src1_fwd_data),
+						.in_src2_fwd      (in_src2_fwd),
+						.in_src2_fwd_data (in_src2_fwd_data),
+						.in_write_register(write_register),
+						.in_write_data    (in_write_data),
+						.in_wspawn_regs   (w0_t0_registers),
+						.in_wspawn        (real_wspawn),
+						.out_a_reg_data   (glob_a_reg_data[r]),
+						.out_b_reg_data   (glob_b_reg_data[r]),
+						.out_clone_stall  (glob_clone_stall[r])
+					);
+				end
+			endgenerate
+
+			// always @(posedge clk)
+			// 	if(write_register && (in_wb_warp == 3) && (in_wb_valid[0]) && (in_rd == 31)) begin
+
+			// 		$display("Warp 3 writing ",);
+			// 	end
+			// end
+
+			reg[31:0] temp_out_a_reg_data[`NT_M1:0];
+			reg[31:0] temp_out_b_reg_data[`NT_M1:0];
+			/* verilator lint_off UNOPTFLAT */
+			reg       temp_out_clone_stall;
+			/* verilator lint_on UNOPTFLAT */
+
+			always @(*) begin
+
+				if (`NW == 1) begin
+					temp_out_a_reg_data = glob_a_reg_data;
+					temp_out_b_reg_data = glob_b_reg_data;
+				end else begin
+					integer g;
+					// temp_out_clone_stall = 0;
+					for (g = 0; g < `NW; g = g + 1)
+					begin
+						if (in_warp_num == g[`NW_M1:0]) begin
+							temp_out_a_reg_data = glob_a_reg_data[g];
+							temp_out_b_reg_data = glob_b_reg_data[g];
+						end
+
+						// temp_out_clone_stall = temp_out_clone_stall || glob_clone_stall[g];
+					end
+				end
+			end
+
+			assign out_a_reg_data  = temp_out_a_reg_data;
+			assign out_b_reg_data  = temp_out_b_reg_data;
+			// assign out_clone_stall = temp_out_clone_stall;
+
+			// assign out_a_reg_data  = curr_warp_zero ? glob_a_reg_data[0]  : glob_a_reg_data[1];
+			// assign out_b_reg_data  = curr_warp_zero ? glob_b_reg_data[0]  : glob_b_reg_data[1];
+
+			genvar y;
+			generate
+				always @(*) begin
+					temp_out_clone_stall = glob_clone_stall[0];
+					for (y = 1; y < `NW; y = y+1) begin
+						temp_out_clone_stall = temp_out_clone_stall || glob_clone_stall[y];
+					end
+				end
+			endgenerate
+
+			assign out_clone_stall = temp_out_clone_stall;
+
+
+		`endif
+
+
+		// assign out_clone_stall = glob_clone_stall[0] || glob_clone_stall[1] || 
+		//                          glob_clone_stall[2] || glob_clone_stall[3];
 
 		// always @(*) begin
 		// 	if (context_one_valid) begin
@@ -234,7 +340,7 @@ module VX_decode(
 		assign out_wspawn_pc = out_a_reg_data[0];
 
 		// always @(*) begin
-		// 	if (is_jalrs) begin
+		// 	if (is_jalrs && in_warp_num == 2) begin
 		// 		$display("JALRS WOHOOO: rs2 - %h", out_b_reg_data[0]);
 		// 	end
 		// end
@@ -274,9 +380,6 @@ module VX_decode(
 
 
 
-		// ch_print("DECODE: PC: {0}, INSTRUCTION: {1}", in_curr_PC, in_instruction);
-
-
 
 		// assign out_reg_data[0]   = (    (is_jal == 1'b1) ? in_curr_PC : ((in_src1_fwd == 1'b1) ? in_src1_fwd_data[0] : rd1_register[0]));
 		// assign out_reg_data[1]   = (in_src2_fwd == 1'b1) ?  in_src2_fwd_data[0] : rd2_register[0];
@@ -361,6 +464,7 @@ module VX_decode(
 					begin
 						if (is_jalrs || is_jmprt)
 						begin
+							// $display("OUT JAL DEST: %h", out_a_reg_data[0]);
 			        		out_jal        = 1'b1 && in_valid[0];
 							out_jal_offset = 32'h0;
 						end
diff --git a/rtl/VX_define.h b/rtl/VX_define.h
index 5fb42fb8..2273b35e 100644
--- a/rtl/VX_define.h
+++ b/rtl/VX_define.h
@@ -1,7 +1,10 @@
 
 
-#define NT 2
-#define NT_M1 1
+#define NT 4
+#define NT_M1 (NT-1)
+
+#define NW 8
+
 
 #define R_INST 51
 #define L_INST 3
diff --git a/rtl/VX_define.v b/rtl/VX_define.v
index 153c84ae..2f176f3b 100644
--- a/rtl/VX_define.v
+++ b/rtl/VX_define.v
@@ -1,8 +1,11 @@
 
-`define NT 2
-`define NT_M1 1
 
-`define NW_M1 1
+`define NT 4
+`define NT_M1 (`NT-1)
+
+`define NW_M1 3
+`define NW 8
+// `define ONLY
 
 
 `define R_INST 7'd51
diff --git a/rtl/VX_fetch.v b/rtl/VX_fetch.v
index f9e52047..6739b9d6 100644
--- a/rtl/VX_fetch.v
+++ b/rtl/VX_fetch.v
@@ -29,7 +29,8 @@ module VX_fetch (
 	output wire[`NW_M1:0] out_warp_num,
 	output wire[31:0]     out_curr_PC,
 	output wire           out_valid[`NT_M1:0],
-	output wire           out_ebreak
+	output wire           out_ebreak,
+	output wire[`NW_M1:0] out_which_wspawn
 );
 
 		reg       stall;
@@ -37,108 +38,161 @@ module VX_fetch (
 
 		reg[`NW_M1:0] warp_num;
 		reg[`NW_M1:0] warp_state;
+		reg[`NW_M1:0] warp_count;
+
+		reg[31:0] num_ecalls;
 
 		initial begin
 			warp_num   = 0;
 			warp_state = 0;
+			num_ecalls = 0;
+			warp_count = 1;
+		end
+
+
+		always @(posedge clk) begin
+			if (in_ebreak) begin
+				num_ecalls <= num_ecalls + 1;
+				$display("--------> New num_ecalls = %h", num_ecalls+1);
+			end
 		end
 
 		wire add_warp    = in_wspawn && !in_ebreak && !in_clone_stall;
 		wire remove_warp = in_ebreak && !in_wspawn && !in_clone_stall;
 
 		always @(posedge clk or posedge reset) begin
-			if (reset || (warp_num == warp_state) || remove_warp || add_warp) begin
+			if (reset || (warp_num >= warp_state) || remove_warp || add_warp) begin
 				warp_num   <= 0;
+			`ifndef ONLY
+			end else if (!warp_glob_valid[warp_num+1]) begin
+				$display("Skipping one");
+				warp_num   <= warp_num + 2;
+			`endif
 			end else begin
 				warp_num   <= warp_num + 1;
 			end
 
 			if (add_warp) begin
-				// $display("Adding a new warp %h", warp_state);
 				warp_state <= warp_state + 1;
-			end else if (remove_warp) begin
-				// $display("Removing a warp %h", warp_state);
-				warp_state <= warp_state - 1;
+				warp_count <= warp_count + 1;
+				$display("Adding a new warp %h", warp_state+1);
+			end else if (remove_warp) begin // No removing, just invalidating
+				warp_count <= warp_count - 1;
+				$display("Removing a warp %h %h", in_decode_warp_num, warp_count);
+				if (warp_count == 2) begin
+					$display("&&&&&&&&&&&&& STATE 0");
+					warp_state <= 0;
+				end
 			end
 		end
 
-		assign out_ebreak = (warp_state == 0) && in_ebreak;
+		assign out_ebreak = (in_decode_warp_num == 0) && in_ebreak;
 
 
 		assign stall = in_clone_stall || in_branch_stall || in_fwd_stall || in_branch_stall_exe || in_interrupt || in_freeze || in_debug;
 
+		assign out_which_wspawn = (warp_state+1);
+
+		`ifdef ONLY
+
+			wire       warp_zero_change_mask = in_change_mask && (in_decode_warp_num == 0);
+			wire       warp_zero_jal         = in_jal         && (in_memory_warp_num == 0);
+			wire       warp_zero_branch      = in_branch_dir  && (in_memory_warp_num == 0);
+			wire       warp_zero_stall       = stall          || (warp_num != 0);
+			wire       warp_zero_wspawn      = (0 == 0) ? 0 : (in_wspawn && ((warp_state+1) == 0));
+			wire[31:0] warp_zero_wspawn_pc   = in_wspawn_pc;
+			wire       warp_zero_remove      = remove_warp && (in_decode_warp_num == 0);
+
+			always @(*) begin : proc_
+				if (warp_zero_remove) $display("4Removing warp: %h", 0);
+			end
+
+			VX_warp VX_Warp(
+				.clk           (clk),
+				.reset         (reset),
+				.stall         (warp_zero_stall),
+				.remove        (warp_zero_remove),
+				.in_thread_mask(in_thread_mask),
+				.in_change_mask(warp_zero_change_mask),
+				.in_jal        (warp_zero_jal),
+				.in_jal_dest   (in_jal_dest),
+				.in_branch_dir (warp_zero_branch),
+				.in_branch_dest(in_branch_dest),
+				.in_wspawn     (warp_zero_wspawn),
+				.in_wspawn_pc  (warp_zero_wspawn_pc),
+				.out_PC        (out_PC),
+				.out_valid     (out_valid)
+				);
+
+		`else 
+
+			wire[31:0] warp_glob_pc[`NW-1:0];
+			wire       warp_glob_valid[`NW-1:0][`NT_M1:0];
+			genvar cur_warp;
+			generate
+				for (cur_warp = 0; cur_warp < `NW; cur_warp = cur_warp + 1)
+				begin
+					wire       warp_zero_change_mask = in_change_mask && (in_decode_warp_num == cur_warp);
+					wire       warp_zero_jal         = in_jal         && (in_memory_warp_num == cur_warp);
+					wire       warp_zero_branch      = in_branch_dir  && (in_memory_warp_num == cur_warp);
+					wire       warp_zero_stall       = stall          || (warp_num != cur_warp);
+					wire       warp_zero_wspawn      = (cur_warp == 0) ? 0 : (in_wspawn && ((warp_state+1) == cur_warp));
+					wire[31:0] warp_zero_wspawn_pc   = in_wspawn_pc;
+					wire       warp_zero_remove      = remove_warp && (in_decode_warp_num == cur_warp);
+
+					always @(*) begin : proc_
+						if (warp_zero_remove) $display("4Removing warp: %h", cur_warp);
+					end
+
+					VX_warp VX_Warp(
+						.clk           (clk),
+						.reset         (reset),
+						.stall         (warp_zero_stall),
+						.remove        (warp_zero_remove),
+						.in_thread_mask(in_thread_mask),
+						.in_change_mask(warp_zero_change_mask),
+						.in_jal        (warp_zero_jal),
+						.in_jal_dest   (in_jal_dest),
+						.in_branch_dir (warp_zero_branch),
+						.in_branch_dest(in_branch_dest),
+						.in_wspawn     (warp_zero_wspawn),
+						.in_wspawn_pc  (warp_zero_wspawn_pc),
+						.out_PC        (warp_glob_pc[cur_warp]),
+						.out_valid     (warp_glob_valid[cur_warp])
+						);
+				end
+			endgenerate
 
 
-		wire       warp_zero_change_mask = in_change_mask && (in_decode_warp_num == 0);
-		wire       warp_zero_jal         = in_jal         && (in_memory_warp_num == 0);
-		wire       warp_zero_branch      = in_branch_dir  && (in_memory_warp_num == 0);
-		wire       warp_zero_stall       = stall          || (warp_num == 1);
-		wire       warp_zero_wspawn      = 0;
-		wire[31:0] warp_zero_wspawn_pc   = 32'h0;
+			reg[31:0] out_PC_var;
+			reg      out_valid_var[`NT_M1:0];
 
-		wire[31:0] warp_zero_pc;
-		wire       warp_zero_valid[`NT_M1:0];
-		VX_warp VX_Warp_zero(
-			.clk           (clk),
-			.reset         (reset),
-			.stall         (warp_zero_stall),
-			.in_thread_mask(in_thread_mask),
-			.in_change_mask(warp_zero_change_mask),
-			.in_jal        (warp_zero_jal),
-			.in_jal_dest   (in_jal_dest),
-			.in_branch_dir (warp_zero_branch),
-			.in_branch_dest(in_branch_dest),
-			.in_wspawn     (warp_zero_wspawn),
-			.in_wspawn_pc  (warp_zero_wspawn_pc),
-			.out_PC        (warp_zero_pc),
-			.out_valid     (warp_zero_valid)
-			);
+			always @(*) begin : help
+				integer g;
+				integer h;
+				for (g = 0; g < `NW; g = g + 1)
+				begin
+					if (warp_num == g[`NW_M1:0])
+					begin
+						 out_PC_var    = warp_glob_pc[g][31:0];
+						 for (h = 0; h < `NT; h = h + 1) out_valid_var[h] = warp_glob_valid[g][h];
+					end
+				
+				end
+			end
+
+			assign out_PC    = out_PC_var;
+			assign out_valid = out_valid_var;
+
+			always @(*) begin
+				if (out_valid[0]) begin
+					$display("[%d] %h #%b#",out_warp_num, out_PC, out_valid);
+				end
+			end
+
+		`endif
 
 
-		wire       warp_one_change_mask = in_change_mask && (in_decode_warp_num == 1);
-		wire       warp_one_jal         = in_jal         && (in_memory_warp_num == 1);
-		wire       warp_one_branch      = in_branch_dir  && (in_memory_warp_num == 1);
-		wire       warp_one_stall       = stall          || (warp_num == 0);
-		wire[31:0] warp_one_pc;
-		wire       warp_one_valid[`NT_M1:0];
-		VX_warp VX_Warp_one(
-			.clk           (clk),
-			.reset         (reset),
-			.stall         (warp_one_stall),
-			.in_thread_mask(in_thread_mask),
-			.in_change_mask(warp_one_change_mask),
-			.in_jal        (warp_one_jal),
-			.in_jal_dest   (in_jal_dest),
-			.in_branch_dir (warp_one_branch),
-			.in_branch_dest(in_branch_dest),
-			.in_wspawn     (in_wspawn),
-			.in_wspawn_pc  (in_wspawn_pc),
-			.out_PC        (warp_one_pc),
-			.out_valid     (warp_one_valid)
-			);
-
-		// always @(*) begin
-		// 	if (in_wspawn) begin
-		// 		$display("Spawning a warp @ %h",in_wspawn_pc);
-		// 	end
-		// end
-
-		// always @(posedge clk) begin 
-		// 	$display("curr warp: %h Threads:%d%d PC: %h", warp_num, out_valid[0],out_valid[1], out_PC);
-		// end
-
-		// always @(*) begin
-		// 	if (warp_num == 1) begin
-		// 		$display("Going to PC: %h", warp_one_pc);
-		// 	end
-		// end
-
-		assign out_PC    = (warp_num == 0) ? warp_zero_pc    : warp_one_pc;
-		assign out_valid = (warp_num == 0) ? warp_zero_valid : warp_one_valid;
-
-		// always @(*) begin
-		// 	$display("FETCH PC: %h (%h, %h, %h)",delete, delete, in_jal_dest, in_branch_dest);
-		// end
 
 
 		assign out_curr_PC     = out_PC;
diff --git a/rtl/VX_warp.v b/rtl/VX_warp.v
index cf6039c3..7a87d8c9 100644
--- a/rtl/VX_warp.v
+++ b/rtl/VX_warp.v
@@ -5,6 +5,7 @@ module VX_warp (
 	input  wire       clk,
 	input  wire       reset,
 	input  wire       stall,
+	input  wire       remove,
 	input  wire       in_thread_mask[`NT_M1:0],
 	input  wire       in_change_mask,
 	input  wire       in_jal,
@@ -23,18 +24,24 @@ module VX_warp (
 		var[31:0] use_PC;
 		reg valid[`NT_M1:0];
 
+		reg valid_zero[`NT_M1:0];
 
 		integer ini_cur_th = 0;
 		initial begin
 			real_PC = 0;
-			for (ini_cur_th = 1; ini_cur_th < `NT; ini_cur_th=ini_cur_th+1)
+			for (ini_cur_th = 1; ini_cur_th < `NT; ini_cur_th=ini_cur_th+1) begin
 				valid[ini_cur_th]   = 0; // Thread 1 active
-			valid[0]   = 1;
+				valid_zero[ini_cur_th] = 0;
+			end
+			valid[0]      = 1;
+			valid_zero[0] = 0;
 		end
 
 
 		always @(*) begin
-			if (in_change_mask) begin
+			if (remove) begin
+				assign valid = valid_zero;
+			end else if (in_change_mask) begin
 				assign valid = in_thread_mask;
 			end
 		end
@@ -50,6 +57,7 @@ module VX_warp (
 		always @(*) begin
 			if (in_jal == 1'b1) begin
 				temp_PC = in_jal_dest;
+				// $display("LINKING TO %h", temp_PC);
 			end else if (in_branch_dir == 1'b1) begin
 				temp_PC = in_branch_dest;
 			end else begin
diff --git a/rtl/Vortex.v b/rtl/Vortex.v
index 34c23946..ce7bee31 100644
--- a/rtl/Vortex.v
+++ b/rtl/Vortex.v
@@ -32,6 +32,7 @@ wire[31:0]     fetch_curr_PC;
 wire           fetch_valid[`NT_M1:0];
 wire[`NW_M1:0] fetch_warp_num;
 wire           fetch_ebreak;
+wire[`NW_M1:0] fetch_which_warp;
 
 // From f_d_register
 wire[31:0]   f_d_instruction;
@@ -228,7 +229,8 @@ VX_fetch vx_fetch(
 		.out_curr_PC        (fetch_curr_PC),
 		.out_warp_num       (fetch_warp_num),
 		.out_valid          (fetch_valid),
-		.out_ebreak         (fetch_ebreak)
+		.out_ebreak         (fetch_ebreak),
+		.out_which_wspawn   (fetch_which_warp)
 	);
 
 
@@ -264,6 +266,7 @@ VX_decode vx_decode(
 		.in_src2_fwd     (forwarding_src2_fwd),
 		.in_src2_fwd_data(forwarding_src2_fwd_data),
 		.in_warp_num     (f_d_warp_num),
+		.in_which_wspawn (fetch_which_warp),
 
 		.out_csr_address (decode_csr_address),
 		.out_is_csr      (decode_is_csr),
diff --git a/rtl/obj_dir/VVortex b/rtl/obj_dir/VVortex
deleted file mode 100755
index 5882e08d..00000000
Binary files a/rtl/obj_dir/VVortex and /dev/null differ
diff --git a/rtl/obj_dir/VVortex.cpp b/rtl/obj_dir/VVortex.cpp
deleted file mode 100644
index de9647a3..00000000
--- a/rtl/obj_dir/VVortex.cpp
+++ /dev/null
@@ -1,7576 +0,0 @@
-// Verilated -*- C++ -*-
-// DESCRIPTION: Verilator output: Design implementation internals
-// See VVortex.h for the primary calling header
-
-#include "VVortex.h"
-#include "VVortex__Syms.h"
-
-
-//--------------------
-// STATIC VARIABLES
-
-// Begin mtask footprint  all: 
-VL_ST_SIG8(VVortex::__Vtable1_Vortex__DOT__vx_decode__DOT__mul_alu[8],4,0);
-
-//--------------------
-
-VL_CTOR_IMP(VVortex) {
-    VVortex__Syms* __restrict vlSymsp = __VlSymsp = new VVortex__Syms(this, name());
-    VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
-    // Reset internal values
-    
-    // Reset structure values
-    _ctor_var_reset();
-}
-
-void VVortex::__Vconfigure(VVortex__Syms* vlSymsp, bool first) {
-    if (0 && first) {}  // Prevent unused
-    this->__VlSymsp = vlSymsp;
-}
-
-VVortex::~VVortex() {
-    delete __VlSymsp; __VlSymsp=NULL;
-}
-
-//--------------------
-
-
-void VVortex::eval() {
-    VL_DEBUG_IF(VL_DBG_MSGF("+++++TOP Evaluate VVortex::eval\n"); );
-    VVortex__Syms* __restrict vlSymsp = this->__VlSymsp;  // Setup global symbol table
-    VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
-#ifdef VL_DEBUG
-    // Debug assertions
-    _eval_debug_assertions();
-#endif // VL_DEBUG
-    // Initialize
-    if (VL_UNLIKELY(!vlSymsp->__Vm_didInit)) _eval_initial_loop(vlSymsp);
-    // Evaluate till stable
-    int __VclockLoop = 0;
-    QData __Vchange = 1;
-    do {
-	VL_DEBUG_IF(VL_DBG_MSGF("+ Clock loop\n"););
-	_eval(vlSymsp);
-	if (VL_UNLIKELY(++__VclockLoop > 100)) {
-	    // About to fail, so enable debug to see what's not settling.
-	    // Note you must run make with OPT=-DVL_DEBUG for debug prints.
-	    int __Vsaved_debug = Verilated::debug();
-	    Verilated::debug(1);
-	    __Vchange = _change_request(vlSymsp);
-	    Verilated::debug(__Vsaved_debug);
-	    VL_FATAL_MT(__FILE__,__LINE__,__FILE__,"Verilated model didn't converge");
-	} else {
-	    __Vchange = _change_request(vlSymsp);
-	}
-    } while (VL_UNLIKELY(__Vchange));
-}
-
-void VVortex::_eval_initial_loop(VVortex__Syms* __restrict vlSymsp) {
-    vlSymsp->__Vm_didInit = true;
-    _eval_initial(vlSymsp);
-    // Evaluate till stable
-    int __VclockLoop = 0;
-    QData __Vchange = 1;
-    do {
-	_eval_settle(vlSymsp);
-	_eval(vlSymsp);
-	if (VL_UNLIKELY(++__VclockLoop > 100)) {
-	    // About to fail, so enable debug to see what's not settling.
-	    // Note you must run make with OPT=-DVL_DEBUG for debug prints.
-	    int __Vsaved_debug = Verilated::debug();
-	    Verilated::debug(1);
-	    __Vchange = _change_request(vlSymsp);
-	    Verilated::debug(__Vsaved_debug);
-	    VL_FATAL_MT(__FILE__,__LINE__,__FILE__,"Verilated model didn't DC converge");
-	} else {
-	    __Vchange = _change_request(vlSymsp);
-	}
-    } while (VL_UNLIKELY(__Vchange));
-}
-
-//--------------------
-// Internal Methods
-
-void VVortex::_initial__TOP__1(VVortex__Syms* __restrict vlSymsp) {
-    VL_DEBUG_IF(VL_DBG_MSGF("+    VVortex::_initial__TOP__1\n"); );
-    VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
-    // Body
-    // INITIAL at VX_warp.v:28
-    vlTOPp->Vortex__DOT__vx_fetch__DOT__VX_Warp_zero__DOT__real_PC = 0U;
-    vlTOPp->Vortex__DOT__vx_fetch__DOT__VX_Warp_zero__DOT__valid[1U] = 0U;
-    vlTOPp->Vortex__DOT__vx_fetch__DOT__VX_Warp_zero__DOT__valid[0U] = 1U;
-    // INITIAL at VX_warp.v:28
-    vlTOPp->Vortex__DOT__vx_fetch__DOT__VX_Warp_one__DOT__real_PC = 0U;
-    vlTOPp->Vortex__DOT__vx_fetch__DOT__VX_Warp_one__DOT__valid[1U] = 0U;
-    vlTOPp->Vortex__DOT__vx_fetch__DOT__VX_Warp_one__DOT__valid[0U] = 1U;
-    // INITIAL at VX_context.v:29
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__state_stall = 0U;
-    // INITIAL at VX_context_slave.v:36
-    // INITIAL at VX_context_slave.v:37
-    // INITIAL at VX_context_slave.v:39
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_state_stall = 0U;
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__wspawn_state_stall = 0U;
-    // INITIAL at VX_m_w_reg.v:41
-    vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd = 0U;
-    vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb = 0U;
-    vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__PC_next = 0U;
-    vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__warp_num = 0U;
-    // INITIAL at VX_csr_handler.v:27
-    vlTOPp->Vortex__DOT__vx_csr_handler__DOT__cycle = VL_ULL(0);
-    vlTOPp->Vortex__DOT__vx_csr_handler__DOT__instret = VL_ULL(0);
-    vlTOPp->Vortex__DOT__vx_csr_handler__DOT__decode_csr_address = 0U;
-    // INITIAL at VX_e_m_reg.v:79
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__rd = 0U;
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb = 0U;
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__PC_next = 0U;
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__mem_read = 7U;
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__mem_write = 7U;
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__csr_address = 0U;
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__is_csr = 0U;
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__csr_result = 0U;
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__curr_PC = 0U;
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_offset = 0U;
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type = 0U;
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal = 0U;
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal_dest = 0U;
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__warp_num = 0U;
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__a_reg_data[0U] = 0U;
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__b_reg_data[0U] = 0U;
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__valid[0U] = 0U;
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result[0U] = 0U;
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__a_reg_data[1U] = 0U;
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__b_reg_data[1U] = 0U;
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__valid[1U] = 0U;
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result[1U] = 0U;
-    // INITIAL at VX_d_e_reg.v:87
-    vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rd = 0U;
-    vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__a_reg_data[0U] = 0U;
-    vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__b_reg_data[0U] = 0U;
-    vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__reg_data_z[0U] = 0U;
-    vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid[0U] = 0U;
-    vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid_z[0U] = 0U;
-    vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__a_reg_data[1U] = 0U;
-    vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__b_reg_data[1U] = 0U;
-    vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__reg_data_z[1U] = 0U;
-    vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid[1U] = 0U;
-    vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid_z[1U] = 0U;
-    vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op = 0U;
-    vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb = 0U;
-    vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__PC_next_out = 0U;
-    vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rs2_src = 0U;
-    vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__itype_immed = 0U;
-    vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__mem_read = 7U;
-    vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__mem_write = 7U;
-    vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__branch_type = 0U;
-    vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__upper_immed = 0U;
-    vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__csr_address = 0U;
-    vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__is_csr = 0U;
-    vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__csr_mask = 0U;
-    vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__curr_PC = 0U;
-    vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__jal = 0U;
-    vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__jal_offset = 0U;
-    vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__warp_num = 0U;
-    // INITIAL at VX_fetch.v:41
-    vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num = 0U;
-    vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_state = 0U;
-}
-
-void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
-    VL_DEBUG_IF(VL_DBG_MSGF("+    VVortex::_settle__TOP__2\n"); );
-    VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
-    // Body
-    vlTOPp->Vortex__DOT__vx_decode__DOT__jmprt_thread_mask[0U] = 1U;
-    vlTOPp->Vortex__DOT__vx_decode__DOT__jmprt_thread_mask[1U] = 0U;
-    vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data[1U] 
-	= vlTOPp->in_cache_driver_out_data[1U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data[0U] 
-	= vlTOPp->in_cache_driver_out_data[0U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_valid[1U] 
-	= vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__valid
-	[1U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_valid[0U] 
-	= vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__valid
-	[0U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd1_register[0U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_src1_data;
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd1_register[1U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src1_data;
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__rd1_register[0U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_src1_data;
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__rd1_register[1U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src1_data;
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[0x1fU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[0x1fU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[0x1eU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[0x1eU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[0x1dU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[0x1dU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[0x1cU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[0x1cU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[0x1bU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[0x1bU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[0x1aU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[0x1aU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[0x19U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[0x19U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[0x18U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[0x18U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[0x17U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[0x17U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[0x16U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[0x16U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[0x15U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[0x15U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[0x14U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[0x14U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[0x13U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[0x13U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[0x12U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[0x12U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[0x11U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[0x11U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[0x10U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[0x10U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[0xfU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[0xfU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[0xeU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[0xeU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[0xdU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[0xdU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[0xcU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[0xcU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[0xbU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[0xbU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[0xaU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[0xaU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[9U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[9U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[8U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[8U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[7U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[7U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[6U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[6U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[5U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[5U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[4U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[4U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[3U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[3U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[2U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[2U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[1U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[1U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[0U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[0U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_f_d_reg__out_valid[1U] 
-	= vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__valid
-	[1U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_f_d_reg__out_valid[0U] 
-	= vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__valid
-	[0U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd2_register[0U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_src2_data;
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd2_register[1U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src2_data;
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__rd2_register[0U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_src2_data;
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__rd2_register[1U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src2_data;
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0x1fU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[0x1fU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0x1eU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[0x1eU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0x1dU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[0x1dU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0x1cU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[0x1cU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0x1bU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[0x1bU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0x1aU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[0x1aU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0x19U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[0x19U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0x18U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[0x18U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0x17U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[0x17U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0x16U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[0x16U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0x15U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[0x15U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0x14U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[0x14U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0x13U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[0x13U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0x12U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[0x12U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0x11U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[0x11U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0x10U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[0x10U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0xfU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[0xfU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0xeU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[0xeU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0xdU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[0xdU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0xcU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[0xcU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0xbU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[0xbU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0xaU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[0xaU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[9U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[9U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[8U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[8U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[7U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[7U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[6U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[6U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[5U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[5U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[4U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[4U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[3U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[3U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[2U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[2U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[1U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[1U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[0U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_alu_result[1U] 
-	= vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__alu_result
-	[1U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_alu_result[0U] 
-	= vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__alu_result
-	[0U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_mem_result[1U] 
-	= vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__mem_result
-	[1U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_mem_result[0U] 
-	= vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__mem_result
-	[0U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__is_itype = 
-	((0x13U == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) 
-	 | (3U == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)));
-    vlTOPp->Vortex__DOT__decode_csr_address = (0xfffU 
-					       & (((0U 
-						    != 
-						    (7U 
-						     & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-							>> 0xcU))) 
-						   & (2U 
-						      <= 
-						      (0xfffU 
-						       & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-							  >> 0x14U))))
-						   ? 
-						  (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-						   >> 0x14U)
-						   : 0x55U));
-    // ALWAYS at VX_decode.v:473
-    vlTOPp->__Vtableidx1 = (7U & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-				  >> 0xcU));
-    vlTOPp->Vortex__DOT__vx_decode__DOT__mul_alu = 
-	vlTOPp->__Vtable1_Vortex__DOT__vx_decode__DOT__mul_alu
-	[vlTOPp->__Vtableidx1];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__alu_tempp 
-	= (0xfffU & (((1U == (7U & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-				    >> 0xcU))) | (5U 
-						  == 
-						  (7U 
-						   & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-						      >> 0xcU))))
-		      ? (0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-				  >> 0x14U)) : (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-						>> 0x14U)));
-    vlTOPp->Vortex__DOT__vx_decode__DOT__is_csr = (
-						   (0x73U 
-						    == 
-						    (0x7fU 
-						     & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) 
-						   & (0U 
-						      != 
-						      (7U 
-						       & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-							  >> 0xcU))));
-    vlTOPp->Vortex__DOT__vx_decode__DOT__jal_sys_jal 
-	= ((0U == (7U & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-			 >> 0xcU))) & (2U > (0xfffU 
-					     & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-						>> 0x14U))));
-    vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone = 
-	((0x6bU == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) 
-	 & (5U == (7U & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-			 >> 0xcU))));
-    vlTOPp->Vortex__DOT__vx_decode__DOT__is_wspawn 
-	= ((0x6bU == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) 
-	   & (0U == (7U & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-			   >> 0xcU))));
-    vlTOPp->Vortex__DOT__vx_decode__DOT__is_jmprt = 
-	((0x6bU == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) 
-	 & (4U == (7U & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-			 >> 0xcU))));
-    vlTOPp->Vortex__DOT__vx_decode__DOT__is_jalrs = 
-	((0x6bU == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) 
-	 & (6U == (7U & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-			 >> 0xcU))));
-    vlTOPp->Vortex__DOT__vx_writeback__DOT__out_pc_data[0U] 
-	= vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__PC_next;
-    vlTOPp->Vortex__DOT__vx_writeback__DOT__out_pc_data[1U] 
-	= vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__PC_next;
-    vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[0U] 
-	= vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__PC_next;
-    vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[1U] 
-	= vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__PC_next;
-    vlTOPp->Vortex__DOT__csr_decode_csr_data = ((0xc00U 
-						 == (IData)(vlTOPp->Vortex__DOT__vx_csr_handler__DOT__decode_csr_address))
-						 ? (IData)(vlTOPp->Vortex__DOT__vx_csr_handler__DOT__cycle)
-						 : 
-						((0xc80U 
-						  == (IData)(vlTOPp->Vortex__DOT__vx_csr_handler__DOT__decode_csr_address))
-						  ? (IData)(
-							    (vlTOPp->Vortex__DOT__vx_csr_handler__DOT__cycle 
-							     >> 0x20U))
-						  : 
-						 ((0xc02U 
-						   == (IData)(vlTOPp->Vortex__DOT__vx_csr_handler__DOT__decode_csr_address))
-						   ? (IData)(vlTOPp->Vortex__DOT__vx_csr_handler__DOT__instret)
-						   : 
-						  ((0xc82U 
-						    == (IData)(vlTOPp->Vortex__DOT__vx_csr_handler__DOT__decode_csr_address))
-						    ? (IData)(
-							      (vlTOPp->Vortex__DOT__vx_csr_handler__DOT__instret 
-							       >> 0x20U))
-						    : 
-						   vlTOPp->Vortex__DOT__vx_csr_handler__DOT__csr
-						   [vlTOPp->Vortex__DOT__vx_csr_handler__DOT__decode_csr_address]))));
-    vlTOPp->out_cache_driver_in_mem_read = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__mem_read;
-    vlTOPp->out_cache_driver_in_mem_write = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__mem_write;
-    vlTOPp->Vortex__DOT__memory_branch_dest = (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__curr_PC 
-					       + (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_offset 
-						  << 1U));
-    vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_b_reg_data[1U] 
-	= vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__b_reg_data
-	[1U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_b_reg_data[0U] 
-	= vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__b_reg_data
-	[0U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_valid[1U] 
-	= vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__valid
-	[1U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_valid[0U] 
-	= vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__valid
-	[0U];
-    vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[0U] 
-	= vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__PC_next;
-    vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[1U] 
-	= vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__PC_next;
-    vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_alu_result[1U] 
-	= vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result
-	[1U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_alu_result[0U] 
-	= vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result
-	[0U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_valid[1U] 
-	= vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid
-	[1U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_valid[0U] 
-	= vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid
-	[0U];
-    vlTOPp->Vortex__DOT__execute_branch_stall = ((0U 
-						  != (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__branch_type)) 
-						 | (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__jal));
-    vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[0U] 
-	= vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__PC_next_out;
-    vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[1U] 
-	= vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__PC_next_out;
-    vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data[1U] 
-	= vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__a_reg_data
-	[1U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data[0U] 
-	= vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__a_reg_data
-	[0U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_b_reg_data[1U] 
-	= vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__b_reg_data
-	[1U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_b_reg_data[0U] 
-	= vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__b_reg_data
-	[0U];
-    vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd 
-	= (((((0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-			>> 0xfU)) == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rd)) 
-	     & (0U != (0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-				>> 0xfU)))) & (0U != (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb))) 
-	   & ((IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num) 
-	      == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__warp_num)));
-    vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd 
-	= (((((0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-			>> 0x14U)) == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rd)) 
-	     & (0U != (0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-				>> 0x14U)))) & (0U 
-						!= (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb))) 
-	   & ((IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num) 
-	      == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__warp_num)));
-    vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_mem_result[1U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data
-	[1U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_mem_result[0U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data
-	[0U];
-    vlTOPp->Vortex__DOT__m_w_valid[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_valid
-	[1U];
-    vlTOPp->Vortex__DOT__m_w_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_valid
-	[0U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[0x1fU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs
-	[0x1fU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[0x1eU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs
-	[0x1eU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[0x1dU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs
-	[0x1dU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[0x1cU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs
-	[0x1cU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[0x1bU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs
-	[0x1bU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[0x1aU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs
-	[0x1aU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[0x19U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs
-	[0x19U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[0x18U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs
-	[0x18U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[0x17U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs
-	[0x17U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[0x16U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs
-	[0x16U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[0x15U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs
-	[0x15U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[0x14U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs
-	[0x14U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[0x13U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs
-	[0x13U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[0x12U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs
-	[0x12U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[0x11U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs
-	[0x11U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[0x10U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs
-	[0x10U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[0xfU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs
-	[0xfU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[0xeU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs
-	[0xeU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[0xdU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs
-	[0xdU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[0xcU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs
-	[0xcU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[0xbU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs
-	[0xbU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[0xaU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs
-	[0xaU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[9U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs
-	[9U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[8U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs
-	[8U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[7U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs
-	[7U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[6U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs
-	[6U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[5U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs
-	[5U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[4U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs
-	[4U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[3U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs
-	[3U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[2U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs
-	[2U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[1U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs
-	[1U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[0U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs
-	[0U];
-    vlTOPp->Vortex__DOT__f_d_valid[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_f_d_reg__out_valid
-	[1U];
-    vlTOPp->Vortex__DOT__f_d_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_f_d_reg__out_valid
-	[0U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0x1fU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs
-	[0x1fU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0x1eU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs
-	[0x1eU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0x1dU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs
-	[0x1dU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0x1cU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs
-	[0x1cU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0x1bU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs
-	[0x1bU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0x1aU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs
-	[0x1aU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0x19U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs
-	[0x19U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0x18U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs
-	[0x18U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0x17U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs
-	[0x17U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0x16U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs
-	[0x16U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0x15U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs
-	[0x15U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0x14U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs
-	[0x14U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0x13U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs
-	[0x13U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0x12U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs
-	[0x12U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0x11U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs
-	[0x11U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0x10U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs
-	[0x10U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0xfU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs
-	[0xfU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0xeU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs
-	[0xeU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0xdU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs
-	[0xdU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0xcU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs
-	[0xcU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0xbU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs
-	[0xbU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0xaU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs
-	[0xaU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[9U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs
-	[9U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[8U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs
-	[8U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[7U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs
-	[7U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[6U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs
-	[6U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[5U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs
-	[5U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[4U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs
-	[4U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[3U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs
-	[3U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[2U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs
-	[2U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[1U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs
-	[1U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs
-	[0U];
-    vlTOPp->Vortex__DOT__m_w_alu_result[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_alu_result
-	[1U];
-    vlTOPp->Vortex__DOT__m_w_alu_result[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_alu_result
-	[0U];
-    vlTOPp->Vortex__DOT__m_w_mem_result[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_mem_result
-	[1U];
-    vlTOPp->Vortex__DOT__m_w_mem_result[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_mem_result
-	[0U];
-    // ALWAYS at VX_decode.v:404
-    vlTOPp->Vortex__DOT__decode_itype_immed = ((0x40U 
-						& vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-					        ? (
-						   (0x20U 
-						    & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-						    ? 
-						   ((0x10U 
-						     & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-						     ? 0xdeadbeefU
-						     : 
-						    ((8U 
-						      & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-						      ? 0xdeadbeefU
-						      : 
-						     ((4U 
-						       & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-						       ? 0xdeadbeefU
-						       : 
-						      ((2U 
-							& vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-						        ? 
-						       ((1U 
-							 & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-							 ? 
-							((0xfffff000U 
-							  & (VL_NEGATE_I((IData)(
-										(1U 
-										& (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-										>> 0x1fU)))) 
-							     << 0xcU)) 
-							 | ((0x800U 
-							     & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-								>> 0x14U)) 
-							    | ((0x400U 
-								& (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-								   << 3U)) 
-							       | ((0x3f0U 
-								   & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-								      >> 0x15U)) 
-								  | (0xfU 
-								     & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-									>> 8U))))))
-							 : 0xdeadbeefU)
-						        : 0xdeadbeefU))))
-						    : 0xdeadbeefU)
-					        : (
-						   (0x20U 
-						    & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-						    ? 
-						   ((0x10U 
-						     & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-						     ? 0xdeadbeefU
-						     : 
-						    ((8U 
-						      & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-						      ? 0xdeadbeefU
-						      : 
-						     ((4U 
-						       & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-						       ? 0xdeadbeefU
-						       : 
-						      ((2U 
-							& vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-						        ? 
-						       ((1U 
-							 & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-							 ? 
-							((0xfffff000U 
-							  & (VL_NEGATE_I((IData)(
-										(1U 
-										& (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-										>> 0x1fU)))) 
-							     << 0xcU)) 
-							 | ((0xfe0U 
-							     & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-								>> 0x14U)) 
-							    | (0x1fU 
-							       & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-								  >> 7U))))
-							 : 0xdeadbeefU)
-						        : 0xdeadbeefU))))
-						    : 
-						   ((0x10U 
-						     & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-						     ? 
-						    ((8U 
-						      & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-						      ? 0xdeadbeefU
-						      : 
-						     ((4U 
-						       & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-						       ? 0xdeadbeefU
-						       : 
-						      ((2U 
-							& vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-						        ? 
-						       ((1U 
-							 & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-							 ? 
-							((0xfffff000U 
-							  & (VL_NEGATE_I((IData)(
-										(1U 
-										& ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__alu_tempp) 
-										>> 0xbU)))) 
-							     << 0xcU)) 
-							 | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__alu_tempp))
-							 : 0xdeadbeefU)
-						        : 0xdeadbeefU)))
-						     : 
-						    ((8U 
-						      & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-						      ? 0xdeadbeefU
-						      : 
-						     ((4U 
-						       & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-						       ? 0xdeadbeefU
-						       : 
-						      ((2U 
-							& vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-						        ? 
-						       ((1U 
-							 & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-							 ? 
-							((0xfffff000U 
-							  & (VL_NEGATE_I((IData)(
-										(1U 
-										& (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-										>> 0x1fU)))) 
-							     << 0xcU)) 
-							 | (0xfffU 
-							    & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-							       >> 0x14U)))
-							 : 0xdeadbeefU)
-						        : 0xdeadbeefU))))));
-    vlTOPp->Vortex__DOT__decode_clone_stall = ((((0U 
-						  == (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__state_stall)) 
-						 | (1U 
-						    != (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__state_stall))) 
-						& (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone)) 
-					       | ((((0U 
-						     == (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_state_stall)) 
-						    | (1U 
-						       != (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_state_stall))) 
-						   & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone)) 
-						  | (((0U 
-						       == (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__wspawn_state_stall)) 
-						      & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_wspawn)) 
-						     | (1U 
-							< (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__wspawn_state_stall)))));
-    // ALWAYS at VX_decode.v:348
-    if ((0x40U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) {
-	if ((0x20U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) {
-	    if ((0x10U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) {
-		vlTOPp->Vortex__DOT__decode_jal_offset 
-		    = ((8U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-		        ? 0xdeadbeefU : ((4U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-					  ? 0xdeadbeefU
-					  : ((2U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-					      ? ((1U 
-						  & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-						  ? 
-						 (((0U 
-						    == 
-						    (7U 
-						     & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-							>> 0xcU))) 
-						   & (2U 
-						      > 
-						      (0xfffU 
-						       & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-							  >> 0x14U))))
-						   ? 0xb0000000U
-						   : 0xdeadbeefU)
-						  : 0xdeadbeefU)
-					      : 0xdeadbeefU)));
-	    } else {
-		if ((8U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) {
-		    if ((4U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) {
-			vlTOPp->Vortex__DOT__decode_jal_offset 
-			    = ((2U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-			        ? ((1U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-				    ? ((0xffe00000U 
-					& (VL_NEGATE_I((IData)(
-							       (1U 
-								& (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-								   >> 0x1fU)))) 
-					   << 0x15U)) 
-				       | ((0x100000U 
-					   & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-					      >> 0xbU)) 
-					  | ((0xff000U 
-					      & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) 
-					     | ((0x800U 
-						 & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-						    >> 9U)) 
-						| (0x7feU 
-						   & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-						      >> 0x14U))))))
-				    : 0xdeadbeefU) : 0xdeadbeefU);
-		    } else {
-			if ((2U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) {
-			    if ((1U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) {
-				if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jalrs) 
-				     | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jmprt))) {
-				    vlTOPp->Vortex__DOT__decode_jal_offset = 0U;
-				}
-			    } else {
-				vlTOPp->Vortex__DOT__decode_jal_offset = 0xdeadbeefU;
-			    }
-			} else {
-			    vlTOPp->Vortex__DOT__decode_jal_offset = 0xdeadbeefU;
-			}
-		    }
-		} else {
-		    vlTOPp->Vortex__DOT__decode_jal_offset 
-			= ((4U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-			    ? ((2U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-			        ? ((1U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-				    ? ((0xfffff000U 
-					& (VL_NEGATE_I((IData)(
-							       (1U 
-								& (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-								   >> 0x1fU)))) 
-					   << 0xcU)) 
-				       | (0xfffU & 
-					  (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-					   >> 0x14U)))
-				    : 0xdeadbeefU) : 0xdeadbeefU)
-			    : 0xdeadbeefU);
-		}
-	    }
-	} else {
-	    vlTOPp->Vortex__DOT__decode_jal_offset = 0xdeadbeefU;
-	}
-    } else {
-	vlTOPp->Vortex__DOT__decode_jal_offset = 0xdeadbeefU;
-    }
-    // ALWAYS at VX_decode.v:415
-    if ((0x40U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) {
-	if ((0x20U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) {
-	    if ((0x10U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) {
-		vlTOPp->Vortex__DOT__decode_branch_type = 0U;
-	    } else {
-		if ((8U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) {
-		    if ((4U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) {
-			vlTOPp->Vortex__DOT__decode_branch_type = 0U;
-		    } else {
-			if ((2U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) {
-			    if ((1U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) {
-				if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jalrs) 
-				     | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jmprt))) {
-				    vlTOPp->Vortex__DOT__decode_branch_type = 0U;
-				}
-			    } else {
-				vlTOPp->Vortex__DOT__decode_branch_type = 0U;
-			    }
-			} else {
-			    vlTOPp->Vortex__DOT__decode_branch_type = 0U;
-			}
-		    }
-		} else {
-		    vlTOPp->Vortex__DOT__decode_branch_type 
-			= ((4U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-			    ? 0U : ((2U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-				     ? ((1U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-					 ? ((0x4000U 
-					     & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-					     ? ((0x2000U 
-						 & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-						 ? 
-						((0x1000U 
-						  & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-						  ? 6U
-						  : 5U)
-						 : 
-						((0x1000U 
-						  & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-						  ? 4U
-						  : 3U))
-					     : ((0x2000U 
-						 & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-						 ? 0U
-						 : 
-						((0x1000U 
-						  & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-						  ? 2U
-						  : 1U)))
-					 : 0U) : 0U));
-		}
-	    }
-	} else {
-	    vlTOPp->Vortex__DOT__decode_branch_type = 0U;
-	}
-    } else {
-	vlTOPp->Vortex__DOT__decode_branch_type = 0U;
-    }
-    vlTOPp->Vortex__DOT__decode_change_mask = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jalrs) 
-					       | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jmprt));
-    vlTOPp->Vortex__DOT__e_m_b_reg_data[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_b_reg_data
-	[1U];
-    vlTOPp->Vortex__DOT__e_m_b_reg_data[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_b_reg_data
-	[0U];
-    vlTOPp->Vortex__DOT__e_m_valid[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_valid
-	[1U];
-    vlTOPp->Vortex__DOT__e_m_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_valid
-	[0U];
-    vlTOPp->Vortex__DOT__e_m_alu_result[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_alu_result
-	[1U];
-    vlTOPp->Vortex__DOT__e_m_alu_result[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_alu_result
-	[0U];
-    vlTOPp->Vortex__DOT__d_e_valid[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_valid
-	[1U];
-    vlTOPp->Vortex__DOT__d_e_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_valid
-	[0U];
-    vlTOPp->Vortex__DOT__d_e_a_reg_data[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data
-	[1U];
-    vlTOPp->Vortex__DOT__d_e_a_reg_data[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data
-	[0U];
-    vlTOPp->Vortex__DOT__d_e_b_reg_data[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_b_reg_data
-	[1U];
-    vlTOPp->Vortex__DOT__d_e_b_reg_data[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_b_reg_data
-	[0U];
-    vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd 
-	= ((((((0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-			 >> 0xfU)) == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__rd)) 
-	      & (0U != (0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-				 >> 0xfU)))) & (0U 
-						!= (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb))) 
-	    & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd))) 
-	   & ((IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num) 
-	      == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__warp_num)));
-    vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd 
-	= ((((((0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-			 >> 0x14U)) == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__rd)) 
-	      & (0U != (0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-				 >> 0x14U)))) & (0U 
-						 != (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb))) 
-	    & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd))) 
-	   & ((IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num) 
-	      == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__warp_num)));
-    vlTOPp->Vortex__DOT__memory_mem_result[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_mem_result
-	[1U];
-    vlTOPp->Vortex__DOT__memory_mem_result[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_mem_result
-	[0U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid[1U] 
-	= vlTOPp->Vortex__DOT__m_w_valid[1U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid[0U] 
-	= vlTOPp->Vortex__DOT__m_w_valid[0U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1fU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters
-	[0x1fU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1eU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters
-	[0x1eU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1dU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters
-	[0x1dU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1cU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters
-	[0x1cU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1bU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters
-	[0x1bU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1aU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters
-	[0x1aU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x19U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters
-	[0x19U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x18U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters
-	[0x18U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x17U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters
-	[0x17U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x16U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters
-	[0x16U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x15U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters
-	[0x15U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x14U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters
-	[0x14U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x13U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters
-	[0x13U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x12U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters
-	[0x12U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x11U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters
-	[0x11U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x10U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters
-	[0x10U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xfU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters
-	[0xfU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xeU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters
-	[0xeU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xdU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters
-	[0xdU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xcU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters
-	[0xcU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xbU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters
-	[0xbU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xaU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters
-	[0xaU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[9U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters
-	[9U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[8U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters
-	[8U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[7U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters
-	[7U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[6U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters
-	[6U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[5U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters
-	[5U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[4U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters
-	[4U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[3U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters
-	[3U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[2U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters
-	[2U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[1U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters
-	[1U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters
-	[0U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid[1U] 
-	= vlTOPp->Vortex__DOT__f_d_valid[1U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid[0U] 
-	= vlTOPp->Vortex__DOT__f_d_valid[0U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1fU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0x1fU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1eU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0x1eU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1dU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0x1dU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1cU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0x1cU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1bU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0x1bU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1aU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0x1aU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x19U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0x19U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x18U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0x18U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x17U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0x17U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x16U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0x16U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x15U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0x15U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x14U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0x14U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x13U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0x13U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x12U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0x12U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x11U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0x11U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x10U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0x10U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xfU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0xfU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xeU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0xeU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xdU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0xdU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xcU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0xcU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xbU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0xbU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xaU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0xaU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[9U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[9U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[8U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[8U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[7U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[7U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[6U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[6U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[5U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[5U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[4U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[4U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[3U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[3U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[2U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[2U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[1U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[1U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0x1fU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0x1fU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0x1eU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0x1eU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0x1dU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0x1dU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0x1cU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0x1cU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0x1bU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0x1bU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0x1aU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0x1aU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0x19U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0x19U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0x18U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0x18U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0x17U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0x17U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0x16U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0x16U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0x15U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0x15U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0x14U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0x14U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0x13U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0x13U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0x12U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0x12U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0x11U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0x11U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0x10U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0x10U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0xfU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0xfU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0xeU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0xeU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0xdU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0xdU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0xcU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0xcU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0xbU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0xbU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0xaU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0xaU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[9U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[9U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[8U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[8U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[7U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[7U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[6U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[6U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[5U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[5U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[4U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[4U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[3U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[3U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[2U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[2U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[1U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[1U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_alu_result[1U] 
-	= vlTOPp->Vortex__DOT__m_w_alu_result[1U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_alu_result[0U] 
-	= vlTOPp->Vortex__DOT__m_w_alu_result[0U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result[1U] 
-	= vlTOPp->Vortex__DOT__m_w_alu_result[1U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result[0U] 
-	= vlTOPp->Vortex__DOT__m_w_alu_result[0U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_mem_result[1U] 
-	= vlTOPp->Vortex__DOT__m_w_mem_result[1U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_mem_result[0U] 
-	= vlTOPp->Vortex__DOT__m_w_mem_result[0U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data[1U] 
-	= vlTOPp->Vortex__DOT__m_w_mem_result[1U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data[0U] 
-	= vlTOPp->Vortex__DOT__m_w_mem_result[0U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__temp_final_alu 
-	= ((0x63U == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction))
-	    ? ((5U > (IData)(vlTOPp->Vortex__DOT__decode_branch_type))
-	        ? 1U : 0xaU) : ((0x37U == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction))
-				 ? 0xbU : ((0x17U == 
-					    (0x7fU 
-					     & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction))
-					    ? 0xcU : 
-					   ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_csr)
-					     ? ((1U 
-						 == 
-						 (3U 
-						  & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-						     >> 0xcU)))
-						 ? 0xdU
-						 : 
-						((2U 
-						  == 
-						  (3U 
-						   & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-						      >> 0xcU)))
-						  ? 0xeU
-						  : 0xfU))
-					     : (((0x23U 
-						  == 
-						  (0x7fU 
-						   & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) 
-						 | (3U 
-						    == 
-						    (0x7fU 
-						     & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)))
-						 ? 0U
-						 : 
-						((0x4000U 
-						  & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-						  ? 
-						 ((0x2000U 
-						   & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-						   ? 
-						  ((0x1000U 
-						    & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-						    ? 9U
-						    : 8U)
-						   : 
-						  ((0x1000U 
-						    & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-						    ? 
-						   ((0U 
-						     == 
-						     (0x7fU 
-						      & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-							 >> 0x19U)))
-						     ? 6U
-						     : 7U)
-						    : 5U))
-						  : 
-						 ((0x2000U 
-						   & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-						   ? 
-						  ((0x1000U 
-						    & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-						    ? 4U
-						    : 3U)
-						   : 
-						  ((0x1000U 
-						    & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-						    ? 2U
-						    : 
-						   ((0x13U 
-						     == 
-						     (0x7fU 
-						      & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction))
-						     ? 0U
-						     : 
-						    ((0U 
-						      == 
-						      (0x7fU 
-						       & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-							  >> 0x19U)))
-						      ? 0U
-						      : 1U))))))))));
-    vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_zero_change_mask 
-	= ((IData)(vlTOPp->Vortex__DOT__decode_change_mask) 
-	   & (0U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num)));
-    vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_one_change_mask 
-	= ((IData)(vlTOPp->Vortex__DOT__decode_change_mask) 
-	   & (1U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num)));
-    vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_rd2[1U] 
-	= vlTOPp->Vortex__DOT__e_m_b_reg_data[1U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_rd2[0U] 
-	= vlTOPp->Vortex__DOT__e_m_b_reg_data[0U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid[1U] 
-	= vlTOPp->Vortex__DOT__e_m_valid[1U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid[0U] 
-	= vlTOPp->Vortex__DOT__e_m_valid[0U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result[1U] 
-	= vlTOPp->Vortex__DOT__e_m_alu_result[1U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result[0U] 
-	= vlTOPp->Vortex__DOT__e_m_alu_result[0U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_valid[1U] 
-	= vlTOPp->Vortex__DOT__d_e_valid[1U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_valid[0U] 
-	= vlTOPp->Vortex__DOT__d_e_valid[0U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data[1U] 
-	= vlTOPp->Vortex__DOT__d_e_a_reg_data[1U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data[0U] 
-	= vlTOPp->Vortex__DOT__d_e_a_reg_data[0U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data[1U] 
-	= vlTOPp->Vortex__DOT__d_e_b_reg_data[1U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data[0U] 
-	= vlTOPp->Vortex__DOT__d_e_b_reg_data[0U];
-    vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd 
-	= (((((((0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-			  >> 0xfU)) == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd)) 
-	       & (0U != (0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-				  >> 0xfU)))) & (0U 
-						 != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb))) 
-	     & ((IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__warp_num) 
-		== (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num))) 
-	    & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd))) 
-	   & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd)));
-    vlTOPp->Vortex__DOT__forwarding_fwd_stall = ((((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd) 
-						   | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd)) 
-						  & (2U 
-						     == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb))) 
-						 | (((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd) 
-						     | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd)) 
-						    & (2U 
-						       == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb))));
-    vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd 
-	= (((((((0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-			  >> 0x14U)) == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd)) 
-	       & (0U != (0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-				  >> 0x14U)))) & (0U 
-						  != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb))) 
-	     & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd))) 
-	    & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd))) 
-	   & ((IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__warp_num) 
-	      == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num)));
-    vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_mem_result[1U] 
-	= vlTOPp->Vortex__DOT__memory_mem_result[1U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_mem_result[0U] 
-	= vlTOPp->Vortex__DOT__memory_mem_result[0U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data[1U] 
-	= vlTOPp->Vortex__DOT__memory_mem_result[1U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data[0U] 
-	= vlTOPp->Vortex__DOT__memory_mem_result[0U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_valid[1U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid
-	[1U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_valid[0U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid
-	[0U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_valid[1U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid
-	[1U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_valid[0U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid
-	[0U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_valid[1U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid
-	[1U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_valid[0U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid
-	[0U];
-    // ALWAYS at VX_decode.v:348
-    if ((0x40U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) {
-	if ((0x20U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) {
-	    if ((0x10U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) {
-		vlTOPp->Vortex__DOT__decode_jal = (
-						   (~ 
-						    (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-						     >> 3U)) 
-						   & ((~ 
-						       (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-							>> 2U)) 
-						      & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-							  >> 1U) 
-							 & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-							    & ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__jal_sys_jal) 
-							       & vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid
-							       [0U])))));
-	    } else {
-		if ((8U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) {
-		    if ((4U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) {
-			vlTOPp->Vortex__DOT__decode_jal 
-			    = ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-				>> 1U) & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-					  & vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid
-					  [0U]));
-		    } else {
-			if ((2U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) {
-			    if ((1U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) {
-				if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jalrs) 
-				     | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jmprt))) {
-				    vlTOPp->Vortex__DOT__decode_jal 
-					= vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid
-					[0U];
-				}
-			    } else {
-				vlTOPp->Vortex__DOT__decode_jal = 0U;
-			    }
-			} else {
-			    vlTOPp->Vortex__DOT__decode_jal = 0U;
-			}
-		    }
-		} else {
-		    vlTOPp->Vortex__DOT__decode_jal 
-			= ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-			    >> 2U) & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-				       >> 1U) & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-						 & vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid
-						 [0U])));
-		}
-	    }
-	} else {
-	    vlTOPp->Vortex__DOT__decode_jal = 0U;
-	}
-    } else {
-	vlTOPp->Vortex__DOT__decode_jal = 0U;
-    }
-    vlTOPp->Vortex__DOT__vx_decode__DOT__is_ebreak 
-	= ((0x73U == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) 
-	   & ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__jal_sys_jal) 
-	      & vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid
-	      [0U]));
-    // ALWAYS at VX_decode.v:415
-    if ((0x40U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) {
-	if ((0x20U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) {
-	    if ((0x10U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) {
-		vlTOPp->Vortex__DOT__decode_branch_stall = 0U;
-	    } else {
-		if ((8U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) {
-		    if ((4U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) {
-			vlTOPp->Vortex__DOT__decode_branch_stall 
-			    = ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-				>> 1U) & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-					  & vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid
-					  [0U]));
-		    } else {
-			if ((2U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) {
-			    if ((1U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) {
-				if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jalrs) 
-				     | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jmprt))) {
-				    vlTOPp->Vortex__DOT__decode_branch_stall 
-					= vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid
-					[0U];
-				}
-			    } else {
-				vlTOPp->Vortex__DOT__decode_branch_stall = 0U;
-			    }
-			} else {
-			    vlTOPp->Vortex__DOT__decode_branch_stall = 0U;
-			}
-		    }
-		} else {
-		    vlTOPp->Vortex__DOT__decode_branch_stall 
-			= ((4U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-			    ? ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-				>> 1U) & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-					  & vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid
-					  [0U])) : 
-			   ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-			     >> 1U) & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-				       & vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid
-				       [0U])));
-		}
-	    }
-	} else {
-	    vlTOPp->Vortex__DOT__decode_branch_stall = 0U;
-	}
-    } else {
-	vlTOPp->Vortex__DOT__decode_branch_stall = 0U;
-    }
-    vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0x1fU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers
-	[0x1fU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0x1eU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers
-	[0x1eU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0x1dU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers
-	[0x1dU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0x1cU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers
-	[0x1cU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0x1bU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers
-	[0x1bU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0x1aU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers
-	[0x1aU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0x19U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers
-	[0x19U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0x18U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers
-	[0x18U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0x17U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers
-	[0x17U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0x16U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers
-	[0x16U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0x15U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers
-	[0x15U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0x14U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers
-	[0x14U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0x13U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers
-	[0x13U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0x12U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers
-	[0x12U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0x11U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers
-	[0x11U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0x10U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers
-	[0x10U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0xfU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers
-	[0xfU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0xeU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers
-	[0xeU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0xdU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers
-	[0xdU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0xcU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers
-	[0xcU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0xbU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers
-	[0xbU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0xaU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers
-	[0xaU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[9U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers
-	[9U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[8U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers
-	[8U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[7U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers
-	[7U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[6U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers
-	[6U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[5U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers
-	[5U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[4U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers
-	[4U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[3U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers
-	[3U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[2U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers
-	[2U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[1U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers
-	[1U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers
-	[0U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_writeback__out_write_data[1U] 
-	= ((3U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb))
-	    ? vlTOPp->Vortex__DOT__vx_writeback__DOT__out_pc_data
-	   [1U] : ((1U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb))
-		    ? vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_alu_result
-		   [1U] : vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_mem_result
-		   [1U]));
-    vlTOPp->Vortex__DOT____Vcellout__vx_writeback__out_write_data[0U] 
-	= ((3U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb))
-	    ? vlTOPp->Vortex__DOT__vx_writeback__DOT__out_pc_data
-	   [0U] : ((1U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb))
-		    ? vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_alu_result
-		   [0U] : vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_mem_result
-		   [0U]));
-    vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data[1U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_rd2
-	[1U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data[0U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_rd2
-	[0U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid[1U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid
-	[1U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid[0U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid
-	[0U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_valid[1U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid
-	[1U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_valid[0U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid
-	[0U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address[1U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result
-	[1U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address[0U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result
-	[0U];
-    // ALWAYS at VX_memory.v:113
-    vlTOPp->Vortex__DOT__memory_branch_dir = (1U & 
-					      ((4U 
-						& (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type))
-					        ? (
-						   (2U 
-						    & (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type))
-						    ? 
-						   ((~ (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type)) 
-						    & (~ 
-						       (vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result
-							[0U] 
-							>> 0x1fU)))
-						    : 
-						   ((1U 
-						     & (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type))
-						     ? 
-						    (vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result
-						     [0U] 
-						     >> 0x1fU)
-						     : 
-						    (~ 
-						     (vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result
-						      [0U] 
-						      >> 0x1fU))))
-					        : (
-						   (2U 
-						    & (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type))
-						    ? 
-						   ((1U 
-						     & (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type))
-						     ? 
-						    (vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result
-						     [0U] 
-						     >> 0x1fU)
-						     : 
-						    (0U 
-						     != 
-						     vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result
-						     [0U]))
-						    : 
-						   ((IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type) 
-						    & (0U 
-						       == 
-						       vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result
-						       [0U])))));
-    vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_alu_result[1U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result
-	[1U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_alu_result[0U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result
-	[0U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_valid[1U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_valid
-	[1U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_valid[0U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_valid
-	[0U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data[1U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data
-	[1U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data[0U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data
-	[0U];
-    vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2 
-	= ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rs2_src)
-	    ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__itype_immed
-	    : vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data
-	   [0U]);
-    vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2 
-	= ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rs2_src)
-	    ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__itype_immed
-	    : vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data
-	   [1U]);
-    vlTOPp->Vortex__DOT__forwarding_src1_fwd = (((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd) 
-						 | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd)) 
-						| (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd));
-    vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling 
-	= (((IData)(vlTOPp->Vortex__DOT__forwarding_fwd_stall) 
-	    | (IData)(vlTOPp->Vortex__DOT__execute_branch_stall)) 
-	   | (IData)(vlTOPp->Vortex__DOT__decode_clone_stall));
-    vlTOPp->Vortex__DOT__forwarding_src2_fwd = (((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd) 
-						 | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd)) 
-						| (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd));
-    vlTOPp->Vortex__DOT__decode_valid[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_valid
-	[1U];
-    vlTOPp->Vortex__DOT__decode_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_valid
-	[0U];
-    vlTOPp->out_ebreak = ((0U == (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_state)) 
-			  & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_ebreak));
-    vlTOPp->Vortex__DOT__vx_fetch__DOT__add_warp = 
-	(((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_wspawn) 
-	  & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_ebreak))) 
-	 & (~ (IData)(vlTOPp->Vortex__DOT__decode_clone_stall)));
-    vlTOPp->Vortex__DOT__vx_fetch__DOT__remove_warp 
-	= (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_ebreak) 
-	    & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_wspawn))) 
-	   & (~ (IData)(vlTOPp->Vortex__DOT__decode_clone_stall)));
-    vlTOPp->Vortex__DOT__vx_fetch__DOT__stall = ((((IData)(vlTOPp->Vortex__DOT__decode_clone_stall) 
-						   | (IData)(vlTOPp->Vortex__DOT__decode_branch_stall)) 
-						  | (IData)(vlTOPp->Vortex__DOT__forwarding_fwd_stall)) 
-						 | (IData)(vlTOPp->Vortex__DOT__execute_branch_stall));
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[0x1fU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers
-	[0x1fU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[0x1eU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers
-	[0x1eU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[0x1dU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers
-	[0x1dU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[0x1cU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers
-	[0x1cU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[0x1bU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers
-	[0x1bU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[0x1aU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers
-	[0x1aU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[0x19U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers
-	[0x19U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[0x18U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers
-	[0x18U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[0x17U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers
-	[0x17U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[0x16U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers
-	[0x16U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[0x15U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers
-	[0x15U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[0x14U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers
-	[0x14U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[0x13U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers
-	[0x13U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[0x12U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers
-	[0x12U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[0x11U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers
-	[0x11U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[0x10U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers
-	[0x10U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[0xfU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers
-	[0xfU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[0xeU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers
-	[0xeU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[0xdU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers
-	[0xdU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[0xcU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers
-	[0xcU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[0xbU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers
-	[0xbU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[0xaU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers
-	[0xaU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[9U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers
-	[9U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[8U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers
-	[8U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[7U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers
-	[7U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[6U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers
-	[6U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[5U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers
-	[5U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[4U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers
-	[4U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[3U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers
-	[3U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[2U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers
-	[2U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[1U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers
-	[1U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[0U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers
-	[0U];
-    vlTOPp->Vortex__DOT__writeback_write_data[1U] = 
-	vlTOPp->Vortex__DOT____Vcellout__vx_writeback__out_write_data
-	[1U];
-    vlTOPp->Vortex__DOT__writeback_write_data[0U] = 
-	vlTOPp->Vortex__DOT____Vcellout__vx_writeback__out_write_data
-	[0U];
-    vlTOPp->out_cache_driver_in_data[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data
-	[1U];
-    vlTOPp->out_cache_driver_in_data[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data
-	[0U];
-    vlTOPp->out_cache_driver_in_valid[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid
-	[1U];
-    vlTOPp->out_cache_driver_in_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid
-	[0U];
-    vlTOPp->Vortex__DOT__memory_valid[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_valid
-	[1U];
-    vlTOPp->Vortex__DOT__memory_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_valid
-	[0U];
-    vlTOPp->out_cache_driver_in_address[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address
-	[1U];
-    vlTOPp->out_cache_driver_in_address[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address
-	[0U];
-    // ALWAYS at VX_warp.v:50
-    vlTOPp->Vortex__DOT__vx_fetch__DOT__VX_Warp_zero__DOT__temp_PC 
-	= (((IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal) 
-	    & (0U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__warp_num)))
-	    ? vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal_dest
-	    : (((IData)(vlTOPp->Vortex__DOT__memory_branch_dir) 
-		& (0U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__warp_num)))
-	        ? vlTOPp->Vortex__DOT__memory_branch_dest
-	        : vlTOPp->Vortex__DOT__vx_fetch__DOT__VX_Warp_zero__DOT__real_PC));
-    // ALWAYS at VX_warp.v:50
-    vlTOPp->Vortex__DOT__vx_fetch__DOT__VX_Warp_one__DOT__temp_PC 
-	= (((IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal) 
-	    & (1U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__warp_num)))
-	    ? vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal_dest
-	    : (((IData)(vlTOPp->Vortex__DOT__memory_branch_dir) 
-		& (1U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__warp_num)))
-	        ? vlTOPp->Vortex__DOT__memory_branch_dest
-	        : vlTOPp->Vortex__DOT__vx_fetch__DOT__VX_Warp_one__DOT__real_PC));
-    vlTOPp->Vortex__DOT__memory_alu_result[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_alu_result
-	[1U];
-    vlTOPp->Vortex__DOT__memory_alu_result[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_alu_result
-	[0U];
-    vlTOPp->Vortex__DOT__execute_valid[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_valid
-	[1U];
-    vlTOPp->Vortex__DOT__execute_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_valid
-	[0U];
-    vlTOPp->Vortex__DOT__execute_b_reg_data[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data
-	[1U];
-    vlTOPp->Vortex__DOT__execute_b_reg_data[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data
-	[0U];
-    vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__mult_signed_result 
-	= VL_MULS_QQQ(64,64,64, VL_EXTENDS_QI(64,32, 
-					      vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-					      [0U]), 
-		      VL_EXTENDS_QI(64,32, vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2));
-    vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__mult_signed_result 
-	= VL_MULS_QQQ(64,64,64, VL_EXTENDS_QI(64,32, 
-					      vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-					      [1U]), 
-		      VL_EXTENDS_QI(64,32, vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2));
-    vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_valid[1U] 
-	= vlTOPp->Vortex__DOT__decode_valid[1U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_valid[0U] 
-	= vlTOPp->Vortex__DOT__decode_valid[0U];
-    vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_zero_stall 
-	= ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__stall) 
-	   | (1U == (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num)));
-    vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_one_stall 
-	= ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__stall) 
-	   | (0U == (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num)));
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[0x1fU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs
-	[0x1fU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[0x1eU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs
-	[0x1eU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[0x1dU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs
-	[0x1dU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[0x1cU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs
-	[0x1cU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[0x1bU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs
-	[0x1bU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[0x1aU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs
-	[0x1aU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[0x19U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs
-	[0x19U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[0x18U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs
-	[0x18U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[0x17U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs
-	[0x17U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[0x16U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs
-	[0x16U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[0x15U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs
-	[0x15U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[0x14U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs
-	[0x14U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[0x13U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs
-	[0x13U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[0x12U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs
-	[0x12U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[0x11U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs
-	[0x11U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[0x10U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs
-	[0x10U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[0xfU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs
-	[0xfU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[0xeU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs
-	[0xeU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[0xdU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs
-	[0xdU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[0xcU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs
-	[0xcU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[0xbU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs
-	[0xbU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[0xaU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs
-	[0xaU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[9U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs
-	[9U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[8U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs
-	[8U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[7U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs
-	[7U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[6U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs
-	[6U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[5U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs
-	[5U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[4U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs
-	[4U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[3U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs
-	[3U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[2U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs
-	[2U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[1U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs
-	[1U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[0U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs
-	[0U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data[1U] 
-	= vlTOPp->Vortex__DOT__writeback_write_data
-	[1U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data[0U] 
-	= vlTOPp->Vortex__DOT__writeback_write_data
-	[0U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_valid[1U] 
-	= vlTOPp->Vortex__DOT__memory_valid[1U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_valid[0U] 
-	= vlTOPp->Vortex__DOT__memory_valid[0U];
-    vlTOPp->Vortex__DOT__vx_fetch__DOT__out_PC = ((0U 
-						   == (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num))
-						   ? vlTOPp->Vortex__DOT__vx_fetch__DOT__VX_Warp_zero__DOT__temp_PC
-						   : vlTOPp->Vortex__DOT__vx_fetch__DOT__VX_Warp_one__DOT__temp_PC);
-    vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_alu_result[1U] 
-	= vlTOPp->Vortex__DOT__memory_alu_result[1U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_alu_result[0U] 
-	= vlTOPp->Vortex__DOT__memory_alu_result[0U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result[1U] 
-	= vlTOPp->Vortex__DOT__memory_alu_result[1U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result[0U] 
-	= vlTOPp->Vortex__DOT__memory_alu_result[0U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_valid[1U] 
-	= vlTOPp->Vortex__DOT__execute_valid[1U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_valid[0U] 
-	= vlTOPp->Vortex__DOT__execute_valid[0U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_b_reg_data[1U] 
-	= vlTOPp->Vortex__DOT__execute_b_reg_data[1U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_b_reg_data[0U] 
-	= vlTOPp->Vortex__DOT__execute_b_reg_data[0U];
-    // ALWAYS at VX_alu.v:48
-    vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__0__KET____DOT__vx_alu__out_alu_result 
-	= ((0x10U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-	    ? ((8U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-	        ? 0U : ((4U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-			 ? ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-			     ? ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-				 ? ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)
-				     ? vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-				    [0U] : VL_MODDIV_III(32, 
-							 vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-							 [0U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))
-				 : ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)
-				     ? vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-				    [0U] : VL_MODDIVS_III(32, 
-							  vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-							  [0U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)))
-			     : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-				 ? ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)
-				     ? 0xffffffffU : 
-				    VL_DIV_III(32, 
-					       vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-					       [0U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))
-				 : ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)
-				     ? 0xffffffffU : 
-				    VL_DIVS_III(32, 
-						vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-						[0U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))))
-			 : ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-			     ? ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-				 ? (IData)((((QData)((IData)(
-							     vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-							     [0U])) 
-					     * (QData)((IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))) 
-					    >> 0x20U))
-				 : (IData)((((((QData)((IData)(
-							       VL_NEGATE_I((IData)(
-										(1U 
-										& (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-										[0U] 
-										>> 0x1fU)))))) 
-					       << 0x20U) 
-					      | (QData)((IData)(
-								vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-								[0U]))) 
-					     * (QData)((IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))) 
-					    >> 0x20U)))
-			     : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-				 ? (IData)((vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__mult_signed_result 
-					    >> 0x20U))
-				 : (IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__mult_signed_result)))))
-	    : ((8U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-	        ? ((4U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-		    ? ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-		        ? vlTOPp->Vortex__DOT__csr_decode_csr_data
-		        : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-			    ? vlTOPp->Vortex__DOT__csr_decode_csr_data
-			    : (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__curr_PC 
-			       + (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__upper_immed 
-				  << 0xcU)))) : ((2U 
-						  & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-						  ? 
-						 ((1U 
-						   & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-						   ? 
-						  (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__upper_immed 
-						   << 0xcU)
-						   : 
-						  ((vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-						    [0U] 
-						    >= vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)
-						    ? 0U
-						    : 0xffffffffU))
-						  : 
-						 ((1U 
-						   & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-						   ? 
-						  (vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2 
-						   & vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-						   [0U])
-						   : 
-						  (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-						   [0U] 
-						   | vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))))
-	        : ((4U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-		    ? ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-		        ? ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-			    ? VL_SHIFTRS_III(32,32,5, 
-					     vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-					     [0U], 
-					     (0x1fU 
-					      & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))
-			    : (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-			       [0U] >> (0x1fU & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)))
-		        : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-			    ? (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-			       [0U] ^ vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)
-			    : ((vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-				[0U] < vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)
-			        ? 1U : 0U))) : ((2U 
-						 & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-						 ? 
-						((1U 
-						  & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-						  ? 
-						 (VL_LTS_III(1,32,32, 
-							     vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-							     [0U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)
-						   ? 1U
-						   : 0U)
-						  : 
-						 (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-						  [0U] 
-						  << 
-						  (0x1fU 
-						   & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)))
-						 : 
-						((1U 
-						  & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-						  ? 
-						 (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-						  [0U] 
-						  - vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)
-						  : 
-						 (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-						  [0U] 
-						  + vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))))));
-    // ALWAYS at VX_alu.v:48
-    vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__1__KET____DOT__vx_alu__out_alu_result 
-	= ((0x10U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-	    ? ((8U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-	        ? 0U : ((4U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-			 ? ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-			     ? ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-				 ? ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)
-				     ? vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-				    [1U] : VL_MODDIV_III(32, 
-							 vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-							 [1U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2))
-				 : ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)
-				     ? vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-				    [1U] : VL_MODDIVS_III(32, 
-							  vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-							  [1U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)))
-			     : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-				 ? ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)
-				     ? 0xffffffffU : 
-				    VL_DIV_III(32, 
-					       vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-					       [1U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2))
-				 : ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)
-				     ? 0xffffffffU : 
-				    VL_DIVS_III(32, 
-						vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-						[1U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2))))
-			 : ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-			     ? ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-				 ? (IData)((((QData)((IData)(
-							     vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-							     [1U])) 
-					     * (QData)((IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2))) 
-					    >> 0x20U))
-				 : (IData)((((((QData)((IData)(
-							       VL_NEGATE_I((IData)(
-										(1U 
-										& (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-										[1U] 
-										>> 0x1fU)))))) 
-					       << 0x20U) 
-					      | (QData)((IData)(
-								vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-								[1U]))) 
-					     * (QData)((IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2))) 
-					    >> 0x20U)))
-			     : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-				 ? (IData)((vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__mult_signed_result 
-					    >> 0x20U))
-				 : (IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__mult_signed_result)))))
-	    : ((8U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-	        ? ((4U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-		    ? ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-		        ? vlTOPp->Vortex__DOT__csr_decode_csr_data
-		        : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-			    ? vlTOPp->Vortex__DOT__csr_decode_csr_data
-			    : (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__curr_PC 
-			       + (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__upper_immed 
-				  << 0xcU)))) : ((2U 
-						  & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-						  ? 
-						 ((1U 
-						   & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-						   ? 
-						  (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__upper_immed 
-						   << 0xcU)
-						   : 
-						  ((vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-						    [1U] 
-						    >= vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)
-						    ? 0U
-						    : 0xffffffffU))
-						  : 
-						 ((1U 
-						   & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-						   ? 
-						  (vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2 
-						   & vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-						   [1U])
-						   : 
-						  (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-						   [1U] 
-						   | vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2))))
-	        : ((4U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-		    ? ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-		        ? ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-			    ? VL_SHIFTRS_III(32,32,5, 
-					     vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-					     [1U], 
-					     (0x1fU 
-					      & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2))
-			    : (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-			       [1U] >> (0x1fU & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)))
-		        : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-			    ? (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-			       [1U] ^ vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)
-			    : ((vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-				[1U] < vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)
-			        ? 1U : 0U))) : ((2U 
-						 & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-						 ? 
-						((1U 
-						  & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-						  ? 
-						 (VL_LTS_III(1,32,32, 
-							     vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-							     [1U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)
-						   ? 1U
-						   : 0U)
-						  : 
-						 (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-						  [1U] 
-						  << 
-						  (0x1fU 
-						   & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)))
-						 : 
-						((1U 
-						  & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-						  ? 
-						 (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-						  [1U] 
-						  - vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)
-						  : 
-						 (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-						  [1U] 
-						  + vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2))))));
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_write_data[1U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data
-	[1U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_write_data[0U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data
-	[0U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_write_data[1U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data
-	[1U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_write_data[0U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data
-	[0U];
-    vlTOPp->curr_PC = vlTOPp->Vortex__DOT__vx_fetch__DOT__out_PC;
-    vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_alu_result[0U] 
-	= vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__0__KET____DOT__vx_alu__out_alu_result;
-    vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_alu_result[1U] 
-	= vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__1__KET____DOT__vx_alu__out_alu_result;
-    vlTOPp->Vortex__DOT__execute_alu_result[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_alu_result
-	[1U];
-    vlTOPp->Vortex__DOT__execute_alu_result[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_alu_result
-	[0U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_alu_result[1U] 
-	= vlTOPp->Vortex__DOT__execute_alu_result[1U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_alu_result[0U] 
-	= vlTOPp->Vortex__DOT__execute_alu_result[0U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result[1U] 
-	= vlTOPp->Vortex__DOT__execute_alu_result[1U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result[0U] 
-	= vlTOPp->Vortex__DOT__execute_alu_result[0U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data[1U] 
-	= ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd)
-	    ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb))
-	        ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next
-	       [1U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result
-	       [1U]) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd)
-			 ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb))
-			     ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next
-			    [1U] : ((2U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb))
-				     ? vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data
-				    [1U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result
-				    [1U])) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd)
-					       ? ((3U 
-						   == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb))
-						   ? 
-						  vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next
-						  [1U]
-						   : 
-						  ((2U 
-						    == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb))
-						    ? 
-						   vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data
-						   [1U]
-						    : 
-						   vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result
-						   [1U]))
-					       : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result
-					      [1U])));
-    vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data[0U] 
-	= ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd)
-	    ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb))
-	        ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next
-	       [0U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result
-	       [0U]) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd)
-			 ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb))
-			     ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next
-			    [0U] : ((2U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb))
-				     ? vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data
-				    [0U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result
-				    [0U])) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd)
-					       ? ((3U 
-						   == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb))
-						   ? 
-						  vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next
-						  [0U]
-						   : 
-						  ((2U 
-						    == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb))
-						    ? 
-						   vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data
-						   [0U]
-						    : 
-						   vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result
-						   [0U]))
-					       : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result
-					      [0U])));
-    vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data[1U] 
-	= ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd)
-	    ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb))
-	        ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next
-	       [1U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result
-	       [1U]) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd)
-			 ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb))
-			     ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next
-			    [1U] : ((2U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb))
-				     ? vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data
-				    [1U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result
-				    [1U])) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd)
-					       ? ((3U 
-						   == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb))
-						   ? 
-						  vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next
-						  [1U]
-						   : 
-						  ((2U 
-						    == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb))
-						    ? 
-						   vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data
-						   [1U]
-						    : 
-						   vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result
-						   [1U]))
-					       : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result
-					      [1U])));
-    vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data[0U] 
-	= ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd)
-	    ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb))
-	        ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next
-	       [0U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result
-	       [0U]) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd)
-			 ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb))
-			     ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next
-			    [0U] : ((2U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb))
-				     ? vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data
-				    [0U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result
-				    [0U])) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd)
-					       ? ((3U 
-						   == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb))
-						   ? 
-						  vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next
-						  [0U]
-						   : 
-						  ((2U 
-						    == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb))
-						    ? 
-						   vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data
-						   [0U]
-						    : 
-						   vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result
-						   [0U]))
-					       : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result
-					      [0U])));
-    vlTOPp->Vortex__DOT__forwarding_src1_fwd_data[1U] 
-	= vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data
-	[1U];
-    vlTOPp->Vortex__DOT__forwarding_src1_fwd_data[0U] 
-	= vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data
-	[0U];
-    vlTOPp->Vortex__DOT__forwarding_src2_fwd_data[1U] 
-	= vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data
-	[1U];
-    vlTOPp->Vortex__DOT__forwarding_src2_fwd_data[0U] 
-	= vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data
-	[0U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data[1U] 
-	= vlTOPp->Vortex__DOT__forwarding_src1_fwd_data
-	[1U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data[0U] 
-	= vlTOPp->Vortex__DOT__forwarding_src1_fwd_data
-	[0U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data[1U] 
-	= vlTOPp->Vortex__DOT__forwarding_src2_fwd_data
-	[1U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data[0U] 
-	= vlTOPp->Vortex__DOT__forwarding_src2_fwd_data
-	[0U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_src1_fwd_data[1U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data
-	[1U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_src1_fwd_data[0U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data
-	[0U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_src1_fwd_data[1U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data
-	[1U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_src1_fwd_data[0U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data
-	[0U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_src2_fwd_data[1U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data
-	[1U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_src2_fwd_data[0U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data
-	[0U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_src2_fwd_data[1U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data
-	[1U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_src2_fwd_data[0U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data
-	[0U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_a_reg_data[0U] 
-	= ((0x6fU == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction))
-	    ? vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__curr_PC
-	    : ((IData)(vlTOPp->Vortex__DOT__forwarding_src1_fwd)
-	        ? vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_src1_fwd_data
-	       [0U] : vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd1_register
-	       [0U]));
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_a_reg_data[1U] 
-	= ((0x6fU == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction))
-	    ? vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__curr_PC
-	    : ((IData)(vlTOPp->Vortex__DOT__forwarding_src1_fwd)
-	        ? vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_src1_fwd_data
-	       [1U] : vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd1_register
-	       [1U]));
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_one__out_a_reg_data[0U] 
-	= ((0x6fU == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction))
-	    ? vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__curr_PC
-	    : ((IData)(vlTOPp->Vortex__DOT__forwarding_src1_fwd)
-	        ? vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_src1_fwd_data
-	       [0U] : vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__rd1_register
-	       [0U]));
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_one__out_a_reg_data[1U] 
-	= ((0x6fU == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction))
-	    ? vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__curr_PC
-	    : ((IData)(vlTOPp->Vortex__DOT__forwarding_src1_fwd)
-	        ? vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_src1_fwd_data
-	       [1U] : vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__rd1_register
-	       [1U]));
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_b_reg_data[0U] 
-	= ((IData)(vlTOPp->Vortex__DOT__forwarding_src2_fwd)
-	    ? vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_src2_fwd_data
-	   [0U] : vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd2_register
-	   [0U]);
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_b_reg_data[1U] 
-	= ((IData)(vlTOPp->Vortex__DOT__forwarding_src2_fwd)
-	    ? vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_src2_fwd_data
-	   [1U] : vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd2_register
-	   [1U]);
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_one__out_b_reg_data[0U] 
-	= ((IData)(vlTOPp->Vortex__DOT__forwarding_src2_fwd)
-	    ? vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_src2_fwd_data
-	   [0U] : vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__rd2_register
-	   [0U]);
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_one__out_b_reg_data[1U] 
-	= ((IData)(vlTOPp->Vortex__DOT__forwarding_src2_fwd)
-	    ? vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_src2_fwd_data
-	   [1U] : vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__rd2_register
-	   [1U]);
-    vlTOPp->Vortex__DOT__vx_decode__DOT__zero_a_reg_data[1U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_a_reg_data
-	[1U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__zero_a_reg_data[0U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_a_reg_data
-	[0U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__one_a_reg_data[1U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_one__out_a_reg_data
-	[1U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__one_a_reg_data[0U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_one__out_a_reg_data
-	[0U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__zero_b_reg_data[1U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_b_reg_data
-	[1U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__zero_b_reg_data[0U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_b_reg_data
-	[0U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__one_b_reg_data[1U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_one__out_b_reg_data
-	[1U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__one_b_reg_data[0U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_one__out_b_reg_data
-	[0U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_a_reg_data[1U] 
-	= ((0U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num))
-	    ? vlTOPp->Vortex__DOT__vx_decode__DOT__zero_a_reg_data
-	   [1U] : vlTOPp->Vortex__DOT__vx_decode__DOT__one_a_reg_data
-	   [1U]);
-    vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_a_reg_data[0U] 
-	= ((0U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num))
-	    ? vlTOPp->Vortex__DOT__vx_decode__DOT__zero_a_reg_data
-	   [0U] : vlTOPp->Vortex__DOT__vx_decode__DOT__one_a_reg_data
-	   [0U]);
-    vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_b_reg_data[1U] 
-	= ((0U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num))
-	    ? vlTOPp->Vortex__DOT__vx_decode__DOT__zero_b_reg_data
-	   [1U] : vlTOPp->Vortex__DOT__vx_decode__DOT__one_b_reg_data
-	   [1U]);
-    vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_b_reg_data[0U] 
-	= ((0U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num))
-	    ? vlTOPp->Vortex__DOT__vx_decode__DOT__zero_b_reg_data
-	   [0U] : vlTOPp->Vortex__DOT__vx_decode__DOT__one_b_reg_data
-	   [0U]);
-    vlTOPp->Vortex__DOT__decode_a_reg_data[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_a_reg_data
-	[1U];
-    vlTOPp->Vortex__DOT__decode_a_reg_data[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_a_reg_data
-	[0U];
-    vlTOPp->Vortex__DOT__decode_b_reg_data[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_b_reg_data
-	[1U];
-    vlTOPp->Vortex__DOT__decode_b_reg_data[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_b_reg_data
-	[0U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__jalrs_thread_mask[0U] 
-	= VL_LTES_III(1,32,32, 0U, vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_b_reg_data
-		      [0U]);
-    vlTOPp->Vortex__DOT__vx_decode__DOT__jalrs_thread_mask[1U] 
-	= VL_LTES_III(1,32,32, 1U, vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_b_reg_data
-		      [0U]);
-    vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_a_reg_data[1U] 
-	= vlTOPp->Vortex__DOT__decode_a_reg_data[1U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_a_reg_data[0U] 
-	= vlTOPp->Vortex__DOT__decode_a_reg_data[0U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_b_reg_data[1U] 
-	= vlTOPp->Vortex__DOT__decode_b_reg_data[1U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_b_reg_data[0U] 
-	= vlTOPp->Vortex__DOT__decode_b_reg_data[0U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_thread_mask[1U] 
-	= ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jalrs)
-	    ? vlTOPp->Vortex__DOT__vx_decode__DOT__jalrs_thread_mask
-	   [1U] : vlTOPp->Vortex__DOT__vx_decode__DOT__jmprt_thread_mask
-	   [1U]);
-    vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_thread_mask[0U] 
-	= ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jalrs)
-	    ? vlTOPp->Vortex__DOT__vx_decode__DOT__jalrs_thread_mask
-	   [0U] : vlTOPp->Vortex__DOT__vx_decode__DOT__jmprt_thread_mask
-	   [0U]);
-    vlTOPp->Vortex__DOT__decode_thread_mask[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_thread_mask
-	[1U];
-    vlTOPp->Vortex__DOT__decode_thread_mask[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_thread_mask
-	[0U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask[1U] 
-	= vlTOPp->Vortex__DOT__decode_thread_mask[1U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask[0U] 
-	= vlTOPp->Vortex__DOT__decode_thread_mask[0U];
-    vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__VX_Warp_zero__in_thread_mask[1U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask
-	[1U];
-    vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__VX_Warp_zero__in_thread_mask[0U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask
-	[0U];
-    vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__VX_Warp_one__in_thread_mask[1U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask
-	[1U];
-    vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__VX_Warp_one__in_thread_mask[0U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask
-	[0U];
-    // ALWAYS at VX_warp.v:36
-    if (vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_zero_change_mask) {
-	vlTOPp->Vortex__DOT__vx_fetch__DOT__VX_Warp_zero__DOT__valid[1U] 
-	    = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__VX_Warp_zero__in_thread_mask
-	    [1U];
-	vlTOPp->Vortex__DOT__vx_fetch__DOT__VX_Warp_zero__DOT__valid[0U] 
-	    = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__VX_Warp_zero__in_thread_mask
-	    [0U];
-    }
-    // ALWAYS at VX_warp.v:36
-    if (vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_one_change_mask) {
-	vlTOPp->Vortex__DOT__vx_fetch__DOT__VX_Warp_one__DOT__valid[1U] 
-	    = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__VX_Warp_one__in_thread_mask
-	    [1U];
-	vlTOPp->Vortex__DOT__vx_fetch__DOT__VX_Warp_one__DOT__valid[0U] 
-	    = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__VX_Warp_one__in_thread_mask
-	    [0U];
-    }
-    vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__VX_Warp_zero__out_valid[0U] 
-	= ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_zero_change_mask)
-	    ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__VX_Warp_zero__in_thread_mask
-	   [0U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_zero_stall)) 
-		   & vlTOPp->Vortex__DOT__vx_fetch__DOT__VX_Warp_zero__DOT__valid
-		   [0U]));
-    vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__VX_Warp_zero__out_valid[1U] 
-	= ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_zero_change_mask)
-	    ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__VX_Warp_zero__in_thread_mask
-	   [1U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_zero_stall)) 
-		   & vlTOPp->Vortex__DOT__vx_fetch__DOT__VX_Warp_zero__DOT__valid
-		   [1U]));
-    vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__VX_Warp_one__out_valid[0U] 
-	= ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_one_change_mask)
-	    ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__VX_Warp_one__in_thread_mask
-	   [0U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_one_stall)) 
-		   & vlTOPp->Vortex__DOT__vx_fetch__DOT__VX_Warp_one__DOT__valid
-		   [0U]));
-    vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__VX_Warp_one__out_valid[1U] 
-	= ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_one_change_mask)
-	    ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__VX_Warp_one__in_thread_mask
-	   [1U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_one_stall)) 
-		   & vlTOPp->Vortex__DOT__vx_fetch__DOT__VX_Warp_one__DOT__valid
-		   [1U]));
-    vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_zero_valid[1U] 
-	= vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__VX_Warp_zero__out_valid
-	[1U];
-    vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_zero_valid[0U] 
-	= vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__VX_Warp_zero__out_valid
-	[0U];
-    vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_one_valid[1U] 
-	= vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__VX_Warp_one__out_valid
-	[1U];
-    vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_one_valid[0U] 
-	= vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__VX_Warp_one__out_valid
-	[0U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_fetch__out_valid[1U] 
-	= ((0U == (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num))
-	    ? vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_zero_valid
-	   [1U] : vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_one_valid
-	   [1U]);
-    vlTOPp->Vortex__DOT____Vcellout__vx_fetch__out_valid[0U] 
-	= ((0U == (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num))
-	    ? vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_zero_valid
-	   [0U] : vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_one_valid
-	   [0U]);
-    vlTOPp->Vortex__DOT__fetch_valid[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_fetch__out_valid
-	[1U];
-    vlTOPp->Vortex__DOT__fetch_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_fetch__out_valid
-	[0U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_f_d_reg__in_valid[1U] 
-	= vlTOPp->Vortex__DOT__fetch_valid[1U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_f_d_reg__in_valid[0U] 
-	= vlTOPp->Vortex__DOT__fetch_valid[0U];
-}
-
-VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) {
-    VL_DEBUG_IF(VL_DBG_MSGF("+    VVortex::_sequent__TOP__3\n"); );
-    VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
-    // Variables
-    // Begin mtask footprint  all: 
-    VL_SIG8(__Vdly__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__state_stall,5,0);
-    VL_SIG8(__Vdlyvdim0__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers__v0,4,0);
-    VL_SIG8(__Vdlyvset__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers__v0,0,0);
-    VL_SIG8(__Vdlyvdim0__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0,4,0);
-    VL_SIG8(__Vdlyvset__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0,0,0);
-    VL_SIG8(__Vdlyvset__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1,0,0);
-    VL_SIG8(__Vdly__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_state_stall,5,0);
-    VL_SIG8(__Vdly__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__wspawn_state_stall,5,0);
-    VL_SIG8(__Vdlyvdim0__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v0,4,0);
-    VL_SIG8(__Vdlyvset__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v0,0,0);
-    VL_SIG8(__Vdlyvset__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v1,0,0);
-    VL_SIG8(__Vdlyvdim0__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0,4,0);
-    VL_SIG8(__Vdlyvset__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0,0,0);
-    VL_SIG8(__Vdlyvset__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1,0,0);
-    VL_SIG8(__Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__valid__v0,0,0);
-    VL_SIG8(__Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__valid__v1,0,0);
-    VL_SIG8(__Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__valid__v0,0,0);
-    VL_SIG8(__Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__valid__v1,0,0);
-    VL_SIG8(__Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__valid__v0,0,0);
-    VL_SIG8(__Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__valid__v1,0,0);
-    VL_SIG8(__Vdlyvset__Vortex__DOT__vx_csr_handler__DOT__csr__v0,0,0);
-    VL_SIG16(__Vdlyvdim0__Vortex__DOT__vx_csr_handler__DOT__csr__v0,11,0);
-    VL_SIG16(__Vdlyvval__Vortex__DOT__vx_csr_handler__DOT__csr__v0,11,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers__v0,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v2,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v3,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v4,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v5,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v6,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v7,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v8,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v9,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v10,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v11,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v12,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v13,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v14,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v15,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v16,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v17,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v18,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v19,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v20,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v21,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v22,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v23,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v24,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v25,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v26,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v27,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v28,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v29,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v30,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v31,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v32,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v0,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v1,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v2,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v3,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v4,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v5,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v6,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v7,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v8,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v9,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v10,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v11,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v12,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v13,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v14,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v15,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v16,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v17,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v18,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v19,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v20,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v21,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v22,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v23,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v24,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v25,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v26,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v27,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v28,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v29,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v30,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v31,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v32,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v2,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v3,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v4,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v5,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v6,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v7,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v8,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v9,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v10,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v11,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v12,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v13,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v14,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v15,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v16,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v17,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v18,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v19,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v20,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v21,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v22,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v23,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v24,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v25,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v26,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v27,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v28,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v29,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v30,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v31,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v32,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__a_reg_data__v0,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__a_reg_data__v1,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__b_reg_data__v0,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__b_reg_data__v1,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__alu_result__v0,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__alu_result__v1,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__b_reg_data__v0,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__b_reg_data__v1,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__mem_result__v0,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__mem_result__v1,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__alu_result__v0,31,0);
-    VL_SIG(__Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__alu_result__v1,31,0);
-    // Body
-    __Vdly__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__state_stall 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__state_stall;
-    __Vdly__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_state_stall 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_state_stall;
-    __Vdly__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__wspawn_state_stall 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__wspawn_state_stall;
-    __Vdlyvset__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers__v0 = 0U;
-    __Vdlyvset__Vortex__DOT__vx_csr_handler__DOT__csr__v0 = 0U;
-    __Vdlyvset__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v0 = 0U;
-    __Vdlyvset__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v1 = 0U;
-    __Vdlyvset__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 0U;
-    __Vdlyvset__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 0U;
-    __Vdlyvset__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 0U;
-    __Vdlyvset__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 0U;
-    // ALWAYS at VX_m_w_reg.v:63
-    __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__valid__v0 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_valid
-	[1U];
-    __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__valid__v1 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_valid
-	[0U];
-    // ALWAYS at VX_e_m_reg.v:128
-    __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__b_reg_data__v0 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_b_reg_data
-	[1U];
-    __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__b_reg_data__v1 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_b_reg_data
-	[0U];
-    // ALWAYS at VX_e_m_reg.v:128
-    __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__valid__v0 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_valid
-	[1U];
-    __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__valid__v1 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_valid
-	[0U];
-    // ALWAYS at VX_context.v:81
-    if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone) 
-	 & (0U == (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__state_stall)))) {
-	__Vdly__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__state_stall = 0xaU;
-    } else {
-	if ((1U == (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__state_stall))) {
-	    __Vdly__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__state_stall = 0U;
-	} else {
-	    if ((0U < (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__state_stall))) {
-		__Vdly__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__state_stall 
-		    = (0x3fU & ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__state_stall) 
-				- (IData)(1U)));
-	    }
-	}
-    }
-    // ALWAYS at VX_context_slave.v:102
-    if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone) 
-	 & (0U == (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_state_stall)))) {
-	__Vdly__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_state_stall = 0xaU;
-    } else {
-	if ((1U == (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_state_stall))) {
-	    __Vdly__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_state_stall = 0U;
-	} else {
-	    if ((0U < (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_state_stall))) {
-		__Vdly__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_state_stall 
-		    = (0x3fU & ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_state_stall) 
-				- (IData)(1U)));
-	    }
-	}
-    }
-    // ALWAYS at VX_context_slave.v:117
-    if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_wspawn) 
-	 & (0U == (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__wspawn_state_stall)))) {
-	__Vdly__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__wspawn_state_stall = 0xaU;
-    } else {
-	if ((1U == (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__wspawn_state_stall))) {
-	    __Vdly__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__wspawn_state_stall = 0U;
-	} else {
-	    if ((0U < (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__wspawn_state_stall))) {
-		__Vdly__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__wspawn_state_stall 
-		    = (0x3fU & ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__wspawn_state_stall) 
-				- (IData)(1U)));
-	    }
-	}
-    }
-    // ALWAYS at VX_m_w_reg.v:63
-    __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__alu_result__v0 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_alu_result
-	[1U];
-    __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__alu_result__v1 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_alu_result
-	[0U];
-    // ALWAYS at VX_m_w_reg.v:63
-    __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__mem_result__v0 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_mem_result
-	[1U];
-    __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__mem_result__v1 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_mem_result
-	[0U];
-    // ALWAYS at VX_d_e_reg.v:145
-    vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__upper_immed 
-	= (0xfffffU & ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling)
-		        ? 0U : ((0x37U == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction))
-				 ? (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-				    >> 0xcU) : ((0x17U 
-						 == 
-						 (0x7fU 
-						  & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction))
-						 ? 
-						(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-						 >> 0xcU)
-						 : 0U))));
-    // ALWAYS at VX_csr_handler.v:34
-    vlTOPp->Vortex__DOT__vx_csr_handler__DOT__decode_csr_address 
-	= vlTOPp->Vortex__DOT__decode_csr_address;
-    // ALWAYS at VX_csr_handler.v:34
-    vlTOPp->Vortex__DOT__vx_csr_handler__DOT__cycle 
-	= (VL_ULL(1) + vlTOPp->Vortex__DOT__vx_csr_handler__DOT__cycle);
-    // ALWAYS at VX_csr_handler.v:34
-    if (vlTOPp->Vortex__DOT__m_w_valid[0U]) {
-	vlTOPp->Vortex__DOT__vx_csr_handler__DOT__instret 
-	    = (VL_ULL(1) + vlTOPp->Vortex__DOT__vx_csr_handler__DOT__instret);
-    }
-    // ALWAYS at VX_d_e_reg.v:145
-    vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rs2_src = 
-	(1U & ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling)
-	        ? 0U : (1U & (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_itype) 
-			       | (0x23U == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)))
-			       ? 1U : 0U))));
-    // ALWAYS at VX_e_m_reg.v:128
-    __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__alu_result__v0 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_alu_result
-	[1U];
-    __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__alu_result__v1 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_alu_result
-	[0U];
-    // ALWAYS at VX_d_e_reg.v:145
-    __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__valid__v0 
-	= ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling)
-	    ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid_z
-	   [1U] : vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_valid
-	   [1U]);
-    __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__valid__v1 
-	= ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling)
-	    ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid_z
-	   [0U] : vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_valid
-	   [0U]);
-    // ALWAYS at VX_e_m_reg.v:128
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__jal;
-    // ALWAYS at VX_e_m_reg.v:128
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type 
-	= vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__branch_type;
-    // ALWAYS at VX_e_m_reg.v:128
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__mem_read 
-	= vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__mem_read;
-    // ALWAYS at VX_e_m_reg.v:128
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__mem_write 
-	= vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__mem_write;
-    // ALWAYS at VX_e_m_reg.v:128
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__curr_PC = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__curr_PC;
-    // ALWAYS at VX_e_m_reg.v:128
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal_dest 
-	= (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-	   [0U] + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__jal_offset);
-    // ALWAYS at VX_e_m_reg.v:128
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_offset 
-	= vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__itype_immed;
-    // ALWAYS at VX_m_w_reg.v:63
-    vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__PC_next = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__PC_next;
-    // ALWAYS at VX_d_e_reg.v:145
-    __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__a_reg_data__v0 
-	= ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling)
-	    ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__reg_data_z
-	   [1U] : vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_a_reg_data
-	   [1U]);
-    __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__a_reg_data__v1 
-	= ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling)
-	    ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__reg_data_z
-	   [0U] : vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_a_reg_data
-	   [0U]);
-    // ALWAYS at VX_register_file.v:45
-    if (((((0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) 
-	   & (0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd))) 
-	  & vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_valid
-	  [0U]) & (0U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__warp_num)))) {
-	__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers__v0 
-	    = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_write_data
-	    [0U];
-	__Vdlyvset__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers__v0 = 1U;
-	__Vdlyvdim0__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers__v0 
-	    = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd;
-    }
-    // ALWAYS at VX_csr_handler.v:43
-    if (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__is_csr) {
-	__Vdlyvval__Vortex__DOT__vx_csr_handler__DOT__csr__v0 
-	    = (0xfffU & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__csr_result);
-	__Vdlyvset__Vortex__DOT__vx_csr_handler__DOT__csr__v0 = 1U;
-	__Vdlyvdim0__Vortex__DOT__vx_csr_handler__DOT__csr__v0 
-	    = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__csr_address;
-    }
-    // ALWAYS at VX_d_e_reg.v:145
-    __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__b_reg_data__v0 
-	= ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling)
-	    ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__reg_data_z
-	   [1U] : vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_b_reg_data
-	   [1U]);
-    __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__b_reg_data__v1 
-	= ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling)
-	    ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__reg_data_z
-	   [0U] : vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_b_reg_data
-	   [0U]);
-    // ALWAYS at VX_register_file_master_slave.v:50
-    if ((((((0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) 
-	    & (0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd))) 
-	   & vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_valid
-	   [0U]) & (1U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__warp_num))) 
-	 & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_wspawn)))) {
-	__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v0 
-	    = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_write_data
-	    [0U];
-	__Vdlyvset__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v0 = 1U;
-	__Vdlyvdim0__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v0 
-	    = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd;
-    } else {
-	if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_wspawn) 
-	     & (2U == (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__wspawn_state_stall)))) {
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v1 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs
-		[0x1fU];
-	    __Vdlyvset__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v1 = 1U;
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v2 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs
-		[0x1eU];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v3 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs
-		[0x1dU];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v4 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs
-		[0x1cU];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v5 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs
-		[0x1bU];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v6 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs
-		[0x1aU];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v7 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs
-		[0x19U];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v8 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs
-		[0x18U];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v9 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs
-		[0x17U];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v10 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs
-		[0x16U];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v11 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs
-		[0x15U];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v12 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs
-		[0x14U];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v13 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs
-		[0x13U];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v14 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs
-		[0x12U];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v15 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs
-		[0x11U];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v16 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs
-		[0x10U];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v17 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs
-		[0xfU];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v18 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs
-		[0xeU];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v19 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs
-		[0xdU];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v20 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs
-		[0xcU];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v21 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs
-		[0xbU];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v22 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs
-		[0xaU];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v23 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs
-		[9U];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v24 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs
-		[8U];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v25 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs
-		[7U];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v26 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs
-		[6U];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v27 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs
-		[5U];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v28 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs
-		[4U];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v29 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs
-		[3U];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v30 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs
-		[2U];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v31 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs
-		[1U];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v32 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs
-		[0U];
-	}
-    }
-    // ALWAYS at VX_register_file_slave.v:53
-    if ((((((0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) 
-	    & (0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd))) 
-	   & vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_valid
-	   [1U]) & (0U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__warp_num))) 
-	 & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone)))) {
-	__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0 
-	    = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_write_data
-	    [1U];
-	__Vdlyvset__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 1U;
-	__Vdlyvdim0__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0 
-	    = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd;
-    } else {
-	if ((((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone) 
-	      & ((1U == vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd1_register
-		  [0U]) & (1U == (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__state_stall)))) 
-	     & (0U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num)))) {
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs
-		[0x1fU];
-	    __Vdlyvset__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 1U;
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v2 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs
-		[0x1eU];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v3 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs
-		[0x1dU];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v4 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs
-		[0x1cU];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v5 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs
-		[0x1bU];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v6 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs
-		[0x1aU];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v7 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs
-		[0x19U];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v8 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs
-		[0x18U];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v9 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs
-		[0x17U];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v10 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs
-		[0x16U];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v11 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs
-		[0x15U];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v12 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs
-		[0x14U];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v13 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs
-		[0x13U];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v14 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs
-		[0x12U];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v15 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs
-		[0x11U];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v16 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs
-		[0x10U];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v17 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs
-		[0xfU];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v18 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs
-		[0xeU];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v19 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs
-		[0xdU];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v20 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs
-		[0xcU];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v21 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs
-		[0xbU];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v22 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs
-		[0xaU];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v23 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs
-		[9U];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v24 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs
-		[8U];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v25 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs
-		[7U];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v26 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs
-		[6U];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v27 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs
-		[5U];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v28 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs
-		[4U];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v29 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs
-		[3U];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v30 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs
-		[2U];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v31 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs
-		[1U];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v32 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs
-		[0U];
-	}
-    }
-    // ALWAYS at VX_register_file_slave.v:53
-    if ((((((0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) 
-	    & (0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd))) 
-	   & vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_valid
-	   [1U]) & (1U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__warp_num))) 
-	 & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone)))) {
-	__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0 
-	    = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_write_data
-	    [1U];
-	__Vdlyvset__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 1U;
-	__Vdlyvdim0__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0 
-	    = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd;
-    } else {
-	if ((((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone) 
-	      & ((1U == vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__rd1_register
-		  [0U]) & (1U == (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_state_stall)))) 
-	     & (1U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num)))) {
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs
-		[0x1fU];
-	    __Vdlyvset__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 1U;
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v2 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs
-		[0x1eU];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v3 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs
-		[0x1dU];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v4 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs
-		[0x1cU];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v5 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs
-		[0x1bU];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v6 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs
-		[0x1aU];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v7 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs
-		[0x19U];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v8 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs
-		[0x18U];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v9 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs
-		[0x17U];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v10 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs
-		[0x16U];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v11 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs
-		[0x15U];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v12 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs
-		[0x14U];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v13 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs
-		[0x13U];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v14 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs
-		[0x12U];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v15 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs
-		[0x11U];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v16 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs
-		[0x10U];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v17 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs
-		[0xfU];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v18 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs
-		[0xeU];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v19 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs
-		[0xdU];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v20 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs
-		[0xcU];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v21 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs
-		[0xbU];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v22 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs
-		[0xaU];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v23 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs
-		[9U];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v24 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs
-		[8U];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v25 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs
-		[7U];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v26 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs
-		[6U];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v27 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs
-		[5U];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v28 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs
-		[4U];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v29 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs
-		[3U];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v30 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs
-		[2U];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v31 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs
-		[1U];
-	    __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v32 
-		= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs
-		[0U];
-	}
-    }
-    // ALWAYSPOST at VX_m_w_reg.v:72
-    vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__valid[1U] 
-	= __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__valid__v0;
-    vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__valid[0U] 
-	= __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__valid__v1;
-    // ALWAYSPOST at VX_e_m_reg.v:139
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__b_reg_data[1U] 
-	= __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__b_reg_data__v0;
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__b_reg_data[0U] 
-	= __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__b_reg_data__v1;
-    // ALWAYSPOST at VX_e_m_reg.v:148
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__valid[1U] 
-	= __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__valid__v0;
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__valid[0U] 
-	= __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__valid__v1;
-    // ALWAYSPOST at VX_m_w_reg.v:65
-    vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__alu_result[1U] 
-	= __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__alu_result__v0;
-    vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__alu_result[0U] 
-	= __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__alu_result__v1;
-    // ALWAYSPOST at VX_m_w_reg.v:66
-    vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__mem_result[1U] 
-	= __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__mem_result__v0;
-    vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__mem_result[0U] 
-	= __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__mem_result__v1;
-    // ALWAYSPOST at VX_e_m_reg.v:130
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result[1U] 
-	= __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__alu_result__v0;
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result[0U] 
-	= __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__alu_result__v1;
-    // ALWAYSPOST at VX_d_e_reg.v:167
-    vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid[1U] 
-	= __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__valid__v0;
-    vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid[0U] 
-	= __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__valid__v1;
-    // ALWAYSPOST at VX_d_e_reg.v:150
-    vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__a_reg_data[1U] 
-	= __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__a_reg_data__v0;
-    vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__a_reg_data[0U] 
-	= __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__a_reg_data__v1;
-    // ALWAYSPOST at VX_register_file.v:48
-    if (__Vdlyvset__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers__v0) {
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[__Vdlyvdim0__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers__v0] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers__v0;
-    }
-    // ALWAYSPOST at VX_csr_handler.v:45
-    if (__Vdlyvset__Vortex__DOT__vx_csr_handler__DOT__csr__v0) {
-	vlTOPp->Vortex__DOT__vx_csr_handler__DOT__csr[__Vdlyvdim0__Vortex__DOT__vx_csr_handler__DOT__csr__v0] 
-	    = __Vdlyvval__Vortex__DOT__vx_csr_handler__DOT__csr__v0;
-    }
-    // ALWAYSPOST at VX_d_e_reg.v:151
-    vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__b_reg_data[1U] 
-	= __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__b_reg_data__v0;
-    vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__b_reg_data[0U] 
-	= __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__b_reg_data__v1;
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__wspawn_state_stall 
-	= __Vdly__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__wspawn_state_stall;
-    // ALWAYSPOST at VX_register_file_master_slave.v:53
-    if (__Vdlyvset__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v0) {
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers[__Vdlyvdim0__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v0] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v0;
-    }
-    if (__Vdlyvset__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v1) {
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers[0x1fU] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v1;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers[0x1eU] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v2;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers[0x1dU] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v3;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers[0x1cU] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v4;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers[0x1bU] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v5;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers[0x1aU] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v6;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers[0x19U] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v7;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers[0x18U] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v8;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers[0x17U] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v9;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers[0x16U] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v10;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers[0x15U] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v11;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers[0x14U] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v12;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers[0x13U] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v13;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers[0x12U] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v14;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers[0x11U] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v15;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers[0x10U] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v16;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers[0xfU] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v17;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers[0xeU] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v18;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers[0xdU] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v19;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers[0xcU] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v20;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers[0xbU] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v21;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers[0xaU] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v22;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers[9U] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v23;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers[8U] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v24;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers[7U] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v25;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers[6U] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v26;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers[5U] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v27;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers[4U] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v28;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers[3U] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v29;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers[2U] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v30;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers[1U] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v31;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers[0U] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers__v32;
-    }
-    // ALWAYSPOST at VX_register_file_slave.v:56
-    if (__Vdlyvset__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0) {
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[__Vdlyvdim0__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0;
-    }
-    if (__Vdlyvset__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1) {
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1fU] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1eU] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v2;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1dU] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v3;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1cU] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v4;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1bU] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v5;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1aU] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v6;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x19U] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v7;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x18U] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v8;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x17U] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v9;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x16U] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v10;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x15U] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v11;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x14U] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v12;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x13U] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v13;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x12U] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v14;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x11U] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v15;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x10U] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v16;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xfU] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v17;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xeU] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v18;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xdU] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v19;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xcU] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v20;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xbU] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v21;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xaU] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v22;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[9U] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v23;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[8U] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v24;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[7U] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v25;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[6U] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v26;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[5U] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v27;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[4U] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v28;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[3U] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v29;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[2U] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v30;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[1U] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v31;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0U] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v32;
-    }
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__state_stall 
-	= __Vdly__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__state_stall;
-    // ALWAYSPOST at VX_register_file_slave.v:56
-    if (__Vdlyvset__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0) {
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[__Vdlyvdim0__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0;
-    }
-    if (__Vdlyvset__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1) {
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1fU] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1eU] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v2;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1dU] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v3;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1cU] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v4;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1bU] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v5;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1aU] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v6;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x19U] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v7;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x18U] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v8;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x17U] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v9;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x16U] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v10;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x15U] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v11;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x14U] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v12;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x13U] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v13;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x12U] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v14;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x11U] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v15;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x10U] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v16;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xfU] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v17;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xeU] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v18;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xdU] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v19;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xcU] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v20;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xbU] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v21;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xaU] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v22;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[9U] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v23;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[8U] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v24;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[7U] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v25;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[6U] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v26;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[5U] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v27;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[4U] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v28;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[3U] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v29;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[2U] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v30;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[1U] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v31;
-	vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0U] 
-	    = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v32;
-    }
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_state_stall 
-	= __Vdly__Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_state_stall;
-    vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_valid[1U] 
-	= vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__valid
-	[1U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_valid[0U] 
-	= vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__valid
-	[0U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_b_reg_data[1U] 
-	= vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__b_reg_data
-	[1U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_b_reg_data[0U] 
-	= vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__b_reg_data
-	[0U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_valid[1U] 
-	= vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__valid
-	[1U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_valid[0U] 
-	= vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__valid
-	[0U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_alu_result[1U] 
-	= vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__alu_result
-	[1U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_alu_result[0U] 
-	= vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__alu_result
-	[0U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_mem_result[1U] 
-	= vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__mem_result
-	[1U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_mem_result[0U] 
-	= vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__mem_result
-	[0U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_alu_result[1U] 
-	= vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result
-	[1U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_alu_result[0U] 
-	= vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result
-	[0U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_valid[1U] 
-	= vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid
-	[1U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_valid[0U] 
-	= vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid
-	[0U];
-    // ALWAYS at VX_d_e_reg.v:145
-    vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__jal = ((~ (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling)) 
-						 & (IData)(vlTOPp->Vortex__DOT__decode_jal));
-    // ALWAYS at VX_d_e_reg.v:145
-    vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__branch_type 
-	= ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling)
-	    ? 0U : (IData)(vlTOPp->Vortex__DOT__decode_branch_type));
-    vlTOPp->out_cache_driver_in_mem_read = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__mem_read;
-    // ALWAYS at VX_d_e_reg.v:145
-    vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__mem_read 
-	= (7U & ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling)
-		  ? 7U : ((3U == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction))
-			   ? (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-			      >> 0xcU) : 7U)));
-    vlTOPp->out_cache_driver_in_mem_write = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__mem_write;
-    // ALWAYS at VX_d_e_reg.v:145
-    vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__mem_write 
-	= (7U & ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling)
-		  ? 7U : ((0x23U == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction))
-			   ? (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-			      >> 0xcU) : 7U)));
-    // ALWAYS at VX_d_e_reg.v:145
-    vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__curr_PC = 
-	((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling)
-	  ? 0U : vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__curr_PC);
-    // ALWAYS at VX_d_e_reg.v:145
-    vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__jal_offset 
-	= ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling)
-	    ? 0U : vlTOPp->Vortex__DOT__decode_jal_offset);
-    vlTOPp->Vortex__DOT__memory_branch_dest = (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__curr_PC 
-					       + (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_offset 
-						  << 1U));
-    // ALWAYS at VX_d_e_reg.v:145
-    vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__itype_immed 
-	= ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling)
-	    ? 0xdeadbeefU : vlTOPp->Vortex__DOT__decode_itype_immed);
-    vlTOPp->Vortex__DOT__vx_writeback__DOT__out_pc_data[0U] 
-	= vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__PC_next;
-    vlTOPp->Vortex__DOT__vx_writeback__DOT__out_pc_data[1U] 
-	= vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__PC_next;
-    vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[0U] 
-	= vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__PC_next;
-    vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[1U] 
-	= vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__PC_next;
-    // ALWAYS at VX_e_m_reg.v:128
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__PC_next = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__PC_next_out;
-    vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data[1U] 
-	= vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__a_reg_data
-	[1U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data[0U] 
-	= vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__a_reg_data
-	[0U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0x1fU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[0x1fU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0x1eU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[0x1eU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0x1dU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[0x1dU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0x1cU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[0x1cU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0x1bU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[0x1bU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0x1aU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[0x1aU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0x19U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[0x19U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0x18U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[0x18U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0x17U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[0x17U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0x16U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[0x16U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0x15U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[0x15U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0x14U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[0x14U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0x13U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[0x13U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0x12U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[0x12U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0x11U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[0x11U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0x10U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[0x10U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0xfU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[0xfU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0xeU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[0xeU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0xdU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[0xdU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0xcU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[0xcU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0xbU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[0xbU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0xaU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[0xaU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[9U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[9U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[8U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[8U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[7U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[7U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[6U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[6U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[5U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[5U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[4U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[4U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[3U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[3U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[2U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[2U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[1U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[1U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[0U];
-    // ALWAYS at VX_e_m_reg.v:128
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__csr_address 
-	= vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__csr_address;
-    // ALWAYS at VX_e_m_reg.v:128
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__is_csr = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__is_csr;
-    // ALWAYS at VX_e_m_reg.v:128
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__csr_result 
-	= ((0xdU == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-	    ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__csr_mask
-	    : ((0xeU == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-	        ? (vlTOPp->Vortex__DOT__csr_decode_csr_data 
-		   | vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__csr_mask)
-	        : ((0xfU == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-		    ? (vlTOPp->Vortex__DOT__csr_decode_csr_data 
-		       & ((IData)(0xffffffffU) - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__csr_mask))
-		    : 0xdeadbeefU)));
-    vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_b_reg_data[1U] 
-	= vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__b_reg_data
-	[1U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_b_reg_data[0U] 
-	= vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__b_reg_data
-	[0U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[0x1fU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[0x1fU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[0x1eU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[0x1eU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[0x1dU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[0x1dU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[0x1cU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[0x1cU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[0x1bU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[0x1bU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[0x1aU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[0x1aU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[0x19U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[0x19U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[0x18U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[0x18U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[0x17U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[0x17U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[0x16U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[0x16U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[0x15U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[0x15U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[0x14U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[0x14U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[0x13U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[0x13U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[0x12U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[0x12U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[0x11U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[0x11U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[0x10U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[0x10U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[0xfU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[0xfU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[0xeU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[0xeU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[0xdU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[0xdU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[0xcU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[0xcU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[0xbU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[0xbU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[0xaU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[0xaU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[9U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[9U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[8U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[8U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[7U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[7U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[6U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[6U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[5U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[5U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[4U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[4U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[3U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[3U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[2U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[2U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[1U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[1U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[0U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[0U];
-    // ALWAYS at VX_m_w_reg.v:63
-    vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__rd;
-    // ALWAYS at VX_m_w_reg.v:63
-    vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__warp_num 
-	= vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__warp_num;
-    // ALWAYS at VX_m_w_reg.v:63
-    vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb;
-    vlTOPp->Vortex__DOT__m_w_valid[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_valid
-	[1U];
-    vlTOPp->Vortex__DOT__m_w_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_valid
-	[0U];
-    vlTOPp->Vortex__DOT__e_m_b_reg_data[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_b_reg_data
-	[1U];
-    vlTOPp->Vortex__DOT__e_m_b_reg_data[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_b_reg_data
-	[0U];
-    vlTOPp->Vortex__DOT__e_m_valid[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_valid
-	[1U];
-    vlTOPp->Vortex__DOT__e_m_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_valid
-	[0U];
-    vlTOPp->Vortex__DOT__m_w_alu_result[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_alu_result
-	[1U];
-    vlTOPp->Vortex__DOT__m_w_alu_result[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_alu_result
-	[0U];
-    vlTOPp->Vortex__DOT__m_w_mem_result[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_mem_result
-	[1U];
-    vlTOPp->Vortex__DOT__m_w_mem_result[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_mem_result
-	[0U];
-    vlTOPp->Vortex__DOT__e_m_alu_result[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_alu_result
-	[1U];
-    vlTOPp->Vortex__DOT__e_m_alu_result[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_alu_result
-	[0U];
-    vlTOPp->Vortex__DOT__d_e_valid[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_valid
-	[1U];
-    vlTOPp->Vortex__DOT__d_e_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_valid
-	[0U];
-    vlTOPp->Vortex__DOT__d_e_a_reg_data[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data
-	[1U];
-    vlTOPp->Vortex__DOT__d_e_a_reg_data[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data
-	[0U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0x1fU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs
-	[0x1fU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0x1eU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs
-	[0x1eU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0x1dU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs
-	[0x1dU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0x1cU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs
-	[0x1cU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0x1bU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs
-	[0x1bU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0x1aU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs
-	[0x1aU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0x19U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs
-	[0x19U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0x18U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs
-	[0x18U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0x17U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs
-	[0x17U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0x16U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs
-	[0x16U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0x15U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs
-	[0x15U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0x14U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs
-	[0x14U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0x13U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs
-	[0x13U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0x12U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs
-	[0x12U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0x11U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs
-	[0x11U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0x10U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs
-	[0x10U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0xfU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs
-	[0xfU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0xeU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs
-	[0xeU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0xdU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs
-	[0xdU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0xcU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs
-	[0xcU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0xbU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs
-	[0xbU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0xaU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs
-	[0xaU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[9U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs
-	[9U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[8U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs
-	[8U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[7U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs
-	[7U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[6U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs
-	[6U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[5U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs
-	[5U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[4U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs
-	[4U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[3U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs
-	[3U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[2U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs
-	[2U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[1U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs
-	[1U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs
-	[0U];
-    vlTOPp->Vortex__DOT__csr_decode_csr_data = ((0xc00U 
-						 == (IData)(vlTOPp->Vortex__DOT__vx_csr_handler__DOT__decode_csr_address))
-						 ? (IData)(vlTOPp->Vortex__DOT__vx_csr_handler__DOT__cycle)
-						 : 
-						((0xc80U 
-						  == (IData)(vlTOPp->Vortex__DOT__vx_csr_handler__DOT__decode_csr_address))
-						  ? (IData)(
-							    (vlTOPp->Vortex__DOT__vx_csr_handler__DOT__cycle 
-							     >> 0x20U))
-						  : 
-						 ((0xc02U 
-						   == (IData)(vlTOPp->Vortex__DOT__vx_csr_handler__DOT__decode_csr_address))
-						   ? (IData)(vlTOPp->Vortex__DOT__vx_csr_handler__DOT__instret)
-						   : 
-						  ((0xc82U 
-						    == (IData)(vlTOPp->Vortex__DOT__vx_csr_handler__DOT__decode_csr_address))
-						    ? (IData)(
-							      (vlTOPp->Vortex__DOT__vx_csr_handler__DOT__instret 
-							       >> 0x20U))
-						    : 
-						   vlTOPp->Vortex__DOT__vx_csr_handler__DOT__csr
-						   [vlTOPp->Vortex__DOT__vx_csr_handler__DOT__decode_csr_address]))));
-    vlTOPp->Vortex__DOT__d_e_b_reg_data[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_b_reg_data
-	[1U];
-    vlTOPp->Vortex__DOT__d_e_b_reg_data[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_b_reg_data
-	[0U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[0x1fU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs
-	[0x1fU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[0x1eU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs
-	[0x1eU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[0x1dU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs
-	[0x1dU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[0x1cU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs
-	[0x1cU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[0x1bU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs
-	[0x1bU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[0x1aU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs
-	[0x1aU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[0x19U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs
-	[0x19U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[0x18U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs
-	[0x18U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[0x17U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs
-	[0x17U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[0x16U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs
-	[0x16U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[0x15U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs
-	[0x15U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[0x14U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs
-	[0x14U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[0x13U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs
-	[0x13U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[0x12U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs
-	[0x12U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[0x11U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs
-	[0x11U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[0x10U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs
-	[0x10U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[0xfU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs
-	[0xfU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[0xeU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs
-	[0xeU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[0xdU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs
-	[0xdU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[0xcU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs
-	[0xcU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[0xbU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs
-	[0xbU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[0xaU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs
-	[0xaU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[9U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs
-	[9U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[8U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs
-	[8U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[7U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs
-	[7U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[6U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs
-	[6U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[5U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs
-	[5U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[4U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs
-	[4U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[3U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs
-	[3U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[2U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs
-	[2U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[1U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs
-	[1U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[0U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs
-	[0U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid[1U] 
-	= vlTOPp->Vortex__DOT__m_w_valid[1U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid[0U] 
-	= vlTOPp->Vortex__DOT__m_w_valid[0U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_rd2[1U] 
-	= vlTOPp->Vortex__DOT__e_m_b_reg_data[1U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_rd2[0U] 
-	= vlTOPp->Vortex__DOT__e_m_b_reg_data[0U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid[1U] 
-	= vlTOPp->Vortex__DOT__e_m_valid[1U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid[0U] 
-	= vlTOPp->Vortex__DOT__e_m_valid[0U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_alu_result[1U] 
-	= vlTOPp->Vortex__DOT__m_w_alu_result[1U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_alu_result[0U] 
-	= vlTOPp->Vortex__DOT__m_w_alu_result[0U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result[1U] 
-	= vlTOPp->Vortex__DOT__m_w_alu_result[1U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result[0U] 
-	= vlTOPp->Vortex__DOT__m_w_alu_result[0U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_mem_result[1U] 
-	= vlTOPp->Vortex__DOT__m_w_mem_result[1U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_mem_result[0U] 
-	= vlTOPp->Vortex__DOT__m_w_mem_result[0U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data[1U] 
-	= vlTOPp->Vortex__DOT__m_w_mem_result[1U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data[0U] 
-	= vlTOPp->Vortex__DOT__m_w_mem_result[0U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result[1U] 
-	= vlTOPp->Vortex__DOT__e_m_alu_result[1U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result[0U] 
-	= vlTOPp->Vortex__DOT__e_m_alu_result[0U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_valid[1U] 
-	= vlTOPp->Vortex__DOT__d_e_valid[1U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_valid[0U] 
-	= vlTOPp->Vortex__DOT__d_e_valid[0U];
-    vlTOPp->Vortex__DOT__execute_branch_stall = ((0U 
-						  != (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__branch_type)) 
-						 | (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__jal));
-    vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[0U] 
-	= vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__PC_next;
-    vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[1U] 
-	= vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__PC_next;
-    // ALWAYS at VX_d_e_reg.v:145
-    vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__PC_next_out 
-	= ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling)
-	    ? 0U : ((IData)(4U) + vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__curr_PC));
-    vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data[1U] 
-	= vlTOPp->Vortex__DOT__d_e_a_reg_data[1U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data[0U] 
-	= vlTOPp->Vortex__DOT__d_e_a_reg_data[0U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1fU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0x1fU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1eU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0x1eU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1dU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0x1dU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1cU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0x1cU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1bU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0x1bU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1aU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0x1aU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x19U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0x19U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x18U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0x18U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x17U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0x17U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x16U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0x16U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x15U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0x15U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x14U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0x14U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x13U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0x13U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x12U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0x12U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x11U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0x11U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x10U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0x10U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xfU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0xfU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xeU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0xeU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xdU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0xdU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xcU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0xcU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xbU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0xbU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xaU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0xaU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[9U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[9U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[8U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[8U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[7U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[7U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[6U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[6U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[5U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[5U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[4U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[4U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[3U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[3U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[2U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[2U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[1U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[1U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0x1fU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0x1fU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0x1eU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0x1eU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0x1dU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0x1dU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0x1cU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0x1cU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0x1bU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0x1bU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0x1aU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0x1aU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0x19U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0x19U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0x18U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0x18U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0x17U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0x17U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0x16U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0x16U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0x15U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0x15U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0x14U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0x14U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0x13U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0x13U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0x12U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0x12U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0x11U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0x11U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0x10U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0x10U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0xfU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0xfU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0xeU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0xeU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0xdU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0xdU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0xcU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0xcU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0xbU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0xbU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0xaU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0xaU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[9U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[9U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[8U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[8U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[7U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[7U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[6U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[6U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[5U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[5U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[4U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[4U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[3U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[3U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[2U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[2U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[1U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[1U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters
-	[0U];
-    // ALWAYS at VX_d_e_reg.v:145
-    vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__csr_address 
-	= ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling)
-	    ? 0U : (IData)(vlTOPp->Vortex__DOT__decode_csr_address));
-    // ALWAYS at VX_d_e_reg.v:145
-    vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__is_csr = 
-	((~ (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling)) 
-	 & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_csr));
-    // ALWAYS at VX_d_e_reg.v:145
-    vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__csr_mask 
-	= ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling)
-	    ? 0U : (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_csr) 
-		     & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-			>> 0xeU)) ? (0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-					      >> 0xfU))
-		     : vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_a_reg_data
-		    [0U]));
-    // ALWAYS at VX_d_e_reg.v:145
-    vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op = 
-	((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling)
-	  ? 0xfU : (((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-		      >> 0x19U) & (0x33U == (0x7fU 
-					     & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)))
-		     ? (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__mul_alu)
-		     : (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_final_alu)));
-    vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data[1U] 
-	= vlTOPp->Vortex__DOT__d_e_b_reg_data[1U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data[0U] 
-	= vlTOPp->Vortex__DOT__d_e_b_reg_data[0U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1fU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters
-	[0x1fU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1eU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters
-	[0x1eU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1dU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters
-	[0x1dU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1cU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters
-	[0x1cU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1bU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters
-	[0x1bU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1aU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters
-	[0x1aU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x19U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters
-	[0x19U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x18U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters
-	[0x18U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x17U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters
-	[0x17U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x16U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters
-	[0x16U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x15U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters
-	[0x15U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x14U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters
-	[0x14U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x13U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters
-	[0x13U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x12U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters
-	[0x12U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x11U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters
-	[0x11U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x10U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters
-	[0x10U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xfU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters
-	[0xfU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xeU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters
-	[0xeU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xdU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters
-	[0xdU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xcU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters
-	[0xcU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xbU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters
-	[0xbU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xaU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters
-	[0xaU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[9U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters
-	[9U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[8U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters
-	[8U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[7U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters
-	[7U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[6U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters
-	[6U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[5U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters
-	[5U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[4U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters
-	[4U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[3U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters
-	[3U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[2U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters
-	[2U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[1U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters
-	[1U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters
-	[0U];
-    // ALWAYS at VX_e_m_reg.v:128
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__rd = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rd;
-    // ALWAYS at VX_e_m_reg.v:128
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__warp_num 
-	= vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__warp_num;
-    // ALWAYS at VX_e_m_reg.v:128
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb;
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_valid[1U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid
-	[1U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_valid[0U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid
-	[0U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_valid[1U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid
-	[1U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_valid[0U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid
-	[0U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data[1U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_rd2
-	[1U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data[0U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_rd2
-	[0U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid[1U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid
-	[1U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid[0U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid
-	[0U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_valid[1U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid
-	[1U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_valid[0U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid
-	[0U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_writeback__out_write_data[1U] 
-	= ((3U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb))
-	    ? vlTOPp->Vortex__DOT__vx_writeback__DOT__out_pc_data
-	   [1U] : ((1U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb))
-		    ? vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_alu_result
-		   [1U] : vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_mem_result
-		   [1U]));
-    vlTOPp->Vortex__DOT____Vcellout__vx_writeback__out_write_data[0U] 
-	= ((3U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb))
-	    ? vlTOPp->Vortex__DOT__vx_writeback__DOT__out_pc_data
-	   [0U] : ((1U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb))
-		    ? vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_alu_result
-		   [0U] : vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_mem_result
-		   [0U]));
-    vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address[1U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result
-	[1U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address[0U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result
-	[0U];
-    // ALWAYS at VX_memory.v:113
-    vlTOPp->Vortex__DOT__memory_branch_dir = (1U & 
-					      ((4U 
-						& (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type))
-					        ? (
-						   (2U 
-						    & (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type))
-						    ? 
-						   ((~ (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type)) 
-						    & (~ 
-						       (vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result
-							[0U] 
-							>> 0x1fU)))
-						    : 
-						   ((1U 
-						     & (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type))
-						     ? 
-						    (vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result
-						     [0U] 
-						     >> 0x1fU)
-						     : 
-						    (~ 
-						     (vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result
-						      [0U] 
-						      >> 0x1fU))))
-					        : (
-						   (2U 
-						    & (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type))
-						    ? 
-						   ((1U 
-						     & (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type))
-						     ? 
-						    (vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result
-						     [0U] 
-						     >> 0x1fU)
-						     : 
-						    (0U 
-						     != 
-						     vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result
-						     [0U]))
-						    : 
-						   ((IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type) 
-						    & (0U 
-						       == 
-						       vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result
-						       [0U])))));
-    vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_alu_result[1U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result
-	[1U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_alu_result[0U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result
-	[0U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_valid[1U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_valid
-	[1U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_valid[0U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_valid
-	[0U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0x1fU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers
-	[0x1fU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0x1eU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers
-	[0x1eU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0x1dU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers
-	[0x1dU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0x1cU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers
-	[0x1cU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0x1bU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers
-	[0x1bU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0x1aU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers
-	[0x1aU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0x19U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers
-	[0x19U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0x18U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers
-	[0x18U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0x17U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers
-	[0x17U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0x16U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers
-	[0x16U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0x15U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers
-	[0x15U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0x14U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers
-	[0x14U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0x13U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers
-	[0x13U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0x12U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers
-	[0x12U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0x11U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers
-	[0x11U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0x10U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers
-	[0x10U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0xfU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers
-	[0xfU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0xeU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers
-	[0xeU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0xdU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers
-	[0xdU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0xcU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers
-	[0xcU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0xbU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers
-	[0xbU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0xaU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers
-	[0xaU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[9U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers
-	[9U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[8U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers
-	[8U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[7U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers
-	[7U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[6U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers
-	[6U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[5U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers
-	[5U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[4U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers
-	[4U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[3U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers
-	[3U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[2U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers
-	[2U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[1U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers
-	[1U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers
-	[0U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data[1U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data
-	[1U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data[0U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data
-	[0U];
-    vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2 
-	= ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rs2_src)
-	    ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__itype_immed
-	    : vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data
-	   [0U]);
-    vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2 
-	= ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rs2_src)
-	    ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__itype_immed
-	    : vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data
-	   [1U]);
-    vlTOPp->out_cache_driver_in_data[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data
-	[1U];
-    vlTOPp->out_cache_driver_in_data[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data
-	[0U];
-    vlTOPp->out_cache_driver_in_valid[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid
-	[1U];
-    vlTOPp->out_cache_driver_in_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid
-	[0U];
-    vlTOPp->Vortex__DOT__memory_valid[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_valid
-	[1U];
-    vlTOPp->Vortex__DOT__memory_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_valid
-	[0U];
-    vlTOPp->Vortex__DOT__writeback_write_data[1U] = 
-	vlTOPp->Vortex__DOT____Vcellout__vx_writeback__out_write_data
-	[1U];
-    vlTOPp->Vortex__DOT__writeback_write_data[0U] = 
-	vlTOPp->Vortex__DOT____Vcellout__vx_writeback__out_write_data
-	[0U];
-    vlTOPp->out_cache_driver_in_address[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address
-	[1U];
-    vlTOPp->out_cache_driver_in_address[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address
-	[0U];
-    vlTOPp->Vortex__DOT__memory_alu_result[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_alu_result
-	[1U];
-    vlTOPp->Vortex__DOT__memory_alu_result[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_alu_result
-	[0U];
-    vlTOPp->Vortex__DOT__execute_valid[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_valid
-	[1U];
-    vlTOPp->Vortex__DOT__execute_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_valid
-	[0U];
-    vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[0U] 
-	= vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__PC_next_out;
-    vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[1U] 
-	= vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__PC_next_out;
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[0x1fU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers
-	[0x1fU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[0x1eU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers
-	[0x1eU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[0x1dU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers
-	[0x1dU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[0x1cU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers
-	[0x1cU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[0x1bU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers
-	[0x1bU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[0x1aU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers
-	[0x1aU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[0x19U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers
-	[0x19U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[0x18U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers
-	[0x18U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[0x17U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers
-	[0x17U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[0x16U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers
-	[0x16U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[0x15U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers
-	[0x15U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[0x14U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers
-	[0x14U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[0x13U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers
-	[0x13U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[0x12U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers
-	[0x12U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[0x11U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers
-	[0x11U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[0x10U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers
-	[0x10U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[0xfU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers
-	[0xfU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[0xeU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers
-	[0xeU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[0xdU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers
-	[0xdU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[0xcU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers
-	[0xcU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[0xbU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers
-	[0xbU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[0xaU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers
-	[0xaU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[9U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers
-	[9U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[8U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers
-	[8U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[7U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers
-	[7U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[6U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers
-	[6U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[5U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers
-	[5U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[4U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers
-	[4U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[3U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers
-	[3U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[2U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers
-	[2U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[1U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers
-	[1U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[0U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers
-	[0U];
-    vlTOPp->Vortex__DOT__execute_b_reg_data[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data
-	[1U];
-    vlTOPp->Vortex__DOT__execute_b_reg_data[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data
-	[0U];
-    vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__mult_signed_result 
-	= VL_MULS_QQQ(64,64,64, VL_EXTENDS_QI(64,32, 
-					      vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-					      [0U]), 
-		      VL_EXTENDS_QI(64,32, vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2));
-    vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__mult_signed_result 
-	= VL_MULS_QQQ(64,64,64, VL_EXTENDS_QI(64,32, 
-					      vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-					      [1U]), 
-		      VL_EXTENDS_QI(64,32, vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2));
-    // ALWAYS at VX_d_e_reg.v:145
-    vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rd = (0x1fU 
-						& ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling)
-						    ? 0U
-						    : 
-						   (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-						    >> 7U)));
-    // ALWAYS at VX_d_e_reg.v:145
-    vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__warp_num 
-	= (3U & ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling)
-		  ? 0U : (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num)));
-    // ALWAYS at VX_d_e_reg.v:145
-    vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling)
-						 ? 0U
-						 : 
-						(((((0x6fU 
-						     == 
-						     (0x7fU 
-						      & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) 
-						    | (0x67U 
-						       == 
-						       (0x7fU 
-							& vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction))) 
-						   | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jalrs)) 
-						  | ((0x73U 
-						      == 
-						      (0x7fU 
-						       & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) 
-						     & (0U 
-							== 
-							(7U 
-							 & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-							    >> 0xcU)))))
-						  ? 3U
-						  : 
-						 ((3U 
-						   == 
-						   (0x7fU 
-						    & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction))
-						   ? 2U
-						   : 
-						  ((((((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_itype) 
-						       | (0x33U 
-							  == 
-							  (0x7fU 
-							   & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction))) 
-						      | (0x37U 
-							 == 
-							 (0x7fU 
-							  & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction))) 
-						     | (0x17U 
-							== 
-							(0x7fU 
-							 & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction))) 
-						    | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_csr))
-						    ? 1U
-						    : 0U))));
-    vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_valid[1U] 
-	= vlTOPp->Vortex__DOT__memory_valid[1U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_valid[0U] 
-	= vlTOPp->Vortex__DOT__memory_valid[0U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data[1U] 
-	= vlTOPp->Vortex__DOT__writeback_write_data
-	[1U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data[0U] 
-	= vlTOPp->Vortex__DOT__writeback_write_data
-	[0U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_alu_result[1U] 
-	= vlTOPp->Vortex__DOT__memory_alu_result[1U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_alu_result[0U] 
-	= vlTOPp->Vortex__DOT__memory_alu_result[0U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result[1U] 
-	= vlTOPp->Vortex__DOT__memory_alu_result[1U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result[0U] 
-	= vlTOPp->Vortex__DOT__memory_alu_result[0U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_valid[1U] 
-	= vlTOPp->Vortex__DOT__execute_valid[1U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_valid[0U] 
-	= vlTOPp->Vortex__DOT__execute_valid[0U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[0x1fU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs
-	[0x1fU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[0x1eU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs
-	[0x1eU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[0x1dU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs
-	[0x1dU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[0x1cU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs
-	[0x1cU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[0x1bU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs
-	[0x1bU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[0x1aU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs
-	[0x1aU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[0x19U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs
-	[0x19U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[0x18U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs
-	[0x18U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[0x17U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs
-	[0x17U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[0x16U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs
-	[0x16U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[0x15U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs
-	[0x15U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[0x14U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs
-	[0x14U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[0x13U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs
-	[0x13U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[0x12U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs
-	[0x12U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[0x11U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs
-	[0x11U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[0x10U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs
-	[0x10U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[0xfU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs
-	[0xfU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[0xeU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs
-	[0xeU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[0xdU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs
-	[0xdU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[0xcU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs
-	[0xcU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[0xbU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs
-	[0xbU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[0xaU] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs
-	[0xaU];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[9U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs
-	[9U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[8U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs
-	[8U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[7U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs
-	[7U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[6U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs
-	[6U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[5U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs
-	[5U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[4U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs
-	[4U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[3U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs
-	[3U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[2U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs
-	[2U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[1U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs
-	[1U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[0U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs
-	[0U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_b_reg_data[1U] 
-	= vlTOPp->Vortex__DOT__execute_b_reg_data[1U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_b_reg_data[0U] 
-	= vlTOPp->Vortex__DOT__execute_b_reg_data[0U];
-    // ALWAYS at VX_alu.v:48
-    vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__0__KET____DOT__vx_alu__out_alu_result 
-	= ((0x10U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-	    ? ((8U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-	        ? 0U : ((4U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-			 ? ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-			     ? ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-				 ? ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)
-				     ? vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-				    [0U] : VL_MODDIV_III(32, 
-							 vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-							 [0U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))
-				 : ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)
-				     ? vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-				    [0U] : VL_MODDIVS_III(32, 
-							  vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-							  [0U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)))
-			     : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-				 ? ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)
-				     ? 0xffffffffU : 
-				    VL_DIV_III(32, 
-					       vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-					       [0U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))
-				 : ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)
-				     ? 0xffffffffU : 
-				    VL_DIVS_III(32, 
-						vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-						[0U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))))
-			 : ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-			     ? ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-				 ? (IData)((((QData)((IData)(
-							     vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-							     [0U])) 
-					     * (QData)((IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))) 
-					    >> 0x20U))
-				 : (IData)((((((QData)((IData)(
-							       VL_NEGATE_I((IData)(
-										(1U 
-										& (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-										[0U] 
-										>> 0x1fU)))))) 
-					       << 0x20U) 
-					      | (QData)((IData)(
-								vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-								[0U]))) 
-					     * (QData)((IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))) 
-					    >> 0x20U)))
-			     : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-				 ? (IData)((vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__mult_signed_result 
-					    >> 0x20U))
-				 : (IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__mult_signed_result)))))
-	    : ((8U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-	        ? ((4U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-		    ? ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-		        ? vlTOPp->Vortex__DOT__csr_decode_csr_data
-		        : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-			    ? vlTOPp->Vortex__DOT__csr_decode_csr_data
-			    : (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__curr_PC 
-			       + (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__upper_immed 
-				  << 0xcU)))) : ((2U 
-						  & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-						  ? 
-						 ((1U 
-						   & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-						   ? 
-						  (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__upper_immed 
-						   << 0xcU)
-						   : 
-						  ((vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-						    [0U] 
-						    >= vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)
-						    ? 0U
-						    : 0xffffffffU))
-						  : 
-						 ((1U 
-						   & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-						   ? 
-						  (vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2 
-						   & vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-						   [0U])
-						   : 
-						  (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-						   [0U] 
-						   | vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))))
-	        : ((4U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-		    ? ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-		        ? ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-			    ? VL_SHIFTRS_III(32,32,5, 
-					     vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-					     [0U], 
-					     (0x1fU 
-					      & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))
-			    : (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-			       [0U] >> (0x1fU & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)))
-		        : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-			    ? (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-			       [0U] ^ vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)
-			    : ((vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-				[0U] < vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)
-			        ? 1U : 0U))) : ((2U 
-						 & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-						 ? 
-						((1U 
-						  & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-						  ? 
-						 (VL_LTS_III(1,32,32, 
-							     vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-							     [0U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)
-						   ? 1U
-						   : 0U)
-						  : 
-						 (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-						  [0U] 
-						  << 
-						  (0x1fU 
-						   & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)))
-						 : 
-						((1U 
-						  & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-						  ? 
-						 (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-						  [0U] 
-						  - vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)
-						  : 
-						 (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-						  [0U] 
-						  + vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))))));
-    // ALWAYS at VX_alu.v:48
-    vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__1__KET____DOT__vx_alu__out_alu_result 
-	= ((0x10U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-	    ? ((8U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-	        ? 0U : ((4U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-			 ? ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-			     ? ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-				 ? ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)
-				     ? vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-				    [1U] : VL_MODDIV_III(32, 
-							 vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-							 [1U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2))
-				 : ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)
-				     ? vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-				    [1U] : VL_MODDIVS_III(32, 
-							  vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-							  [1U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)))
-			     : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-				 ? ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)
-				     ? 0xffffffffU : 
-				    VL_DIV_III(32, 
-					       vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-					       [1U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2))
-				 : ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)
-				     ? 0xffffffffU : 
-				    VL_DIVS_III(32, 
-						vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-						[1U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2))))
-			 : ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-			     ? ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-				 ? (IData)((((QData)((IData)(
-							     vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-							     [1U])) 
-					     * (QData)((IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2))) 
-					    >> 0x20U))
-				 : (IData)((((((QData)((IData)(
-							       VL_NEGATE_I((IData)(
-										(1U 
-										& (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-										[1U] 
-										>> 0x1fU)))))) 
-					       << 0x20U) 
-					      | (QData)((IData)(
-								vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-								[1U]))) 
-					     * (QData)((IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2))) 
-					    >> 0x20U)))
-			     : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-				 ? (IData)((vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__mult_signed_result 
-					    >> 0x20U))
-				 : (IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__mult_signed_result)))))
-	    : ((8U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-	        ? ((4U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-		    ? ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-		        ? vlTOPp->Vortex__DOT__csr_decode_csr_data
-		        : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-			    ? vlTOPp->Vortex__DOT__csr_decode_csr_data
-			    : (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__curr_PC 
-			       + (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__upper_immed 
-				  << 0xcU)))) : ((2U 
-						  & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-						  ? 
-						 ((1U 
-						   & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-						   ? 
-						  (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__upper_immed 
-						   << 0xcU)
-						   : 
-						  ((vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-						    [1U] 
-						    >= vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)
-						    ? 0U
-						    : 0xffffffffU))
-						  : 
-						 ((1U 
-						   & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-						   ? 
-						  (vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2 
-						   & vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-						   [1U])
-						   : 
-						  (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-						   [1U] 
-						   | vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2))))
-	        : ((4U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-		    ? ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-		        ? ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-			    ? VL_SHIFTRS_III(32,32,5, 
-					     vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-					     [1U], 
-					     (0x1fU 
-					      & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2))
-			    : (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-			       [1U] >> (0x1fU & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)))
-		        : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-			    ? (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-			       [1U] ^ vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)
-			    : ((vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-				[1U] < vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)
-			        ? 1U : 0U))) : ((2U 
-						 & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-						 ? 
-						((1U 
-						  & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-						  ? 
-						 (VL_LTS_III(1,32,32, 
-							     vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-							     [1U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)
-						   ? 1U
-						   : 0U)
-						  : 
-						 (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-						  [1U] 
-						  << 
-						  (0x1fU 
-						   & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)))
-						 : 
-						((1U 
-						  & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))
-						  ? 
-						 (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-						  [1U] 
-						  - vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)
-						  : 
-						 (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data
-						  [1U] 
-						  + vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2))))));
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_write_data[1U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data
-	[1U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_write_data[0U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data
-	[0U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_write_data[1U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data
-	[1U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_write_data[0U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data
-	[0U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_alu_result[0U] 
-	= vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__0__KET____DOT__vx_alu__out_alu_result;
-    vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_alu_result[1U] 
-	= vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__1__KET____DOT__vx_alu__out_alu_result;
-    vlTOPp->Vortex__DOT__execute_alu_result[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_alu_result
-	[1U];
-    vlTOPp->Vortex__DOT__execute_alu_result[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_alu_result
-	[0U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_alu_result[1U] 
-	= vlTOPp->Vortex__DOT__execute_alu_result[1U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_alu_result[0U] 
-	= vlTOPp->Vortex__DOT__execute_alu_result[0U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result[1U] 
-	= vlTOPp->Vortex__DOT__execute_alu_result[1U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result[0U] 
-	= vlTOPp->Vortex__DOT__execute_alu_result[0U];
-}
-
-VL_INLINE_OPT void VVortex::_sequent__TOP__4(VVortex__Syms* __restrict vlSymsp) {
-    VL_DEBUG_IF(VL_DBG_MSGF("+    VVortex::_sequent__TOP__4\n"); );
-    VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
-    // Variables
-    // Begin mtask footprint  all: 
-    VL_SIG8(__Vdly__Vortex__DOT__vx_fetch__DOT__warp_num,1,0);
-    VL_SIG8(__Vdly__Vortex__DOT__vx_fetch__DOT__warp_state,1,0);
-    VL_SIG8(__Vdlyvset__Vortex__DOT__vx_f_d_reg__DOT__valid__v0,0,0);
-    VL_SIG8(__Vdlyvval__Vortex__DOT__vx_f_d_reg__DOT__valid__v2,0,0);
-    VL_SIG8(__Vdlyvset__Vortex__DOT__vx_f_d_reg__DOT__valid__v2,0,0);
-    VL_SIG8(__Vdlyvval__Vortex__DOT__vx_f_d_reg__DOT__valid__v3,0,0);
-    // Body
-    __Vdly__Vortex__DOT__vx_fetch__DOT__warp_state 
-	= vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_state;
-    __Vdly__Vortex__DOT__vx_fetch__DOT__warp_num = vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num;
-    __Vdlyvset__Vortex__DOT__vx_f_d_reg__DOT__valid__v0 = 0U;
-    __Vdlyvset__Vortex__DOT__vx_f_d_reg__DOT__valid__v2 = 0U;
-    // ALWAYS at VX_warp.v:63
-    vlTOPp->Vortex__DOT__vx_fetch__DOT__VX_Warp_zero__DOT__real_PC 
-	= ((IData)(vlTOPp->reset) ? 0U : ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_zero_stall)
-					   ? vlTOPp->Vortex__DOT__vx_fetch__DOT__VX_Warp_zero__DOT__temp_PC
-					   : ((IData)(4U) 
-					      + vlTOPp->Vortex__DOT__vx_fetch__DOT__VX_Warp_zero__DOT__temp_PC)));
-    // ALWAYS at VX_fetch.v:49
-    __Vdly__Vortex__DOT__vx_fetch__DOT__warp_num = 
-	(3U & (((((IData)(vlTOPp->reset) | ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num) 
-					    == (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_state))) 
-		 | (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__remove_warp)) 
-		| (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__add_warp))
-	        ? 0U : ((IData)(1U) + (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num))));
-    if (vlTOPp->Vortex__DOT__vx_fetch__DOT__add_warp) {
-	__Vdly__Vortex__DOT__vx_fetch__DOT__warp_state 
-	    = (3U & ((IData)(1U) + (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_state)));
-    } else {
-	if (vlTOPp->Vortex__DOT__vx_fetch__DOT__remove_warp) {
-	    __Vdly__Vortex__DOT__vx_fetch__DOT__warp_state 
-		= (3U & ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_state) 
-			 - (IData)(1U)));
-	}
-    }
-    // ALWAYS at VX_warp.v:63
-    vlTOPp->Vortex__DOT__vx_fetch__DOT__VX_Warp_one__DOT__real_PC 
-	= ((IData)(vlTOPp->reset) ? 0U : ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_wspawn)
-					   ? vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_a_reg_data
-					  [0U] : ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_one_stall)
-						   ? vlTOPp->Vortex__DOT__vx_fetch__DOT__VX_Warp_one__DOT__temp_PC
-						   : 
-						  ((IData)(4U) 
-						   + vlTOPp->Vortex__DOT__vx_fetch__DOT__VX_Warp_one__DOT__temp_PC))));
-    // ALWAYS at VX_f_d_reg.v:36
-    if (vlTOPp->reset) {
-	vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__curr_PC = 0U;
-    } else {
-	if ((1U & (~ ((IData)(vlTOPp->Vortex__DOT__forwarding_fwd_stall) 
-		      | (IData)(vlTOPp->Vortex__DOT__decode_clone_stall))))) {
-	    vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__curr_PC 
-		= vlTOPp->Vortex__DOT__vx_fetch__DOT__out_PC;
-	}
-    }
-    // ALWAYS at VX_f_d_reg.v:36
-    if (vlTOPp->reset) {
-	__Vdlyvset__Vortex__DOT__vx_f_d_reg__DOT__valid__v0 = 1U;
-    } else {
-	if ((1U & (~ ((IData)(vlTOPp->Vortex__DOT__forwarding_fwd_stall) 
-		      | (IData)(vlTOPp->Vortex__DOT__decode_clone_stall))))) {
-	    __Vdlyvval__Vortex__DOT__vx_f_d_reg__DOT__valid__v2 
-		= vlTOPp->Vortex__DOT____Vcellinp__vx_f_d_reg__in_valid
-		[1U];
-	    __Vdlyvset__Vortex__DOT__vx_f_d_reg__DOT__valid__v2 = 1U;
-	    __Vdlyvval__Vortex__DOT__vx_f_d_reg__DOT__valid__v3 
-		= vlTOPp->Vortex__DOT____Vcellinp__vx_f_d_reg__in_valid
-		[0U];
-	}
-    }
-    // ALWAYS at VX_f_d_reg.v:36
-    if (vlTOPp->reset) {
-	vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num = 0U;
-    } else {
-	if ((1U & (~ ((IData)(vlTOPp->Vortex__DOT__forwarding_fwd_stall) 
-		      | (IData)(vlTOPp->Vortex__DOT__decode_clone_stall))))) {
-	    vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num 
-		= vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num;
-	}
-    }
-    vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_state 
-	= __Vdly__Vortex__DOT__vx_fetch__DOT__warp_state;
-    // ALWAYSPOST at VX_f_d_reg.v:42
-    if (__Vdlyvset__Vortex__DOT__vx_f_d_reg__DOT__valid__v0) {
-	vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__valid[0U] = 0U;
-	vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__valid[1U] = 0U;
-    }
-    if (__Vdlyvset__Vortex__DOT__vx_f_d_reg__DOT__valid__v2) {
-	vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__valid[1U] 
-	    = __Vdlyvval__Vortex__DOT__vx_f_d_reg__DOT__valid__v2;
-	vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__valid[0U] 
-	    = __Vdlyvval__Vortex__DOT__vx_f_d_reg__DOT__valid__v3;
-    }
-    vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num = __Vdly__Vortex__DOT__vx_fetch__DOT__warp_num;
-    // ALWAYS at VX_warp.v:50
-    vlTOPp->Vortex__DOT__vx_fetch__DOT__VX_Warp_zero__DOT__temp_PC 
-	= (((IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal) 
-	    & (0U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__warp_num)))
-	    ? vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal_dest
-	    : (((IData)(vlTOPp->Vortex__DOT__memory_branch_dir) 
-		& (0U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__warp_num)))
-	        ? vlTOPp->Vortex__DOT__memory_branch_dest
-	        : vlTOPp->Vortex__DOT__vx_fetch__DOT__VX_Warp_zero__DOT__real_PC));
-    // ALWAYS at VX_warp.v:50
-    vlTOPp->Vortex__DOT__vx_fetch__DOT__VX_Warp_one__DOT__temp_PC 
-	= (((IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal) 
-	    & (1U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__warp_num)))
-	    ? vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal_dest
-	    : (((IData)(vlTOPp->Vortex__DOT__memory_branch_dir) 
-		& (1U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__warp_num)))
-	        ? vlTOPp->Vortex__DOT__memory_branch_dest
-	        : vlTOPp->Vortex__DOT__vx_fetch__DOT__VX_Warp_one__DOT__real_PC));
-    vlTOPp->Vortex__DOT____Vcellout__vx_f_d_reg__out_valid[1U] 
-	= vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__valid
-	[1U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_f_d_reg__out_valid[0U] 
-	= vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__valid
-	[0U];
-    vlTOPp->Vortex__DOT__vx_fetch__DOT__out_PC = ((0U 
-						   == (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num))
-						   ? vlTOPp->Vortex__DOT__vx_fetch__DOT__VX_Warp_zero__DOT__temp_PC
-						   : vlTOPp->Vortex__DOT__vx_fetch__DOT__VX_Warp_one__DOT__temp_PC);
-    vlTOPp->Vortex__DOT__f_d_valid[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_f_d_reg__out_valid
-	[1U];
-    vlTOPp->Vortex__DOT__f_d_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_f_d_reg__out_valid
-	[0U];
-    vlTOPp->curr_PC = vlTOPp->Vortex__DOT__vx_fetch__DOT__out_PC;
-    vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid[1U] 
-	= vlTOPp->Vortex__DOT__f_d_valid[1U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid[0U] 
-	= vlTOPp->Vortex__DOT__f_d_valid[0U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_valid[1U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid
-	[1U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_valid[0U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid
-	[0U];
-    vlTOPp->Vortex__DOT__decode_valid[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_valid
-	[1U];
-    vlTOPp->Vortex__DOT__decode_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_valid
-	[0U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_valid[1U] 
-	= vlTOPp->Vortex__DOT__decode_valid[1U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_valid[0U] 
-	= vlTOPp->Vortex__DOT__decode_valid[0U];
-}
-
-VL_INLINE_OPT void VVortex::_combo__TOP__5(VVortex__Syms* __restrict vlSymsp) {
-    VL_DEBUG_IF(VL_DBG_MSGF("+    VVortex::_combo__TOP__5\n"); );
-    VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
-    // Body
-    vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data[1U] 
-	= vlTOPp->in_cache_driver_out_data[1U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data[0U] 
-	= vlTOPp->in_cache_driver_out_data[0U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_mem_result[1U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data
-	[1U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_mem_result[0U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data
-	[0U];
-    vlTOPp->Vortex__DOT__memory_mem_result[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_mem_result
-	[1U];
-    vlTOPp->Vortex__DOT__memory_mem_result[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_mem_result
-	[0U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_mem_result[1U] 
-	= vlTOPp->Vortex__DOT__memory_mem_result[1U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_mem_result[0U] 
-	= vlTOPp->Vortex__DOT__memory_mem_result[0U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data[1U] 
-	= vlTOPp->Vortex__DOT__memory_mem_result[1U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data[0U] 
-	= vlTOPp->Vortex__DOT__memory_mem_result[0U];
-}
-
-VL_INLINE_OPT void VVortex::_sequent__TOP__6(VVortex__Syms* __restrict vlSymsp) {
-    VL_DEBUG_IF(VL_DBG_MSGF("+    VVortex::_sequent__TOP__6\n"); );
-    VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
-    // Body
-    // ALWAYS at VX_register_file_slave.v:68
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src1_data 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers
-	[(0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-		   >> 0xfU))];
-    // ALWAYS at VX_register_file_slave.v:68
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src1_data 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers
-	[(0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-		   >> 0xfU))];
-    // ALWAYS at VX_register_file_master_slave.v:66
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_src1_data 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[(0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-		   >> 0xfU))];
-    // ALWAYS at VX_register_file_slave.v:68
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src2_data 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers
-	[(0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-		   >> 0x14U))];
-    // ALWAYS at VX_register_file_slave.v:68
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src2_data 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers
-	[(0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-		   >> 0x14U))];
-    // ALWAYS at VX_register_file_master_slave.v:66
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_src2_data 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers
-	[(0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-		   >> 0x14U))];
-    // ALWAYS at VX_register_file.v:52
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_src1_data 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[(0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-		   >> 0xfU))];
-    // ALWAYS at VX_register_file.v:52
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_src2_data 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers
-	[(0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-		   >> 0x14U))];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__rd1_register[1U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src1_data;
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd1_register[1U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src1_data;
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__rd1_register[0U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_src1_data;
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__rd2_register[1U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src2_data;
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd2_register[1U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src2_data;
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__rd2_register[0U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_src2_data;
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd1_register[0U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_src1_data;
-    vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd2_register[0U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_src2_data;
-}
-
-VL_INLINE_OPT void VVortex::_sequent__TOP__7(VVortex__Syms* __restrict vlSymsp) {
-    VL_DEBUG_IF(VL_DBG_MSGF("+    VVortex::_sequent__TOP__7\n"); );
-    VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
-    // Body
-    // ALWAYS at VX_f_d_reg.v:36
-    if (vlTOPp->reset) {
-	vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction = 0U;
-    } else {
-	if ((1U & (~ ((IData)(vlTOPp->Vortex__DOT__forwarding_fwd_stall) 
-		      | (IData)(vlTOPp->Vortex__DOT__decode_clone_stall))))) {
-	    vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-		= ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__stall)
-		    ? 0U : vlTOPp->fe_instruction);
-	}
-    }
-    vlTOPp->Vortex__DOT__vx_decode__DOT__is_itype = 
-	((0x13U == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) 
-	 | (3U == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)));
-    vlTOPp->Vortex__DOT__decode_csr_address = (0xfffU 
-					       & (((0U 
-						    != 
-						    (7U 
-						     & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-							>> 0xcU))) 
-						   & (2U 
-						      <= 
-						      (0xfffU 
-						       & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-							  >> 0x14U))))
-						   ? 
-						  (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-						   >> 0x14U)
-						   : 0x55U));
-    // ALWAYS at VX_decode.v:473
-    vlTOPp->__Vtableidx1 = (7U & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-				  >> 0xcU));
-    vlTOPp->Vortex__DOT__vx_decode__DOT__mul_alu = 
-	vlTOPp->__Vtable1_Vortex__DOT__vx_decode__DOT__mul_alu
-	[vlTOPp->__Vtableidx1];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__alu_tempp 
-	= (0xfffU & (((1U == (7U & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-				    >> 0xcU))) | (5U 
-						  == 
-						  (7U 
-						   & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-						      >> 0xcU))))
-		      ? (0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-				  >> 0x14U)) : (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-						>> 0x14U)));
-    vlTOPp->Vortex__DOT__vx_decode__DOT__is_csr = (
-						   (0x73U 
-						    == 
-						    (0x7fU 
-						     & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) 
-						   & (0U 
-						      != 
-						      (7U 
-						       & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-							  >> 0xcU))));
-    vlTOPp->Vortex__DOT__vx_decode__DOT__jal_sys_jal 
-	= ((0U == (7U & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-			 >> 0xcU))) & (2U > (0xfffU 
-					     & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-						>> 0x14U))));
-    vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone = 
-	((0x6bU == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) 
-	 & (5U == (7U & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-			 >> 0xcU))));
-    vlTOPp->Vortex__DOT__vx_decode__DOT__is_wspawn 
-	= ((0x6bU == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) 
-	   & (0U == (7U & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-			   >> 0xcU))));
-    vlTOPp->Vortex__DOT__vx_decode__DOT__is_jmprt = 
-	((0x6bU == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) 
-	 & (4U == (7U & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-			 >> 0xcU))));
-    vlTOPp->Vortex__DOT__vx_decode__DOT__is_jalrs = 
-	((0x6bU == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) 
-	 & (6U == (7U & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-			 >> 0xcU))));
-    vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd 
-	= (((((0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-			>> 0xfU)) == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rd)) 
-	     & (0U != (0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-				>> 0xfU)))) & (0U != (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb))) 
-	   & ((IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num) 
-	      == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__warp_num)));
-    vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd 
-	= (((((0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-			>> 0x14U)) == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rd)) 
-	     & (0U != (0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-				>> 0x14U)))) & (0U 
-						!= (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb))) 
-	   & ((IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num) 
-	      == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__warp_num)));
-    // ALWAYS at VX_decode.v:404
-    vlTOPp->Vortex__DOT__decode_itype_immed = ((0x40U 
-						& vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-					        ? (
-						   (0x20U 
-						    & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-						    ? 
-						   ((0x10U 
-						     & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-						     ? 0xdeadbeefU
-						     : 
-						    ((8U 
-						      & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-						      ? 0xdeadbeefU
-						      : 
-						     ((4U 
-						       & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-						       ? 0xdeadbeefU
-						       : 
-						      ((2U 
-							& vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-						        ? 
-						       ((1U 
-							 & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-							 ? 
-							((0xfffff000U 
-							  & (VL_NEGATE_I((IData)(
-										(1U 
-										& (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-										>> 0x1fU)))) 
-							     << 0xcU)) 
-							 | ((0x800U 
-							     & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-								>> 0x14U)) 
-							    | ((0x400U 
-								& (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-								   << 3U)) 
-							       | ((0x3f0U 
-								   & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-								      >> 0x15U)) 
-								  | (0xfU 
-								     & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-									>> 8U))))))
-							 : 0xdeadbeefU)
-						        : 0xdeadbeefU))))
-						    : 0xdeadbeefU)
-					        : (
-						   (0x20U 
-						    & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-						    ? 
-						   ((0x10U 
-						     & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-						     ? 0xdeadbeefU
-						     : 
-						    ((8U 
-						      & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-						      ? 0xdeadbeefU
-						      : 
-						     ((4U 
-						       & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-						       ? 0xdeadbeefU
-						       : 
-						      ((2U 
-							& vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-						        ? 
-						       ((1U 
-							 & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-							 ? 
-							((0xfffff000U 
-							  & (VL_NEGATE_I((IData)(
-										(1U 
-										& (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-										>> 0x1fU)))) 
-							     << 0xcU)) 
-							 | ((0xfe0U 
-							     & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-								>> 0x14U)) 
-							    | (0x1fU 
-							       & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-								  >> 7U))))
-							 : 0xdeadbeefU)
-						        : 0xdeadbeefU))))
-						    : 
-						   ((0x10U 
-						     & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-						     ? 
-						    ((8U 
-						      & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-						      ? 0xdeadbeefU
-						      : 
-						     ((4U 
-						       & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-						       ? 0xdeadbeefU
-						       : 
-						      ((2U 
-							& vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-						        ? 
-						       ((1U 
-							 & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-							 ? 
-							((0xfffff000U 
-							  & (VL_NEGATE_I((IData)(
-										(1U 
-										& ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__alu_tempp) 
-										>> 0xbU)))) 
-							     << 0xcU)) 
-							 | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__alu_tempp))
-							 : 0xdeadbeefU)
-						        : 0xdeadbeefU)))
-						     : 
-						    ((8U 
-						      & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-						      ? 0xdeadbeefU
-						      : 
-						     ((4U 
-						       & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-						       ? 0xdeadbeefU
-						       : 
-						      ((2U 
-							& vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-						        ? 
-						       ((1U 
-							 & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-							 ? 
-							((0xfffff000U 
-							  & (VL_NEGATE_I((IData)(
-										(1U 
-										& (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-										>> 0x1fU)))) 
-							     << 0xcU)) 
-							 | (0xfffU 
-							    & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-							       >> 0x14U)))
-							 : 0xdeadbeefU)
-						        : 0xdeadbeefU))))));
-    vlTOPp->Vortex__DOT__vx_decode__DOT__is_ebreak 
-	= ((0x73U == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) 
-	   & ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__jal_sys_jal) 
-	      & vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid
-	      [0U]));
-    vlTOPp->Vortex__DOT__decode_clone_stall = ((((0U 
-						  == (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__state_stall)) 
-						 | (1U 
-						    != (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__state_stall))) 
-						& (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone)) 
-					       | ((((0U 
-						     == (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_state_stall)) 
-						    | (1U 
-						       != (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_state_stall))) 
-						   & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone)) 
-						  | (((0U 
-						       == (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__wspawn_state_stall)) 
-						      & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_wspawn)) 
-						     | (1U 
-							< (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__wspawn_state_stall)))));
-    // ALWAYS at VX_decode.v:348
-    if ((0x40U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) {
-	if ((0x20U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) {
-	    if ((0x10U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) {
-		vlTOPp->Vortex__DOT__decode_jal_offset 
-		    = ((8U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-		        ? 0xdeadbeefU : ((4U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-					  ? 0xdeadbeefU
-					  : ((2U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-					      ? ((1U 
-						  & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-						  ? 
-						 (((0U 
-						    == 
-						    (7U 
-						     & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-							>> 0xcU))) 
-						   & (2U 
-						      > 
-						      (0xfffU 
-						       & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-							  >> 0x14U))))
-						   ? 0xb0000000U
-						   : 0xdeadbeefU)
-						  : 0xdeadbeefU)
-					      : 0xdeadbeefU)));
-	    } else {
-		if ((8U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) {
-		    if ((4U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) {
-			vlTOPp->Vortex__DOT__decode_jal_offset 
-			    = ((2U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-			        ? ((1U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-				    ? ((0xffe00000U 
-					& (VL_NEGATE_I((IData)(
-							       (1U 
-								& (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-								   >> 0x1fU)))) 
-					   << 0x15U)) 
-				       | ((0x100000U 
-					   & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-					      >> 0xbU)) 
-					  | ((0xff000U 
-					      & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) 
-					     | ((0x800U 
-						 & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-						    >> 9U)) 
-						| (0x7feU 
-						   & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-						      >> 0x14U))))))
-				    : 0xdeadbeefU) : 0xdeadbeefU);
-		    } else {
-			if ((2U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) {
-			    if ((1U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) {
-				if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jalrs) 
-				     | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jmprt))) {
-				    vlTOPp->Vortex__DOT__decode_jal_offset = 0U;
-				}
-			    } else {
-				vlTOPp->Vortex__DOT__decode_jal_offset = 0xdeadbeefU;
-			    }
-			} else {
-			    vlTOPp->Vortex__DOT__decode_jal_offset = 0xdeadbeefU;
-			}
-		    }
-		} else {
-		    vlTOPp->Vortex__DOT__decode_jal_offset 
-			= ((4U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-			    ? ((2U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-			        ? ((1U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-				    ? ((0xfffff000U 
-					& (VL_NEGATE_I((IData)(
-							       (1U 
-								& (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-								   >> 0x1fU)))) 
-					   << 0xcU)) 
-				       | (0xfffU & 
-					  (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-					   >> 0x14U)))
-				    : 0xdeadbeefU) : 0xdeadbeefU)
-			    : 0xdeadbeefU);
-		}
-	    }
-	} else {
-	    vlTOPp->Vortex__DOT__decode_jal_offset = 0xdeadbeefU;
-	}
-    } else {
-	vlTOPp->Vortex__DOT__decode_jal_offset = 0xdeadbeefU;
-    }
-    // ALWAYS at VX_decode.v:348
-    if ((0x40U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) {
-	if ((0x20U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) {
-	    if ((0x10U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) {
-		vlTOPp->Vortex__DOT__decode_jal = (
-						   (~ 
-						    (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-						     >> 3U)) 
-						   & ((~ 
-						       (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-							>> 2U)) 
-						      & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-							  >> 1U) 
-							 & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-							    & ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__jal_sys_jal) 
-							       & vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid
-							       [0U])))));
-	    } else {
-		if ((8U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) {
-		    if ((4U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) {
-			vlTOPp->Vortex__DOT__decode_jal 
-			    = ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-				>> 1U) & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-					  & vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid
-					  [0U]));
-		    } else {
-			if ((2U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) {
-			    if ((1U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) {
-				if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jalrs) 
-				     | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jmprt))) {
-				    vlTOPp->Vortex__DOT__decode_jal 
-					= vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid
-					[0U];
-				}
-			    } else {
-				vlTOPp->Vortex__DOT__decode_jal = 0U;
-			    }
-			} else {
-			    vlTOPp->Vortex__DOT__decode_jal = 0U;
-			}
-		    }
-		} else {
-		    vlTOPp->Vortex__DOT__decode_jal 
-			= ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-			    >> 2U) & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-				       >> 1U) & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-						 & vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid
-						 [0U])));
-		}
-	    }
-	} else {
-	    vlTOPp->Vortex__DOT__decode_jal = 0U;
-	}
-    } else {
-	vlTOPp->Vortex__DOT__decode_jal = 0U;
-    }
-    // ALWAYS at VX_decode.v:415
-    if ((0x40U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) {
-	if ((0x20U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) {
-	    if ((0x10U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) {
-		vlTOPp->Vortex__DOT__decode_branch_type = 0U;
-	    } else {
-		if ((8U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) {
-		    if ((4U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) {
-			vlTOPp->Vortex__DOT__decode_branch_type = 0U;
-		    } else {
-			if ((2U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) {
-			    if ((1U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) {
-				if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jalrs) 
-				     | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jmprt))) {
-				    vlTOPp->Vortex__DOT__decode_branch_type = 0U;
-				}
-			    } else {
-				vlTOPp->Vortex__DOT__decode_branch_type = 0U;
-			    }
-			} else {
-			    vlTOPp->Vortex__DOT__decode_branch_type = 0U;
-			}
-		    }
-		} else {
-		    vlTOPp->Vortex__DOT__decode_branch_type 
-			= ((4U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-			    ? 0U : ((2U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-				     ? ((1U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-					 ? ((0x4000U 
-					     & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-					     ? ((0x2000U 
-						 & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-						 ? 
-						((0x1000U 
-						  & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-						  ? 6U
-						  : 5U)
-						 : 
-						((0x1000U 
-						  & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-						  ? 4U
-						  : 3U))
-					     : ((0x2000U 
-						 & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-						 ? 0U
-						 : 
-						((0x1000U 
-						  & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-						  ? 2U
-						  : 1U)))
-					 : 0U) : 0U));
-		}
-	    }
-	} else {
-	    vlTOPp->Vortex__DOT__decode_branch_type = 0U;
-	}
-    } else {
-	vlTOPp->Vortex__DOT__decode_branch_type = 0U;
-    }
-    // ALWAYS at VX_decode.v:415
-    if ((0x40U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) {
-	if ((0x20U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) {
-	    if ((0x10U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) {
-		vlTOPp->Vortex__DOT__decode_branch_stall = 0U;
-	    } else {
-		if ((8U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) {
-		    if ((4U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) {
-			vlTOPp->Vortex__DOT__decode_branch_stall 
-			    = ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-				>> 1U) & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-					  & vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid
-					  [0U]));
-		    } else {
-			if ((2U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) {
-			    if ((1U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) {
-				if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jalrs) 
-				     | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jmprt))) {
-				    vlTOPp->Vortex__DOT__decode_branch_stall 
-					= vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid
-					[0U];
-				}
-			    } else {
-				vlTOPp->Vortex__DOT__decode_branch_stall = 0U;
-			    }
-			} else {
-			    vlTOPp->Vortex__DOT__decode_branch_stall = 0U;
-			}
-		    }
-		} else {
-		    vlTOPp->Vortex__DOT__decode_branch_stall 
-			= ((4U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-			    ? ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-				>> 1U) & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-					  & vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid
-					  [0U])) : 
-			   ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-			     >> 1U) & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-				       & vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid
-				       [0U])));
-		}
-	    }
-	} else {
-	    vlTOPp->Vortex__DOT__decode_branch_stall = 0U;
-	}
-    } else {
-	vlTOPp->Vortex__DOT__decode_branch_stall = 0U;
-    }
-    vlTOPp->Vortex__DOT__decode_change_mask = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jalrs) 
-					       | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jmprt));
-    vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd 
-	= ((((((0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-			 >> 0xfU)) == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__rd)) 
-	      & (0U != (0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-				 >> 0xfU)))) & (0U 
-						!= (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb))) 
-	    & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd))) 
-	   & ((IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num) 
-	      == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__warp_num)));
-    vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd 
-	= ((((((0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-			 >> 0x14U)) == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__rd)) 
-	      & (0U != (0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-				 >> 0x14U)))) & (0U 
-						 != (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb))) 
-	    & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd))) 
-	   & ((IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num) 
-	      == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__warp_num)));
-    vlTOPp->out_ebreak = ((0U == (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_state)) 
-			  & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_ebreak));
-    vlTOPp->Vortex__DOT__vx_fetch__DOT__add_warp = 
-	(((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_wspawn) 
-	  & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_ebreak))) 
-	 & (~ (IData)(vlTOPp->Vortex__DOT__decode_clone_stall)));
-    vlTOPp->Vortex__DOT__vx_fetch__DOT__remove_warp 
-	= (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_ebreak) 
-	    & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_wspawn))) 
-	   & (~ (IData)(vlTOPp->Vortex__DOT__decode_clone_stall)));
-    vlTOPp->Vortex__DOT__vx_decode__DOT__temp_final_alu 
-	= ((0x63U == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction))
-	    ? ((5U > (IData)(vlTOPp->Vortex__DOT__decode_branch_type))
-	        ? 1U : 0xaU) : ((0x37U == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction))
-				 ? 0xbU : ((0x17U == 
-					    (0x7fU 
-					     & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction))
-					    ? 0xcU : 
-					   ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_csr)
-					     ? ((1U 
-						 == 
-						 (3U 
-						  & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-						     >> 0xcU)))
-						 ? 0xdU
-						 : 
-						((2U 
-						  == 
-						  (3U 
-						   & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-						      >> 0xcU)))
-						  ? 0xeU
-						  : 0xfU))
-					     : (((0x23U 
-						  == 
-						  (0x7fU 
-						   & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) 
-						 | (3U 
-						    == 
-						    (0x7fU 
-						     & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)))
-						 ? 0U
-						 : 
-						((0x4000U 
-						  & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-						  ? 
-						 ((0x2000U 
-						   & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-						   ? 
-						  ((0x1000U 
-						    & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-						    ? 9U
-						    : 8U)
-						   : 
-						  ((0x1000U 
-						    & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-						    ? 
-						   ((0U 
-						     == 
-						     (0x7fU 
-						      & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-							 >> 0x19U)))
-						     ? 6U
-						     : 7U)
-						    : 5U))
-						  : 
-						 ((0x2000U 
-						   & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-						   ? 
-						  ((0x1000U 
-						    & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-						    ? 4U
-						    : 3U)
-						   : 
-						  ((0x1000U 
-						    & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)
-						    ? 2U
-						    : 
-						   ((0x13U 
-						     == 
-						     (0x7fU 
-						      & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction))
-						     ? 0U
-						     : 
-						    ((0U 
-						      == 
-						      (0x7fU 
-						       & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-							  >> 0x19U)))
-						      ? 0U
-						      : 1U))))))))));
-    vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_zero_change_mask 
-	= ((IData)(vlTOPp->Vortex__DOT__decode_change_mask) 
-	   & (0U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num)));
-    vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_one_change_mask 
-	= ((IData)(vlTOPp->Vortex__DOT__decode_change_mask) 
-	   & (1U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num)));
-    vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd 
-	= (((((((0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-			  >> 0xfU)) == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd)) 
-	       & (0U != (0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-				  >> 0xfU)))) & (0U 
-						 != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb))) 
-	     & ((IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__warp_num) 
-		== (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num))) 
-	    & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd))) 
-	   & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd)));
-    vlTOPp->Vortex__DOT__forwarding_fwd_stall = ((((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd) 
-						   | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd)) 
-						  & (2U 
-						     == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb))) 
-						 | (((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd) 
-						     | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd)) 
-						    & (2U 
-						       == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb))));
-    vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd 
-	= (((((((0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-			  >> 0x14U)) == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd)) 
-	       & (0U != (0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction 
-				  >> 0x14U)))) & (0U 
-						  != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb))) 
-	     & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd))) 
-	    & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd))) 
-	   & ((IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__warp_num) 
-	      == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num)));
-    vlTOPp->Vortex__DOT__forwarding_src1_fwd = (((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd) 
-						 | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd)) 
-						| (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd));
-    vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling 
-	= (((IData)(vlTOPp->Vortex__DOT__forwarding_fwd_stall) 
-	    | (IData)(vlTOPp->Vortex__DOT__execute_branch_stall)) 
-	   | (IData)(vlTOPp->Vortex__DOT__decode_clone_stall));
-    vlTOPp->Vortex__DOT__vx_fetch__DOT__stall = ((((IData)(vlTOPp->Vortex__DOT__decode_clone_stall) 
-						   | (IData)(vlTOPp->Vortex__DOT__decode_branch_stall)) 
-						  | (IData)(vlTOPp->Vortex__DOT__forwarding_fwd_stall)) 
-						 | (IData)(vlTOPp->Vortex__DOT__execute_branch_stall));
-    vlTOPp->Vortex__DOT__forwarding_src2_fwd = (((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd) 
-						 | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd)) 
-						| (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd));
-    vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_zero_stall 
-	= ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__stall) 
-	   | (1U == (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num)));
-    vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_one_stall 
-	= ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__stall) 
-	   | (0U == (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num)));
-}
-
-VL_INLINE_OPT void VVortex::_combo__TOP__8(VVortex__Syms* __restrict vlSymsp) {
-    VL_DEBUG_IF(VL_DBG_MSGF("+    VVortex::_combo__TOP__8\n"); );
-    VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
-    // Body
-    vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data[1U] 
-	= ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd)
-	    ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb))
-	        ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next
-	       [1U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result
-	       [1U]) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd)
-			 ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb))
-			     ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next
-			    [1U] : ((2U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb))
-				     ? vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data
-				    [1U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result
-				    [1U])) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd)
-					       ? ((3U 
-						   == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb))
-						   ? 
-						  vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next
-						  [1U]
-						   : 
-						  ((2U 
-						    == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb))
-						    ? 
-						   vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data
-						   [1U]
-						    : 
-						   vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result
-						   [1U]))
-					       : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result
-					      [1U])));
-    vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data[0U] 
-	= ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd)
-	    ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb))
-	        ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next
-	       [0U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result
-	       [0U]) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd)
-			 ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb))
-			     ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next
-			    [0U] : ((2U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb))
-				     ? vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data
-				    [0U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result
-				    [0U])) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd)
-					       ? ((3U 
-						   == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb))
-						   ? 
-						  vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next
-						  [0U]
-						   : 
-						  ((2U 
-						    == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb))
-						    ? 
-						   vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data
-						   [0U]
-						    : 
-						   vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result
-						   [0U]))
-					       : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result
-					      [0U])));
-    vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data[1U] 
-	= ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd)
-	    ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb))
-	        ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next
-	       [1U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result
-	       [1U]) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd)
-			 ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb))
-			     ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next
-			    [1U] : ((2U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb))
-				     ? vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data
-				    [1U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result
-				    [1U])) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd)
-					       ? ((3U 
-						   == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb))
-						   ? 
-						  vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next
-						  [1U]
-						   : 
-						  ((2U 
-						    == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb))
-						    ? 
-						   vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data
-						   [1U]
-						    : 
-						   vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result
-						   [1U]))
-					       : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result
-					      [1U])));
-    vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data[0U] 
-	= ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd)
-	    ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb))
-	        ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next
-	       [0U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result
-	       [0U]) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd)
-			 ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb))
-			     ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next
-			    [0U] : ((2U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb))
-				     ? vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data
-				    [0U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result
-				    [0U])) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd)
-					       ? ((3U 
-						   == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb))
-						   ? 
-						  vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next
-						  [0U]
-						   : 
-						  ((2U 
-						    == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb))
-						    ? 
-						   vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data
-						   [0U]
-						    : 
-						   vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result
-						   [0U]))
-					       : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result
-					      [0U])));
-    vlTOPp->Vortex__DOT__forwarding_src1_fwd_data[1U] 
-	= vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data
-	[1U];
-    vlTOPp->Vortex__DOT__forwarding_src1_fwd_data[0U] 
-	= vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data
-	[0U];
-    vlTOPp->Vortex__DOT__forwarding_src2_fwd_data[1U] 
-	= vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data
-	[1U];
-    vlTOPp->Vortex__DOT__forwarding_src2_fwd_data[0U] 
-	= vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data
-	[0U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data[1U] 
-	= vlTOPp->Vortex__DOT__forwarding_src1_fwd_data
-	[1U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data[0U] 
-	= vlTOPp->Vortex__DOT__forwarding_src1_fwd_data
-	[0U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data[1U] 
-	= vlTOPp->Vortex__DOT__forwarding_src2_fwd_data
-	[1U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data[0U] 
-	= vlTOPp->Vortex__DOT__forwarding_src2_fwd_data
-	[0U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_src1_fwd_data[1U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data
-	[1U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_src1_fwd_data[0U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data
-	[0U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_src1_fwd_data[1U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data
-	[1U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_src1_fwd_data[0U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data
-	[0U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_src2_fwd_data[1U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data
-	[1U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_src2_fwd_data[0U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data
-	[0U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_src2_fwd_data[1U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data
-	[1U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_src2_fwd_data[0U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data
-	[0U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_a_reg_data[0U] 
-	= ((0x6fU == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction))
-	    ? vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__curr_PC
-	    : ((IData)(vlTOPp->Vortex__DOT__forwarding_src1_fwd)
-	        ? vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_src1_fwd_data
-	       [0U] : vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd1_register
-	       [0U]));
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_a_reg_data[1U] 
-	= ((0x6fU == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction))
-	    ? vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__curr_PC
-	    : ((IData)(vlTOPp->Vortex__DOT__forwarding_src1_fwd)
-	        ? vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_src1_fwd_data
-	       [1U] : vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd1_register
-	       [1U]));
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_one__out_a_reg_data[0U] 
-	= ((0x6fU == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction))
-	    ? vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__curr_PC
-	    : ((IData)(vlTOPp->Vortex__DOT__forwarding_src1_fwd)
-	        ? vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_src1_fwd_data
-	       [0U] : vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__rd1_register
-	       [0U]));
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_one__out_a_reg_data[1U] 
-	= ((0x6fU == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction))
-	    ? vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__curr_PC
-	    : ((IData)(vlTOPp->Vortex__DOT__forwarding_src1_fwd)
-	        ? vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_src1_fwd_data
-	       [1U] : vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__rd1_register
-	       [1U]));
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_b_reg_data[0U] 
-	= ((IData)(vlTOPp->Vortex__DOT__forwarding_src2_fwd)
-	    ? vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_src2_fwd_data
-	   [0U] : vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd2_register
-	   [0U]);
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_b_reg_data[1U] 
-	= ((IData)(vlTOPp->Vortex__DOT__forwarding_src2_fwd)
-	    ? vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_src2_fwd_data
-	   [1U] : vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd2_register
-	   [1U]);
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_one__out_b_reg_data[0U] 
-	= ((IData)(vlTOPp->Vortex__DOT__forwarding_src2_fwd)
-	    ? vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_src2_fwd_data
-	   [0U] : vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__rd2_register
-	   [0U]);
-    vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_one__out_b_reg_data[1U] 
-	= ((IData)(vlTOPp->Vortex__DOT__forwarding_src2_fwd)
-	    ? vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_src2_fwd_data
-	   [1U] : vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__rd2_register
-	   [1U]);
-    vlTOPp->Vortex__DOT__vx_decode__DOT__zero_a_reg_data[1U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_a_reg_data
-	[1U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__zero_a_reg_data[0U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_a_reg_data
-	[0U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__one_a_reg_data[1U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_one__out_a_reg_data
-	[1U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__one_a_reg_data[0U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_one__out_a_reg_data
-	[0U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__zero_b_reg_data[1U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_b_reg_data
-	[1U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__zero_b_reg_data[0U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_b_reg_data
-	[0U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__one_b_reg_data[1U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_one__out_b_reg_data
-	[1U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__one_b_reg_data[0U] 
-	= vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_one__out_b_reg_data
-	[0U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_a_reg_data[1U] 
-	= ((0U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num))
-	    ? vlTOPp->Vortex__DOT__vx_decode__DOT__zero_a_reg_data
-	   [1U] : vlTOPp->Vortex__DOT__vx_decode__DOT__one_a_reg_data
-	   [1U]);
-    vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_a_reg_data[0U] 
-	= ((0U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num))
-	    ? vlTOPp->Vortex__DOT__vx_decode__DOT__zero_a_reg_data
-	   [0U] : vlTOPp->Vortex__DOT__vx_decode__DOT__one_a_reg_data
-	   [0U]);
-    vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_b_reg_data[1U] 
-	= ((0U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num))
-	    ? vlTOPp->Vortex__DOT__vx_decode__DOT__zero_b_reg_data
-	   [1U] : vlTOPp->Vortex__DOT__vx_decode__DOT__one_b_reg_data
-	   [1U]);
-    vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_b_reg_data[0U] 
-	= ((0U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num))
-	    ? vlTOPp->Vortex__DOT__vx_decode__DOT__zero_b_reg_data
-	   [0U] : vlTOPp->Vortex__DOT__vx_decode__DOT__one_b_reg_data
-	   [0U]);
-    vlTOPp->Vortex__DOT__decode_a_reg_data[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_a_reg_data
-	[1U];
-    vlTOPp->Vortex__DOT__decode_a_reg_data[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_a_reg_data
-	[0U];
-    vlTOPp->Vortex__DOT__decode_b_reg_data[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_b_reg_data
-	[1U];
-    vlTOPp->Vortex__DOT__decode_b_reg_data[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_b_reg_data
-	[0U];
-    vlTOPp->Vortex__DOT__vx_decode__DOT__jalrs_thread_mask[0U] 
-	= VL_LTES_III(1,32,32, 0U, vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_b_reg_data
-		      [0U]);
-    vlTOPp->Vortex__DOT__vx_decode__DOT__jalrs_thread_mask[1U] 
-	= VL_LTES_III(1,32,32, 1U, vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_b_reg_data
-		      [0U]);
-    vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_a_reg_data[1U] 
-	= vlTOPp->Vortex__DOT__decode_a_reg_data[1U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_a_reg_data[0U] 
-	= vlTOPp->Vortex__DOT__decode_a_reg_data[0U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_b_reg_data[1U] 
-	= vlTOPp->Vortex__DOT__decode_b_reg_data[1U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_b_reg_data[0U] 
-	= vlTOPp->Vortex__DOT__decode_b_reg_data[0U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_thread_mask[1U] 
-	= ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jalrs)
-	    ? vlTOPp->Vortex__DOT__vx_decode__DOT__jalrs_thread_mask
-	   [1U] : vlTOPp->Vortex__DOT__vx_decode__DOT__jmprt_thread_mask
-	   [1U]);
-    vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_thread_mask[0U] 
-	= ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jalrs)
-	    ? vlTOPp->Vortex__DOT__vx_decode__DOT__jalrs_thread_mask
-	   [0U] : vlTOPp->Vortex__DOT__vx_decode__DOT__jmprt_thread_mask
-	   [0U]);
-    vlTOPp->Vortex__DOT__decode_thread_mask[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_thread_mask
-	[1U];
-    vlTOPp->Vortex__DOT__decode_thread_mask[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_thread_mask
-	[0U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask[1U] 
-	= vlTOPp->Vortex__DOT__decode_thread_mask[1U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask[0U] 
-	= vlTOPp->Vortex__DOT__decode_thread_mask[0U];
-    vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__VX_Warp_zero__in_thread_mask[1U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask
-	[1U];
-    vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__VX_Warp_zero__in_thread_mask[0U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask
-	[0U];
-    vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__VX_Warp_one__in_thread_mask[1U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask
-	[1U];
-    vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__VX_Warp_one__in_thread_mask[0U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask
-	[0U];
-    // ALWAYS at VX_warp.v:36
-    if (vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_zero_change_mask) {
-	vlTOPp->Vortex__DOT__vx_fetch__DOT__VX_Warp_zero__DOT__valid[1U] 
-	    = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__VX_Warp_zero__in_thread_mask
-	    [1U];
-	vlTOPp->Vortex__DOT__vx_fetch__DOT__VX_Warp_zero__DOT__valid[0U] 
-	    = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__VX_Warp_zero__in_thread_mask
-	    [0U];
-    }
-    // ALWAYS at VX_warp.v:36
-    if (vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_one_change_mask) {
-	vlTOPp->Vortex__DOT__vx_fetch__DOT__VX_Warp_one__DOT__valid[1U] 
-	    = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__VX_Warp_one__in_thread_mask
-	    [1U];
-	vlTOPp->Vortex__DOT__vx_fetch__DOT__VX_Warp_one__DOT__valid[0U] 
-	    = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__VX_Warp_one__in_thread_mask
-	    [0U];
-    }
-    vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__VX_Warp_zero__out_valid[0U] 
-	= ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_zero_change_mask)
-	    ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__VX_Warp_zero__in_thread_mask
-	   [0U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_zero_stall)) 
-		   & vlTOPp->Vortex__DOT__vx_fetch__DOT__VX_Warp_zero__DOT__valid
-		   [0U]));
-    vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__VX_Warp_zero__out_valid[1U] 
-	= ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_zero_change_mask)
-	    ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__VX_Warp_zero__in_thread_mask
-	   [1U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_zero_stall)) 
-		   & vlTOPp->Vortex__DOT__vx_fetch__DOT__VX_Warp_zero__DOT__valid
-		   [1U]));
-    vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__VX_Warp_one__out_valid[0U] 
-	= ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_one_change_mask)
-	    ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__VX_Warp_one__in_thread_mask
-	   [0U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_one_stall)) 
-		   & vlTOPp->Vortex__DOT__vx_fetch__DOT__VX_Warp_one__DOT__valid
-		   [0U]));
-    vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__VX_Warp_one__out_valid[1U] 
-	= ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_one_change_mask)
-	    ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__VX_Warp_one__in_thread_mask
-	   [1U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_one_stall)) 
-		   & vlTOPp->Vortex__DOT__vx_fetch__DOT__VX_Warp_one__DOT__valid
-		   [1U]));
-    vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_zero_valid[1U] 
-	= vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__VX_Warp_zero__out_valid
-	[1U];
-    vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_zero_valid[0U] 
-	= vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__VX_Warp_zero__out_valid
-	[0U];
-    vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_one_valid[1U] 
-	= vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__VX_Warp_one__out_valid
-	[1U];
-    vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_one_valid[0U] 
-	= vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__VX_Warp_one__out_valid
-	[0U];
-    vlTOPp->Vortex__DOT____Vcellout__vx_fetch__out_valid[1U] 
-	= ((0U == (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num))
-	    ? vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_zero_valid
-	   [1U] : vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_one_valid
-	   [1U]);
-    vlTOPp->Vortex__DOT____Vcellout__vx_fetch__out_valid[0U] 
-	= ((0U == (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num))
-	    ? vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_zero_valid
-	   [0U] : vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_one_valid
-	   [0U]);
-    vlTOPp->Vortex__DOT__fetch_valid[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_fetch__out_valid
-	[1U];
-    vlTOPp->Vortex__DOT__fetch_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_fetch__out_valid
-	[0U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_f_d_reg__in_valid[1U] 
-	= vlTOPp->Vortex__DOT__fetch_valid[1U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_f_d_reg__in_valid[0U] 
-	= vlTOPp->Vortex__DOT__fetch_valid[0U];
-}
-
-void VVortex::_eval(VVortex__Syms* __restrict vlSymsp) {
-    VL_DEBUG_IF(VL_DBG_MSGF("+    VVortex::_eval\n"); );
-    VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
-    // Body
-    if (((IData)(vlTOPp->clk) & (~ (IData)(vlTOPp->__Vclklast__TOP__clk)))) {
-	vlTOPp->_sequent__TOP__3(vlSymsp);
-    }
-    if ((((IData)(vlTOPp->clk) & (~ (IData)(vlTOPp->__Vclklast__TOP__clk))) 
-	 | ((IData)(vlTOPp->reset) & (~ (IData)(vlTOPp->__Vclklast__TOP__reset))))) {
-	vlTOPp->_sequent__TOP__4(vlSymsp);
-    }
-    vlTOPp->_combo__TOP__5(vlSymsp);
-    if (((~ (IData)(vlTOPp->clk)) & (IData)(vlTOPp->__Vclklast__TOP__clk))) {
-	vlTOPp->_sequent__TOP__6(vlSymsp);
-    }
-    if ((((IData)(vlTOPp->clk) & (~ (IData)(vlTOPp->__Vclklast__TOP__clk))) 
-	 | ((IData)(vlTOPp->reset) & (~ (IData)(vlTOPp->__Vclklast__TOP__reset))))) {
-	vlTOPp->_sequent__TOP__7(vlSymsp);
-    }
-    vlTOPp->_combo__TOP__8(vlSymsp);
-    // Final
-    vlTOPp->__Vclklast__TOP__clk = vlTOPp->clk;
-    vlTOPp->__Vclklast__TOP__reset = vlTOPp->reset;
-}
-
-void VVortex::_eval_initial(VVortex__Syms* __restrict vlSymsp) {
-    VL_DEBUG_IF(VL_DBG_MSGF("+    VVortex::_eval_initial\n"); );
-    VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
-    // Body
-    vlTOPp->_initial__TOP__1(vlSymsp);
-    vlTOPp->__Vclklast__TOP__clk = vlTOPp->clk;
-    vlTOPp->__Vclklast__TOP__reset = vlTOPp->reset;
-}
-
-void VVortex::final() {
-    VL_DEBUG_IF(VL_DBG_MSGF("+    VVortex::final\n"); );
-    // Variables
-    VVortex__Syms* __restrict vlSymsp = this->__VlSymsp;
-    VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
-}
-
-void VVortex::_eval_settle(VVortex__Syms* __restrict vlSymsp) {
-    VL_DEBUG_IF(VL_DBG_MSGF("+    VVortex::_eval_settle\n"); );
-    VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
-    // Body
-    vlTOPp->_settle__TOP__2(vlSymsp);
-}
-
-VL_INLINE_OPT QData VVortex::_change_request(VVortex__Syms* __restrict vlSymsp) {
-    VL_DEBUG_IF(VL_DBG_MSGF("+    VVortex::_change_request\n"); );
-    VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
-    // Body
-    // Change detection
-    QData __req = false;  // Logically a bool
-    return __req;
-}
-
-#ifdef VL_DEBUG
-void VVortex::_eval_debug_assertions() {
-    VL_DEBUG_IF(VL_DBG_MSGF("+    VVortex::_eval_debug_assertions\n"); );
-    // Body
-    if (VL_UNLIKELY((clk & 0xfeU))) {
-	Verilated::overWidthError("clk");}
-    if (VL_UNLIKELY((reset & 0xfeU))) {
-	Verilated::overWidthError("reset");}
-}
-#endif // VL_DEBUG
-
-void VVortex::_ctor_var_reset() {
-    VL_DEBUG_IF(VL_DBG_MSGF("+    VVortex::_ctor_var_reset\n"); );
-    // Body
-    clk = VL_RAND_RESET_I(1);
-    reset = VL_RAND_RESET_I(1);
-    fe_instruction = VL_RAND_RESET_I(32);
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    in_cache_driver_out_data[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    curr_PC = VL_RAND_RESET_I(32);
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    out_cache_driver_in_address[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    out_cache_driver_in_mem_read = VL_RAND_RESET_I(3);
-    out_cache_driver_in_mem_write = VL_RAND_RESET_I(3);
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    out_cache_driver_in_valid[__Vi0] = VL_RAND_RESET_I(1);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    out_cache_driver_in_data[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    out_ebreak = VL_RAND_RESET_I(1);
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__fetch_valid[__Vi0] = VL_RAND_RESET_I(1);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__f_d_valid[__Vi0] = VL_RAND_RESET_I(1);
-    }}
-    Vortex__DOT__decode_branch_stall = VL_RAND_RESET_I(1);
-    Vortex__DOT__decode_csr_address = VL_RAND_RESET_I(12);
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__decode_a_reg_data[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__decode_b_reg_data[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    Vortex__DOT__decode_itype_immed = VL_RAND_RESET_I(32);
-    Vortex__DOT__decode_branch_type = VL_RAND_RESET_I(3);
-    Vortex__DOT__decode_jal = VL_RAND_RESET_I(1);
-    Vortex__DOT__decode_jal_offset = VL_RAND_RESET_I(32);
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__decode_valid[__Vi0] = VL_RAND_RESET_I(1);
-    }}
-    Vortex__DOT__decode_clone_stall = VL_RAND_RESET_I(1);
-    Vortex__DOT__decode_change_mask = VL_RAND_RESET_I(1);
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__decode_thread_mask[__Vi0] = VL_RAND_RESET_I(1);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__d_e_a_reg_data[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__d_e_b_reg_data[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__d_e_valid[__Vi0] = VL_RAND_RESET_I(1);
-    }}
-    Vortex__DOT__execute_branch_stall = VL_RAND_RESET_I(1);
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__execute_alu_result[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__execute_b_reg_data[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__execute_valid[__Vi0] = VL_RAND_RESET_I(1);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__e_m_alu_result[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__e_m_b_reg_data[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__e_m_valid[__Vi0] = VL_RAND_RESET_I(1);
-    }}
-    Vortex__DOT__memory_branch_dir = VL_RAND_RESET_I(1);
-    Vortex__DOT__memory_branch_dest = VL_RAND_RESET_I(32);
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__memory_alu_result[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__memory_mem_result[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__memory_valid[__Vi0] = VL_RAND_RESET_I(1);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__m_w_alu_result[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__m_w_mem_result[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__m_w_valid[__Vi0] = VL_RAND_RESET_I(1);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__writeback_write_data[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    Vortex__DOT__csr_decode_csr_data = VL_RAND_RESET_I(32);
-    Vortex__DOT__forwarding_fwd_stall = VL_RAND_RESET_I(1);
-    Vortex__DOT__forwarding_src1_fwd = VL_RAND_RESET_I(1);
-    Vortex__DOT__forwarding_src2_fwd = VL_RAND_RESET_I(1);
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__forwarding_src1_fwd_data[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__forwarding_src2_fwd_data[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT____Vcellout__vx_fetch__out_valid[__Vi0] = VL_RAND_RESET_I(1);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask[__Vi0] = VL_RAND_RESET_I(1);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT____Vcellout__vx_f_d_reg__out_valid[__Vi0] = VL_RAND_RESET_I(1);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT____Vcellinp__vx_f_d_reg__in_valid[__Vi0] = VL_RAND_RESET_I(1);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT____Vcellout__vx_decode__out_thread_mask[__Vi0] = VL_RAND_RESET_I(1);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT____Vcellout__vx_decode__out_valid[__Vi0] = VL_RAND_RESET_I(1);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT____Vcellout__vx_decode__out_b_reg_data[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT____Vcellout__vx_decode__out_a_reg_data[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT____Vcellinp__vx_decode__in_wb_valid[__Vi0] = VL_RAND_RESET_I(1);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT____Vcellinp__vx_decode__in_write_data[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT____Vcellinp__vx_decode__in_valid[__Vi0] = VL_RAND_RESET_I(1);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT____Vcellout__vx_d_e_reg__out_valid[__Vi0] = VL_RAND_RESET_I(1);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT____Vcellout__vx_d_e_reg__out_b_reg_data[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT____Vcellinp__vx_d_e_reg__in_valid[__Vi0] = VL_RAND_RESET_I(1);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT____Vcellinp__vx_d_e_reg__in_b_reg_data[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT____Vcellinp__vx_d_e_reg__in_a_reg_data[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT____Vcellout__vx_execute__out_valid[__Vi0] = VL_RAND_RESET_I(1);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT____Vcellout__vx_execute__out_b_reg_data[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT____Vcellout__vx_execute__out_alu_result[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT____Vcellinp__vx_execute__in_valid[__Vi0] = VL_RAND_RESET_I(1);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT____Vcellout__vx_e_m_reg__out_valid[__Vi0] = VL_RAND_RESET_I(1);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT____Vcellout__vx_e_m_reg__out_b_reg_data[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT____Vcellout__vx_e_m_reg__out_alu_result[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT____Vcellinp__vx_e_m_reg__in_valid[__Vi0] = VL_RAND_RESET_I(1);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT____Vcellinp__vx_e_m_reg__in_b_reg_data[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT____Vcellinp__vx_e_m_reg__in_alu_result[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid[__Vi0] = VL_RAND_RESET_I(1);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT____Vcellout__vx_memory__out_valid[__Vi0] = VL_RAND_RESET_I(1);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT____Vcellout__vx_memory__out_mem_result[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT____Vcellout__vx_memory__out_alu_result[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT____Vcellinp__vx_memory__in_valid[__Vi0] = VL_RAND_RESET_I(1);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT____Vcellinp__vx_memory__in_rd2[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT____Vcellinp__vx_memory__in_alu_result[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT____Vcellout__vx_m_w_reg__out_valid[__Vi0] = VL_RAND_RESET_I(1);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT____Vcellout__vx_m_w_reg__out_mem_result[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT____Vcellout__vx_m_w_reg__out_alu_result[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT____Vcellinp__vx_m_w_reg__in_valid[__Vi0] = VL_RAND_RESET_I(1);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT____Vcellinp__vx_m_w_reg__in_mem_result[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT____Vcellinp__vx_m_w_reg__in_alu_result[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT____Vcellout__vx_writeback__out_write_data[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT____Vcellinp__vx_writeback__in_mem_result[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT____Vcellinp__vx_writeback__in_alu_result[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    Vortex__DOT__vx_fetch__DOT__stall = VL_RAND_RESET_I(1);
-    Vortex__DOT__vx_fetch__DOT__out_PC = VL_RAND_RESET_I(32);
-    Vortex__DOT__vx_fetch__DOT__warp_num = VL_RAND_RESET_I(2);
-    Vortex__DOT__vx_fetch__DOT__warp_state = VL_RAND_RESET_I(2);
-    Vortex__DOT__vx_fetch__DOT__add_warp = VL_RAND_RESET_I(1);
-    Vortex__DOT__vx_fetch__DOT__remove_warp = VL_RAND_RESET_I(1);
-    Vortex__DOT__vx_fetch__DOT__warp_zero_change_mask = VL_RAND_RESET_I(1);
-    Vortex__DOT__vx_fetch__DOT__warp_zero_stall = VL_RAND_RESET_I(1);
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__vx_fetch__DOT__warp_zero_valid[__Vi0] = VL_RAND_RESET_I(1);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__vx_fetch__DOT____Vcellout__VX_Warp_zero__out_valid[__Vi0] = VL_RAND_RESET_I(1);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__vx_fetch__DOT____Vcellinp__VX_Warp_zero__in_thread_mask[__Vi0] = VL_RAND_RESET_I(1);
-    }}
-    Vortex__DOT__vx_fetch__DOT__warp_one_change_mask = VL_RAND_RESET_I(1);
-    Vortex__DOT__vx_fetch__DOT__warp_one_stall = VL_RAND_RESET_I(1);
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__vx_fetch__DOT__warp_one_valid[__Vi0] = VL_RAND_RESET_I(1);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__vx_fetch__DOT____Vcellout__VX_Warp_one__out_valid[__Vi0] = VL_RAND_RESET_I(1);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__vx_fetch__DOT____Vcellinp__VX_Warp_one__in_thread_mask[__Vi0] = VL_RAND_RESET_I(1);
-    }}
-    Vortex__DOT__vx_fetch__DOT__VX_Warp_zero__DOT__real_PC = VL_RAND_RESET_I(32);
-    Vortex__DOT__vx_fetch__DOT__VX_Warp_zero__DOT__temp_PC = VL_RAND_RESET_I(32);
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__vx_fetch__DOT__VX_Warp_zero__DOT__valid[__Vi0] = VL_RAND_RESET_I(1);
-    }}
-    Vortex__DOT__vx_fetch__DOT__VX_Warp_one__DOT__real_PC = VL_RAND_RESET_I(32);
-    Vortex__DOT__vx_fetch__DOT__VX_Warp_one__DOT__temp_PC = VL_RAND_RESET_I(32);
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__vx_fetch__DOT__VX_Warp_one__DOT__valid[__Vi0] = VL_RAND_RESET_I(1);
-    }}
-    Vortex__DOT__vx_f_d_reg__DOT__instruction = VL_RAND_RESET_I(32);
-    Vortex__DOT__vx_f_d_reg__DOT__curr_PC = VL_RAND_RESET_I(32);
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__vx_f_d_reg__DOT__valid[__Vi0] = VL_RAND_RESET_I(1);
-    }}
-    Vortex__DOT__vx_f_d_reg__DOT__warp_num = VL_RAND_RESET_I(2);
-    Vortex__DOT__vx_decode__DOT__is_itype = VL_RAND_RESET_I(1);
-    Vortex__DOT__vx_decode__DOT__is_csr = VL_RAND_RESET_I(1);
-    Vortex__DOT__vx_decode__DOT__is_clone = VL_RAND_RESET_I(1);
-    Vortex__DOT__vx_decode__DOT__is_jalrs = VL_RAND_RESET_I(1);
-    Vortex__DOT__vx_decode__DOT__is_jmprt = VL_RAND_RESET_I(1);
-    Vortex__DOT__vx_decode__DOT__is_wspawn = VL_RAND_RESET_I(1);
-    Vortex__DOT__vx_decode__DOT__jal_sys_jal = VL_RAND_RESET_I(1);
-    Vortex__DOT__vx_decode__DOT__alu_tempp = VL_RAND_RESET_I(12);
-    Vortex__DOT__vx_decode__DOT__mul_alu = VL_RAND_RESET_I(5);
-    { int __Vi0=0; for (; __Vi0<32; ++__Vi0) {
-	    Vortex__DOT__vx_decode__DOT__w0_t0_registers[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__vx_decode__DOT__zero_a_reg_data[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__vx_decode__DOT__zero_b_reg_data[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<32; ++__Vi0) {
-	    Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_b_reg_data[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_a_reg_data[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_write_data[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_src2_fwd_data[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_src1_fwd_data[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_valid[__Vi0] = VL_RAND_RESET_I(1);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__vx_decode__DOT__one_a_reg_data[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__vx_decode__DOT__one_b_reg_data[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_one__out_b_reg_data[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_one__out_a_reg_data[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<32; ++__Vi0) {
-	    Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_write_data[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_src2_fwd_data[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_src1_fwd_data[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_valid[__Vi0] = VL_RAND_RESET_I(1);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__vx_decode__DOT__jalrs_thread_mask[__Vi0] = VL_RAND_RESET_I(1);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__vx_decode__DOT__jmprt_thread_mask[__Vi0] = VL_RAND_RESET_I(1);
-    }}
-    Vortex__DOT__vx_decode__DOT__is_ebreak = VL_RAND_RESET_I(1);
-    Vortex__DOT__vx_decode__DOT__temp_final_alu = VL_RAND_RESET_I(5);
-    Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__state_stall = VL_RAND_RESET_I(6);
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd1_register[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd2_register[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<32; ++__Vi0) {
-	    Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_src2_data = VL_RAND_RESET_I(32);
-    Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_src1_data = VL_RAND_RESET_I(32);
-    { int __Vi0=0; for (; __Vi0<32; ++__Vi0) {
-	    Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src2_data = VL_RAND_RESET_I(32);
-    Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src1_data = VL_RAND_RESET_I(32);
-    { int __Vi0=0; for (; __Vi0<32; ++__Vi0) {
-	    Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<32; ++__Vi0) {
-	    Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<32; ++__Vi0) {
-	    Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__rd1_register[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__rd2_register[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<32; ++__Vi0) {
-	    Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_state_stall = VL_RAND_RESET_I(6);
-    Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__wspawn_state_stall = VL_RAND_RESET_I(6);
-    Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_src2_data = VL_RAND_RESET_I(32);
-    Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_src1_data = VL_RAND_RESET_I(32);
-    { int __Vi0=0; for (; __Vi0<32; ++__Vi0) {
-	    Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<32; ++__Vi0) {
-	    Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src2_data = VL_RAND_RESET_I(32);
-    Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src1_data = VL_RAND_RESET_I(32);
-    { int __Vi0=0; for (; __Vi0<32; ++__Vi0) {
-	    Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<32; ++__Vi0) {
-	    Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<32; ++__Vi0) {
-	    Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    Vortex__DOT__vx_d_e_reg__DOT__rd = VL_RAND_RESET_I(5);
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__vx_d_e_reg__DOT__a_reg_data[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__vx_d_e_reg__DOT__b_reg_data[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    Vortex__DOT__vx_d_e_reg__DOT__alu_op = VL_RAND_RESET_I(5);
-    Vortex__DOT__vx_d_e_reg__DOT__wb = VL_RAND_RESET_I(2);
-    Vortex__DOT__vx_d_e_reg__DOT__PC_next_out = VL_RAND_RESET_I(32);
-    Vortex__DOT__vx_d_e_reg__DOT__rs2_src = VL_RAND_RESET_I(1);
-    Vortex__DOT__vx_d_e_reg__DOT__itype_immed = VL_RAND_RESET_I(32);
-    Vortex__DOT__vx_d_e_reg__DOT__mem_read = VL_RAND_RESET_I(3);
-    Vortex__DOT__vx_d_e_reg__DOT__mem_write = VL_RAND_RESET_I(3);
-    Vortex__DOT__vx_d_e_reg__DOT__branch_type = VL_RAND_RESET_I(3);
-    Vortex__DOT__vx_d_e_reg__DOT__upper_immed = VL_RAND_RESET_I(20);
-    Vortex__DOT__vx_d_e_reg__DOT__csr_address = VL_RAND_RESET_I(12);
-    Vortex__DOT__vx_d_e_reg__DOT__is_csr = VL_RAND_RESET_I(1);
-    Vortex__DOT__vx_d_e_reg__DOT__csr_mask = VL_RAND_RESET_I(32);
-    Vortex__DOT__vx_d_e_reg__DOT__curr_PC = VL_RAND_RESET_I(32);
-    Vortex__DOT__vx_d_e_reg__DOT__jal = VL_RAND_RESET_I(1);
-    Vortex__DOT__vx_d_e_reg__DOT__jal_offset = VL_RAND_RESET_I(32);
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__vx_d_e_reg__DOT__valid[__Vi0] = VL_RAND_RESET_I(1);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__vx_d_e_reg__DOT__reg_data_z[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__vx_d_e_reg__DOT__valid_z[__Vi0] = VL_RAND_RESET_I(1);
-    }}
-    Vortex__DOT__vx_d_e_reg__DOT__warp_num = VL_RAND_RESET_I(2);
-    Vortex__DOT__vx_d_e_reg__DOT__stalling = VL_RAND_RESET_I(1);
-    Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__0__KET____DOT__vx_alu__out_alu_result = VL_RAND_RESET_I(32);
-    Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__1__KET____DOT__vx_alu__out_alu_result = VL_RAND_RESET_I(32);
-    Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2 = VL_RAND_RESET_I(32);
-    Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__mult_signed_result = VL_RAND_RESET_Q(64);
-    Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2 = VL_RAND_RESET_I(32);
-    Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__mult_signed_result = VL_RAND_RESET_Q(64);
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__vx_e_m_reg__DOT__alu_result[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    Vortex__DOT__vx_e_m_reg__DOT__rd = VL_RAND_RESET_I(5);
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__vx_e_m_reg__DOT__a_reg_data[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__vx_e_m_reg__DOT__b_reg_data[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    Vortex__DOT__vx_e_m_reg__DOT__wb = VL_RAND_RESET_I(2);
-    Vortex__DOT__vx_e_m_reg__DOT__PC_next = VL_RAND_RESET_I(32);
-    Vortex__DOT__vx_e_m_reg__DOT__mem_read = VL_RAND_RESET_I(3);
-    Vortex__DOT__vx_e_m_reg__DOT__mem_write = VL_RAND_RESET_I(3);
-    Vortex__DOT__vx_e_m_reg__DOT__csr_address = VL_RAND_RESET_I(12);
-    Vortex__DOT__vx_e_m_reg__DOT__is_csr = VL_RAND_RESET_I(1);
-    Vortex__DOT__vx_e_m_reg__DOT__csr_result = VL_RAND_RESET_I(32);
-    Vortex__DOT__vx_e_m_reg__DOT__curr_PC = VL_RAND_RESET_I(32);
-    Vortex__DOT__vx_e_m_reg__DOT__branch_offset = VL_RAND_RESET_I(32);
-    Vortex__DOT__vx_e_m_reg__DOT__branch_type = VL_RAND_RESET_I(3);
-    Vortex__DOT__vx_e_m_reg__DOT__jal = VL_RAND_RESET_I(1);
-    Vortex__DOT__vx_e_m_reg__DOT__jal_dest = VL_RAND_RESET_I(32);
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__vx_e_m_reg__DOT__valid[__Vi0] = VL_RAND_RESET_I(1);
-    }}
-    Vortex__DOT__vx_e_m_reg__DOT__warp_num = VL_RAND_RESET_I(2);
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__vx_m_w_reg__DOT__alu_result[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__vx_m_w_reg__DOT__mem_result[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    Vortex__DOT__vx_m_w_reg__DOT__rd = VL_RAND_RESET_I(5);
-    Vortex__DOT__vx_m_w_reg__DOT__wb = VL_RAND_RESET_I(2);
-    Vortex__DOT__vx_m_w_reg__DOT__PC_next = VL_RAND_RESET_I(32);
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__vx_m_w_reg__DOT__valid[__Vi0] = VL_RAND_RESET_I(1);
-    }}
-    Vortex__DOT__vx_m_w_reg__DOT__warp_num = VL_RAND_RESET_I(2);
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__vx_writeback__DOT__out_pc_data[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd = VL_RAND_RESET_I(1);
-    Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd = VL_RAND_RESET_I(1);
-    Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd = VL_RAND_RESET_I(1);
-    Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd = VL_RAND_RESET_I(1);
-    Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd = VL_RAND_RESET_I(1);
-    Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd = VL_RAND_RESET_I(1);
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<2; ++__Vi0) {
-	    Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<4096; ++__Vi0) {
-	    Vortex__DOT__vx_csr_handler__DOT__csr[__Vi0] = VL_RAND_RESET_I(12);
-    }}
-    Vortex__DOT__vx_csr_handler__DOT__cycle = VL_RAND_RESET_Q(64);
-    Vortex__DOT__vx_csr_handler__DOT__instret = VL_RAND_RESET_Q(64);
-    Vortex__DOT__vx_csr_handler__DOT__decode_csr_address = VL_RAND_RESET_I(12);
-    __Vtableidx1 = VL_RAND_RESET_I(3);
-    __Vtable1_Vortex__DOT__vx_decode__DOT__mul_alu[0] = 0x10U;
-    __Vtable1_Vortex__DOT__vx_decode__DOT__mul_alu[1] = 0x11U;
-    __Vtable1_Vortex__DOT__vx_decode__DOT__mul_alu[2] = 0x12U;
-    __Vtable1_Vortex__DOT__vx_decode__DOT__mul_alu[3] = 0x13U;
-    __Vtable1_Vortex__DOT__vx_decode__DOT__mul_alu[4] = 0x14U;
-    __Vtable1_Vortex__DOT__vx_decode__DOT__mul_alu[5] = 0x15U;
-    __Vtable1_Vortex__DOT__vx_decode__DOT__mul_alu[6] = 0x16U;
-    __Vtable1_Vortex__DOT__vx_decode__DOT__mul_alu[7] = 0x17U;
-}
diff --git a/rtl/obj_dir/VVortex.h b/rtl/obj_dir/VVortex.h
deleted file mode 100644
index 5f027ce3..00000000
--- a/rtl/obj_dir/VVortex.h
+++ /dev/null
@@ -1,361 +0,0 @@
-// Verilated -*- C++ -*-
-// DESCRIPTION: Verilator output: Primary design header
-//
-// This header should be included by all source files instantiating the design.
-// The class here is then constructed to instantiate the design.
-// See the Verilator manual for examples.
-
-#ifndef _VVortex_H_
-#define _VVortex_H_
-
-#include "verilated.h"
-
-class VVortex__Syms;
-
-//----------
-
-VL_MODULE(VVortex) {
-  public:
-    
-    // PORTS
-    // The application code writes and reads these signals to
-    // propagate new values into/out from the Verilated model.
-    // Begin mtask footprint  all: 
-    VL_IN8(clk,0,0);
-    VL_IN8(reset,0,0);
-    VL_OUT8(out_cache_driver_in_mem_read,2,0);
-    VL_OUT8(out_cache_driver_in_mem_write,2,0);
-    VL_OUT8(out_ebreak,0,0);
-    VL_IN(fe_instruction,31,0);
-    VL_OUT(curr_PC,31,0);
-    VL_IN(in_cache_driver_out_data[2],31,0);
-    VL_OUT(out_cache_driver_in_address[2],31,0);
-    VL_OUT8(out_cache_driver_in_valid[2],0,0);
-    VL_OUT(out_cache_driver_in_data[2],31,0);
-    
-    // LOCAL SIGNALS
-    // Internals; generally not touched by application code
-    // Anonymous structures to workaround compiler member-count bugs
-    struct {
-	// Begin mtask footprint  all: 
-	VL_SIG8(Vortex__DOT__decode_branch_stall,0,0);
-	VL_SIG8(Vortex__DOT__decode_branch_type,2,0);
-	VL_SIG8(Vortex__DOT__decode_jal,0,0);
-	VL_SIG8(Vortex__DOT__decode_clone_stall,0,0);
-	VL_SIG8(Vortex__DOT__decode_change_mask,0,0);
-	VL_SIG8(Vortex__DOT__execute_branch_stall,0,0);
-	VL_SIG8(Vortex__DOT__memory_branch_dir,0,0);
-	VL_SIG8(Vortex__DOT__forwarding_fwd_stall,0,0);
-	VL_SIG8(Vortex__DOT__forwarding_src1_fwd,0,0);
-	VL_SIG8(Vortex__DOT__forwarding_src2_fwd,0,0);
-	VL_SIG8(Vortex__DOT__vx_fetch__DOT__stall,0,0);
-	VL_SIG8(Vortex__DOT__vx_fetch__DOT__warp_num,1,0);
-	VL_SIG8(Vortex__DOT__vx_fetch__DOT__warp_state,1,0);
-	VL_SIG8(Vortex__DOT__vx_fetch__DOT__add_warp,0,0);
-	VL_SIG8(Vortex__DOT__vx_fetch__DOT__remove_warp,0,0);
-	VL_SIG8(Vortex__DOT__vx_fetch__DOT__warp_zero_change_mask,0,0);
-	VL_SIG8(Vortex__DOT__vx_fetch__DOT__warp_zero_stall,0,0);
-	VL_SIG8(Vortex__DOT__vx_fetch__DOT__warp_one_change_mask,0,0);
-	VL_SIG8(Vortex__DOT__vx_fetch__DOT__warp_one_stall,0,0);
-	VL_SIG8(Vortex__DOT__vx_f_d_reg__DOT__warp_num,1,0);
-	VL_SIG8(Vortex__DOT__vx_decode__DOT__is_itype,0,0);
-	VL_SIG8(Vortex__DOT__vx_decode__DOT__is_csr,0,0);
-	VL_SIG8(Vortex__DOT__vx_decode__DOT__is_clone,0,0);
-	VL_SIG8(Vortex__DOT__vx_decode__DOT__is_jalrs,0,0);
-	VL_SIG8(Vortex__DOT__vx_decode__DOT__is_jmprt,0,0);
-	VL_SIG8(Vortex__DOT__vx_decode__DOT__is_wspawn,0,0);
-	VL_SIG8(Vortex__DOT__vx_decode__DOT__jal_sys_jal,0,0);
-	VL_SIG8(Vortex__DOT__vx_decode__DOT__mul_alu,4,0);
-	VL_SIG8(Vortex__DOT__vx_decode__DOT__is_ebreak,0,0);
-	VL_SIG8(Vortex__DOT__vx_decode__DOT__temp_final_alu,4,0);
-	VL_SIG8(Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__state_stall,5,0);
-	VL_SIG8(Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_state_stall,5,0);
-	VL_SIG8(Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__wspawn_state_stall,5,0);
-	VL_SIG8(Vortex__DOT__vx_d_e_reg__DOT__rd,4,0);
-	VL_SIG8(Vortex__DOT__vx_d_e_reg__DOT__alu_op,4,0);
-	VL_SIG8(Vortex__DOT__vx_d_e_reg__DOT__wb,1,0);
-	VL_SIG8(Vortex__DOT__vx_d_e_reg__DOT__rs2_src,0,0);
-	VL_SIG8(Vortex__DOT__vx_d_e_reg__DOT__mem_read,2,0);
-	VL_SIG8(Vortex__DOT__vx_d_e_reg__DOT__mem_write,2,0);
-	VL_SIG8(Vortex__DOT__vx_d_e_reg__DOT__branch_type,2,0);
-	VL_SIG8(Vortex__DOT__vx_d_e_reg__DOT__is_csr,0,0);
-	VL_SIG8(Vortex__DOT__vx_d_e_reg__DOT__jal,0,0);
-	VL_SIG8(Vortex__DOT__vx_d_e_reg__DOT__warp_num,1,0);
-	VL_SIG8(Vortex__DOT__vx_d_e_reg__DOT__stalling,0,0);
-	VL_SIG8(Vortex__DOT__vx_e_m_reg__DOT__rd,4,0);
-	VL_SIG8(Vortex__DOT__vx_e_m_reg__DOT__wb,1,0);
-	VL_SIG8(Vortex__DOT__vx_e_m_reg__DOT__mem_read,2,0);
-	VL_SIG8(Vortex__DOT__vx_e_m_reg__DOT__mem_write,2,0);
-	VL_SIG8(Vortex__DOT__vx_e_m_reg__DOT__is_csr,0,0);
-	VL_SIG8(Vortex__DOT__vx_e_m_reg__DOT__branch_type,2,0);
-	VL_SIG8(Vortex__DOT__vx_e_m_reg__DOT__jal,0,0);
-	VL_SIG8(Vortex__DOT__vx_e_m_reg__DOT__warp_num,1,0);
-	VL_SIG8(Vortex__DOT__vx_m_w_reg__DOT__rd,4,0);
-	VL_SIG8(Vortex__DOT__vx_m_w_reg__DOT__wb,1,0);
-	VL_SIG8(Vortex__DOT__vx_m_w_reg__DOT__warp_num,1,0);
-	VL_SIG8(Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd,0,0);
-	VL_SIG8(Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd,0,0);
-	VL_SIG8(Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd,0,0);
-	VL_SIG8(Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd,0,0);
-	VL_SIG8(Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd,0,0);
-	VL_SIG8(Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd,0,0);
-	VL_SIG16(Vortex__DOT__decode_csr_address,11,0);
-	VL_SIG16(Vortex__DOT__vx_decode__DOT__alu_tempp,11,0);
-	VL_SIG16(Vortex__DOT__vx_d_e_reg__DOT__csr_address,11,0);
-    };
-    struct {
-	VL_SIG16(Vortex__DOT__vx_e_m_reg__DOT__csr_address,11,0);
-	VL_SIG16(Vortex__DOT__vx_csr_handler__DOT__decode_csr_address,11,0);
-	VL_SIG(Vortex__DOT__decode_itype_immed,31,0);
-	VL_SIG(Vortex__DOT__decode_jal_offset,31,0);
-	VL_SIG(Vortex__DOT__memory_branch_dest,31,0);
-	VL_SIG(Vortex__DOT__csr_decode_csr_data,31,0);
-	VL_SIG(Vortex__DOT__vx_fetch__DOT__out_PC,31,0);
-	VL_SIG(Vortex__DOT__vx_fetch__DOT__VX_Warp_zero__DOT__real_PC,31,0);
-	VL_SIG(Vortex__DOT__vx_fetch__DOT__VX_Warp_zero__DOT__temp_PC,31,0);
-	VL_SIG(Vortex__DOT__vx_fetch__DOT__VX_Warp_one__DOT__real_PC,31,0);
-	VL_SIG(Vortex__DOT__vx_fetch__DOT__VX_Warp_one__DOT__temp_PC,31,0);
-	VL_SIG(Vortex__DOT__vx_f_d_reg__DOT__instruction,31,0);
-	VL_SIG(Vortex__DOT__vx_f_d_reg__DOT__curr_PC,31,0);
-	VL_SIG(Vortex__DOT__vx_d_e_reg__DOT__PC_next_out,31,0);
-	VL_SIG(Vortex__DOT__vx_d_e_reg__DOT__itype_immed,31,0);
-	VL_SIG(Vortex__DOT__vx_d_e_reg__DOT__upper_immed,19,0);
-	VL_SIG(Vortex__DOT__vx_d_e_reg__DOT__csr_mask,31,0);
-	VL_SIG(Vortex__DOT__vx_d_e_reg__DOT__curr_PC,31,0);
-	VL_SIG(Vortex__DOT__vx_d_e_reg__DOT__jal_offset,31,0);
-	VL_SIG(Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2,31,0);
-	VL_SIG(Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2,31,0);
-	VL_SIG(Vortex__DOT__vx_e_m_reg__DOT__PC_next,31,0);
-	VL_SIG(Vortex__DOT__vx_e_m_reg__DOT__csr_result,31,0);
-	VL_SIG(Vortex__DOT__vx_e_m_reg__DOT__curr_PC,31,0);
-	VL_SIG(Vortex__DOT__vx_e_m_reg__DOT__branch_offset,31,0);
-	VL_SIG(Vortex__DOT__vx_e_m_reg__DOT__jal_dest,31,0);
-	VL_SIG(Vortex__DOT__vx_m_w_reg__DOT__PC_next,31,0);
-	VL_SIG64(Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__mult_signed_result,63,0);
-	VL_SIG64(Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__mult_signed_result,63,0);
-	VL_SIG64(Vortex__DOT__vx_csr_handler__DOT__cycle,63,0);
-	VL_SIG64(Vortex__DOT__vx_csr_handler__DOT__instret,63,0);
-	VL_SIG8(Vortex__DOT__fetch_valid[2],0,0);
-	VL_SIG8(Vortex__DOT__f_d_valid[2],0,0);
-	VL_SIG(Vortex__DOT__decode_a_reg_data[2],31,0);
-	VL_SIG(Vortex__DOT__decode_b_reg_data[2],31,0);
-	VL_SIG8(Vortex__DOT__decode_valid[2],0,0);
-	VL_SIG8(Vortex__DOT__decode_thread_mask[2],0,0);
-	VL_SIG(Vortex__DOT__d_e_a_reg_data[2],31,0);
-	VL_SIG(Vortex__DOT__d_e_b_reg_data[2],31,0);
-	VL_SIG8(Vortex__DOT__d_e_valid[2],0,0);
-	VL_SIG(Vortex__DOT__execute_alu_result[2],31,0);
-	VL_SIG(Vortex__DOT__execute_b_reg_data[2],31,0);
-	VL_SIG8(Vortex__DOT__execute_valid[2],0,0);
-	VL_SIG(Vortex__DOT__e_m_alu_result[2],31,0);
-	VL_SIG(Vortex__DOT__e_m_b_reg_data[2],31,0);
-	VL_SIG8(Vortex__DOT__e_m_valid[2],0,0);
-	VL_SIG(Vortex__DOT__memory_alu_result[2],31,0);
-	VL_SIG(Vortex__DOT__memory_mem_result[2],31,0);
-	VL_SIG8(Vortex__DOT__memory_valid[2],0,0);
-	VL_SIG(Vortex__DOT__m_w_alu_result[2],31,0);
-	VL_SIG(Vortex__DOT__m_w_mem_result[2],31,0);
-	VL_SIG8(Vortex__DOT__m_w_valid[2],0,0);
-	VL_SIG(Vortex__DOT__writeback_write_data[2],31,0);
-	VL_SIG(Vortex__DOT__forwarding_src1_fwd_data[2],31,0);
-	VL_SIG(Vortex__DOT__forwarding_src2_fwd_data[2],31,0);
-	VL_SIG8(Vortex__DOT__vx_fetch__DOT__warp_zero_valid[2],0,0);
-	VL_SIG8(Vortex__DOT__vx_fetch__DOT__warp_one_valid[2],0,0);
-	VL_SIG8(Vortex__DOT__vx_fetch__DOT__VX_Warp_zero__DOT__valid[2],0,0);
-	VL_SIG8(Vortex__DOT__vx_fetch__DOT__VX_Warp_one__DOT__valid[2],0,0);
-	VL_SIG8(Vortex__DOT__vx_f_d_reg__DOT__valid[2],0,0);
-	VL_SIG(Vortex__DOT__vx_decode__DOT__w0_t0_registers[32],31,0);
-	VL_SIG(Vortex__DOT__vx_decode__DOT__zero_a_reg_data[2],31,0);
-	VL_SIG(Vortex__DOT__vx_decode__DOT__zero_b_reg_data[2],31,0);
-	VL_SIG(Vortex__DOT__vx_decode__DOT__one_a_reg_data[2],31,0);
-    };
-    struct {
-	VL_SIG(Vortex__DOT__vx_decode__DOT__one_b_reg_data[2],31,0);
-	VL_SIG8(Vortex__DOT__vx_decode__DOT__jalrs_thread_mask[2],0,0);
-	VL_SIG8(Vortex__DOT__vx_decode__DOT__jmprt_thread_mask[2],0,0);
-	VL_SIG(Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd1_register[2],31,0);
-	VL_SIG(Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd2_register[2],31,0);
-	VL_SIG(Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[32],31,0);
-	VL_SIG(Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[32],31,0);
-	VL_SIG(Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[32],31,0);
-	VL_SIG(Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__rd1_register[2],31,0);
-	VL_SIG(Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__rd2_register[2],31,0);
-	VL_SIG(Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__clone_regsiters[32],31,0);
-	VL_SIG(Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers[32],31,0);
-	VL_SIG(Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[32],31,0);
-	VL_SIG(Vortex__DOT__vx_d_e_reg__DOT__a_reg_data[2],31,0);
-	VL_SIG(Vortex__DOT__vx_d_e_reg__DOT__b_reg_data[2],31,0);
-	VL_SIG8(Vortex__DOT__vx_d_e_reg__DOT__valid[2],0,0);
-	VL_SIG(Vortex__DOT__vx_d_e_reg__DOT__reg_data_z[2],31,0);
-	VL_SIG8(Vortex__DOT__vx_d_e_reg__DOT__valid_z[2],0,0);
-	VL_SIG(Vortex__DOT__vx_e_m_reg__DOT__alu_result[2],31,0);
-	VL_SIG(Vortex__DOT__vx_e_m_reg__DOT__a_reg_data[2],31,0);
-	VL_SIG(Vortex__DOT__vx_e_m_reg__DOT__b_reg_data[2],31,0);
-	VL_SIG8(Vortex__DOT__vx_e_m_reg__DOT__valid[2],0,0);
-	VL_SIG(Vortex__DOT__vx_m_w_reg__DOT__alu_result[2],31,0);
-	VL_SIG(Vortex__DOT__vx_m_w_reg__DOT__mem_result[2],31,0);
-	VL_SIG8(Vortex__DOT__vx_m_w_reg__DOT__valid[2],0,0);
-	VL_SIG(Vortex__DOT__vx_writeback__DOT__out_pc_data[2],31,0);
-	VL_SIG(Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[2],31,0);
-	VL_SIG(Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[2],31,0);
-	VL_SIG(Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[2],31,0);
-	VL_SIG16(Vortex__DOT__vx_csr_handler__DOT__csr[4096],11,0);
-    };
-    
-    // LOCAL VARIABLES
-    // Internals; generally not touched by application code
-    // Anonymous structures to workaround compiler member-count bugs
-    struct {
-	// Begin mtask footprint  all: 
-	VL_SIG8(__Vtableidx1,2,0);
-	VL_SIG8(__Vclklast__TOP__clk,0,0);
-	VL_SIG8(__Vclklast__TOP__reset,0,0);
-	VL_SIG(Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_src2_data,31,0);
-	VL_SIG(Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_src1_data,31,0);
-	VL_SIG(Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src2_data,31,0);
-	VL_SIG(Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src1_data,31,0);
-	VL_SIG(Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_src2_data,31,0);
-	VL_SIG(Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_src1_data,31,0);
-	VL_SIG(Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src2_data,31,0);
-	VL_SIG(Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src1_data,31,0);
-	VL_SIG(Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__0__KET____DOT__vx_alu__out_alu_result,31,0);
-	VL_SIG(Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__1__KET____DOT__vx_alu__out_alu_result,31,0);
-	VL_SIG8(Vortex__DOT____Vcellout__vx_fetch__out_valid[2],0,0);
-	VL_SIG8(Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask[2],0,0);
-	VL_SIG8(Vortex__DOT____Vcellout__vx_f_d_reg__out_valid[2],0,0);
-	VL_SIG8(Vortex__DOT____Vcellinp__vx_f_d_reg__in_valid[2],0,0);
-	VL_SIG8(Vortex__DOT____Vcellout__vx_decode__out_thread_mask[2],0,0);
-	VL_SIG8(Vortex__DOT____Vcellout__vx_decode__out_valid[2],0,0);
-	VL_SIG(Vortex__DOT____Vcellout__vx_decode__out_b_reg_data[2],31,0);
-	VL_SIG(Vortex__DOT____Vcellout__vx_decode__out_a_reg_data[2],31,0);
-	VL_SIG(Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data[2],31,0);
-	VL_SIG(Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data[2],31,0);
-	VL_SIG8(Vortex__DOT____Vcellinp__vx_decode__in_wb_valid[2],0,0);
-	VL_SIG(Vortex__DOT____Vcellinp__vx_decode__in_write_data[2],31,0);
-	VL_SIG8(Vortex__DOT____Vcellinp__vx_decode__in_valid[2],0,0);
-	VL_SIG8(Vortex__DOT____Vcellout__vx_d_e_reg__out_valid[2],0,0);
-	VL_SIG(Vortex__DOT____Vcellout__vx_d_e_reg__out_b_reg_data[2],31,0);
-	VL_SIG(Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data[2],31,0);
-	VL_SIG8(Vortex__DOT____Vcellinp__vx_d_e_reg__in_valid[2],0,0);
-	VL_SIG(Vortex__DOT____Vcellinp__vx_d_e_reg__in_b_reg_data[2],31,0);
-	VL_SIG(Vortex__DOT____Vcellinp__vx_d_e_reg__in_a_reg_data[2],31,0);
-	VL_SIG8(Vortex__DOT____Vcellout__vx_execute__out_valid[2],0,0);
-	VL_SIG(Vortex__DOT____Vcellout__vx_execute__out_b_reg_data[2],31,0);
-	VL_SIG(Vortex__DOT____Vcellout__vx_execute__out_alu_result[2],31,0);
-	VL_SIG8(Vortex__DOT____Vcellinp__vx_execute__in_valid[2],0,0);
-	VL_SIG(Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data[2],31,0);
-	VL_SIG(Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data[2],31,0);
-	VL_SIG8(Vortex__DOT____Vcellout__vx_e_m_reg__out_valid[2],0,0);
-	VL_SIG(Vortex__DOT____Vcellout__vx_e_m_reg__out_b_reg_data[2],31,0);
-	VL_SIG(Vortex__DOT____Vcellout__vx_e_m_reg__out_alu_result[2],31,0);
-	VL_SIG8(Vortex__DOT____Vcellinp__vx_e_m_reg__in_valid[2],0,0);
-	VL_SIG(Vortex__DOT____Vcellinp__vx_e_m_reg__in_b_reg_data[2],31,0);
-	VL_SIG(Vortex__DOT____Vcellinp__vx_e_m_reg__in_alu_result[2],31,0);
-	VL_SIG8(Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid[2],0,0);
-	VL_SIG(Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data[2],31,0);
-	VL_SIG(Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address[2],31,0);
-	VL_SIG8(Vortex__DOT____Vcellout__vx_memory__out_valid[2],0,0);
-	VL_SIG(Vortex__DOT____Vcellout__vx_memory__out_mem_result[2],31,0);
-	VL_SIG(Vortex__DOT____Vcellout__vx_memory__out_alu_result[2],31,0);
-	VL_SIG(Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data[2],31,0);
-	VL_SIG8(Vortex__DOT____Vcellinp__vx_memory__in_valid[2],0,0);
-	VL_SIG(Vortex__DOT____Vcellinp__vx_memory__in_rd2[2],31,0);
-	VL_SIG(Vortex__DOT____Vcellinp__vx_memory__in_alu_result[2],31,0);
-	VL_SIG8(Vortex__DOT____Vcellout__vx_m_w_reg__out_valid[2],0,0);
-	VL_SIG(Vortex__DOT____Vcellout__vx_m_w_reg__out_mem_result[2],31,0);
-	VL_SIG(Vortex__DOT____Vcellout__vx_m_w_reg__out_alu_result[2],31,0);
-	VL_SIG8(Vortex__DOT____Vcellinp__vx_m_w_reg__in_valid[2],0,0);
-	VL_SIG(Vortex__DOT____Vcellinp__vx_m_w_reg__in_mem_result[2],31,0);
-	VL_SIG(Vortex__DOT____Vcellinp__vx_m_w_reg__in_alu_result[2],31,0);
-	VL_SIG(Vortex__DOT____Vcellout__vx_writeback__out_write_data[2],31,0);
-	VL_SIG(Vortex__DOT____Vcellinp__vx_writeback__in_mem_result[2],31,0);
-	VL_SIG(Vortex__DOT____Vcellinp__vx_writeback__in_alu_result[2],31,0);
-	VL_SIG(Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data[2],31,0);
-    };
-    struct {
-	VL_SIG(Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data[2],31,0);
-	VL_SIG(Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data[2],31,0);
-	VL_SIG(Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result[2],31,0);
-	VL_SIG(Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data[2],31,0);
-	VL_SIG(Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result[2],31,0);
-	VL_SIG(Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result[2],31,0);
-	VL_SIG8(Vortex__DOT__vx_fetch__DOT____Vcellout__VX_Warp_zero__out_valid[2],0,0);
-	VL_SIG8(Vortex__DOT__vx_fetch__DOT____Vcellinp__VX_Warp_zero__in_thread_mask[2],0,0);
-	VL_SIG8(Vortex__DOT__vx_fetch__DOT____Vcellout__VX_Warp_one__out_valid[2],0,0);
-	VL_SIG8(Vortex__DOT__vx_fetch__DOT____Vcellinp__VX_Warp_one__in_thread_mask[2],0,0);
-	VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[32],31,0);
-	VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_b_reg_data[2],31,0);
-	VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_a_reg_data[2],31,0);
-	VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_write_data[2],31,0);
-	VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_src2_fwd_data[2],31,0);
-	VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_src1_fwd_data[2],31,0);
-	VL_SIG8(Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_valid[2],0,0);
-	VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_one__out_b_reg_data[2],31,0);
-	VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_one__out_a_reg_data[2],31,0);
-	VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_wspawn_regs[32],31,0);
-	VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_write_data[2],31,0);
-	VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_src2_fwd_data[2],31,0);
-	VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_src1_fwd_data[2],31,0);
-	VL_SIG8(Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_one__in_valid[2],0,0);
-	VL_SIG(Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[32],31,0);
-	VL_SIG(Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[32],31,0);
-	VL_SIG(Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_regs[32],31,0);
-	VL_SIG(Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__vx_register_file_master__in_wspawn_regs[32],31,0);
-	VL_SIG(Vortex__DOT__vx_decode__DOT__VX_Context_one__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[32],31,0);
-    };
-    static VL_ST_SIG8(__Vtable1_Vortex__DOT__vx_decode__DOT__mul_alu[8],4,0);
-    
-    // INTERNAL VARIABLES
-    // Internals; generally not touched by application code
-    VVortex__Syms* __VlSymsp;  // Symbol table
-    
-    // PARAMETERS
-    // Parameters marked /*verilator public*/ for use by application code
-    
-    // CONSTRUCTORS
-  private:
-    VL_UNCOPYABLE(VVortex);  ///< Copying not allowed
-  public:
-    /// Construct the model; called by application code
-    /// The special name  may be used to make a wrapper with a
-    /// single model invisible with respect to DPI scope names.
-    VVortex(const char* name="TOP");
-    /// Destroy the model; called (often implicitly) by application code
-    ~VVortex();
-    
-    // API METHODS
-    /// Evaluate the model.  Application must call when inputs change.
-    void eval();
-    /// Simulation complete, run final blocks.  Application must call on completion.
-    void final();
-    
-    // INTERNAL METHODS
-  private:
-    static void _eval_initial_loop(VVortex__Syms* __restrict vlSymsp);
-  public:
-    void __Vconfigure(VVortex__Syms* symsp, bool first);
-  private:
-    static QData _change_request(VVortex__Syms* __restrict vlSymsp);
-  public:
-    static void _combo__TOP__5(VVortex__Syms* __restrict vlSymsp);
-    static void _combo__TOP__8(VVortex__Syms* __restrict vlSymsp);
-  private:
-    void _ctor_var_reset();
-  public:
-    static void _eval(VVortex__Syms* __restrict vlSymsp);
-  private:
-#ifdef VL_DEBUG
-    void _eval_debug_assertions();
-#endif // VL_DEBUG
-  public:
-    static void _eval_initial(VVortex__Syms* __restrict vlSymsp);
-    static void _eval_settle(VVortex__Syms* __restrict vlSymsp);
-    static void _initial__TOP__1(VVortex__Syms* __restrict vlSymsp);
-    static void _sequent__TOP__3(VVortex__Syms* __restrict vlSymsp);
-    static void _sequent__TOP__4(VVortex__Syms* __restrict vlSymsp);
-    static void _sequent__TOP__6(VVortex__Syms* __restrict vlSymsp);
-    static void _sequent__TOP__7(VVortex__Syms* __restrict vlSymsp);
-    static void _settle__TOP__2(VVortex__Syms* __restrict vlSymsp);
-} VL_ATTR_ALIGNED(128);
-
-#endif // guard
diff --git a/rtl/obj_dir/VVortex.mk b/rtl/obj_dir/VVortex.mk
deleted file mode 100644
index edc5fcca..00000000
--- a/rtl/obj_dir/VVortex.mk
+++ /dev/null
@@ -1,66 +0,0 @@
-# Verilated -*- Makefile -*-
-# DESCRIPTION: Verilator output: Makefile for building Verilated archive or executable
-#
-# Execute this makefile from the object directory:
-#    make -f VVortex.mk
-
-default: VVortex
-
-### Constants...
-# Perl executable (from $PERL)
-PERL = perl
-# Path to Verilator kit (from $VERILATOR_ROOT)
-VERILATOR_ROOT = /usr/local/Cellar/verilator/4.010/share/verilator
-# SystemC include directory with systemc.h (from $SYSTEMC_INCLUDE)
-SYSTEMC_INCLUDE ?= 
-# SystemC library directory with libsystemc.a (from $SYSTEMC_LIBDIR)
-SYSTEMC_LIBDIR ?= 
-
-### Switches...
-# SystemC output mode?  0/1 (from --sc)
-VM_SC = 0
-# Legacy or SystemC output mode?  0/1 (from --sc)
-VM_SP_OR_SC = $(VM_SC)
-# Deprecated
-VM_PCLI = 1
-# Deprecated: SystemC architecture to find link library path (from $SYSTEMC_ARCH)
-VM_SC_TARGET_ARCH = linux
-
-### Vars...
-# Design prefix (from --prefix)
-VM_PREFIX = VVortex
-# Module prefix (from --prefix)
-VM_MODPREFIX = VVortex
-# User CFLAGS (from -CFLAGS on Verilator command line)
-VM_USER_CFLAGS = \
-
-# User LDLIBS (from -LDFLAGS on Verilator command line)
-VM_USER_LDLIBS = \
-
-# User .cpp files (from .cpp's on Verilator command line)
-VM_USER_CLASSES = \
-	test_bench \
-
-# User .cpp directories (from .cpp's on Verilator command line)
-VM_USER_DIR = \
-	. \
-
-
-### Default rules...
-# Include list of all generated classes
-include VVortex_classes.mk
-# Include global rules
-include $(VERILATOR_ROOT)/include/verilated.mk
-
-### Executable rules... (from --exe)
-VPATH += $(VM_USER_DIR)
-
-test_bench.o: test_bench.cpp
-	$(OBJCACHE) $(CXX) $(CXXFLAGS) $(CPPFLAGS) $(OPT_FAST) -c -o $@ $<
-
-### Link rules... (from --exe)
-VVortex: $(VK_USER_OBJS) $(VK_GLOBAL_OBJS) $(VM_PREFIX)__ALL.a
-	$(LINK) $(LDFLAGS) $^ $(LOADLIBES) $(LDLIBS) -o $@ $(LIBS) $(SC_LIBS)
-
-
-# Verilated -*- Makefile -*-
diff --git a/rtl/obj_dir/VVortex__ALL.a b/rtl/obj_dir/VVortex__ALL.a
deleted file mode 100644
index 0656f70e..00000000
Binary files a/rtl/obj_dir/VVortex__ALL.a and /dev/null differ
diff --git a/rtl/obj_dir/VVortex__ALLcls.cpp b/rtl/obj_dir/VVortex__ALLcls.cpp
deleted file mode 100644
index 8b97f5e6..00000000
--- a/rtl/obj_dir/VVortex__ALLcls.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-// DESCRIPTION: Generated by verilator_includer via makefile
-#define VL_INCLUDE_OPT include
-#include "VVortex.cpp"
diff --git a/rtl/obj_dir/VVortex__ALLcls.d b/rtl/obj_dir/VVortex__ALLcls.d
deleted file mode 100644
index 1e080335..00000000
--- a/rtl/obj_dir/VVortex__ALLcls.d
+++ /dev/null
@@ -1,4 +0,0 @@
-VVortex__ALLcls.o: VVortex__ALLcls.cpp VVortex.cpp VVortex.h \
-  /usr/local/Cellar/verilator/4.010/share/verilator/include/verilated.h \
-  /usr/local/Cellar/verilator/4.010/share/verilator/include/verilatedos.h \
-  VVortex__Syms.h
diff --git a/rtl/obj_dir/VVortex__ALLcls.o b/rtl/obj_dir/VVortex__ALLcls.o
deleted file mode 100644
index cd842ca5..00000000
Binary files a/rtl/obj_dir/VVortex__ALLcls.o and /dev/null differ
diff --git a/rtl/obj_dir/VVortex__ALLsup.cpp b/rtl/obj_dir/VVortex__ALLsup.cpp
deleted file mode 100644
index 989c6da6..00000000
--- a/rtl/obj_dir/VVortex__ALLsup.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-// DESCRIPTION: Generated by verilator_includer via makefile
-#define VL_INCLUDE_OPT include
-#include "VVortex__Syms.cpp"
diff --git a/rtl/obj_dir/VVortex__ALLsup.d b/rtl/obj_dir/VVortex__ALLsup.d
deleted file mode 100644
index 41db4492..00000000
--- a/rtl/obj_dir/VVortex__ALLsup.d
+++ /dev/null
@@ -1,4 +0,0 @@
-VVortex__ALLsup.o: VVortex__ALLsup.cpp VVortex__Syms.cpp VVortex__Syms.h \
-  /usr/local/Cellar/verilator/4.010/share/verilator/include/verilated.h \
-  /usr/local/Cellar/verilator/4.010/share/verilator/include/verilatedos.h \
-  VVortex.h
diff --git a/rtl/obj_dir/VVortex__ALLsup.o b/rtl/obj_dir/VVortex__ALLsup.o
deleted file mode 100644
index 87227610..00000000
Binary files a/rtl/obj_dir/VVortex__ALLsup.o and /dev/null differ
diff --git a/rtl/obj_dir/VVortex__Syms.cpp b/rtl/obj_dir/VVortex__Syms.cpp
deleted file mode 100644
index d5a17e1a..00000000
--- a/rtl/obj_dir/VVortex__Syms.cpp
+++ /dev/null
@@ -1,19 +0,0 @@
-// Verilated -*- C++ -*-
-// DESCRIPTION: Verilator output: Symbol table implementation internals
-
-#include "VVortex__Syms.h"
-#include "VVortex.h"
-
-// FUNCTIONS
-VVortex__Syms::VVortex__Syms(VVortex* topp, const char* namep)
-	// Setup locals
-	: __Vm_namep(namep)
-	, __Vm_didInit(false)
-	// Setup submodule names
-{
-    // Pointer to top level
-    TOPp = topp;
-    // Setup each module's pointers to their submodules
-    // Setup each module's pointer back to symbol table (for public functions)
-    TOPp->__Vconfigure(this, true);
-}
diff --git a/rtl/obj_dir/VVortex__Syms.h b/rtl/obj_dir/VVortex__Syms.h
deleted file mode 100644
index bf4ad048..00000000
--- a/rtl/obj_dir/VVortex__Syms.h
+++ /dev/null
@@ -1,34 +0,0 @@
-// Verilated -*- C++ -*-
-// DESCRIPTION: Verilator output: Symbol table internal header
-//
-// Internal details; most calling programs do not need this header
-
-#ifndef _VVortex__Syms_H_
-#define _VVortex__Syms_H_
-
-#include "verilated.h"
-
-// INCLUDE MODULE CLASSES
-#include "VVortex.h"
-
-// SYMS CLASS
-class VVortex__Syms : public VerilatedSyms {
-  public:
-    
-    // LOCAL STATE
-    const char* __Vm_namep;
-    bool __Vm_didInit;
-    
-    // SUBCELL STATE
-    VVortex*                       TOPp;
-    
-    // CREATORS
-    VVortex__Syms(VVortex* topp, const char* namep);
-    ~VVortex__Syms() {}
-    
-    // METHODS
-    inline const char* name() { return __Vm_namep; }
-    
-} VL_ATTR_ALIGNED(64);
-
-#endif // guard
diff --git a/rtl/obj_dir/VVortex__ver.d b/rtl/obj_dir/VVortex__ver.d
deleted file mode 100644
index 59bfa3e0..00000000
--- a/rtl/obj_dir/VVortex__ver.d
+++ /dev/null
@@ -1 +0,0 @@
-obj_dir/VVortex.cpp obj_dir/VVortex.h obj_dir/VVortex.mk obj_dir/VVortex__Syms.cpp obj_dir/VVortex__Syms.h obj_dir/VVortex__ver.d obj_dir/VVortex_classes.mk  : /usr/local/Cellar/verilator/4.010/bin/verilator_bin   /usr/local/Cellar/verilator/4.010/bin/verilator_bin VX_alu.v VX_context.v VX_context_slave.v VX_csr_handler.v VX_d_e_reg.v VX_decode.v VX_define.v VX_e_m_reg.v VX_execute.v VX_f_d_reg.v VX_fetch.v VX_forwarding.v VX_m_w_reg.v VX_memory.v VX_register_file.v VX_register_file_master_slave.v VX_register_file_slave.v VX_warp.v VX_writeback.v Vortex.v 
diff --git a/rtl/obj_dir/VVortex__verFiles.dat b/rtl/obj_dir/VVortex__verFiles.dat
deleted file mode 100644
index 692021e3..00000000
--- a/rtl/obj_dir/VVortex__verFiles.dat
+++ /dev/null
@@ -1,31 +0,0 @@
-# DESCRIPTION: Verilator output: Timestamp data for --skip-identical.  Delete at will.
-C "-Wall -cc Vortex.v --exe test_bench.cpp"
-S   4608404 12889046060  1553037052           0  1548678579           0 "/usr/local/Cellar/verilator/4.010/bin/verilator_bin"
-S      2785 12890803842  1558067516           0  1558067516           0 "VX_alu.v"
-S      3486 12890803843  1558067516           0  1558067516           0 "VX_context.v"
-S      4928 12890803844  1558067516           0  1558067516           0 "VX_context_slave.v"
-S      1495 12889457987  1554023089           0  1554023089           0 "VX_csr_handler.v"
-S      5512 12890803845  1558067516           0  1558067516           0 "VX_d_e_reg.v"
-S     14563 12890803846  1558067516           0  1558067516           0 "VX_decode.v"
-S      1574 12890803847  1558067516           0  1558067516           0 "VX_define.v"
-S      4267 12890803848  1558067516           0  1558067516           0 "VX_e_m_reg.v"
-S      3692 12890803849  1558067516           0  1558067516           0 "VX_execute.v"
-S      1751 12890803850  1558067516           0  1558067516           0 "VX_f_d_reg.v"
-S      4619 12890803851  1558067516           0  1558067516           0 "VX_fetch.v"
-S      6293 12890803852  1558067516           0  1558067516           0 "VX_forwarding.v"
-S      1866 12890803853  1558067516           0  1558067516           0 "VX_m_w_reg.v"
-S      4352 12890803854  1558067516           0  1558067516           0 "VX_memory.v"
-S      1249 12890803855  1558067516           0  1558067516           0 "VX_register_file.v"
-S      1655 12890803856  1558067516           0  1558067516           0 "VX_register_file_master_slave.v"
-S      1599 12890803857  1558067516           0  1558067516           0 "VX_register_file_slave.v"
-S      1686 12890803859  1558067516           0  1558067516           0 "VX_warp.v"
-S      1568 12890803860  1558067516           0  1558067516           0 "VX_writeback.v"
-S     18714 12890803861  1558067516           0  1558067516           0 "Vortex.v"
-T    451065 12890803863  1558067556           0  1558067556           0 "obj_dir/VVortex.cpp"
-T     20559 12890803864  1558067556           0  1558067556           0 "obj_dir/VVortex.h"
-T      1800 12890416977  1558067556           0  1558067556           0 "obj_dir/VVortex.mk"
-T       530 12890416973  1558067556           0  1558067556           0 "obj_dir/VVortex__Syms.cpp"
-T       711 12890416972  1558067556           0  1558067556           0 "obj_dir/VVortex__Syms.h"
-T       563 12890416978  1558067556           0  1558067556           0 "obj_dir/VVortex__ver.d"
-T         0        0  1558067556           0  1558067556           0 "obj_dir/VVortex__verFiles.dat"
-T      1159 12890416976  1558067556           0  1558067556           0 "obj_dir/VVortex_classes.mk"
diff --git a/rtl/obj_dir/VVortex_classes.mk b/rtl/obj_dir/VVortex_classes.mk
deleted file mode 100644
index ebd3a07e..00000000
--- a/rtl/obj_dir/VVortex_classes.mk
+++ /dev/null
@@ -1,38 +0,0 @@
-# Verilated -*- Makefile -*-
-# DESCRIPTION: Verilator output: Make include file with class lists
-#
-# This file lists generated Verilated files, for including in higher level makefiles.
-# See VVortex.mk for the caller.
-
-### Switches...
-# Coverage output mode?  0/1 (from --coverage)
-VM_COVERAGE = 0
-# Threaded output mode?  0/1/N threads (from --threads)
-VM_THREADS = 0
-# Tracing output mode?  0/1 (from --trace)
-VM_TRACE = 0
-
-### Object file lists...
-# Generated module classes, fast-path, compile with highest optimization
-VM_CLASSES_FAST += \
-	VVortex \
-
-# Generated module classes, non-fast-path, compile with low/medium optimization
-VM_CLASSES_SLOW += \
-
-# Generated support classes, fast-path, compile with highest optimization
-VM_SUPPORT_FAST += \
-
-# Generated support classes, non-fast-path, compile with low/medium optimization
-VM_SUPPORT_SLOW += \
-	VVortex__Syms \
-
-# Global classes, need linked once per executable, fast-path, compile with highest optimization
-VM_GLOBAL_FAST += \
-	verilated \
-
-# Global classes, need linked once per executable, non-fast-path, compile with low/medium optimization
-VM_GLOBAL_SLOW += \
-
-
-# Verilated -*- Makefile -*-
diff --git a/rtl/obj_dir/test_bench.d b/rtl/obj_dir/test_bench.d
deleted file mode 100644
index b918f78f..00000000
--- a/rtl/obj_dir/test_bench.d
+++ /dev/null
@@ -1,4 +0,0 @@
-test_bench.o: ../test_bench.cpp ../test_bench.h ../VX_define.h ../ram.h \
-  VVortex.h \
-  /usr/local/Cellar/verilator/4.010/share/verilator/include/verilated.h \
-  /usr/local/Cellar/verilator/4.010/share/verilator/include/verilatedos.h
diff --git a/rtl/obj_dir/test_bench.o b/rtl/obj_dir/test_bench.o
deleted file mode 100644
index 05684420..00000000
Binary files a/rtl/obj_dir/test_bench.o and /dev/null differ
diff --git a/rtl/obj_dir/verilated.d b/rtl/obj_dir/verilated.d
deleted file mode 100644
index 8fb42837..00000000
--- a/rtl/obj_dir/verilated.d
+++ /dev/null
@@ -1,9 +0,0 @@
-verilated.o: \
-  /usr/local/Cellar/verilator/4.010/share/verilator/include/verilated.cpp \
-  /usr/local/Cellar/verilator/4.010/share/verilator/include/verilatedos.h \
-  /usr/local/Cellar/verilator/4.010/share/verilator/include/verilated_imp.h \
-  /usr/local/Cellar/verilator/4.010/share/verilator/include/verilated.h \
-  /usr/local/Cellar/verilator/4.010/share/verilator/include/verilated_heavy.h \
-  /usr/local/Cellar/verilator/4.010/share/verilator/include/verilated_syms.h \
-  /usr/local/Cellar/verilator/4.010/share/verilator/include/verilated_sym_props.h \
-  /usr/local/Cellar/verilator/4.010/share/verilator/include/verilated_config.h
diff --git a/rtl/obj_dir/verilated.o b/rtl/obj_dir/verilated.o
deleted file mode 100644
index e5cdef37..00000000
Binary files a/rtl/obj_dir/verilated.o and /dev/null differ
diff --git a/rtl/results.txt b/rtl/results.txt
index 28b5491f..e69de29b 100644
--- a/rtl/results.txt
+++ b/rtl/results.txt
@@ -1,7 +0,0 @@
-# Dynamic Instructions: 222955
-# of total cycles:      222962
-# of forwarding stalls: 0
-# of branch stalls:     0
-# CPI:                  1.00003
-# time to simulate:     6.95312e-310 milliseconds
-# GRADE:                Failed on test: 4294967295
diff --git a/rtl/test_bench.h b/rtl/test_bench.h
index 1d4790a6..df92dead 100644
--- a/rtl/test_bench.h
+++ b/rtl/test_bench.h
@@ -148,7 +148,6 @@ bool Vortex::ibus_driver()
 
 
     ////////////////////// STATS //////////////////////
-    ++stats_total_cycles;
 
 
     if (((((unsigned int)curr_inst) != 0) && (((unsigned int)curr_inst) != 0xffffffff)))
@@ -175,10 +174,13 @@ bool Vortex::dbus_driver()
     // std::cout << "DBUS DRIVER\n" << std::endl;
     ////////////////////// DBUS //////////////////////
 
+    bool did = false;
+
     for (unsigned curr_th = 0; curr_th < NT; curr_th++)
     {
         if ((vortex->out_cache_driver_in_mem_write != NO_MEM_WRITE) && vortex->out_cache_driver_in_valid[curr_th])
         {
+                did = true;
                 data_write = (uint32_t) vortex->out_cache_driver_in_data[curr_th];
                 addr       = (uint32_t) vortex->out_cache_driver_in_address[curr_th];
 
@@ -187,6 +189,18 @@ bool Vortex::dbus_driver()
                   std::cerr << (char) data_write;
                 }
 
+                if ((addr >= 0x810002cc) && (addr < 0x810002d0))
+                {
+                    int index = (addr - 0x810002cc) / 4;
+                    std::cerr << GREEN << "1done[" << index << "] = " << data_write << DEFAULT << "\n";
+                }
+
+                if ((addr >= 0x810059f4) && (addr < 0x810059f4))
+                {
+                    int index = (addr - 0x810059f4) / 4;
+                    std::cerr << RED << "2done[" << index << "] = " << data_write << DEFAULT << "\n";
+                }
+
                 if (vortex->out_cache_driver_in_mem_write == SB_MEM_WRITE)
                 {
                     data_write = ( data_write) & 0xFF;
@@ -208,14 +222,15 @@ bool Vortex::dbus_driver()
     }
 
 
+
+
     // printf("----\n");
     for (unsigned curr_th = 0; curr_th < NT; curr_th++)
     {
 
         if ((vortex->out_cache_driver_in_mem_read != NO_MEM_READ) && vortex->out_cache_driver_in_valid[curr_th])
         {
-
-
+                did = true;
                 addr = (uint32_t) vortex->out_cache_driver_in_address[curr_th];
                 ram.getWord(addr, &data_read);
 
@@ -258,6 +273,15 @@ bool Vortex::dbus_driver()
         }
 
     }
+
+    if (did && (NW > 1))
+    {
+
+        if (NW < NT)
+        {
+            this->stats_total_cycles += NT % (NW -1);
+        }
+    }
     // printf("******\n");
 
 
@@ -294,7 +318,6 @@ bool Vortex::simulate(std::string file_to_simulate)
 	unsigned curr_inst;
 	unsigned new_PC;
 
-	int cycle = 0;
 	// while (this->stop && (!(stop && (counter > 5))))
 	// {
 
@@ -360,10 +383,10 @@ bool Vortex::simulate(std::string file_to_simulate)
             counter = 0;
         }
 
-        cycle++;
+        ++stats_total_cycles;
     }
 
-    std::cerr << "Total Cycles: " << cycle << "\n";
+    std::cerr << "New Total Cycles: " << (this->stats_total_cycles) << "\n";
 
     uint32_t status;
     ram.getWord(0, &status);