Update README.md

This commit is contained in:
Tine, Blaise
2020-01-11 10:59:46 -05:00
committed by GitHub Enterprise
parent ad7f2518ed
commit db3a9e4f73

View File

@@ -15,4 +15,4 @@ Vortex currently supported RISC-V RV32I ISA
/SimX contains a cycle-approximate simulator for Vortex.
/rtl is verilog for the processor. Currently supports RV32IM and passes all tests.
/rtl constains Vortex processor hardware description.