From f0046fed3c57177cc87cfcd237d7938dfa4397c4 Mon Sep 17 00:00:00 2001 From: Blaise Tine Date: Mon, 29 Jun 2020 08:39:57 -0700 Subject: [PATCH] added synthesis for Vortex single core --- hw/opae/README | 1 + hw/syn/quartus/core/Makefile | 70 ++++++++++++++++++++++++++++++++++++ 2 files changed, 71 insertions(+) create mode 100644 hw/syn/quartus/core/Makefile diff --git a/hw/opae/README b/hw/opae/README index b59242c5..fc164bfc 100644 --- a/hw/opae/README +++ b/hw/opae/README @@ -90,5 +90,6 @@ lsof +D build_ase_1c # quick off cache synthesis make -C pipeline > pipeline/build.log 2>&1 & make -C cache > cache/build.log 2>&1 & +make -C core > core/build.log 2>&1 & make -C vortex > vortex/build.log 2>&1 & make -C top > top/build.log 2>&1 & diff --git a/hw/syn/quartus/core/Makefile b/hw/syn/quartus/core/Makefile new file mode 100644 index 00000000..69ab23ab --- /dev/null +++ b/hw/syn/quartus/core/Makefile @@ -0,0 +1,70 @@ +PROJECT = Core +TOP_LEVEL_ENTITY = VX_core +SRC_FILE = VX_core.v +PROJECT_FILES = $(PROJECT).qpf $(PROJECT).qsf + +# Part, Family +FAMILY = "Arria 10" +DEVICE = 10AX115N3F40E2SG + +# Executable Configuration +SYN_ARGS = --parallel --read_settings_files=on +FIT_ARGS = --part=$(DEVICE) --read_settings_files=on +ASM_ARGS = +STA_ARGS = --do_report_timing + +# Build targets +all: $(PROJECT).sta.rpt + +syn: $(PROJECT).syn.rpt + +fit: $(PROJECT).fit.rpt + +asm: $(PROJECT).asm.rpt + +sta: $(PROJECT).sta.rpt + +smart: smart.log + +# Target implementations +STAMP = echo done > + +$(PROJECT).syn.rpt: smart.log syn.chg $(SOURCE_FILES) + quartus_syn $(PROJECT) $(SYN_ARGS) + $(STAMP) fit.chg + +$(PROJECT).fit.rpt: smart.log fit.chg $(PROJECT).syn.rpt + quartus_fit $(PROJECT) $(FIT_ARGS) + $(STAMP) asm.chg + $(STAMP) sta.chg + +$(PROJECT).asm.rpt: smart.log asm.chg $(PROJECT).fit.rpt + quartus_asm $(PROJECT) $(ASM_ARGS) + +$(PROJECT).sta.rpt: smart.log sta.chg $(PROJECT).fit.rpt + quartus_sta $(PROJECT) $(STA_ARGS) + +smart.log: $(PROJECT_FILES) + quartus_sh --determine_smart_action $(PROJECT) > smart.log + +# Project initialization +$(PROJECT_FILES): + quartus_sh -t ../project.tcl -project $(PROJECT) -family $(FAMILY) -device $(DEVICE) -top $(TOP_LEVEL_ENTITY) -src $(SRC_FILE) -sdc ../project.sdc -inc "../../../rtl;../../../rtl/libs;../../../rtl/interfaces;../../../rtl/pipe_regs;../../../rtl/cache" + +syn.chg: + $(STAMP) syn.chg + +fit.chg: + $(STAMP) fit.chg + +sta.chg: + $(STAMP) sta.chg + +asm.chg: + $(STAMP) asm.chg + +program: $(PROJECT).sof + quartus_pgm --no_banner --mode=jtag -o "$(PROJECT).sof" + +clean: + rm -rf bin *.rpt *.chg *.qsf *.qpf *.qws *.log *.htm *.eqn *.pin *.sof *.pof qdb incremental_db tmp-clearbox