diff --git a/rtl/Makefile b/rtl/Makefile index 474e8e4b..47704eb8 100644 --- a/rtl/Makefile +++ b/rtl/Makefile @@ -1,11 +1,9 @@ - - all: RUNFILE VERILATOR: - verilator -Wall -cc Vortex.v --exe test_bench.cpp -CFLAGS -std=c++11 + verilator --compiler gcc -Wall -cc Vortex.v -Iinterfaces/ --exe test_bench.cpp -CFLAGS -std=c++11 RUNFILE: VERILATOR (cd obj_dir && make -j -f VVortex.mk) diff --git a/rtl/VX_context.v b/rtl/VX_context.v index 90267521..55ef1dcf 100644 --- a/rtl/VX_context.v +++ b/rtl/VX_context.v @@ -7,24 +7,24 @@ module VX_context ( input wire in_warp, /* verilator lint_on UNUSED */ input wire in_wb_warp, - input wire in_valid[`NT_M1:0], + input wire[`NT_M1:0] in_valid, input wire in_write_register, input wire[4:0] in_rd, - input wire[31:0] in_write_data[`NT_M1:0], + input wire[`NT_M1:0][31:0] in_write_data, input wire[4:0] in_src1, input wire[4:0] in_src2, input wire[31:0] in_curr_PC, input wire in_is_clone, input wire in_is_jal, input wire in_src1_fwd, - input wire[31:0] in_src1_fwd_data[`NT_M1:0], + input wire[`NT_M1:0][31:0] in_src1_fwd_data, input wire in_src2_fwd, - input wire[31:0] in_src2_fwd_data[`NT_M1:0], + input wire[`NT_M1:0][31:0] in_src2_fwd_data, - output reg[31:0] out_a_reg_data[`NT_M1:0], - output reg[31:0] out_b_reg_data[`NT_M1:0], + output reg[`NT_M1:0][31:0] out_a_reg_data, + output reg[`NT_M1:0][31:0] out_b_reg_data, output wire out_clone_stall, - output wire[31:0] w0_t0_registers[31:0] + output wire[31:0][31:0] w0_t0_registers ); reg[5:0] state_stall; @@ -32,10 +32,10 @@ module VX_context ( state_stall = 0; end - wire[31:0] rd1_register[`NT_M1:0]; - wire[31:0] rd2_register[`NT_M1:0]; + wire[`NT_M1:0][31:0] rd1_register; + wire[`NT_M1:0][31:0] rd2_register; /* verilator lint_off UNUSED */ - wire[31:0] clone_regsiters[31:0]; + wire[31:0][31:0] clone_regsiters; /* verilator lint_on UNUSED */ assign w0_t0_registers = clone_regsiters; diff --git a/rtl/VX_context_slave.v b/rtl/VX_context_slave.v index 59d77c19..d601f788 100644 --- a/rtl/VX_context_slave.v +++ b/rtl/VX_context_slave.v @@ -7,31 +7,31 @@ module VX_context_slave ( input wire in_warp, /* verilator lint_on UNUSED */ input wire in_wb_warp, - input wire in_valid[`NT_M1:0], + input wire[`NT_M1:0] in_valid, input wire in_write_register, input wire[4:0] in_rd, - input wire[31:0] in_write_data[`NT_M1:0], + input wire[`NT_M1:0][31:0] in_write_data, input wire[4:0] in_src1, input wire[4:0] in_src2, input wire[31:0] in_curr_PC, input wire in_is_clone, input wire in_is_jal, input wire in_src1_fwd, - input wire[31:0] in_src1_fwd_data[`NT_M1:0], + input wire[`NT_M1:0][31:0] in_src1_fwd_data, input wire in_src2_fwd, - input wire[31:0] in_src2_fwd_data[`NT_M1:0], - input wire[31:0] in_wspawn_regs[31:0], + input wire[`NT_M1:0][31:0] in_src2_fwd_data, + input wire[31:0][31:0] in_wspawn_regs, input wire in_wspawn, - output reg[31:0] out_a_reg_data[`NT_M1:0], - output reg[31:0] out_b_reg_data[`NT_M1:0], + output reg[`NT_M1:0][31:0] out_a_reg_data, + output reg[`NT_M1:0][31:0] out_b_reg_data, output wire out_clone_stall ); - wire[31:0] rd1_register[`NT_M1:0]; - wire[31:0] rd2_register[`NT_M1:0]; + wire[`NT_M1:0][31:0] rd1_register; + wire[`NT_M1:0][31:0] rd2_register; /* verilator lint_off UNUSED */ - wire[31:0] clone_regsiters[31:0]; + wire[31:0][31:0] clone_regsiters; /* verilator lint_on UNUSED */ diff --git a/rtl/VX_d_e_reg.v b/rtl/VX_d_e_reg.v index a7f8b601..ff90b66f 100644 --- a/rtl/VX_d_e_reg.v +++ b/rtl/VX_d_e_reg.v @@ -3,171 +3,164 @@ `include "VX_define.v" module VX_d_e_reg ( - input wire clk, - input wire[4:0] in_rd, - input wire[4:0] in_rs1, - input wire[4:0] in_rs2, - input wire[31:0] in_a_reg_data[`NT_M1:0], - input wire[31:0] in_b_reg_data[`NT_M1:0], - input wire[4:0] in_alu_op, - input wire[1:0] in_wb, - input wire in_rs2_src, // NEW - input wire[31:0] in_itype_immed, // new - input wire[2:0] in_mem_read, // NEW - input wire[2:0] in_mem_write, - input wire[31:0] in_PC_next, - input wire[2:0] in_branch_type, - input wire in_fwd_stall, - input wire in_branch_stall, - input wire[19:0] in_upper_immed, - input wire[11:0] in_csr_address, // done - input wire in_is_csr, // done - input wire[31:0] in_csr_mask, // done - input wire[31:0] in_curr_PC, - input wire in_jal, - input wire[31:0] in_jal_offset, - input wire in_freeze, - input wire in_clone_stall, - input wire in_valid[`NT_M1:0], - input wire[`NW_M1:0] in_warp_num, + input wire clk, + input wire reset, + input wire in_fwd_stall, + input wire in_branch_stall, + input wire in_freeze, + input wire in_clone_stall, + VX_frE_to_bckE_req_inter VX_frE_to_bckE_req, - output wire[11:0] out_csr_address, // done - output wire out_is_csr, // done - output wire[31:0] out_csr_mask, // done - output wire[4:0] out_rd, - output wire[4:0] out_rs1, - output wire[4:0] out_rs2, - output wire[31:0] out_a_reg_data[`NT_M1:0], - output wire[31:0] out_b_reg_data[`NT_M1:0], - output wire[4:0] out_alu_op, - output wire[1:0] out_wb, - output wire out_rs2_src, // NEW - output wire[31:0] out_itype_immed, // new - output wire[2:0] out_mem_read, - output wire[2:0] out_mem_write, - output wire[2:0] out_branch_type, - output wire[19:0] out_upper_immed, - output wire[31:0] out_curr_PC, - output wire out_jal, - output wire[31:0] out_jal_offset, - output wire[31:0] out_PC_next, - output wire out_valid[`NT_M1:0], - output wire[`NW_M1:0] out_warp_num + + VX_frE_to_bckE_req_inter VX_bckE_req ); - reg[4:0] rd; - reg[4:0] rs1; - reg[4:0] rs2; - reg[31:0] a_reg_data[`NT_M1:0]; - reg[31:0] b_reg_data[`NT_M1:0]; - reg[4:0] alu_op; - reg[1:0] wb; - reg[31:0] PC_next_out; - reg rs2_src; - reg[31:0] itype_immed; - reg[2:0] mem_read; - reg[2:0] mem_write; - reg[2:0] branch_type; - reg[19:0] upper_immed; - reg[11:0] csr_address; - reg is_csr; - reg[31:0] csr_mask; - reg[31:0] curr_PC; - reg jal; - reg[31:0] jal_offset; - reg valid[`NT_M1:0]; - - reg[31:0] reg_data_z[`NT_M1:0]; - reg valid_z[`NT_M1:0]; - - reg[`NW_M1:0] warp_num; - - integer ini_reg; - initial begin - rd = 0; - rs1 = 0; - for (ini_reg = 0; ini_reg < `NT; ini_reg = ini_reg + 1) - begin - a_reg_data[ini_reg] = 0; - b_reg_data[ini_reg] = 0; - reg_data_z[ini_reg] = 0; - valid[ini_reg] = 0; - valid_z[ini_reg] = 0; - end - rs2 = 0; - alu_op = 0; - wb = `NO_WB; - PC_next_out = 0; - rs2_src = 0; - itype_immed = 0; - mem_read = `NO_MEM_READ; - mem_write = `NO_MEM_WRITE; - branch_type = `NO_BRANCH; - upper_immed = 0; - csr_address = 0; - is_csr = 0; - csr_mask = 0; - curr_PC = 0; - jal = `NO_JUMP; - jal_offset = 0; - warp_num = 0; - end - - wire stalling; - - assign stalling = (in_fwd_stall == `STALL) || (in_branch_stall == `STALL) || (in_clone_stall == `STALL); - - assign out_rd = rd; - assign out_rs1 = rs1; - assign out_rs2 = rs2; - assign out_a_reg_data = a_reg_data; - assign out_b_reg_data = b_reg_data; - assign out_alu_op = alu_op; - assign out_wb = wb; - assign out_PC_next = PC_next_out; - assign out_rs2_src = rs2_src; - assign out_itype_immed = itype_immed; - assign out_mem_read = mem_read; - assign out_mem_write = mem_write; - assign out_branch_type = branch_type; - assign out_upper_immed = upper_immed; - assign out_csr_address = csr_address; - assign out_is_csr = is_csr; - assign out_csr_mask = csr_mask; - assign out_jal = jal; - assign out_jal_offset = jal_offset; - assign out_curr_PC = curr_PC; - assign out_valid = valid; - assign out_warp_num = warp_num; + wire stall = in_freeze; + wire flush = (in_fwd_stall == `STALL) || (in_branch_stall == `STALL) || (in_clone_stall == `STALL); - always @(posedge clk) begin - if (in_freeze == 1'h0) begin - rd <= stalling ? 5'h0 : in_rd; - rs1 <= stalling ? 5'h0 : in_rs1; - rs2 <= stalling ? 5'h0 : in_rs2; - a_reg_data <= stalling ? reg_data_z : in_a_reg_data; - b_reg_data <= stalling ? reg_data_z : in_b_reg_data; - alu_op <= stalling ? `NO_ALU : in_alu_op; - wb <= stalling ? `NO_WB : in_wb; - PC_next_out <= stalling ? 32'h0 : in_PC_next; - rs2_src <= stalling ? `RS2_REG : in_rs2_src; - itype_immed <= stalling ? 32'hdeadbeef : in_itype_immed; - mem_read <= stalling ? `NO_MEM_READ : in_mem_read; - mem_write <= stalling ? `NO_MEM_WRITE: in_mem_write; - branch_type <= stalling ? `NO_BRANCH : in_branch_type; - upper_immed <= stalling ? 20'h0 : in_upper_immed; - csr_address <= stalling ? 12'h0 : in_csr_address; - is_csr <= stalling ? 1'h0 : in_is_csr; - csr_mask <= stalling ? 32'h0 : in_csr_mask; - jal <= stalling ? `NO_JUMP : in_jal; - jal_offset <= stalling ? 32'h0 : in_jal_offset; - curr_PC <= stalling ? 32'h0 : in_curr_PC; - valid <= stalling ? valid_z : in_valid; - warp_num <= stalling ? 0 : in_warp_num; - end - end + VX_generic_register #(.N(490)) d_e_reg + ( + .clk (clk), + .reset(reset), + .stall(stall), + .flush(flush), + .in ({VX_frE_to_bckE_req.csr_address, VX_frE_to_bckE_req.is_csr, VX_frE_to_bckE_req.csr_mask, VX_frE_to_bckE_req.rd, VX_frE_to_bckE_req.rs1, VX_frE_to_bckE_req.rs2, VX_frE_to_bckE_req.a_reg_data, VX_frE_to_bckE_req.b_reg_data, VX_frE_to_bckE_req.alu_op, VX_frE_to_bckE_req.wb, VX_frE_to_bckE_req.rs2_src, VX_frE_to_bckE_req.itype_immed, VX_frE_to_bckE_req.mem_read, VX_frE_to_bckE_req.mem_write, VX_frE_to_bckE_req.branch_type, VX_frE_to_bckE_req.upper_immed, VX_frE_to_bckE_req.curr_PC, VX_frE_to_bckE_req.jal, VX_frE_to_bckE_req.jal_offset, VX_frE_to_bckE_req.PC_next, VX_frE_to_bckE_req.valid, VX_frE_to_bckE_req.warp_num}), + .out ({VX_bckE_req.csr_address , VX_bckE_req.is_csr , VX_bckE_req.csr_mask , VX_bckE_req.rd , VX_bckE_req.rs1 , VX_bckE_req.rs2 , VX_bckE_req.a_reg_data , VX_bckE_req.b_reg_data , VX_bckE_req.alu_op , VX_bckE_req.wb , VX_bckE_req.rs2_src , VX_bckE_req.itype_immed , VX_bckE_req.mem_read , VX_bckE_req.mem_write , VX_bckE_req.branch_type , VX_bckE_req.upper_immed , VX_bckE_req.curr_PC , VX_bckE_req.jal , VX_bckE_req.jal_offset , VX_bckE_req.PC_next , VX_bckE_req.valid , VX_bckE_req.warp_num}) + ); + + + // wire[`NT_M1:0][31:0] temp_out_a_reg_data; + // wire[`NT_M1:0][31:0] temp_out_b_reg_data; + // wire[`NT_M1:0] temp_out_valid; + + + // genvar index; + // for (index = 0; index <= `NT_M1; index = index + 1) begin + + // assign out_valid[index] = temp_out_valid[index]; + // assign out_a_reg_data[index] = temp_out_a_reg_data[index]; + // assign out_b_reg_data[index] = temp_out_b_reg_data[index]; + + // end + + + // reg[4:0] rd; + // reg[4:0] rs1; + // reg[4:0] rs2; + // reg[31:0] a_reg_data[`NT_M1:0]; + // reg[31:0] b_reg_data[`NT_M1:0]; + // reg[4:0] alu_op; + // reg[1:0] wb; + // reg[31:0] PC_next_out; + // reg rs2_src; + // reg[31:0] itype_immed; + // reg[2:0] mem_read; + // reg[2:0] mem_write; + // reg[2:0] branch_type; + // reg[19:0] upper_immed; + // reg[11:0] csr_address; + // reg is_csr; + // reg[31:0] csr_mask; + // reg[31:0] curr_PC; + // reg jal; + // reg[31:0] jal_offset; + // reg valid[`NT_M1:0]; + + // reg[31:0] reg_data_z[`NT_M1:0]; + // reg valid_z[`NT_M1:0]; + + // reg[`NW_M1:0] warp_num; + + // integer ini_reg; + // initial begin + // rd = 0; + // rs1 = 0; + // for (ini_reg = 0; ini_reg < `NT; ini_reg = ini_reg + 1) + // begin + // a_reg_data[ini_reg] = 0; + // b_reg_data[ini_reg] = 0; + // reg_data_z[ini_reg] = 0; + // valid[ini_reg] = 0; + // valid_z[ini_reg] = 0; + // end + // rs2 = 0; + // alu_op = 0; + // wb = `NO_WB; + // PC_next_out = 0; + // rs2_src = 0; + // itype_immed = 0; + // mem_read = `NO_MEM_READ; + // mem_write = `NO_MEM_WRITE; + // branch_type = `NO_BRANCH; + // upper_immed = 0; + // csr_address = 0; + // is_csr = 0; + // csr_mask = 0; + // curr_PC = 0; + // jal = `NO_JUMP; + // jal_offset = 0; + // warp_num = 0; + // end + + // wire stalling; + + // assign stalling = (in_fwd_stall == `STALL) || (in_branch_stall == `STALL) || (in_clone_stall == `STALL); + +// Freeze stall +// Stalling flush + + // assign out_rd = rd; + // assign out_rs1 = rs1; + // assign out_rs2 = rs2; + // assign out_a_reg_data = a_reg_data; + // assign out_b_reg_data = b_reg_data; + // assign out_alu_op = alu_op; + // assign out_wb = wb; + // assign out_PC_next = PC_next_out; + // assign out_rs2_src = rs2_src; + // assign out_itype_immed = itype_immed; + // assign out_mem_read = mem_read; + // assign out_mem_write = mem_write; + // assign out_branch_type = branch_type; + // assign out_upper_immed = upper_immed; + // assign out_csr_address = csr_address; + // assign out_is_csr = is_csr; + // assign out_csr_mask = csr_mask; + // assign out_jal = jal; + // assign out_jal_offset = jal_offset; + // assign out_curr_PC = curr_PC; + // assign out_valid = valid; + // assign out_warp_num = warp_num; + + + // always @(posedge clk) begin + // if (in_freeze == 1'h0) begin + // rd <= stalling ? 5'h0 : in_rd; + // rs1 <= stalling ? 5'h0 : in_rs1; + // rs2 <= stalling ? 5'h0 : in_rs2; + // a_reg_data <= stalling ? reg_data_z : in_a_reg_data; + // b_reg_data <= stalling ? reg_data_z : in_b_reg_data; + // alu_op <= stalling ? `NO_ALU : in_alu_op; + // wb <= stalling ? `NO_WB : in_wb; + // PC_next_out <= stalling ? 32'h0 : in_PC_next; + // rs2_src <= stalling ? `RS2_REG : in_rs2_src; + // itype_immed <= stalling ? 32'hdeadbeef : in_itype_immed; + // mem_read <= stalling ? `NO_MEM_READ : in_mem_read; + // mem_write <= stalling ? `NO_MEM_WRITE: in_mem_write; + // branch_type <= stalling ? `NO_BRANCH : in_branch_type; + // upper_immed <= stalling ? 20'h0 : in_upper_immed; + // csr_address <= stalling ? 12'h0 : in_csr_address; + // is_csr <= stalling ? 1'h0 : in_is_csr; + // csr_mask <= stalling ? 32'h0 : in_csr_mask; + // jal <= stalling ? `NO_JUMP : in_jal; + // jal_offset <= stalling ? 32'h0 : in_jal_offset; + // curr_PC <= stalling ? 32'h0 : in_curr_PC; + // valid <= stalling ? valid_z : in_valid; + // warp_num <= stalling ? 0 : in_warp_num; + // end + // end endmodule diff --git a/rtl/VX_decode.v b/rtl/VX_decode.v index ae7bfe9b..c00ce703 100644 --- a/rtl/VX_decode.v +++ b/rtl/VX_decode.v @@ -2,61 +2,52 @@ `include "VX_define.v" module VX_decode( + input wire clk, // Fetch Inputs - input wire clk, - input wire[31:0] in_instruction, - input wire[31:0] in_curr_PC, - input wire in_valid[`NT_M1:0], + VX_inst_meta_inter fd_inst_meta_de, + // WriteBack inputs - input wire[31:0] in_write_data[`NT_M1:0], - input wire[4:0] in_rd, - input wire[1:0] in_wb, - input wire in_wb_valid[`NT_M1:0], - input wire[`NW_M1:0] in_wb_warp_num, + VX_wb_inter VX_writeback_inter, // FORWARDING INPUTS input wire in_src1_fwd, - input wire[31:0] in_src1_fwd_data[`NT_M1:0], + input wire[`NT_M1:0][31:0] in_src1_fwd_data, input wire in_src2_fwd, - input wire[31:0] in_src2_fwd_data[`NT_M1:0], - /* verilator lint_off UNUSED */ + input wire[`NT_M1:0][31:0] in_src2_fwd_data, input wire[`NW_M1:0] in_which_wspawn, - /* verilator lint_on UNUSED */ - - input wire[`NW_M1:0] in_warp_num, - - output wire[11:0] out_csr_address, - output wire out_is_csr, - output wire[31:0] out_csr_mask, // Outputs - output wire[4:0] out_rd, - output wire[4:0] out_rs1, - output wire[4:0] out_rs2, - output wire[31:0] out_a_reg_data[`NT_M1:0], - output wire[31:0] out_b_reg_data[`NT_M1:0], - output wire[1:0] out_wb, - output wire[4:0] out_alu_op, - output wire out_rs2_src, - output reg[31:0] out_itype_immed, - output wire[2:0] out_mem_read, - output wire[2:0] out_mem_write, - output reg[2:0] out_branch_type, - output reg out_branch_stall, - output reg out_jal, - output reg[31:0] out_jal_offset, - output reg[19:0] out_upper_immed, - output wire[31:0] out_PC_next, - output reg out_clone_stall, - output wire out_change_mask, - output wire out_thread_mask[`NT_M1:0], - output wire out_valid[`NT_M1:0], - output wire[`NW_M1:0] out_warp_num, - output wire out_wspawn, - output wire[31:0] out_wspawn_pc, - output wire out_ebreak + VX_frE_to_bckE_req_inter VX_frE_to_bckE_req, + VX_warp_ctl_inter VX_warp_ctl, + output reg out_clone_stall, + output reg out_branch_stall + ); + + wire[`NT_M1:0][31:0] in_write_data; + wire[4:0] in_rd; + wire[1:0] in_wb; + wire[`NT_M1:0] in_wb_valid; + wire[`NW_M1:0] in_wb_warp_num; + + + assign in_write_data = VX_writeback_inter.write_data; + assign in_rd = VX_writeback_inter.rd; + assign in_wb = VX_writeback_inter.wb; + assign in_wb_valid = VX_writeback_inter.wb_valid; + assign in_wb_warp_num = VX_writeback_inter.wb_warp_num; + + wire[31:0] in_instruction = fd_inst_meta_de.instruction; + wire[31:0] in_curr_PC = fd_inst_meta_de.inst_pc; + wire[`NW_M1:0] in_warp_num = fd_inst_meta_de.warp_num; + + assign VX_frE_to_bckE_req.curr_PC = in_curr_PC; + + wire in_valid[`NT_M1:0]; + genvar index; + for (index = 0; index <= `NT_M1; index = index + 1) assign in_valid[index] = fd_inst_meta_de.valid[index]; + wire[6:0] curr_opcode; wire is_itype; @@ -115,7 +106,7 @@ module VX_decode( reg[4:0] mul_alu; /* verilator lint_off UNUSED */ - wire[31:0] w0_t0_registers[31:0]; + wire[31:0][31:0] w0_t0_registers; /* verilator lint_on UNUSED */ @@ -144,8 +135,8 @@ module VX_decode( .in_wb_warp (context_zero_valid), .in_valid (in_wb_valid), .in_rd (in_rd), - .in_src1 (out_rs1), - .in_src2 (out_rs2), + .in_src1 (VX_frE_to_bckE_req.rs1), + .in_src2 (VX_frE_to_bckE_req.rs2), .in_curr_PC (in_curr_PC), .in_is_clone (real_zero_isclone), .in_is_jal (is_jal), @@ -162,15 +153,15 @@ module VX_decode( ); - assign out_a_reg_data = glob_a_reg_data; - assign out_b_reg_data = glob_b_reg_data; + assign VX_frE_to_bckE_req.a_reg_data = glob_a_reg_data; + assign VX_frE_to_bckE_req.b_reg_data = glob_b_reg_data; assign out_clone_stall = glob_clone_stall; `else - wire[31:0] glob_a_reg_data[`NW-1:0][`NT_M1:0]; - wire[31:0] glob_b_reg_data[`NW-1:0][`NT_M1:0]; - reg glob_clone_stall[`NW-1:0]; + wire[`NW-1:0][`NT_M1:0][31:0] glob_a_reg_data; + wire[`NW-1:0][`NT_M1:0][31:0] glob_b_reg_data; + reg[`NW-1:0] glob_clone_stall; wire curr_warp_zero = in_warp_num == 0; wire context_zero_valid = (in_wb_warp_num == 0); @@ -181,8 +172,8 @@ module VX_decode( .in_wb_warp (context_zero_valid), .in_valid (in_wb_valid), .in_rd (in_rd), - .in_src1 (out_rs1), - .in_src2 (out_rs2), + .in_src1 (VX_frE_to_bckE_req.rs1), + .in_src2 (VX_frE_to_bckE_req.rs2), .in_curr_PC (in_curr_PC), .in_is_clone (real_zero_isclone), .in_is_jal (is_jal), @@ -211,8 +202,8 @@ module VX_decode( .in_wb_warp (context_glob_valid), .in_valid (in_wb_valid), .in_rd (in_rd), - .in_src1 (out_rs1), - .in_src2 (out_rs2), + .in_src1 (VX_frE_to_bckE_req.rs1), + .in_src2 (VX_frE_to_bckE_req.rs2), .in_curr_PC (in_curr_PC), .in_is_clone (real_isclone), .in_is_jal (is_jal), @@ -238,8 +229,8 @@ module VX_decode( // end // end - reg[31:0] temp_out_a_reg_data[`NT_M1:0]; - reg[31:0] temp_out_b_reg_data[`NT_M1:0]; + reg[`NT_M1:0][31:0] temp_out_a_reg_data; + reg[`NT_M1:0][31:0] temp_out_b_reg_data; /* verilator lint_off UNOPTFLAT */ reg temp_out_clone_stall; /* verilator lint_on UNOPTFLAT */ @@ -247,8 +238,8 @@ module VX_decode( always @(*) begin if (`NW == 1) begin - temp_out_a_reg_data = glob_a_reg_data; - temp_out_b_reg_data = glob_b_reg_data; + temp_out_a_reg_data = glob_a_reg_data[0]; + temp_out_b_reg_data = glob_b_reg_data[0]; end else begin integer g; // temp_out_clone_stall = 0; @@ -264,8 +255,12 @@ module VX_decode( end end - assign out_a_reg_data = temp_out_a_reg_data; - assign out_b_reg_data = temp_out_b_reg_data; + genvar sml_index; + for (sml_index = 0; sml_index <= `NT_M1; sml_index = sml_index + 1) begin + assign VX_frE_to_bckE_req.a_reg_data[sml_index] = temp_out_a_reg_data[sml_index]; + assign VX_frE_to_bckE_req.b_reg_data[sml_index] = temp_out_b_reg_data[sml_index]; + end + // assign out_clone_stall = temp_out_clone_stall; // assign out_a_reg_data = curr_warp_zero ? glob_a_reg_data[0] : glob_a_reg_data[1]; @@ -296,8 +291,11 @@ module VX_decode( // end // end - assign out_warp_num = in_warp_num; - assign out_valid = in_valid; + + assign VX_frE_to_bckE_req.valid = fd_inst_meta_de.valid; + + assign VX_frE_to_bckE_req.warp_num = in_warp_num; + assign VX_warp_ctl.warp_num = in_warp_num; assign write_register = (in_wb != 2'h0) ? (1'b1) : (1'b0); @@ -305,15 +303,15 @@ module VX_decode( assign curr_opcode = in_instruction[6:0]; - assign out_rd = in_instruction[11:7]; - assign out_rs1 = in_instruction[19:15]; - assign out_rs2 = in_instruction[24:20]; + assign VX_frE_to_bckE_req.rd = in_instruction[11:7]; + assign VX_frE_to_bckE_req.rs1 = in_instruction[19:15]; + assign VX_frE_to_bckE_req.rs2 = in_instruction[24:20]; assign func3 = in_instruction[14:12]; assign func7 = in_instruction[31:25]; assign u_12 = in_instruction[31:20]; - assign out_PC_next = in_curr_PC + 32'h4; + assign VX_frE_to_bckE_req.PC_next = in_curr_PC + 32'h4; // Write Back sigal @@ -336,23 +334,21 @@ module VX_decode( assign is_jmprt = is_gpgpu && (func3 == 4); assign is_wspawn = is_gpgpu && (func3 == 0); - assign out_wspawn = is_wspawn; - assign out_wspawn_pc = out_a_reg_data[0]; - - // always @(*) begin - // if (is_jalrs && in_warp_num == 2) begin - // $display("JALRS WOHOOO: rs2 - %h", out_b_reg_data[0]); - // end - // end + assign VX_warp_ctl.wspawn = is_wspawn; + assign VX_warp_ctl.wspawn_pc = VX_frE_to_bckE_req.a_reg_data[0]; - wire jalrs_thread_mask[`NT_M1:0]; - wire jmprt_thread_mask[`NT_M1:0]; + + + wire[`NT_M1:0] jalrs_thread_mask; + wire[`NT_M1:0] jmprt_thread_mask; genvar tm_i; generate for (tm_i = 0; tm_i < `NT; tm_i = tm_i + 1) begin - assign jalrs_thread_mask[tm_i] = tm_i <= $signed(out_b_reg_data[0]); + /* verilator lint_off UNSIGNED */ + assign jalrs_thread_mask[tm_i] = tm_i <= $signed(VX_frE_to_bckE_req.b_reg_data[0]); + /* verilator lint_on UNSIGNED */ end endgenerate @@ -365,10 +361,10 @@ module VX_decode( end endgenerate - assign out_thread_mask = is_jalrs ? jalrs_thread_mask : jmprt_thread_mask; + assign VX_warp_ctl.thread_mask = is_jalrs ? jalrs_thread_mask : jmprt_thread_mask; - assign out_change_mask = is_jalrs || is_jmprt; + assign VX_warp_ctl.change_mask = is_jalrs || is_jmprt; @@ -398,32 +394,32 @@ module VX_decode( // always @(negedge clk) begin // if (in_curr_PC == 32'h800001f0) begin - // $display("IN DECODE: Going to write to: %d with val: %h [%h, %h, %h]", out_rd, internal_rd1, in_curr_PC, in_src1_fwd_data, rd1_register); + // $display("IN DECODE: Going to write to: %d with val: %h [%h, %h, %h]", VX_frE_to_bckE_req.rd, internal_rd1, in_curr_PC, in_src1_fwd_data, rd1_register); // end // end - assign out_is_csr = is_csr; - assign out_csr_mask = (is_csr_immed == 1'b1) ? {27'h0, out_rs1} : out_a_reg_data[0]; + assign VX_frE_to_bckE_req.is_csr = is_csr; + assign VX_frE_to_bckE_req.csr_mask = (is_csr_immed == 1'b1) ? {27'h0, VX_frE_to_bckE_req.rs1} : VX_frE_to_bckE_req.a_reg_data[0]; - assign out_wb = (is_jal || is_jalr || is_jalrs || is_e_inst) ? `WB_JAL : - is_linst ? `WB_MEM : - (is_itype || is_rtype || is_lui || is_auipc || is_csr) ? `WB_ALU : - `NO_WB; + assign VX_frE_to_bckE_req.wb = (is_jal || is_jalr || is_jalrs || is_e_inst) ? `WB_JAL : + is_linst ? `WB_MEM : + (is_itype || is_rtype || is_lui || is_auipc || is_csr) ? `WB_ALU : + `NO_WB; - assign out_rs2_src = (is_itype || is_stype) ? `RS2_IMMED : `RS2_REG; + assign VX_frE_to_bckE_req.rs2_src = (is_itype || is_stype) ? `RS2_IMMED : `RS2_REG; // MEM signals - assign out_mem_read = (is_linst) ? func3 : `NO_MEM_READ; - assign out_mem_write = (is_stype) ? func3 : `NO_MEM_WRITE; + assign VX_frE_to_bckE_req.mem_read = (is_linst) ? func3 : `NO_MEM_READ; + assign VX_frE_to_bckE_req.mem_write = (is_stype) ? func3 : `NO_MEM_WRITE; // UPPER IMMEDIATE always @(*) begin case(curr_opcode) - `LUI_INST: out_upper_immed = {func7, out_rs2, out_rs1, func3}; - `AUIPC_INST: out_upper_immed = {func7, out_rs2, out_rs1, func3}; - default: out_upper_immed = 20'h0; + `LUI_INST: VX_frE_to_bckE_req.upper_immed = {func7, VX_frE_to_bckE_req.rs2, VX_frE_to_bckE_req.rs1, func3}; + `AUIPC_INST: VX_frE_to_bckE_req.upper_immed = {func7, VX_frE_to_bckE_req.rs2, VX_frE_to_bckE_req.rs1, func3}; + default: VX_frE_to_bckE_req.upper_immed = 20'h0; endcase // curr_opcode end @@ -437,7 +433,7 @@ module VX_decode( assign jal_1_offset = {{11{jal_b_20}}, jal_unsigned_offset}; - assign jalr_immed = {func7, out_rs2}; + assign jalr_immed = {func7, VX_frE_to_bckE_req.rs2}; assign jal_2_offset = {{20{jalr_immed[11]}}, jalr_immed}; @@ -452,33 +448,32 @@ module VX_decode( case(curr_opcode) `JAL_INST: begin - out_jal = 1'b1 && in_valid[0]; - out_jal_offset = jal_1_offset; + VX_frE_to_bckE_req.jal = 1'b1 && in_valid[0]; + VX_frE_to_bckE_req.jal_offset = jal_1_offset; end `JALR_INST: begin - out_jal = 1'b1 && in_valid[0]; - out_jal_offset = jal_2_offset; + VX_frE_to_bckE_req.jal = 1'b1 && in_valid[0]; + VX_frE_to_bckE_req.jal_offset = jal_2_offset; end `GPGPU_INST: begin if (is_jalrs || is_jmprt) begin - // $display("OUT JAL DEST: %h", out_a_reg_data[0]); - out_jal = 1'b1 && in_valid[0]; - out_jal_offset = 32'h0; + VX_frE_to_bckE_req.jal = 1'b1 && in_valid[0]; + VX_frE_to_bckE_req.jal_offset = 32'h0; end end `SYS_INST: begin // $display("SYS EBREAK %h", (jal_sys_jal && in_valid[0]) ); - out_jal = jal_sys_jal && in_valid[0]; - out_jal_offset = jal_sys_off; + VX_frE_to_bckE_req.jal = jal_sys_jal && in_valid[0]; + VX_frE_to_bckE_req.jal_offset = jal_sys_off; end default: begin - out_jal = 1'b0 && in_valid[0]; - out_jal_offset = 32'hdeadbeef; + VX_frE_to_bckE_req.jal = 1'b0 && in_valid[0]; + VX_frE_to_bckE_req.jal_offset = 32'hdeadbeef; end endcase end @@ -489,29 +484,29 @@ module VX_decode( assign is_ebreak = (curr_opcode == `SYS_INST) && (jal_sys_jal && in_valid[0]); - assign out_ebreak = is_ebreak; + assign VX_warp_ctl.ebreak = is_ebreak; // CSR assign csr_cond1 = func3 != 3'h0; assign csr_cond2 = u_12 >= 12'h2; - assign out_csr_address = (csr_cond1 && csr_cond2) ? u_12 : 12'h55; + assign VX_frE_to_bckE_req.csr_address = (csr_cond1 && csr_cond2) ? u_12 : 12'h55; // ITYPE IMEED assign alu_shift_i = (func3 == 3'h1) || (func3 == 3'h5); - assign alu_shift_i_immed = {{7{1'b0}}, out_rs2}; + assign alu_shift_i_immed = {{7{1'b0}}, VX_frE_to_bckE_req.rs2}; assign alu_tempp = alu_shift_i ? alu_shift_i_immed : u_12; always @(*) begin case(curr_opcode) - `ALU_INST: out_itype_immed = {{20{alu_tempp[11]}}, alu_tempp}; - `S_INST: out_itype_immed = {{20{func7[6]}}, func7, out_rd}; - `L_INST: out_itype_immed = {{20{u_12[11]}}, u_12}; - `B_INST: out_itype_immed = {{20{in_instruction[31]}}, in_instruction[31], in_instruction[7], in_instruction[30:25], in_instruction[11:8]}; - default: out_itype_immed = 32'hdeadbeef; + `ALU_INST: VX_frE_to_bckE_req.itype_immed = {{20{alu_tempp[11]}}, alu_tempp}; + `S_INST: VX_frE_to_bckE_req.itype_immed = {{20{func7[6]}}, func7, VX_frE_to_bckE_req.rd}; + `L_INST: VX_frE_to_bckE_req.itype_immed = {{20{u_12[11]}}, u_12}; + `B_INST: VX_frE_to_bckE_req.itype_immed = {{20{in_instruction[31]}}, in_instruction[31], in_instruction[7], in_instruction[30:25], in_instruction[11:8]}; + default: VX_frE_to_bckE_req.itype_immed = 32'hdeadbeef; endcase end @@ -522,37 +517,37 @@ module VX_decode( begin out_branch_stall = 1'b1 && in_valid[0]; case(func3) - 3'h0: out_branch_type = `BEQ; - 3'h1: out_branch_type = `BNE; - 3'h4: out_branch_type = `BLT; - 3'h5: out_branch_type = `BGT; - 3'h6: out_branch_type = `BLTU; - 3'h7: out_branch_type = `BGTU; - default: out_branch_type = `NO_BRANCH; + 3'h0: VX_frE_to_bckE_req.branch_type = `BEQ; + 3'h1: VX_frE_to_bckE_req.branch_type = `BNE; + 3'h4: VX_frE_to_bckE_req.branch_type = `BLT; + 3'h5: VX_frE_to_bckE_req.branch_type = `BGT; + 3'h6: VX_frE_to_bckE_req.branch_type = `BLTU; + 3'h7: VX_frE_to_bckE_req.branch_type = `BGTU; + default: VX_frE_to_bckE_req.branch_type = `NO_BRANCH; endcase end `JAL_INST: begin - out_branch_type = `NO_BRANCH; + VX_frE_to_bckE_req.branch_type = `NO_BRANCH; out_branch_stall = 1'b1 && in_valid[0]; end `JALR_INST: begin - out_branch_type = `NO_BRANCH; + VX_frE_to_bckE_req.branch_type = `NO_BRANCH; out_branch_stall = 1'b1 && in_valid[0]; end `GPGPU_INST: begin if (is_jalrs || is_jmprt) begin - out_branch_type = `NO_BRANCH; + VX_frE_to_bckE_req.branch_type = `NO_BRANCH; out_branch_stall = 1'b1 && in_valid[0]; end end default: begin - out_branch_type = `NO_BRANCH; + VX_frE_to_bckE_req.branch_type = `NO_BRANCH; out_branch_stall = 1'b0 && in_valid[0]; end endcase @@ -602,14 +597,14 @@ module VX_decode( wire[4:0] temp_final_alu; - assign temp_final_alu = is_btype ? ((out_branch_type < `BLTU) ? `SUB : `SUBU) : + assign temp_final_alu = is_btype ? ((VX_frE_to_bckE_req.branch_type < `BLTU) ? `SUB : `SUBU) : is_lui ? `LUI_ALU : is_auipc ? `AUIPC_ALU : is_csr ? csr_alu : (is_stype || is_linst) ? `ADD : alu_op; - assign out_alu_op = ((func7[0] == 1'b1) && is_rtype) ? mul_alu : temp_final_alu; + assign VX_frE_to_bckE_req.alu_op = ((func7[0] == 1'b1) && is_rtype) ? mul_alu : temp_final_alu; endmodule diff --git a/rtl/VX_e_m_reg.v b/rtl/VX_e_m_reg.v index effb8379..a3b3f8a1 100644 --- a/rtl/VX_e_m_reg.v +++ b/rtl/VX_e_m_reg.v @@ -5,150 +5,41 @@ module VX_e_m_reg ( input wire clk, - input wire[31:0] in_alu_result[`NT_M1:0], - input wire[4:0] in_rd, - input wire[1:0] in_wb, - input wire[4:0] in_rs1, - input wire[4:0] in_rs2, - input wire[31:0] in_a_reg_data[`NT_M1:0], - input wire[31:0] in_b_reg_data[`NT_M1:0], - input wire[2:0] in_mem_read, // NEW - input wire[2:0] in_mem_write, // NEW - input wire[31:0] in_PC_next, + input wire reset, + input wire in_freeze, input wire[11:0] in_csr_address, input wire in_is_csr, input wire[31:0] in_csr_result, - input wire[31:0] in_curr_PC, - input wire[31:0] in_branch_offset, - input wire[2:0] in_branch_type, input wire in_jal, input wire[31:0] in_jal_dest, - input wire in_freeze, - input wire in_valid[`NT_M1:0], - input wire[`NW_M1:0] in_warp_num, + input wire[`NT_M1:0][31:0] in_a_reg_data, + input wire[`NT_M1:0][31:0] in_b_reg_data, + VX_mem_req_inter VX_exe_mem_req, + + VX_mem_req_inter VX_mem_req, output wire[11:0] out_csr_address, output wire out_is_csr, output wire[31:0] out_csr_result, - output wire[31:0] out_alu_result[`NT_M1:0], - output wire[4:0] out_rd, - output wire[1:0] out_wb, - output wire[4:0] out_rs1, - output wire[4:0] out_rs2, - output wire[31:0] out_a_reg_data[`NT_M1:0], - output wire[31:0] out_b_reg_data[`NT_M1:0], - output wire[2:0] out_mem_read, - output wire[2:0] out_mem_write, - output wire[31:0] out_curr_PC, - output wire[31:0] out_branch_offset, - output wire[2:0] out_branch_type, + output wire[`NT_M1:0][31:0] out_a_reg_data, + output wire[`NT_M1:0][31:0] out_b_reg_data, output wire out_jal, - output wire[31:0] out_jal_dest, - output wire[31:0] out_PC_next, - output wire out_valid[`NT_M1:0], - output wire[`NW_M1:0] out_warp_num + output wire[31:0] out_jal_dest ); - reg[31:0] alu_result[`NT_M1:0]; - reg[4:0] rd; - reg[4:0] rs1; - reg[4:0] rs2; - reg[31:0] a_reg_data[`NT_M1:0]; - reg[31:0] b_reg_data[`NT_M1:0]; - reg[1:0] wb; - reg[31:0] PC_next; - reg[2:0] mem_read; - reg[2:0] mem_write; - reg[11:0] csr_address; - reg is_csr; - reg[31:0] csr_result; - reg[31:0] curr_PC; - reg[31:0] branch_offset; - reg[2:0] branch_type; - reg jal; - reg[31:0] jal_dest; - reg valid[`NT_M1:0]; - reg[`NW_M1:0] warp_num; - // reg[31:0] reg_data_z[`NT_T2_M1:0]; - // reg[`NT_M1:0] valid_z; - // reg[31:0] alu_result_z[`NT_M1:0]; + wire flush = 0; + wire stall = in_freeze; - integer ini_reg; - - initial begin - rd = 0; - rs1 = 0; - rs2 = 0; - wb = 0; - PC_next = 0; - mem_read = `NO_MEM_READ; - mem_write = `NO_MEM_WRITE; - csr_address = 0; - is_csr = 0; - csr_result = 0; - curr_PC = 0; - branch_offset = 0; - branch_type = 0; - jal = `NO_JUMP; - jal_dest = 0; - warp_num = 0; - for (ini_reg = 0; ini_reg < `NT; ini_reg = ini_reg + 1) - begin - a_reg_data[ini_reg] = 0; - b_reg_data[ini_reg] = 0; - valid[ini_reg] = 0; - alu_result[ini_reg] = 0; - end - end - - - - assign out_alu_result = alu_result; - assign out_rd = rd; - assign out_rs1 = rs1; - assign out_rs2 = rs2; - assign out_wb = wb; - assign out_PC_next = PC_next; - assign out_mem_read = mem_read; - assign out_mem_write = mem_write; - assign out_a_reg_data = a_reg_data; - assign out_b_reg_data = b_reg_data; - assign out_csr_address = csr_address; - assign out_is_csr = is_csr; - assign out_csr_result = csr_result; - assign out_curr_PC = curr_PC; - assign out_branch_offset = branch_offset; - assign out_branch_type = branch_type; - assign out_jal = jal; - assign out_jal_dest = jal_dest; - assign out_valid = valid; - assign out_warp_num = warp_num; - - always @(posedge clk) begin - if(in_freeze == 1'b0) begin - alu_result <= in_alu_result; - rd <= in_rd; - rs1 <= in_rs1; - rs2 <= in_rs2; - wb <= in_wb; - PC_next <= in_PC_next; - mem_read <= in_mem_read; - mem_write <= in_mem_write; - a_reg_data <= in_a_reg_data; - b_reg_data <= in_b_reg_data; - csr_address <= in_csr_address; - is_csr <= in_is_csr; - csr_result <= in_csr_result; - curr_PC <= in_curr_PC; - branch_offset <= in_branch_offset; - branch_type <= in_branch_type; - jal <= in_jal; - jal_dest <= in_jal_dest; - valid <= in_valid; - warp_num <= in_warp_num; - end - end + VX_generic_register #(.N(720)) f_d_reg + ( + .clk (clk), + .reset(reset), + .stall(stall), + .flush(flush), + .in ({in_csr_address , in_is_csr , in_csr_result , in_jal , in_jal_dest , in_a_reg_data , in_b_reg_data , VX_exe_mem_req.alu_result, VX_exe_mem_req.mem_read, VX_exe_mem_req.mem_write, VX_exe_mem_req.rd, VX_exe_mem_req.wb, VX_exe_mem_req.rs1, VX_exe_mem_req.rs2, VX_exe_mem_req.rd2, VX_exe_mem_req.PC_next, VX_exe_mem_req.curr_PC, VX_exe_mem_req.branch_offset, VX_exe_mem_req.branch_type, VX_exe_mem_req.valid, VX_exe_mem_req.warp_num}), + .out ({out_csr_address, out_is_csr, out_csr_result, out_jal, out_jal_dest, out_a_reg_data, out_b_reg_data, VX_mem_req.alu_result , VX_mem_req.mem_read , VX_mem_req.mem_write , VX_mem_req.rd , VX_mem_req.wb , VX_mem_req.rs1 , VX_mem_req.rs2 , VX_mem_req.rd2 , VX_mem_req.PC_next , VX_mem_req.curr_PC , VX_mem_req.branch_offset , VX_mem_req.branch_type , VX_mem_req.valid , VX_mem_req.warp_num}) + ); endmodule // VX_e_m_reg diff --git a/rtl/VX_execute.v b/rtl/VX_execute.v index a483b96c..f2d423ab 100644 --- a/rtl/VX_execute.v +++ b/rtl/VX_execute.v @@ -2,52 +2,44 @@ `include "VX_define.v" module VX_execute ( - input wire[4:0] in_rd, - input wire[4:0] in_rs1, - input wire[4:0] in_rs2, - input wire[31:0] in_a_reg_data[`NT_M1:0], - input wire[31:0] in_b_reg_data[`NT_M1:0], - input wire[4:0] in_alu_op, - input wire[1:0] in_wb, - input wire in_rs2_src, // NEW - input wire[31:0] in_itype_immed, // new - input wire[2:0] in_mem_read, // NEW - input wire[2:0] in_mem_write, // NEW - input wire[31:0] in_PC_next, - input wire[2:0] in_branch_type, - input wire[19:0] in_upper_immed, - input wire[11:0] in_csr_address, // done - input wire in_is_csr, // done - input wire[31:0] in_csr_data, // done - input wire[31:0] in_csr_mask, // done - input wire in_jal, - input wire[31:0] in_jal_offset, - input wire[31:0] in_curr_PC, - input wire in_valid[`NT_M1:0], - input [`NW_M1:0] in_warp_num, + VX_frE_to_bckE_req_inter VX_bckE_req, + input wire[31:0] in_csr_data, - output wire[11:0] out_csr_address, - output wire out_is_csr, - output reg[31:0] out_csr_result, - output reg[31:0] out_alu_result[`NT_M1:0], - output wire[4:0] out_rd, - output wire[1:0] out_wb, - output wire[4:0] out_rs1, - output wire[4:0] out_rs2, - output wire[31:0] out_a_reg_data[`NT_M1:0], - output wire[31:0] out_b_reg_data[`NT_M1:0], - output wire[2:0] out_mem_read, - output wire[2:0] out_mem_write, - output wire out_jal, - output wire[31:0] out_jal_dest, - output wire[31:0] out_branch_offset, - output wire out_branch_stall, - output wire[31:0] out_PC_next, - output wire out_valid[`NT_M1:0], - output wire[`NW_M1:0] out_warp_num + VX_mem_req_inter VX_exe_mem_req, + output wire[11:0] out_csr_address, + output wire out_is_csr, + output reg[31:0] out_csr_result, + output wire[`NT_M1:0][31:0] out_a_reg_data, + output wire[`NT_M1:0][31:0] out_b_reg_data, + output wire out_jal, + output wire[31:0] out_jal_dest, + output wire out_branch_stall ); + wire[`NT_M1:0][31:0] in_a_reg_data; + wire[`NT_M1:0][31:0] in_b_reg_data; + wire[4:0] in_alu_op; + wire in_rs2_src; + wire[31:0] in_itype_immed; + wire[2:0] in_branch_type; + wire[19:0] in_upper_immed; + wire[31:0] in_csr_mask; + wire in_jal; + wire[31:0] in_jal_offset; + wire[31:0] in_curr_PC; + + assign in_a_reg_data = VX_bckE_req.a_reg_data; + assign in_b_reg_data = VX_bckE_req.b_reg_data; + assign in_alu_op = VX_bckE_req.alu_op; + assign in_rs2_src = VX_bckE_req.rs2_src; + assign in_itype_immed = VX_bckE_req.itype_immed; + assign in_branch_type = VX_bckE_req.branch_type; + assign in_upper_immed = VX_bckE_req.upper_immed; + assign in_csr_mask = VX_bckE_req.csr_mask; + assign in_jal = VX_bckE_req.jal; + assign in_jal_offset = VX_bckE_req.jal_offset; + assign in_curr_PC = VX_bckE_req.curr_PC; genvar index_out_reg; generate @@ -63,18 +55,11 @@ module VX_execute ( .in_alu_op (in_alu_op), .in_csr_data (in_csr_data), .in_curr_PC (in_curr_PC), - .out_alu_result(out_alu_result[index_out_reg]) + .out_alu_result(VX_exe_mem_req.alu_result[index_out_reg]) ); end endgenerate - // always @(*) begin - // if ((in_alu_op == `MUL) && (in_warp_num == 1)) begin - // $display("@PC: %h ---> %d * %d = %d\t%d * %d = %d", in_curr_PC, in_a_reg_data[0], in_b_reg_data[0], out_alu_result[0], in_a_reg_data[1], in_b_reg_data[1], out_alu_result[1]); - // end - - // end - assign out_jal_dest = $signed(in_a_reg_data[0]) + $signed(in_jal_offset); assign out_jal = in_jal; @@ -97,20 +82,30 @@ module VX_execute ( - assign out_rd = in_rd; - assign out_wb = in_wb; - assign out_mem_read = in_mem_read; - assign out_mem_write = in_mem_write; - assign out_rs1 = in_rs1; - assign out_a_reg_data = in_a_reg_data; - assign out_b_reg_data = in_b_reg_data; - assign out_rs2 = in_rs2; - assign out_PC_next = in_PC_next; - assign out_is_csr = in_is_csr; - assign out_csr_address = in_csr_address; - assign out_branch_offset = in_itype_immed; - assign out_valid = in_valid; - assign out_warp_num = in_warp_num; + genvar ind; + for (ind = 0; ind <= `NT_M1; ind = ind + 1) begin + assign out_a_reg_data[ind] = in_a_reg_data[ind]; + assign out_b_reg_data[ind] = in_b_reg_data[ind]; + end + + assign VX_exe_mem_req.mem_read = VX_bckE_req.mem_read; + assign VX_exe_mem_req.mem_write = VX_bckE_req.mem_write; + assign VX_exe_mem_req.wb = VX_bckE_req.wb; + assign VX_exe_mem_req.rs1 = VX_bckE_req.rs1; + assign VX_exe_mem_req.rs2 = VX_bckE_req.rs2; + assign VX_exe_mem_req.rd = VX_bckE_req.rd; + assign VX_exe_mem_req.rd2 = VX_bckE_req.b_reg_data; + assign VX_exe_mem_req.wb = VX_bckE_req.wb; + assign VX_exe_mem_req.PC_next = VX_bckE_req.PC_next; + assign VX_exe_mem_req.curr_PC = VX_bckE_req.curr_PC; + assign VX_exe_mem_req.branch_offset = VX_bckE_req.itype_immed; + assign VX_exe_mem_req.branch_type = VX_bckE_req.branch_type; + assign VX_exe_mem_req.valid = VX_bckE_req.valid; + assign VX_exe_mem_req.warp_num = VX_bckE_req.warp_num; + + + assign out_is_csr = VX_bckE_req.is_csr; + assign out_csr_address = VX_bckE_req.csr_address; endmodule // VX_execute diff --git a/rtl/VX_f_d_reg.v b/rtl/VX_f_d_reg.v index 85a42074..6d1bd8c0 100644 --- a/rtl/VX_f_d_reg.v +++ b/rtl/VX_f_d_reg.v @@ -3,84 +3,31 @@ `include "VX_define.v" module VX_f_d_reg ( - input wire clk, - input wire reset, - input wire in_valid[`NT_M1:0], - input wire in_fwd_stall, - input wire in_freeze, - input wire in_clone_stall, + input wire clk, + input wire reset, + input wire in_fwd_stall, + input wire in_freeze, + input wire in_clone_stall, + + VX_inst_meta_inter fe_inst_meta_fd, + VX_inst_meta_inter fd_inst_meta_de - output wire[31:0] out_instruction, - output wire[31:0] out_curr_PC, - output wire out_valid[`NT_M1:0], - output wire[`NW_M1:0] out_warp_num, - /* verilator lint_off UNUSED */ - input wire[31:0] in_instruction, - input wire[31:0] in_curr_PC, - input wire[`NW_M1:0] in_warp_num, - input fe_inst_meta_de_t fe_inst_meta_fd - /* verilator lint_on UNUSED */ ); - // genvar index; - // always @(posedge clk) begin - // // $display("in_instruction: %x\tfe_inst_meta_fd.instruction: %x",in_instruction, fe_inst_meta_fd.instruction); - // $error("finally"); - // assert (in_instruction == fe_inst_meta_fd.instruction); - // assert (in_curr_PC == fe_inst_meta_fd.inst_pc); - // assert (in_warp_num == fe_inst_meta_fd.warp_num); - // for (index = 0; index <= `NT_M1; index = index + 1) assert (in_valid[index] == fe_inst_meta_fd.valid[index]); - // end - - // var match; - // always @(*) begin - // match = ; - // if (!match) - // $display("in_instruction: %x, fe_inst_meta_fd.instruction: %x",in_instruction ,fe_inst_meta_fd.instruction); - // end - - reg[31:0] instruction; - reg[31:0] curr_PC; - reg valid[`NT_M1:0]; - reg[`NW_M1:0] warp_num; - - integer reset_cur_thread = 0; + wire flush = 1'b0; + wire stall = in_fwd_stall == 1'b1 || in_freeze == 1'b1 || in_clone_stall; - always @(posedge clk or posedge reset) begin - if(reset) begin - instruction <= 32'h0; - curr_PC <= 32'h0; - warp_num <= 0; - for (reset_cur_thread = 0; reset_cur_thread < `NT; reset_cur_thread = reset_cur_thread + 1) - valid[reset_cur_thread] <= 1'b0; - - end else if (in_fwd_stall == 1'b1 || in_freeze == 1'b1 || in_clone_stall) begin - // if (in_clone_stall) begin - // $display("STALL BECAUSE OF CLONE"); - // end - end else begin - instruction <= in_instruction; - valid <= in_valid; - curr_PC <= in_curr_PC; - warp_num <= in_warp_num; - - // instruction <= fe_inst_meta_fd.instruction; - // valid <= fe_inst_meta_fd.valid; - // curr_PC <= fe_inst_meta_fd.inst_pc; - // warp_num <= fe_inst_meta_fd.warp_num; - end - end - - always @(*) begin - // $display("PC in VX_f_d_reg: %h", curr_PC); - end - - assign out_instruction = instruction; - assign out_curr_PC = curr_PC; - assign out_valid = valid; - assign out_warp_num = warp_num; + VX_generic_register #(.N(72)) f_d_reg + ( + .clk (clk), + .reset(reset), + .stall(stall), + .flush(flush), + .in ({fe_inst_meta_fd.instruction, fe_inst_meta_fd.inst_pc, fe_inst_meta_fd.warp_num, fe_inst_meta_fd.valid}), + .out ({fd_inst_meta_de.instruction, fd_inst_meta_de.inst_pc, fd_inst_meta_de.warp_num, fd_inst_meta_de.valid}) + ); endmodule \ No newline at end of file diff --git a/rtl/VX_fetch.v b/rtl/VX_fetch.v index c9a76133..2e32d830 100644 --- a/rtl/VX_fetch.v +++ b/rtl/VX_fetch.v @@ -15,26 +15,31 @@ module VX_fetch ( input wire[31:0] in_jal_dest, input wire in_interrupt, input wire in_debug, - input wire in_thread_mask[`NT_M1:0], - input wire in_change_mask, - input wire[`NW_M1:0] in_decode_warp_num, input wire[`NW_M1:0] in_memory_warp_num, - input wire in_wspawn, - input wire[31:0] in_wspawn_pc, - input wire in_ebreak, input icache_response_t icache_response, output icache_request_t icache_request, - output wire[31:0] out_instruction, output wire out_delay, - output wire[`NW_M1:0] out_warp_num, - output wire[31:0] out_curr_PC, - output wire out_valid[`NT_M1:0], output wire out_ebreak, output wire[`NW_M1:0] out_which_wspawn, - output fe_inst_meta_de_t fe_inst_meta_fd + VX_inst_meta_inter fe_inst_meta_fd, + VX_warp_ctl_inter VX_warp_ctl ); + wire in_change_mask = VX_warp_ctl.change_mask; + wire in_wspawn = VX_warp_ctl.wspawn; + wire[31:0] in_wspawn_pc = VX_warp_ctl.wspawn_pc; + wire in_ebreak = VX_warp_ctl.ebreak; + wire[`NW_M1:0] in_decode_warp_num = VX_warp_ctl.warp_num; + + + wire in_thread_mask[`NT_M1:0]; + + genvar ind; + for (ind = 0; ind <= `NT_M1; ind = ind + 1) assign in_thread_mask[ind] = VX_warp_ctl.thread_mask[ind]; + + + reg stall; reg[31:0] out_PC; @@ -184,25 +189,16 @@ module VX_fetch ( end assign out_PC = out_PC_var; - assign out_valid = out_valid_var; - - // always @(*) begin - // if (out_valid[0]) begin - // $display("[%d] %h #%b#",out_warp_num, out_PC, out_valid); - // end - // end `endif + + assign icache_request.pc_address = out_PC; - assign out_curr_PC = out_PC; - assign out_warp_num = warp_num; assign out_delay = 0; - assign out_instruction = (stall) ? 32'b0 : icache_response.instruction; - assign fe_inst_meta_fd.warp_num = warp_num; genvar index; @@ -211,6 +207,8 @@ module VX_fetch ( assign fe_inst_meta_fd.instruction = (stall) ? 32'b0 : icache_response.instruction;; assign fe_inst_meta_fd.inst_pc = out_PC; - + // always @(*) begin + // $display("fetch: icache_request: %x", out_PC); + // end endmodule \ No newline at end of file diff --git a/rtl/VX_forwarding.v b/rtl/VX_forwarding.v index 7d61daa2..95f9ecdc 100644 --- a/rtl/VX_forwarding.v +++ b/rtl/VX_forwarding.v @@ -11,7 +11,7 @@ module VX_forwarding ( // INFO FROM EXE input wire[4:0] in_execute_dest, input wire[1:0] in_execute_wb, - input wire[31:0] in_execute_alu_result[`NT_M1:0], + input wire[`NT_M1:0][31:0] in_execute_alu_result, input wire[31:0] in_execute_PC_next, input wire in_execute_is_csr, input wire[11:0] in_execute_csr_address, @@ -20,8 +20,8 @@ module VX_forwarding ( // INFO FROM MEM input wire[4:0] in_memory_dest, input wire[1:0] in_memory_wb, - input wire[31:0] in_memory_alu_result[`NT_M1:0], - input wire[31:0] in_memory_mem_data[`NT_M1:0], + input wire[`NT_M1:0][31:0] in_memory_alu_result, + input wire[`NT_M1:0][31:0] in_memory_mem_data, input wire[31:0] in_memory_PC_next, input wire in_memory_is_csr, input wire[11:0] in_memory_csr_address, @@ -31,8 +31,8 @@ module VX_forwarding ( // INFO FROM WB input wire[4:0] in_writeback_dest, input wire[1:0] in_writeback_wb, - input wire[31:0] in_writeback_alu_result[`NT_M1:0], - input wire[31:0] in_writeback_mem_data[`NT_M1:0], + input wire[`NT_M1:0][31:0] in_writeback_alu_result, + input wire[`NT_M1:0][31:0] in_writeback_mem_data, input wire[31:0] in_writeback_PC_next, input wire[`NW_M1:0] in_writeback_warp_num, @@ -41,8 +41,8 @@ module VX_forwarding ( output wire out_src1_fwd, output wire out_src2_fwd, output wire out_csr_fwd, - output wire[31:0] out_src1_fwd_data[`NT_M1:0], - output wire[31:0] out_src2_fwd_data[`NT_M1:0], + output wire[`NT_M1:0][31:0] out_src1_fwd_data, + output wire[`NT_M1:0][31:0] out_src2_fwd_data, output wire[31:0] out_csr_fwd_data, output wire out_fwd_stall ); @@ -66,9 +66,9 @@ module VX_forwarding ( wire csr_exe_fwd; wire csr_mem_fwd; - wire[31:0] use_execute_PC_next[`NT_M1:0]; - wire[31:0] use_memory_PC_next[`NT_M1:0]; - wire[31:0] use_writeback_PC_next[`NT_M1:0]; + wire[`NT_M1:0][31:0] use_execute_PC_next; + wire[`NT_M1:0][31:0] use_memory_PC_next; + wire[`NT_M1:0][31:0] use_writeback_PC_next; genvar index; @@ -169,10 +169,11 @@ module VX_forwarding ( (src2_mem_fwd) ? ((mem_jal) ? use_memory_PC_next : (mem_mem_read ? in_memory_mem_data : in_memory_alu_result)) : ( src2_wb_fwd ) ? (wb_jal ? use_writeback_PC_next : (wb_mem_read ? in_writeback_mem_data : in_writeback_alu_result)) : in_execute_alu_result; // last one should be deadbeef + - assign out_csr_fwd_data = csr_exe_fwd ? in_execute_alu_result : - csr_mem_fwd ? in_memory_csr_result : - in_execute_alu_result; // last one should be deadbeef + assign out_csr_fwd_data = csr_exe_fwd ? in_execute_alu_result[0][31:0] : + csr_mem_fwd ? in_memory_csr_result[31:0] : + in_execute_alu_result[0][31:0]; // last one should be deadbeef diff --git a/rtl/VX_m_w_reg.v b/rtl/VX_m_w_reg.v index b0e8fadf..47405cbc 100644 --- a/rtl/VX_m_w_reg.v +++ b/rtl/VX_m_w_reg.v @@ -3,76 +3,36 @@ `include "VX_define.v" module VX_m_w_reg ( - input wire clk, - input wire[31:0] in_alu_result[`NT_M1:0], - input wire[31:0] in_mem_result[`NT_M1:0], // NEW - input wire[4:0] in_rd, - input wire[1:0] in_wb, - input wire[4:0] in_rs1, - input wire[4:0] in_rs2, - input wire[31:0] in_PC_next, - input wire in_freeze, - input wire in_valid[`NT_M1:0], - input wire[`NW_M1:0] in_warp_num, + input wire clk, + input wire reset, + VX_inst_mem_wb_inter VX_mem_wb, - output wire[31:0] out_alu_result[`NT_M1:0], - output wire[31:0] out_mem_result[`NT_M1:0], // NEW + input wire in_freeze, + + output wire[`NT_M1:0][31:0] out_alu_result, + output wire[`NT_M1:0][31:0] out_mem_result, // NEW output wire[4:0] out_rd, output wire[1:0] out_wb, output wire[4:0] out_rs1, output wire[4:0] out_rs2, output wire[31:0] out_PC_next, - output wire out_valid[`NT_M1:0], + output wire[`NT_M1:0] out_valid, output wire[`NW_M1:0] out_warp_num ); + wire flush = 0; + wire stall = in_freeze; - reg[31:0] alu_result[`NT_M1:0]; - reg[31:0] mem_result[`NT_M1:0]; - reg[4:0] rd; - reg[4:0] rs1; - reg[4:0] rs2; - reg[1:0] wb; - reg[31:0] PC_next; - reg valid[`NT_M1:0]; - reg[`NW_M1:0] warp_num; - - initial begin - // alu_result = 0; - // mem_result = 0; - rd = 0; - rs1 = 0; - rs2 = 0; - wb = 0; - PC_next = 0; - warp_num = 0; - // valid = 0; - end - - assign out_alu_result = alu_result; - assign out_mem_result = mem_result; - assign out_rd = rd; - assign out_rs1 = rs1; - assign out_rs2 = rs2; - assign out_wb = wb; - assign out_PC_next = PC_next; - assign out_valid = valid; - assign out_warp_num = warp_num; - - always @(posedge clk) begin - if(in_freeze == 1'b0) begin - alu_result <= in_alu_result; - mem_result <= in_mem_result; - rd <= in_rd; - rs1 <= in_rs1; - rs2 <= in_rs2; - wb <= in_wb; - PC_next <= in_PC_next; - valid <= in_valid; - warp_num <= in_warp_num; - end - end + VX_generic_register #(.N(313)) m_w_reg + ( + .clk (clk), + .reset(reset), + .stall(stall), + .flush(flush), + .in ({VX_mem_wb.alu_result, VX_mem_wb.mem_result, VX_mem_wb.rd, VX_mem_wb.wb, VX_mem_wb.rs1, VX_mem_wb.rs2, VX_mem_wb.PC_next, VX_mem_wb.valid, VX_mem_wb.warp_num}), + .out ({out_alu_result , out_mem_result , out_rd , out_wb , out_rs1 , out_rs2 , out_PC_next , out_valid , out_warp_num }) + ); diff --git a/rtl/VX_memory.v b/rtl/VX_memory.v index fa271841..a38024b9 100644 --- a/rtl/VX_memory.v +++ b/rtl/VX_memory.v @@ -3,136 +3,70 @@ module VX_memory ( - /* verilator lint_off UNUSED */ - input wire clk, - /* verilator lint_on UNUSED */ - input wire[31:0] in_alu_result[`NT_M1:0], - input wire[2:0] in_mem_read, - input wire[2:0] in_mem_write, - input wire[4:0] in_rd, - input wire[1:0] in_wb, - input wire[4:0] in_rs1, - input wire[4:0] in_rs2, - input wire[31:0] in_rd2[`NT_M1:0], - input wire[31:0] in_PC_next, - input wire[31:0] in_curr_PC, - input wire[31:0] in_branch_offset, - input wire[2:0] in_branch_type, - input wire in_valid[`NT_M1:0], - input wire[31:0] in_cache_driver_out_data[`NT_M1:0], - input wire[`NW_M1:0] in_warp_num, + VX_mem_req_inter VX_mem_req, + VX_inst_mem_wb_inter VX_mem_wb, - output wire[31:0] out_alu_result[`NT_M1:0], - output wire[31:0] out_mem_result[`NT_M1:0], - output wire[4:0] out_rd, - output wire[1:0] out_wb, - output wire[4:0] out_rs1, - output wire[4:0] out_rs2, - output reg out_branch_dir, - output wire[31:0] out_branch_dest, - output wire out_delay, - output wire[31:0] out_PC_next, - output wire out_valid[`NT_M1:0], + + output wire out_delay, + + output wire out_branch_dir, + output wire[31:0] out_branch_dest, + + + input wire[31:0] in_cache_driver_out_data[`NT_M1:0], output wire[31:0] out_cache_driver_in_address[`NT_M1:0], output wire[2:0] out_cache_driver_in_mem_read, output wire[2:0] out_cache_driver_in_mem_write, output wire out_cache_driver_in_valid[`NT_M1:0], - output wire[31:0] out_cache_driver_in_data[`NT_M1:0], - output wire[`NW_M1:0] out_warp_num + output wire[31:0] out_cache_driver_in_data[`NT_M1:0] ); - // always @(in_mem_read, in_cache_driver_out_data) begin - // if (in_mem_read == `LW_MEM_READ) begin - // $display("PC: %h ----> Received: %h for addr: ", in_curr_PC, in_cache_driver_out_data[0], in_alu_result[0]); - // end - // end - // wire[15:0] addr_0 = in_alu_result[0][31:16]; + genvar index; + for (index = 0; index <= `NT_M1; index = index + 1) begin + assign out_cache_driver_in_address[index] = VX_mem_req.alu_result[index]; + assign out_cache_driver_in_data[index] = VX_mem_req.rd2[index]; + assign out_cache_driver_in_valid[index] = VX_mem_req.valid[index]; - // wire sm_valid[`NT_M1:0]; + assign VX_mem_wb.mem_result[index] = in_cache_driver_out_data[index]; - // assign sm_valid = (addr_0 != 16'hFFFF) ? in_valid : in_valid; - - - // wire z_valid[`NT_M1:0]; - // assign z_valid = 0; + end assign out_delay = 1'b0; - assign out_cache_driver_in_address = in_alu_result; - assign out_cache_driver_in_mem_read = in_mem_read; - assign out_cache_driver_in_mem_write = in_mem_write; - assign out_cache_driver_in_data = in_rd2; - assign out_cache_driver_in_valid = in_valid; - - // always @(*) begin - // if (in_valid[0] && (in_mem_write == `SW_MEM_WRITE) && (in_alu_result[0] >= 32'h810049a0)) begin - // $display("SW$ PC: %h - Warp: %h -> [%h]%h = %h || [%h]%h = %h",in_curr_PC, in_warp_num, in_valid[0], in_alu_result[0], in_rd2[0], in_valid[1], in_alu_result[1], in_rd2[1]); - // end - // end + assign out_cache_driver_in_mem_read = VX_mem_req.mem_read; + assign out_cache_driver_in_mem_write = VX_mem_req.mem_write; - - // wire[31:0] sm_out_data[`NT_M1:0]; + assign VX_mem_wb.alu_result = VX_mem_req.alu_result; + assign VX_mem_wb.rd = VX_mem_req.rd; + assign VX_mem_wb.wb = VX_mem_req.wb; + assign VX_mem_wb.rs1 = VX_mem_req.rs1; + assign VX_mem_wb.rs2 = VX_mem_req.rs2; + assign VX_mem_wb.PC_next = VX_mem_req.PC_next; + assign VX_mem_wb.valid = VX_mem_req.valid; + assign VX_mem_wb.warp_num = VX_mem_req.warp_num; - // VX_shared_memory vx_shared_memory( - // .clk (clk), - // .in_address (in_alu_result), - // .in_mem_read (in_mem_read), - // .in_mem_write(in_mem_write), - // .in_valid (sm_valid), - // .in_data (in_rd2), - // .out_data (sm_out_data) - // ); + reg temp_branch_dir; - // assign out_mem_result = sm_valid ? sm_out_data : in_cache_driver_out_data; - assign out_mem_result = in_cache_driver_out_data; - assign out_alu_result = in_alu_result; - assign out_rd = in_rd; - assign out_wb = in_wb; - assign out_rs1 = in_rs1; - assign out_rs2 = in_rs2; - assign out_PC_next = in_PC_next; - assign out_valid = in_valid; - assign out_warp_num = in_warp_num; - - // always @(*) begin - - // if (in_cache_driver_out_data[0] != 32'hbabebabe) - // begin - // $display("MEM: data read from cache_driver: %h", in_cache_driver_out_data[0]); - // end - - // end - - - assign out_branch_dest = $signed(in_curr_PC) + ($signed(in_branch_offset) << 1); + assign out_branch_dest = $signed(VX_mem_req.curr_PC) + ($signed(VX_mem_req.branch_offset) << 1); always @(*) begin - case(in_branch_type) - `BEQ: out_branch_dir = (in_alu_result[0] == 0) ? `TAKEN : `NOT_TAKEN; - `BNE: - begin - out_branch_dir = (in_alu_result[0] == 0) ? `NOT_TAKEN : `TAKEN; - end - `BLT: out_branch_dir = (in_alu_result[0][31] == 0) ? `NOT_TAKEN : `TAKEN; - `BGT: out_branch_dir = (in_alu_result[0][31] == 0) ? `TAKEN : `NOT_TAKEN; - `BLTU: - begin - out_branch_dir = (in_alu_result[0][31] == 0) ? `NOT_TAKEN : `TAKEN; - if (in_warp_num == 1) begin - // $display("BLTU PC:%h : %d < %d = %d", in_curr_PC, in_rs1, in_rs2, (in_alu_result[0][31] == 0)); - end - end - `BGTU: out_branch_dir = (in_alu_result[0][31] == 0) ? `TAKEN : `NOT_TAKEN; - `NO_BRANCH: out_branch_dir = `NOT_TAKEN; - default: out_branch_dir = `NOT_TAKEN; + case(VX_mem_req.branch_type) + `BEQ: temp_branch_dir = (VX_mem_req.alu_result[0] == 0) ? `TAKEN : `NOT_TAKEN; + `BNE: temp_branch_dir = (VX_mem_req.alu_result[0] == 0) ? `NOT_TAKEN : `TAKEN; + `BLT: temp_branch_dir = (VX_mem_req.alu_result[0][31] == 0) ? `NOT_TAKEN : `TAKEN; + `BGT: temp_branch_dir = (VX_mem_req.alu_result[0][31] == 0) ? `TAKEN : `NOT_TAKEN; + `BLTU: temp_branch_dir = (VX_mem_req.alu_result[0][31] == 0) ? `NOT_TAKEN : `TAKEN; + `BGTU: temp_branch_dir = (VX_mem_req.alu_result[0][31] == 0) ? `TAKEN : `NOT_TAKEN; + `NO_BRANCH: temp_branch_dir = `NOT_TAKEN; + default: temp_branch_dir = `NOT_TAKEN; endcase // in_branch_type end - + assign out_branch_dir = temp_branch_dir; endmodule // Memory diff --git a/rtl/VX_register_file.v b/rtl/VX_register_file.v index c9273125..aba7aee1 100644 --- a/rtl/VX_register_file.v +++ b/rtl/VX_register_file.v @@ -10,12 +10,12 @@ module VX_register_file ( input wire[4:0] in_src1, input wire[4:0] in_src2, - output wire[31:0] out_regs[31:0], + output wire[31:0][31:0] out_regs, output reg[31:0] out_src1_data, output reg[31:0] out_src2_data ); - reg[31:0] registers[31:0]; + reg[31:0][31:0] registers; wire[31:0] write_data; diff --git a/rtl/VX_register_file_master_slave.v b/rtl/VX_register_file_master_slave.v index cf50d9e5..1ae63a0d 100644 --- a/rtl/VX_register_file_master_slave.v +++ b/rtl/VX_register_file_master_slave.v @@ -10,14 +10,14 @@ module VX_register_file_master_slave ( input wire[4:0] in_src2, input wire in_wspawn, input wire in_to_wspawn, - input wire[31:0] in_wspawn_regs[31:0], + input wire[31:0][31:0] in_wspawn_regs, output reg[31:0] out_src1_data, output reg[31:0] out_src2_data, - output wire[31:0] out_regs[31:0] + output wire[31:0][31:0] out_regs ); - reg[31:0] registers[31:0]; + reg[31:0][31:0] registers; wire[31:0] write_data; diff --git a/rtl/VX_register_file_slave.v b/rtl/VX_register_file_slave.v index 77951f3b..bafb9459 100644 --- a/rtl/VX_register_file_slave.v +++ b/rtl/VX_register_file_slave.v @@ -15,13 +15,13 @@ module VX_register_file_slave ( input wire[4:0] in_src2, input wire in_clone, input wire in_to_clone, - input wire[31:0] in_regs[31:0], + input wire[31:0][31:0] in_regs, output reg[31:0] out_src1_data, output reg[31:0] out_src2_data ); - reg[31:0] registers[31:0]; + reg[31:0][31:0] registers; wire[31:0] write_data; diff --git a/rtl/VX_writeback.v b/rtl/VX_writeback.v index 5e72a18e..f6e39bff 100644 --- a/rtl/VX_writeback.v +++ b/rtl/VX_writeback.v @@ -6,26 +6,24 @@ module VX_writeback ( /* verilator lint_off UNUSED */ input wire clk, /* verilator lint_off UNUSED */ - input wire[31:0] in_alu_result[`NT_M1:0], - input wire[31:0] in_mem_result[`NT_M1:0], + input wire[`NT_M1:0][31:0] in_alu_result, + input wire[`NT_M1:0][31:0] in_mem_result, input wire[4:0] in_rd, input wire[1:0] in_wb, input wire[31:0] in_PC_next, /* verilator lint_off UNUSED */ - input wire in_valid[`NT_M1:0], + input wire[`NT_M1:0] in_valid, /* verilator lint_on UNUSED */ input wire [`NW_M1:0] in_warp_num, - output wire[31:0] out_write_data[`NT_M1:0], - output wire[4:0] out_rd, - output wire[1:0] out_wb, - output wire[`NW_M1:0] out_warp_num + + VX_wb_inter VX_writeback_inter ); wire is_jal; wire uses_alu; - wire[31:0] out_pc_data[`NT_M1:0]; + wire[`NT_M1:0][31:0] out_pc_data; // genvar index; @@ -49,20 +47,14 @@ module VX_writeback ( assign is_jal = in_wb == `WB_JAL; assign uses_alu = in_wb == `WB_ALU; - assign out_write_data = is_jal ? out_pc_data : + assign VX_writeback_inter.write_data = is_jal ? out_pc_data : uses_alu ? in_alu_result : in_mem_result; - - // always @(negedge clk) begin - // if (in_wb != 0) begin - // $display("[%h] WB Data: %h {%h}, to register: %d [%d %d]",in_PC_next - 4, out_write_data[0], in_mem_result[0], in_rd, in_valid[0], in_valid[1]); - // end - // end - - assign out_rd = in_rd; - assign out_wb = in_wb; - assign out_warp_num = in_warp_num; + assign VX_writeback_inter.wb_valid = in_valid; + assign VX_writeback_inter.rd = in_rd; + assign VX_writeback_inter.wb = in_wb; + assign VX_writeback_inter.wb_warp_num = in_warp_num; endmodule // VX_writeback \ No newline at end of file diff --git a/rtl/Vortex.v b/rtl/Vortex.v index 773e530b..429e9c22 100644 --- a/rtl/Vortex.v +++ b/rtl/Vortex.v @@ -6,10 +6,7 @@ module Vortex( input wire clk, input wire reset, input wire[31:0] icache_response_instruction, - output wire[31:0] icache_request_pc_address, - // input wire[31:0] icache_instruction, - // output wire icache_request_valid, - // output wire[31:0] icache_PC, + output wire[31:0] icache_request_pc_address, input wire[31:0] in_cache_driver_out_data[`NT_M1:0], output wire[31:0] out_cache_driver_in_address[`NT_M1:0], output wire[2:0] out_cache_driver_in_mem_read, @@ -26,73 +23,14 @@ module Vortex( // From fetch -wire[31:0] fetch_instruction; wire fetch_delay; -wire[31:0] fetch_curr_PC; -wire fetch_valid[`NT_M1:0]; -wire[`NW_M1:0] fetch_warp_num; wire fetch_ebreak; wire[`NW_M1:0] fetch_which_warp; -// From f_d_register -wire[31:0] f_d_instruction; -wire[31:0] f_d_curr_PC; -wire f_d_valid[`NT_M1:0]; -wire[`NW_M1:0] f_d_warp_num; // From decode wire decode_branch_stall; -wire[11:0] decode_csr_address; -wire decode_is_csr; -wire[31:0] decode_csr_mask; -wire[4:0] decode_rd; -wire[4:0] decode_rs1; -wire[4:0] decode_rs2; -wire[31:0] decode_a_reg_data[`NT_M1:0]; -wire[31:0] decode_b_reg_data[`NT_M1:0]; -wire[1:0] decode_wb; -wire[4:0] decode_alu_op; -wire decode_rs2_src; -reg[31:0] decode_itype_immed; -wire[2:0] decode_mem_read; -wire[2:0] decode_mem_write; -reg[2:0] decode_branch_type; -reg decode_jal; -reg[31:0] decode_jal_offset; -reg[19:0] decode_upper_immed; -wire[31:0] decode_PC_next; -wire decode_valid[`NT_M1:0]; wire decode_clone_stall; -wire decode_change_mask; -wire decode_thread_mask[`NT_M1:0]; -wire[`NW_M1:0] decode_warp_num; -wire decode_wspawn; -wire[31:0] decode_wspawn_pc; -wire decode_ebreak; - -// From d_e_register -wire[11:0] d_e_csr_address; -wire d_e_is_csr; -wire[31:0] d_e_csr_mask; -wire[4:0] d_e_rd; -wire[4:0] d_e_rs1; -wire[4:0] d_e_rs2; -wire[31:0] d_e_a_reg_data[`NT_M1:0]; -wire[31:0] d_e_b_reg_data[`NT_M1:0]; -wire[4:0] d_e_alu_op; -wire[1:0] d_e_wb; -wire d_e_rs2_src; -wire[31:0] d_e_itype_immed; -wire[2:0] d_e_mem_read; -wire[2:0] d_e_mem_write; -wire[2:0] d_e_branch_type; -wire[19:0] d_e_upper_immed; -wire[31:0] d_e_curr_PC; -wire d_e_jal; -wire[31:0] d_e_jal_offset; -wire[31:0] d_e_PC_next; -wire d_e_valid[`NT_M1:0]; -wire[`NW_M1:0] d_e_warp_num; // From execute @@ -100,21 +38,10 @@ wire execute_branch_stall; wire[11:0] execute_csr_address; wire execute_is_csr; reg[31:0] execute_csr_result; -reg[31:0] execute_alu_result[`NT_M1:0]; -wire[4:0] execute_rd; -wire[1:0] execute_wb; -wire[4:0] execute_rs1; -wire[4:0] execute_rs2; -wire[31:0] execute_a_reg_data[`NT_M1:0]; -wire[31:0] execute_b_reg_data[`NT_M1:0]; -wire[2:0] execute_mem_read; -wire[2:0] execute_mem_write; +wire[`NT_M1:0][31:0] execute_a_reg_data; +wire[`NT_M1:0][31:0] execute_b_reg_data; wire execute_jal; wire[31:0] execute_jal_dest; -wire[31:0] execute_branch_offset; -wire[31:0] execute_PC_next; -wire execute_valid[`NT_M1:0]; -wire[`NW_M1:0] execute_warp_num; // From e_m_register @@ -123,42 +50,20 @@ wire[31:0] e_m_jal_dest; wire[11:0] e_m_csr_address; wire e_m_is_csr; wire[31:0] e_m_csr_result; -wire[31:0] e_m_alu_result[`NT_M1:0]; -wire[4:0] e_m_rd; -wire[1:0] e_m_wb; -wire[4:0] e_m_rs1; /* verilator lint_off UNUSED */ -wire[31:0] e_m_a_reg_data[`NT_M1:0]; +wire[`NT_M1:0][31:0] e_m_a_reg_data; +wire[`NT_M1:0][31:0] e_m_b_reg_data; /* verilator lint_on UNUSED */ -wire[31:0] e_m_b_reg_data[`NT_M1:0]; -wire[4:0] e_m_rs2; -wire[2:0] e_m_mem_read; -wire[2:0] e_m_mem_write; -wire[31:0] e_m_curr_PC; -wire[31:0] e_m_branch_offset; -wire[2:0] e_m_branch_type; -wire[31:0] e_m_PC_next; -wire e_m_valid[`NT_M1:0]; -wire[`NW_M1:0] e_m_warp_num; // From memory wire memory_delay; wire memory_branch_dir; wire[31:0] memory_branch_dest; -wire[31:0] memory_alu_result[`NT_M1:0]; -wire[31:0] memory_mem_result[`NT_M1:0]; -wire[4:0] memory_rd; -wire[1:0] memory_wb; -wire[4:0] memory_rs1; -wire[4:0] memory_rs2; -wire[31:0] memory_PC_next; -wire memory_valid[`NT_M1:0]; -wire[`NW_M1:0] memory_warp_num; // From m_w_register -wire[31:0] m_w_alu_result[`NT_M1:0]; -wire[31:0] m_w_mem_result[`NT_M1:0]; +wire[`NT_M1:0][31:0] m_w_alu_result; +wire[`NT_M1:0][31:0] m_w_mem_result; wire[4:0] m_w_rd; wire[1:0] m_w_wb; /* verilator lint_off UNUSED */ @@ -166,14 +71,8 @@ wire[4:0] m_w_rs1; wire[4:0] m_w_rs2; /* verilator lint_on UNUSED */ wire[31:0] m_w_PC_next; -wire m_w_valid[`NT_M1:0]; -wire[`NW_M1:0] m_w_warp_num; - -// From writeback -wire[31:0] writeback_write_data[`NT_M1:0]; -wire[4:0] writeback_rd; -wire[1:0] writeback_wb; -wire[`NW_M1:0] writeback_warp_num; +wire[`NT_M1:0] m_w_valid; +wire[`NW_M1:0] m_w_warp_num; // From csr handler wire[31:0] csr_decode_csr_data; @@ -187,8 +86,8 @@ wire forwarding_src2_fwd; wire forwarding_csr_fwd; wire[31:0] forwarding_csr_fwd_data; /* verilator lint_on UNUSED */ -wire[31:0] forwarding_src1_fwd_data[`NT_M1:0]; -wire[31:0] forwarding_src2_fwd_data[`NT_M1:0]; +wire[`NT_M1:0][31:0] forwarding_src1_fwd_data; +wire[`NT_M1:0][31:0] forwarding_src2_fwd_data; // Internal @@ -204,7 +103,21 @@ assign out_ebreak = fetch_ebreak; icache_response_t icache_response_fe; icache_request_t icache_request_fe; -fe_inst_meta_de_t fe_inst_meta_fd; + +VX_inst_meta_inter fe_inst_meta_fd(); +VX_inst_meta_inter fd_inst_meta_de(); + +VX_frE_to_bckE_req_inter VX_frE_to_bckE_req(); +VX_frE_to_bckE_req_inter VX_bckE_req(); + +VX_mem_req_inter VX_exe_mem_req(); +VX_mem_req_inter VX_mem_req(); + + +VX_inst_mem_wb_inter VX_mem_wb(); + +VX_warp_ctl_inter VX_warp_ctl(); +VX_wb_inter VX_writeback_inter(); assign icache_response_fe.instruction = icache_response_instruction; assign icache_request_pc_address = icache_request_fe.pc_address; @@ -223,21 +136,12 @@ VX_fetch vx_fetch( .in_jal_dest (e_m_jal_dest), .in_interrupt (interrupt), .in_debug (debug), - .in_thread_mask (decode_thread_mask), - .in_change_mask (decode_change_mask), - .in_decode_warp_num (decode_warp_num), - .in_memory_warp_num (memory_warp_num), - .in_wspawn (decode_wspawn), - .in_wspawn_pc (decode_wspawn_pc), - .in_ebreak (decode_ebreak), + .in_memory_warp_num (VX_mem_wb.warp_num), .icache_response (icache_response_fe), + .VX_warp_ctl (VX_warp_ctl), .icache_request (icache_request_fe), - .out_instruction (fetch_instruction), .out_delay (fetch_delay), - .out_curr_PC (fetch_curr_PC), - .out_warp_num (fetch_warp_num), - .out_valid (fetch_valid), .out_ebreak (fetch_ebreak), .out_which_wspawn (fetch_which_warp), .fe_inst_meta_fd (fe_inst_meta_fd) @@ -247,212 +151,78 @@ VX_fetch vx_fetch( VX_f_d_reg vx_f_d_reg( .clk (clk), .reset (reset), - .in_instruction (fetch_instruction), - .in_valid (fetch_valid), - .in_curr_PC (fetch_curr_PC), .in_fwd_stall (forwarding_fwd_stall), .in_freeze (total_freeze), .in_clone_stall (decode_clone_stall), - .in_warp_num (fetch_warp_num), - .out_instruction(f_d_instruction), - .out_curr_PC (f_d_curr_PC), - .out_valid (f_d_valid), - .out_warp_num (f_d_warp_num), - .fe_inst_meta_fd(fe_inst_meta_fd) + .fe_inst_meta_fd(fe_inst_meta_fd), + .fd_inst_meta_de(fd_inst_meta_de) ); VX_decode vx_decode( .clk (clk), - .in_instruction (f_d_instruction), - .in_curr_PC (f_d_curr_PC), - .in_valid (f_d_valid), - .in_write_data (writeback_write_data), - .in_rd (writeback_rd), - .in_wb (writeback_wb), - .in_wb_warp_num (writeback_warp_num), - .in_wb_valid (m_w_valid), + .fd_inst_meta_de (fd_inst_meta_de), + .VX_writeback_inter(VX_writeback_inter), .in_src1_fwd (forwarding_src1_fwd), .in_src1_fwd_data(forwarding_src1_fwd_data), .in_src2_fwd (forwarding_src2_fwd), .in_src2_fwd_data(forwarding_src2_fwd_data), - .in_warp_num (f_d_warp_num), .in_which_wspawn (fetch_which_warp), - .out_csr_address (decode_csr_address), - .out_is_csr (decode_is_csr), - .out_csr_mask (decode_csr_mask), - .out_rd (decode_rd), - .out_rs1 (decode_rs1), - .out_rs2 (decode_rs2), - .out_a_reg_data (decode_a_reg_data), - .out_b_reg_data (decode_b_reg_data), - .out_wb (decode_wb), - .out_alu_op (decode_alu_op), - .out_rs2_src (decode_rs2_src), - .out_itype_immed (decode_itype_immed), - .out_mem_read (decode_mem_read), - .out_mem_write (decode_mem_write), - .out_branch_type (decode_branch_type), - .out_branch_stall(decode_branch_stall), - .out_jal (decode_jal), - .out_jal_offset (decode_jal_offset), - .out_upper_immed (decode_upper_immed), - .out_PC_next (decode_PC_next), - .out_valid (decode_valid), - .out_clone_stall (decode_clone_stall), - .out_change_mask (decode_change_mask), - .out_thread_mask (decode_thread_mask), - .out_warp_num (decode_warp_num), - .out_wspawn (decode_wspawn), - .out_wspawn_pc (decode_wspawn_pc), - .out_ebreak (decode_ebreak) + .VX_frE_to_bckE_req(VX_frE_to_bckE_req), + .VX_warp_ctl (VX_warp_ctl), + .out_clone_stall (decode_clone_stall), + .out_branch_stall (decode_branch_stall) ); VX_d_e_reg vx_d_e_reg( .clk (clk), - .in_rd (decode_rd), - .in_rs1 (decode_rs1), - .in_rs2 (decode_rs2), - .in_a_reg_data (decode_a_reg_data), - .in_b_reg_data (decode_b_reg_data), - .in_alu_op (decode_alu_op), - .in_wb (decode_wb), - .in_rs2_src (decode_rs2_src), - .in_itype_immed (decode_itype_immed), - .in_mem_read (decode_mem_read), - .in_mem_write (decode_mem_write), - .in_PC_next (decode_PC_next), - .in_branch_type (decode_branch_type), + .reset (reset), .in_fwd_stall (forwarding_fwd_stall), .in_branch_stall(execute_branch_stall), - .in_upper_immed (decode_upper_immed), - .in_csr_address (decode_csr_address), - .in_is_csr (decode_is_csr), - .in_csr_mask (decode_csr_mask), - .in_curr_PC (f_d_curr_PC), - .in_jal (decode_jal), - .in_jal_offset (decode_jal_offset), .in_freeze (total_freeze), - .in_valid (decode_valid), .in_clone_stall (decode_clone_stall), - .in_warp_num (decode_warp_num), - - .out_csr_address(d_e_csr_address), - .out_is_csr (d_e_is_csr), - .out_csr_mask (d_e_csr_mask), - .out_rd (d_e_rd), - .out_rs1 (d_e_rs1), - .out_rs2 (d_e_rs2), - .out_a_reg_data (d_e_a_reg_data), - .out_b_reg_data (d_e_b_reg_data), - .out_alu_op (d_e_alu_op), - .out_wb (d_e_wb), - .out_rs2_src (d_e_rs2_src), - .out_itype_immed(d_e_itype_immed), - .out_mem_read (d_e_mem_read), - .out_mem_write (d_e_mem_write), - .out_branch_type(d_e_branch_type), - .out_upper_immed(d_e_upper_immed), - .out_curr_PC (d_e_curr_PC), - .out_jal (d_e_jal), - .out_jal_offset (d_e_jal_offset), - .out_PC_next (d_e_PC_next), - .out_valid (d_e_valid), - .out_warp_num (d_e_warp_num) + .VX_frE_to_bckE_req(VX_frE_to_bckE_req), + .VX_bckE_req (VX_bckE_req) ); VX_execute vx_execute( - .in_rd (d_e_rd), - .in_rs1 (d_e_rs1), - .in_rs2 (d_e_rs2), - .in_a_reg_data (d_e_a_reg_data), - .in_b_reg_data (d_e_b_reg_data), - .in_alu_op (d_e_alu_op), - .in_wb (d_e_wb), - .in_rs2_src (d_e_rs2_src), - .in_itype_immed (d_e_itype_immed), - .in_mem_read (d_e_mem_read), - .in_mem_write (d_e_mem_write), - .in_PC_next (d_e_PC_next), - .in_branch_type (d_e_branch_type), - .in_upper_immed (d_e_upper_immed), - .in_csr_address (d_e_csr_address), - .in_is_csr (d_e_is_csr), + .VX_bckE_req (VX_bckE_req), .in_csr_data (csr_decode_csr_data), - .in_csr_mask (d_e_csr_mask), - .in_jal (d_e_jal), - .in_jal_offset (d_e_jal_offset), - .in_curr_PC (d_e_curr_PC), - .in_valid (d_e_valid), - .in_warp_num (d_e_warp_num), + .VX_exe_mem_req (VX_exe_mem_req), .out_csr_address (execute_csr_address), .out_is_csr (execute_is_csr), .out_csr_result (execute_csr_result), - .out_alu_result (execute_alu_result), - .out_rd (execute_rd), - .out_wb (execute_wb), - .out_rs1 (execute_rs1), - .out_rs2 (execute_rs2), - .out_a_reg_data (execute_a_reg_data), - .out_b_reg_data (execute_b_reg_data), - .out_mem_read (execute_mem_read), - .out_mem_write (execute_mem_write), .out_jal (execute_jal), .out_jal_dest (execute_jal_dest), - .out_branch_offset(execute_branch_offset), .out_branch_stall (execute_branch_stall), - .out_PC_next (execute_PC_next), - .out_valid (execute_valid), - .out_warp_num (execute_warp_num) + .out_a_reg_data (execute_a_reg_data), + .out_b_reg_data (execute_b_reg_data) ); VX_e_m_reg vx_e_m_reg( .clk (clk), - .in_alu_result (execute_alu_result), - .in_rd (execute_rd), - .in_wb (execute_wb), - .in_rs1 (execute_rs1), - .in_rs2 (execute_rs2), - .in_a_reg_data (execute_a_reg_data), - .in_b_reg_data (execute_b_reg_data), - .in_mem_read (execute_mem_read), - .in_mem_write (execute_mem_write), - .in_PC_next (execute_PC_next), + .reset (reset), .in_csr_address (execute_csr_address), .in_is_csr (execute_is_csr), .in_csr_result (execute_csr_result), - .in_curr_PC (d_e_curr_PC), - .in_branch_offset (execute_branch_offset), - .in_branch_type (d_e_branch_type), .in_jal (execute_jal), .in_jal_dest (execute_jal_dest), .in_freeze (total_freeze), - .in_valid (execute_valid), - .in_warp_num (execute_warp_num), + .VX_exe_mem_req (VX_exe_mem_req), + .in_a_reg_data (execute_a_reg_data), + .in_b_reg_data (execute_b_reg_data), + .VX_mem_req (VX_mem_req), .out_csr_address (e_m_csr_address), .out_is_csr (e_m_is_csr), .out_csr_result (e_m_csr_result), - .out_alu_result (e_m_alu_result), - .out_rd (e_m_rd), - .out_wb (e_m_wb), - .out_rs1 (e_m_rs1), - .out_rs2 (e_m_rs2), .out_a_reg_data (e_m_a_reg_data), .out_b_reg_data (e_m_b_reg_data), - .out_mem_read (e_m_mem_read), - .out_mem_write (e_m_mem_write), - .out_curr_PC (e_m_curr_PC), - .out_branch_offset(e_m_branch_offset), - .out_branch_type (e_m_branch_type), .out_jal (e_m_jal), - .out_jal_dest (e_m_jal_dest), - .out_PC_next (e_m_PC_next), - .out_valid (e_m_valid), - .out_warp_num (e_m_warp_num) + .out_jal_dest (e_m_jal_dest) ); // wire[31:0] use_rd2[`NT_M1:0]; @@ -461,35 +231,15 @@ VX_e_m_reg vx_e_m_reg( // assign use_rd2[1] = e_m_reg_data[3]; VX_memory vx_memory( - .clk (clk), - .in_alu_result (e_m_alu_result), - .in_mem_read (e_m_mem_read), - .in_mem_write (e_m_mem_write), - .in_rd (e_m_rd), - .in_wb (e_m_wb), - .in_rs1 (e_m_rs1), - .in_rs2 (e_m_rs2), - .in_rd2 (e_m_b_reg_data), - .in_PC_next (e_m_PC_next), - .in_curr_PC (e_m_curr_PC), - .in_branch_offset (e_m_branch_offset), - .in_branch_type (e_m_branch_type), - .in_valid (e_m_valid), - .in_cache_driver_out_data (in_cache_driver_out_data), - .in_warp_num (e_m_warp_num), + .VX_mem_req (VX_mem_req), + .VX_mem_wb (VX_mem_wb), + + .out_delay (memory_delay), - .out_alu_result (memory_alu_result), - .out_mem_result (memory_mem_result), - .out_rd (memory_rd), - .out_wb (memory_wb), - .out_rs1 (memory_rs1), - .out_rs2 (memory_rs2), .out_branch_dir (memory_branch_dir), .out_branch_dest (memory_branch_dest), - .out_delay (memory_delay), - .out_PC_next (memory_PC_next), - .out_valid (memory_valid), - .out_warp_num (memory_warp_num), + + .in_cache_driver_out_data (in_cache_driver_out_data), .out_cache_driver_in_address (out_cache_driver_in_address), .out_cache_driver_in_mem_read (out_cache_driver_in_mem_read), .out_cache_driver_in_mem_write(out_cache_driver_in_mem_write), @@ -499,16 +249,10 @@ VX_memory vx_memory( VX_m_w_reg vx_m_w_reg( .clk (clk), - .in_alu_result (memory_alu_result), - .in_mem_result (memory_mem_result), - .in_rd (memory_rd), - .in_wb (memory_wb), - .in_rs1 (memory_rs1), - .in_rs2 (memory_rs2), - .in_PC_next (memory_PC_next), + .reset (reset), + .VX_mem_wb (VX_mem_wb), .in_freeze (total_freeze), - .in_valid (memory_valid), - .in_warp_num (memory_warp_num), + .out_alu_result(m_w_alu_result), .out_mem_result(m_w_mem_result), @@ -531,44 +275,40 @@ VX_writeback vx_writeback( .in_PC_next (m_w_PC_next), .in_valid (m_w_valid), .in_warp_num (m_w_warp_num), - - .out_write_data(writeback_write_data), - .out_rd (writeback_rd), - .out_wb (writeback_wb), - .out_warp_num (writeback_warp_num) + .VX_writeback_inter(VX_writeback_inter) ); VX_forwarding vx_forwarding( - .in_decode_src1 (decode_rs1), - .in_decode_src2 (decode_rs2), - .in_decode_csr_address (decode_csr_address), - .in_decode_warp_num (decode_warp_num), + .in_decode_src1 (VX_frE_to_bckE_req.rs1), + .in_decode_src2 (VX_frE_to_bckE_req.rs2), + .in_decode_csr_address (VX_frE_to_bckE_req.csr_address), + .in_decode_warp_num (VX_frE_to_bckE_req.warp_num), - .in_execute_dest (execute_rd), - .in_execute_wb (execute_wb), - .in_execute_alu_result (execute_alu_result), - .in_execute_PC_next (execute_PC_next), + .in_execute_dest (VX_exe_mem_req.rd), + .in_execute_wb (VX_exe_mem_req.wb), + .in_execute_alu_result (VX_exe_mem_req.alu_result), + .in_execute_PC_next (VX_exe_mem_req.PC_next), .in_execute_is_csr (execute_is_csr), .in_execute_csr_address (execute_csr_address), - .in_execute_warp_num (execute_warp_num), + .in_execute_warp_num (VX_exe_mem_req.warp_num), - .in_memory_dest (memory_rd), - .in_memory_wb (memory_wb), - .in_memory_alu_result (memory_alu_result), - .in_memory_mem_data (memory_mem_result), - .in_memory_PC_next (memory_PC_next), + .in_memory_dest (VX_mem_wb.rd), + .in_memory_wb (VX_mem_wb.wb), + .in_memory_alu_result (VX_mem_wb.alu_result), + .in_memory_mem_data (VX_mem_wb.mem_result), + .in_memory_PC_next (VX_mem_wb.PC_next), .in_memory_is_csr (e_m_is_csr), .in_memory_csr_address (e_m_csr_address), .in_memory_csr_result (e_m_csr_result), - .in_memory_warp_num (memory_warp_num), + .in_memory_warp_num (VX_mem_wb.warp_num), .in_writeback_dest (m_w_rd), .in_writeback_wb (m_w_wb), .in_writeback_alu_result(m_w_alu_result), .in_writeback_mem_data (m_w_mem_result), .in_writeback_PC_next (m_w_PC_next), - .in_writeback_warp_num (writeback_warp_num), + .in_writeback_warp_num (VX_writeback_inter.wb_warp_num), .out_src1_fwd (forwarding_src1_fwd), .out_src2_fwd (forwarding_src2_fwd), @@ -581,7 +321,7 @@ VX_forwarding vx_forwarding( VX_csr_handler vx_csr_handler( .clk (clk), - .in_decode_csr_address(decode_csr_address), + .in_decode_csr_address(VX_frE_to_bckE_req.csr_address), .in_mem_csr_address (e_m_csr_address), .in_mem_is_csr (e_m_is_csr), .in_mem_csr_result (e_m_csr_result), diff --git a/rtl/buses.vh b/rtl/buses.vh index d5eebe6e..0e249b34 100644 --- a/rtl/buses.vh +++ b/rtl/buses.vh @@ -18,14 +18,14 @@ typedef struct packed logic[31:0] instruction; } icache_response_t; -typedef struct packed -{ - logic[31:0] instruction; - logic[31:0] inst_pc; - logic[`NW_M1:0] warp_num; - logic[`NT_M1:0] valid; +// typedef struct packed +// { +// logic[31:0] instruction; +// logic[31:0] inst_pc; +// logic[`NW_M1:0] warp_num; +// logic[`NT_M1:0] valid; -} fe_inst_meta_de_t; +// } fe_inst_meta_de_t; `endif diff --git a/rtl/interfaces/._VX_frE_to_bckE_req_inter.v b/rtl/interfaces/._VX_frE_to_bckE_req_inter.v new file mode 100644 index 00000000..e28521c3 Binary files /dev/null and b/rtl/interfaces/._VX_frE_to_bckE_req_inter.v differ diff --git a/rtl/interfaces/._VX_inst_mem_wb_inter.v b/rtl/interfaces/._VX_inst_mem_wb_inter.v new file mode 100644 index 00000000..e28521c3 Binary files /dev/null and b/rtl/interfaces/._VX_inst_mem_wb_inter.v differ diff --git a/rtl/interfaces/._VX_inst_meta_inter.v b/rtl/interfaces/._VX_inst_meta_inter.v new file mode 100644 index 00000000..e28521c3 Binary files /dev/null and b/rtl/interfaces/._VX_inst_meta_inter.v differ diff --git a/rtl/interfaces/._VX_mem_req_inter.v b/rtl/interfaces/._VX_mem_req_inter.v new file mode 100644 index 00000000..e28521c3 Binary files /dev/null and b/rtl/interfaces/._VX_mem_req_inter.v differ diff --git a/rtl/interfaces/._VX_warp_ctl_inter.v b/rtl/interfaces/._VX_warp_ctl_inter.v new file mode 100644 index 00000000..e28521c3 Binary files /dev/null and b/rtl/interfaces/._VX_warp_ctl_inter.v differ diff --git a/rtl/interfaces/._VX_wb_inter.v b/rtl/interfaces/._VX_wb_inter.v new file mode 100644 index 00000000..e28521c3 Binary files /dev/null and b/rtl/interfaces/._VX_wb_inter.v differ diff --git a/rtl/interfaces/VX_frE_to_bckE_req_inter.v b/rtl/interfaces/VX_frE_to_bckE_req_inter.v new file mode 100644 index 00000000..e6c2ab5c --- /dev/null +++ b/rtl/interfaces/VX_frE_to_bckE_req_inter.v @@ -0,0 +1,90 @@ + +`include "VX_define.v" + +`ifndef VX_FrE_to_BE_INTER + +`define VX_FrE_to_BE_INTER + +interface VX_frE_to_bckE_req_inter (); + + wire[11:0] csr_address; + wire is_csr; + wire[31:0] csr_mask; + wire[4:0] rd; + wire[4:0] rs1; + wire[4:0] rs2; + wire[`NT_M1:0][31:0] a_reg_data; + wire[`NT_M1:0][31:0] b_reg_data; + wire[4:0] alu_op; + wire[1:0] wb; + wire rs2_src; + wire[31:0] itype_immed; + wire[2:0] mem_read; + wire[2:0] mem_write; + wire[2:0] branch_type; + wire[19:0] upper_immed; + wire[31:0] curr_PC; + wire jal; + wire[31:0] jal_offset; + wire[31:0] PC_next; + wire[`NT_M1:0] valid; + wire[`NW_M1:0] warp_num; + + // source-side view + modport snk ( + input csr_address, + input is_csr, + input csr_mask, + input rd, + input rs1, + input rs2, + input a_reg_data, + input b_reg_data, + input alu_op, + input wb, + input rs2_src, + input itype_immed, + input mem_read, + input mem_write, + input branch_type, + input upper_immed, + input curr_PC, + input jal, + input jal_offset, + input PC_next, + input valid, + input warp_num + ); + + + // source-side view + modport src ( + output csr_address, + output is_csr, + output csr_mask, + output rd, + output rs1, + output rs2, + output a_reg_data, + output b_reg_data, + output alu_op, + output wb, + output rs2_src, + output itype_immed, + output mem_read, + output mem_write, + output branch_type, + output upper_immed, + output curr_PC, + output jal, + output jal_offset, + output PC_next, + output valid, + output warp_num + ); + + +endinterface + + +`endif \ No newline at end of file diff --git a/rtl/interfaces/VX_inst_mem_wb_inter.v b/rtl/interfaces/VX_inst_mem_wb_inter.v new file mode 100644 index 00000000..56a6ad36 --- /dev/null +++ b/rtl/interfaces/VX_inst_mem_wb_inter.v @@ -0,0 +1,51 @@ + +`include "VX_define.v" + +`ifndef VX_MEM_WB_INST_INTER + +`define VX_MEM_WB_INST_INTER + +interface VX_inst_mem_wb_inter (); + + wire[`NT_M1:0][31:0] alu_result; + wire[`NT_M1:0][31:0] mem_result; + wire[4:0] rd; + wire[1:0] wb; + wire[4:0] rs1; + wire[4:0] rs2; + wire[31:0] PC_next; + wire[`NT_M1:0] valid; + wire[`NW_M1:0] warp_num; + + // source-side view + modport snk ( + input alu_result, + input mem_result, + input rd, + input wb, + input rs1, + input rs2, + input PC_next, + input valid, + input warp_num + ); + + + // source-side view + modport src ( + output alu_result, + output mem_result, + output rd, + output wb, + output rs1, + output rs2, + output PC_next, + output valid, + output warp_num + ); + + +endinterface + + +`endif \ No newline at end of file diff --git a/rtl/interfaces/VX_inst_meta_inter.v b/rtl/interfaces/VX_inst_meta_inter.v new file mode 100644 index 00000000..e417314c --- /dev/null +++ b/rtl/interfaces/VX_inst_meta_inter.v @@ -0,0 +1,32 @@ +`include "VX_define.v" + +`ifndef VX_F_D_INTER + +`define VX_F_D_INTER + +interface VX_inst_meta_inter (); + wire[31:0] instruction; + wire[31:0] inst_pc; + wire[`NW_M1:0] warp_num; + wire[`NT_M1:0] valid; + +// source-side view +modport snk ( + input instruction, + input inst_pc, + input warp_num, + input valid +); + +// sink-side view +modport src ( + output instruction, + output inst_pc, + output warp_num, + output valid +); + +endinterface + + +`endif \ No newline at end of file diff --git a/rtl/interfaces/VX_mem_req_inter.v b/rtl/interfaces/VX_mem_req_inter.v new file mode 100644 index 00000000..8aa6fdb1 --- /dev/null +++ b/rtl/interfaces/VX_mem_req_inter.v @@ -0,0 +1,55 @@ +interface VX_mem_req_inter (); + + wire[`NT_M1:0][31:0] alu_result; + wire[2:0] mem_read; + wire[2:0] mem_write; + wire[4:0] rd; + wire[1:0] wb; + wire[4:0] rs1; + wire[4:0] rs2; + wire[`NT_M1:0][31:0] rd2; + wire[31:0] PC_next; + wire[31:0] curr_PC; + wire[31:0] branch_offset; + wire[2:0] branch_type; + wire[`NT_M1:0] valid; + wire[`NW_M1:0] warp_num; + + + modport snk ( + input alu_result, + input mem_read, + input mem_write, + input rd, + input wb, + input rs1, + input rs2, + input rd2, + input PC_next, + input curr_PC, + input branch_offset, + input branch_type, + input valid, + input warp_num + ); + + + modport src ( + output alu_result, + output mem_read, + output mem_write, + output rd, + output wb, + output rs1, + output rs2, + output rd2, + output PC_next, + output curr_PC, + output branch_offset, + output branch_type, + output valid, + output warp_num + ); + + +endinterface \ No newline at end of file diff --git a/rtl/interfaces/VX_warp_ctl_inter.v b/rtl/interfaces/VX_warp_ctl_inter.v new file mode 100644 index 00000000..6b771bde --- /dev/null +++ b/rtl/interfaces/VX_warp_ctl_inter.v @@ -0,0 +1,42 @@ + +`include "VX_define.v" + +`ifndef VX_WARP_CTL_INTER + +`define VX_WARP_CTL_INTER + +interface VX_warp_ctl_inter (); + + wire[`NW_M1:0] warp_num; + wire change_mask; + wire[`NT_M1:0] thread_mask; + wire wspawn; + wire[31:0] wspawn_pc; + wire ebreak; + + // source-side view + modport snk ( + input warp_num, + input change_mask, + input thread_mask, + input wspawn, + input wspawn_pc, + input ebreak + ); + + + // source-side view + modport src ( + output warp_num, + output change_mask, + output thread_mask, + output wspawn, + output wspawn_pc, + output ebreak + ); + + +endinterface + + +`endif \ No newline at end of file diff --git a/rtl/interfaces/VX_wb_inter.v b/rtl/interfaces/VX_wb_inter.v new file mode 100644 index 00000000..090cd433 --- /dev/null +++ b/rtl/interfaces/VX_wb_inter.v @@ -0,0 +1,38 @@ + +`ifndef VX_WB_INTER + +`define VX_WB_INTER + + +interface VX_wb_inter (); + + wire[`NT_M1:0][31:0] write_data; + wire[4:0] rd; + wire[1:0] wb; + wire[`NT_M1:0] wb_valid; + wire[`NW_M1:0] wb_warp_num; + + + + modport snk ( + input write_data, + input rd, + input wb, + input wb_valid, + input wb_warp_num + ); + + + modport src ( + output write_data, + output rd, + output wb, + output wb_valid, + output wb_warp_num + ); + +endinterface + + + +`endif \ No newline at end of file diff --git a/rtl/obj_dir/VVortex b/rtl/obj_dir/VVortex index b4fbfcbe..46304c45 100755 Binary files a/rtl/obj_dir/VVortex and b/rtl/obj_dir/VVortex differ diff --git a/rtl/obj_dir/VVortex.cpp b/rtl/obj_dir/VVortex.cpp index 7f1f3558..496512c2 100644 --- a/rtl/obj_dir/VVortex.cpp +++ b/rtl/obj_dir/VVortex.cpp @@ -17,13 +17,22 @@ VL_ST_SIG8(VVortex::__Vtable1_Vortex__DOT__vx_decode__DOT__mul_alu[8],4,0); VL_CTOR_IMP(VVortex) { VVortex__Syms* __restrict vlSymsp = __VlSymsp = new VVortex__Syms(this, name()); VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; - VL_CELL(__PVT__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one, VVortex_VX_context_slave); - VL_CELL(__PVT__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one, VVortex_VX_context_slave); - VL_CELL(__PVT__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one, VVortex_VX_context_slave); - VL_CELL(__PVT__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one, VVortex_VX_context_slave); - VL_CELL(__PVT__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one, VVortex_VX_context_slave); - VL_CELL(__PVT__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one, VVortex_VX_context_slave); - VL_CELL(__PVT__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one, VVortex_VX_context_slave); + VL_CELL(__PVT__Vortex__DOT__fe_inst_meta_fd, VVortex_VX_inst_meta_inter); + VL_CELL(__PVT__Vortex__DOT__fd_inst_meta_de, VVortex_VX_inst_meta_inter); + VL_CELL(__PVT__Vortex__DOT__VX_frE_to_bckE_req, VVortex_VX_frE_to_bckE_req_inter); + VL_CELL(__PVT__Vortex__DOT__VX_bckE_req, VVortex_VX_frE_to_bckE_req_inter); + VL_CELL(__PVT__Vortex__DOT__VX_exe_mem_req, VVortex_VX_mem_req_inter); + VL_CELL(__PVT__Vortex__DOT__VX_mem_req, VVortex_VX_mem_req_inter); + VL_CELL(__PVT__Vortex__DOT__VX_mem_wb, VVortex_VX_inst_mem_wb_inter); + VL_CELL(__PVT__Vortex__DOT__VX_warp_ctl, VVortex_VX_warp_ctl_inter); + VL_CELL(__PVT__Vortex__DOT__VX_writeback_inter, VVortex_VX_wb_inter); + VL_CELL(__PVT__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one, VVortex_VX_context_slave); + VL_CELL(__PVT__Vortex__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__VX_Context_one, VVortex_VX_context_slave); + VL_CELL(__PVT__Vortex__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__VX_Context_one, VVortex_VX_context_slave); + VL_CELL(__PVT__Vortex__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__VX_Context_one, VVortex_VX_context_slave); + VL_CELL(__PVT__Vortex__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__VX_Context_one, VVortex_VX_context_slave); + VL_CELL(__PVT__Vortex__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__VX_Context_one, VVortex_VX_context_slave); + VL_CELL(__PVT__Vortex__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one, VVortex_VX_context_slave); // Reset internal values // Reset structure values @@ -49,7 +58,7 @@ void VVortex::eval() { #ifdef VL_DEBUG // Debug assertions _eval_debug_assertions(); -#endif // VL_DEBUG +#endif // VL_DEBUG // Initialize if (VL_UNLIKELY(!vlSymsp->__Vm_didInit)) _eval_initial_loop(vlSymsp); // Evaluate till stable @@ -103,166 +112,92 @@ void VVortex::_initial__TOP__1(VVortex__Syms* __restrict vlSymsp) { VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; // Body // INITIAL at VX_warp.v:30 - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__0__KET____DOT__VX_Warp__DOT__real_PC = 0U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__0__KET____DOT__VX_Warp__DOT__valid[1U] = 0U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__0__KET____DOT__VX_Warp__DOT__valid_zero[1U] = 0U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__0__KET____DOT__VX_Warp__DOT__valid[2U] = 0U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__0__KET____DOT__VX_Warp__DOT__valid_zero[2U] = 0U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__0__KET____DOT__VX_Warp__DOT__valid[3U] = 0U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__0__KET____DOT__VX_Warp__DOT__valid_zero[3U] = 0U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__0__KET____DOT__VX_Warp__DOT__valid[0U] = 1U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__0__KET____DOT__VX_Warp__DOT__valid_zero[0U] = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__VX_Warp__DOT__real_PC = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__VX_Warp__DOT__valid[1U] = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__VX_Warp__DOT__valid_zero[1U] = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__VX_Warp__DOT__valid[2U] = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__VX_Warp__DOT__valid_zero[2U] = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__VX_Warp__DOT__valid[3U] = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__VX_Warp__DOT__valid_zero[3U] = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__VX_Warp__DOT__valid[0U] = 1U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__VX_Warp__DOT__valid_zero[0U] = 0U; // INITIAL at VX_warp.v:30 - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__1__KET____DOT__VX_Warp__DOT__real_PC = 0U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__1__KET____DOT__VX_Warp__DOT__valid[1U] = 0U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__1__KET____DOT__VX_Warp__DOT__valid_zero[1U] = 0U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__1__KET____DOT__VX_Warp__DOT__valid[2U] = 0U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__1__KET____DOT__VX_Warp__DOT__valid_zero[2U] = 0U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__1__KET____DOT__VX_Warp__DOT__valid[3U] = 0U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__1__KET____DOT__VX_Warp__DOT__valid_zero[3U] = 0U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__1__KET____DOT__VX_Warp__DOT__valid[0U] = 1U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__1__KET____DOT__VX_Warp__DOT__valid_zero[0U] = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__real_PC = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__valid[1U] = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__valid_zero[1U] = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__valid[2U] = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__valid_zero[2U] = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__valid[3U] = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__valid_zero[3U] = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__valid[0U] = 1U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__valid_zero[0U] = 0U; // INITIAL at VX_warp.v:30 - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__2__KET____DOT__VX_Warp__DOT__real_PC = 0U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__2__KET____DOT__VX_Warp__DOT__valid[1U] = 0U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__2__KET____DOT__VX_Warp__DOT__valid_zero[1U] = 0U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__2__KET____DOT__VX_Warp__DOT__valid[2U] = 0U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__2__KET____DOT__VX_Warp__DOT__valid_zero[2U] = 0U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__2__KET____DOT__VX_Warp__DOT__valid[3U] = 0U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__2__KET____DOT__VX_Warp__DOT__valid_zero[3U] = 0U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__2__KET____DOT__VX_Warp__DOT__valid[0U] = 1U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__2__KET____DOT__VX_Warp__DOT__valid_zero[0U] = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__real_PC = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__valid[1U] = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__valid_zero[1U] = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__valid[2U] = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__valid_zero[2U] = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__valid[3U] = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__valid_zero[3U] = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__valid[0U] = 1U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__valid_zero[0U] = 0U; // INITIAL at VX_warp.v:30 - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__3__KET____DOT__VX_Warp__DOT__real_PC = 0U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__3__KET____DOT__VX_Warp__DOT__valid[1U] = 0U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__3__KET____DOT__VX_Warp__DOT__valid_zero[1U] = 0U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__3__KET____DOT__VX_Warp__DOT__valid[2U] = 0U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__3__KET____DOT__VX_Warp__DOT__valid_zero[2U] = 0U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__3__KET____DOT__VX_Warp__DOT__valid[3U] = 0U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__3__KET____DOT__VX_Warp__DOT__valid_zero[3U] = 0U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__3__KET____DOT__VX_Warp__DOT__valid[0U] = 1U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__3__KET____DOT__VX_Warp__DOT__valid_zero[0U] = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__real_PC = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__valid[1U] = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__valid_zero[1U] = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__valid[2U] = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__valid_zero[2U] = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__valid[3U] = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__valid_zero[3U] = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__valid[0U] = 1U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__valid_zero[0U] = 0U; // INITIAL at VX_warp.v:30 - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__4__KET____DOT__VX_Warp__DOT__real_PC = 0U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__4__KET____DOT__VX_Warp__DOT__valid[1U] = 0U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__4__KET____DOT__VX_Warp__DOT__valid_zero[1U] = 0U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__4__KET____DOT__VX_Warp__DOT__valid[2U] = 0U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__4__KET____DOT__VX_Warp__DOT__valid_zero[2U] = 0U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__4__KET____DOT__VX_Warp__DOT__valid[3U] = 0U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__4__KET____DOT__VX_Warp__DOT__valid_zero[3U] = 0U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__4__KET____DOT__VX_Warp__DOT__valid[0U] = 1U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__4__KET____DOT__VX_Warp__DOT__valid_zero[0U] = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__real_PC = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__valid[1U] = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__valid_zero[1U] = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__valid[2U] = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__valid_zero[2U] = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__valid[3U] = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__valid_zero[3U] = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__valid[0U] = 1U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__valid_zero[0U] = 0U; // INITIAL at VX_warp.v:30 - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__5__KET____DOT__VX_Warp__DOT__real_PC = 0U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__5__KET____DOT__VX_Warp__DOT__valid[1U] = 0U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__5__KET____DOT__VX_Warp__DOT__valid_zero[1U] = 0U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__5__KET____DOT__VX_Warp__DOT__valid[2U] = 0U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__5__KET____DOT__VX_Warp__DOT__valid_zero[2U] = 0U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__5__KET____DOT__VX_Warp__DOT__valid[3U] = 0U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__5__KET____DOT__VX_Warp__DOT__valid_zero[3U] = 0U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__5__KET____DOT__VX_Warp__DOT__valid[0U] = 1U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__5__KET____DOT__VX_Warp__DOT__valid_zero[0U] = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__real_PC = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__valid[1U] = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__valid_zero[1U] = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__valid[2U] = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__valid_zero[2U] = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__valid[3U] = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__valid_zero[3U] = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__valid[0U] = 1U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__valid_zero[0U] = 0U; // INITIAL at VX_warp.v:30 - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__6__KET____DOT__VX_Warp__DOT__real_PC = 0U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__6__KET____DOT__VX_Warp__DOT__valid[1U] = 0U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__6__KET____DOT__VX_Warp__DOT__valid_zero[1U] = 0U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__6__KET____DOT__VX_Warp__DOT__valid[2U] = 0U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__6__KET____DOT__VX_Warp__DOT__valid_zero[2U] = 0U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__6__KET____DOT__VX_Warp__DOT__valid[3U] = 0U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__6__KET____DOT__VX_Warp__DOT__valid_zero[3U] = 0U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__6__KET____DOT__VX_Warp__DOT__valid[0U] = 1U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__6__KET____DOT__VX_Warp__DOT__valid_zero[0U] = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__real_PC = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__valid[1U] = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__valid_zero[1U] = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__valid[2U] = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__valid_zero[2U] = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__valid[3U] = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__valid_zero[3U] = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__valid[0U] = 1U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__valid_zero[0U] = 0U; // INITIAL at VX_warp.v:30 - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__7__KET____DOT__VX_Warp__DOT__real_PC = 0U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__7__KET____DOT__VX_Warp__DOT__valid[1U] = 0U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__7__KET____DOT__VX_Warp__DOT__valid_zero[1U] = 0U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__7__KET____DOT__VX_Warp__DOT__valid[2U] = 0U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__7__KET____DOT__VX_Warp__DOT__valid_zero[2U] = 0U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__7__KET____DOT__VX_Warp__DOT__valid[3U] = 0U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__7__KET____DOT__VX_Warp__DOT__valid_zero[3U] = 0U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__7__KET____DOT__VX_Warp__DOT__valid[0U] = 1U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__7__KET____DOT__VX_Warp__DOT__valid_zero[0U] = 0U; - // INITIAL at VX_context.v:31 - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__state_stall = 0U; - // INITIAL at VX_m_w_reg.v:41 - vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd = 0U; - vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb = 0U; - vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__PC_next = 0U; - vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__warp_num = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__real_PC = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__valid[1U] = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__valid_zero[1U] = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__valid[2U] = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__valid_zero[2U] = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__valid[3U] = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__valid_zero[3U] = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__valid[0U] = 1U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__valid_zero[0U] = 0U; // INITIAL at VX_csr_handler.v:29 vlTOPp->Vortex__DOT__vx_csr_handler__DOT__cycle = VL_ULL(0); vlTOPp->Vortex__DOT__vx_csr_handler__DOT__instret = VL_ULL(0); vlTOPp->Vortex__DOT__vx_csr_handler__DOT__decode_csr_address = 0U; - // INITIAL at VX_e_m_reg.v:79 - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__rd = 0U; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb = 0U; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__PC_next = 0U; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__mem_read = 7U; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__mem_write = 7U; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__csr_address = 0U; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__is_csr = 0U; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__csr_result = 0U; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__curr_PC = 0U; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_offset = 0U; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type = 0U; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal = 0U; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal_dest = 0U; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__warp_num = 0U; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__a_reg_data[0U] = 0U; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__b_reg_data[0U] = 0U; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__valid[0U] = 0U; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result[0U] = 0U; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__a_reg_data[1U] = 0U; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__b_reg_data[1U] = 0U; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__valid[1U] = 0U; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result[1U] = 0U; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__a_reg_data[2U] = 0U; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__b_reg_data[2U] = 0U; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__valid[2U] = 0U; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result[2U] = 0U; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__a_reg_data[3U] = 0U; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__b_reg_data[3U] = 0U; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__valid[3U] = 0U; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result[3U] = 0U; - // INITIAL at VX_d_e_reg.v:87 - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rd = 0U; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__a_reg_data[0U] = 0U; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__b_reg_data[0U] = 0U; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__reg_data_z[0U] = 0U; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid[0U] = 0U; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid_z[0U] = 0U; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__a_reg_data[1U] = 0U; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__b_reg_data[1U] = 0U; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__reg_data_z[1U] = 0U; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid[1U] = 0U; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid_z[1U] = 0U; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__a_reg_data[2U] = 0U; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__b_reg_data[2U] = 0U; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__reg_data_z[2U] = 0U; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid[2U] = 0U; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid_z[2U] = 0U; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__a_reg_data[3U] = 0U; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__b_reg_data[3U] = 0U; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__reg_data_z[3U] = 0U; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid[3U] = 0U; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid_z[3U] = 0U; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op = 0U; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb = 0U; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__PC_next_out = 0U; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rs2_src = 0U; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__itype_immed = 0U; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__mem_read = 7U; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__mem_write = 7U; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__branch_type = 0U; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__upper_immed = 0U; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__csr_address = 0U; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__is_csr = 0U; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__csr_mask = 0U; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__curr_PC = 0U; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__jal = 0U; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__jal_offset = 0U; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__warp_num = 0U; - // INITIAL at VX_fetch.v:47 + // INITIAL at VX_context.v:31 + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__state_stall = 0U; + // INITIAL at VX_fetch.v:52 vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num = 0U; vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_state = 0U; vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_count = 1U; @@ -271,11 +206,23 @@ void VVortex::_initial__TOP__1(VVortex__Syms* __restrict vlSymsp) { void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) { VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex::_settle__TOP__2\n"); ); VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; + // Variables + // Begin mtask footprint all: + VL_SIGW(__Vtemp19,479,0,15); + VL_SIGW(__Vtemp28,735,0,23); + VL_SIGW(__Vtemp43,127,0,4); + VL_SIGW(__Vtemp59,127,0,4); // Body - vlTOPp->Vortex__DOT__vx_decode__DOT__jmprt_thread_mask[0U] = 1U; - vlTOPp->Vortex__DOT__vx_decode__DOT__jmprt_thread_mask[1U] = 0U; - vlTOPp->Vortex__DOT__vx_decode__DOT__jmprt_thread_mask[2U] = 0U; - vlTOPp->Vortex__DOT__vx_decode__DOT__jmprt_thread_mask[3U] = 0U; + vlTOPp->Vortex__DOT__vx_decode__DOT__jalrs_thread_mask + = (1U | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__jalrs_thread_mask)); + vlTOPp->Vortex__DOT__vx_decode__DOT__jmprt_thread_mask + = (1U | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__jmprt_thread_mask)); + vlTOPp->Vortex__DOT__vx_decode__DOT__jmprt_thread_mask + = (0xdU & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__jmprt_thread_mask)); + vlTOPp->Vortex__DOT__vx_decode__DOT__jmprt_thread_mask + = (0xbU & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__jmprt_thread_mask)); + vlTOPp->Vortex__DOT__vx_decode__DOT__jmprt_thread_mask + = (7U & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__jmprt_thread_mask)); vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data[3U] = vlTOPp->in_cache_driver_out_data[3U]; vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data[2U] @@ -284,134 +231,48 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) { = vlTOPp->in_cache_driver_out_data[1U]; vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data[0U] = vlTOPp->in_cache_driver_out_data[0U]; - vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_valid[3U] - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__valid - [3U]; - vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_valid[2U] - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__valid - [2U]; - vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_valid[1U] - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__valid - [1U]; - vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_valid[0U] - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__valid - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd1_register[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_src1_data; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd1_register[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src1_data; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd1_register[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__out_src1_data; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd1_register[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__out_src1_data; - vlTOPp->Vortex__DOT____Vcellout__vx_f_d_reg__out_valid[3U] - = vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__valid - [3U]; - vlTOPp->Vortex__DOT____Vcellout__vx_f_d_reg__out_valid[2U] - = vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__valid - [2U]; - vlTOPp->Vortex__DOT____Vcellout__vx_f_d_reg__out_valid[1U] - = vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__valid - [1U]; - vlTOPp->Vortex__DOT____Vcellout__vx_f_d_reg__out_valid[0U] - = vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__valid - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0x1fU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [0x1fU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0x1eU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [0x1eU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0x1dU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [0x1dU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0x1cU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [0x1cU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0x1bU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [0x1bU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0x1aU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [0x1aU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0x19U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [0x19U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0x18U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [0x18U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0x17U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [0x17U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0x16U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [0x16U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0x15U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [0x15U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0x14U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [0x14U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0x13U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [0x13U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0x12U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [0x12U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0x11U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [0x11U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0x10U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [0x10U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0xfU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [0xfU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0xeU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [0xeU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0xdU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [0xdU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0xcU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [0xcU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0xbU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [0xbU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0xaU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [0xaU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[9U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [9U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[8U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [8U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[7U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [7U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[6U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [6U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[5U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [5U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[4U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [4U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [0U]; + vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_a_reg_data[0U] + = ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + << 0x12U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] + >> 0xeU)); + vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data[0U] + = ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[6U] + << 0x12U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U] + >> 0xeU)); + vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_a_reg_data[1U] + = ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + << 0x12U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + >> 0xeU)); + vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data[1U] + = ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[7U] + << 0x12U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[6U] + >> 0xeU)); + vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_a_reg_data[2U] + = ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + << 0x12U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + >> 0xeU)); + vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data[2U] + = ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[8U] + << 0x12U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[7U] + >> 0xeU)); + vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_a_reg_data[3U] + = ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + << 0x12U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + >> 0xeU)); + vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data[3U] + = ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] + << 0x12U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[8U] + >> 0xeU)); + vlTOPp->Vortex__DOT__execute_branch_stall = (1U + & ((0U + != + (7U + & ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[4U] + << 3U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[3U] + >> 0x1dU)))) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[2U] + >> 8U))); vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd2_register[0U] = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_src2_data; vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd2_register[1U] @@ -420,111 +281,301 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) { = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__out_src2_data; vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd2_register[3U] = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__out_src2_data; - vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_alu_result[3U] - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__alu_result - [3U]; - vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_alu_result[2U] - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__alu_result - [2U]; - vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_alu_result[1U] - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__alu_result - [1U]; - vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_alu_result[0U] - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__alu_result - [0U]; - vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_mem_result[3U] - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__mem_result - [3U]; - vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_mem_result[2U] - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__mem_result - [2U]; - vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_mem_result[1U] - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__mem_result - [1U]; - vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_mem_result[0U] - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__mem_result - [0U]; + vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[0U] + = ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[1U] + << 0x18U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0U] + >> 8U)); + vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[1U] + = ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[1U] + << 0x18U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0U] + >> 8U)); + vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[2U] + = ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[1U] + << 0x18U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0U] + >> 8U)); + vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[3U] + = ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[1U] + << 0x18U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0U] + >> 8U)); + vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2 + = ((0x40U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U] + << 0x1aU) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[4U] + >> 6U)) : ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[6U] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U] + >> 0xeU))); + vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2 + = ((0x40U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U] + << 0x1aU) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[4U] + >> 6U)) : ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[7U] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[6U] + >> 0xeU))); + vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2 + = ((0x40U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U] + << 0x1aU) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[4U] + >> 6U)) : ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[8U] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[7U] + >> 0xeU))); + vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2 + = ((0x40U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U] + << 0x1aU) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[4U] + >> 6U)) : ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[8U] + >> 0xeU))); + vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.wb = + (3U & ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[6U] + << 0x19U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U] + >> 7U))); + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd1_register[0U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_src1_data; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd1_register[1U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src1_data; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd1_register[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__out_src1_data; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd1_register[3U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__out_src1_data; vlTOPp->Vortex__DOT__vx_decode__DOT__is_itype = - ((0x13U == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) - | (3U == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction))); - vlTOPp->Vortex__DOT__decode_csr_address = (0xfffU - & (((0U - != - (7U - & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0xcU))) - & (2U - <= - (0xfffU - & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0x14U)))) - ? - (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0x14U) - : 0x55U)); - // ALWAYS at VX_decode.v:577 - vlTOPp->__Vtableidx1 = (7U & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0xcU)); + ((0x13U == (0x7fU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) + | (3U == (0x7fU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U))))); + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.csr_address + = (0xfffU & (((0U != (7U & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0xcU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x14U)))) + & (2U <= (0xfffU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 4U) | + (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x1cU))))) + ? ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 4U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x1cU)) : 0x55U)); + // ALWAYS at VX_decode.v:572 + vlTOPp->__Vtableidx1 = (7U & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0xcU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x14U))); vlTOPp->Vortex__DOT__vx_decode__DOT__mul_alu = vlTOPp->__Vtable1_Vortex__DOT__vx_decode__DOT__mul_alu [vlTOPp->__Vtableidx1]; vlTOPp->Vortex__DOT__vx_decode__DOT__alu_tempp - = (0xfffU & (((1U == (7U & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0xcU))) | (5U - == - (7U - & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0xcU)))) - ? (0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0x14U)) : (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0x14U))); + = (0xfffU & (((1U == (7U & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0xcU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x14U)))) + | (5U == (7U & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0xcU) | ( + vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x14U))))) + ? (0x1fU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 4U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x1cU))) + : ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 4U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x1cU)))); vlTOPp->Vortex__DOT__vx_decode__DOT__is_csr = ( (0x73U == (0x7fU - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) & (0U != (7U - & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0xcU)))); + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0xcU) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x14U))))); vlTOPp->Vortex__DOT__vx_decode__DOT__jal_sys_jal - = ((0U == (7U & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0xcU))) & (2U > (0xfffU - & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0x14U)))); + = ((0U == (7U & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0xcU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x14U)))) + & (2U > (0xfffU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 4U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x1cU))))); + vlTOPp->Vortex__DOT__vx_decode__DOT__in_valid[0U] + = (1U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U]); + vlTOPp->Vortex__DOT__vx_decode__DOT__in_valid[1U] + = (1U & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 1U)); + vlTOPp->Vortex__DOT__vx_decode__DOT__in_valid[2U] + = (1U & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 2U)); + vlTOPp->Vortex__DOT__vx_decode__DOT__in_valid[3U] + = (1U & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 3U)); vlTOPp->Vortex__DOT__vx_decode__DOT__is_jmprt = - ((0x6bU == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) - & (4U == (7U & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0xcU)))); - vlTOPp->Vortex__DOT__vx_decode__DOT__is_wspawn - = ((0x6bU == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) - & (0U == (7U & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0xcU)))); - vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone = - ((0x6bU == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) - & (5U == (7U & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0xcU)))); + ((0x6bU == (0x7fU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) + & (4U == (7U & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0xcU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x14U))))); vlTOPp->Vortex__DOT__vx_decode__DOT__is_jalrs = - ((0x6bU == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) - & (6U == (7U & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0xcU)))); + ((0x6bU == (0x7fU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) + & (6U == (7U & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0xcU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x14U))))); + vlTOPp->Vortex__DOT__vx_decode__DOT__is_wspawn + = ((0x6bU == (0x7fU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) + & (0U == (7U & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0xcU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x14U))))); + vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone = + ((0x6bU == (0x7fU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) + & (5U == (7U & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0xcU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x14U))))); vlTOPp->Vortex__DOT__vx_writeback__DOT__out_pc_data[0U] - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__PC_next; + = ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] + >> 8U)); vlTOPp->Vortex__DOT__vx_writeback__DOT__out_pc_data[1U] - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__PC_next; + = ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] + >> 8U)); vlTOPp->Vortex__DOT__vx_writeback__DOT__out_pc_data[2U] - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__PC_next; + = ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] + >> 8U)); vlTOPp->Vortex__DOT__vx_writeback__DOT__out_pc_data[3U] - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__PC_next; + = ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] + >> 8U)); vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[0U] - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__PC_next; + = ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] + >> 8U)); vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[1U] - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__PC_next; + = ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] + >> 8U)); vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[2U] - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__PC_next; + = ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] + >> 8U)); vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[3U] - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__PC_next; + = ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] + >> 8U)); + vlTOPp->out_cache_driver_in_mem_read = (7U & (( + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + << 1U) + | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] + >> 0x1fU))); + vlTOPp->out_cache_driver_in_mem_write = (7U & ( + (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + << 4U) + | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] + >> 0x1cU))); + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address[0U] + = ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] + << 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + >> 2U)); + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data[0U] + = ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[4U] + << 0x15U) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[3U] + >> 0xbU)); + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid[0U] + = (1U & (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U)); + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address[1U] + = ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xaU] + << 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] + >> 2U)); + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data[1U] + = ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[5U] + << 0x15U) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[4U] + >> 0xbU)); + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid[1U] + = (1U & (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U] + >> 5U)); + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address[2U] + = ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xbU] + << 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xaU] + >> 2U)); + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data[2U] + = ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[6U] + << 0x15U) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[5U] + >> 0xbU)); + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid[2U] + = (1U & (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U] + >> 6U)); + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address[3U] + = ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xcU] + << 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xbU] + >> 2U)); + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data[3U] + = ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] + << 0x15U) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[6U] + >> 0xbU)); + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid[3U] + = (1U & (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U] + >> 7U)); + vlTOPp->Vortex__DOT__memory_branch_dest = (((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[2U] + << 0x15U) + | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[1U] + >> 0xbU)) + + (( + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[1U] + << 0x16U) + | (0x3ffffeU + & (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U] + >> 0xaU)))); + // ALWAYS at VX_memory.v:56 + vlTOPp->Vortex__DOT__vx_memory__DOT__temp_branch_dir + = (1U & ((0x400U & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U]) + ? ((0x200U & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U]) + ? ((~ (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U] + >> 8U)) & (~ (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] + >> 1U))) + : ((0x100U & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U]) + ? (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] + >> 1U) : (~ (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] + >> 1U)))) + : ((0x200U & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U]) + ? ((0x100U & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U]) + ? (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] + >> 1U) : (0U != ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] + << 0x1eU) + | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + >> 2U)))) + : ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U] + >> 8U) & (0U == ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] + << 0x1eU) + | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + >> 2U))))))); + vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[0U] + = ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[3U] + << 0x15U) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[2U] + >> 0xbU)); + vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[1U] + = ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[3U] + << 0x15U) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[2U] + >> 0xbU)); + vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[2U] + = ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[3U] + << 0x15U) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[2U] + >> 0xbU)); + vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[3U] + = ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[3U] + << 0x15U) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[2U] + >> 0xbU)); vlTOPp->Vortex__DOT__csr_decode_csr_data = ((0xc00U == (IData)(vlTOPp->Vortex__DOT__vx_csr_handler__DOT__decode_csr_address)) ? (IData)(vlTOPp->Vortex__DOT__vx_csr_handler__DOT__cycle) @@ -555,1526 +606,440 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) { (0x7ffU & (IData)(vlTOPp->Vortex__DOT__vx_csr_handler__DOT__decode_csr_address))] : 0U))))); - vlTOPp->out_cache_driver_in_mem_read = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__mem_read; - vlTOPp->out_cache_driver_in_mem_write = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__mem_write; - vlTOPp->Vortex__DOT__memory_branch_dest = (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__curr_PC - + (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_offset - << 1U)); - vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_b_reg_data[3U] - = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__b_reg_data - [3U]; - vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_b_reg_data[2U] - = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__b_reg_data - [2U]; - vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_b_reg_data[1U] - = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__b_reg_data - [1U]; - vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_b_reg_data[0U] - = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__b_reg_data + vlSymsp->TOP__Vortex__DOT__VX_mem_wb.mem_result[0U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data [0U]; - vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_valid[3U] - = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__valid - [3U]; - vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_valid[2U] - = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__valid - [2U]; - vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_valid[1U] - = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__valid + vlSymsp->TOP__Vortex__DOT__VX_mem_wb.mem_result[1U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data [1U]; - vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_valid[0U] - = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__valid - [0U]; - vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[0U] - = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__PC_next; - vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[1U] - = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__PC_next; - vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[2U] - = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__PC_next; - vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[3U] - = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__PC_next; - vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_alu_result[3U] - = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result - [3U]; - vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_alu_result[2U] - = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result + vlSymsp->TOP__Vortex__DOT__VX_mem_wb.mem_result[2U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data [2U]; - vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_alu_result[1U] - = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result - [1U]; - vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_alu_result[0U] - = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result - [0U]; - vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_valid[3U] - = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid + vlSymsp->TOP__Vortex__DOT__VX_mem_wb.mem_result[3U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data [3U]; - vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_valid[2U] - = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid - [2U]; - vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_valid[1U] - = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid - [1U]; - vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_valid[0U] - = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid - [0U]; - vlTOPp->Vortex__DOT__execute_branch_stall = ((0U - != (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__branch_type)) - | (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__jal)); - vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[0U] - = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__PC_next_out; - vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[1U] - = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__PC_next_out; - vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[2U] - = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__PC_next_out; - vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[3U] - = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__PC_next_out; - vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data[3U] - = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__a_reg_data - [3U]; - vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data[2U] - = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__a_reg_data - [2U]; - vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data[1U] - = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__a_reg_data - [1U]; - vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data[0U] - = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__a_reg_data - [0U]; - vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_b_reg_data[3U] - = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__b_reg_data - [3U]; - vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_b_reg_data[2U] - = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__b_reg_data - [2U]; - vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_b_reg_data[1U] - = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__b_reg_data - [1U]; - vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_b_reg_data[0U] - = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__b_reg_data - [0U]; + vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__mult_signed_result + = VL_MULS_QQQ(64,64,64, VL_EXTENDS_QI(64,32, + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] + >> 0xeU))), + VL_EXTENDS_QI(64,32, vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)); + vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__mult_signed_result + = VL_MULS_QQQ(64,64,64, VL_EXTENDS_QI(64,32, + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + >> 0xeU))), + VL_EXTENDS_QI(64,32, vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)); + vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__mult_signed_result + = VL_MULS_QQQ(64,64,64, VL_EXTENDS_QI(64,32, + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + >> 0xeU))), + VL_EXTENDS_QI(64,32, vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)); + vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__mult_signed_result + = VL_MULS_QQQ(64,64,64, VL_EXTENDS_QI(64,32, + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + >> 0xeU))), + VL_EXTENDS_QI(64,32, vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)); vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd - = (((((0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0xfU)) == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rd)) - & (0U != (0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0xfU)))) & (0U != (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb))) - & ((IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num) - == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__warp_num))); + = (((((0x1fU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 9U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x17U))) == (0x1fU + & ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xeU] + << 8U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + >> 0x18U)))) + & (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 9U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x17U))))) + & (0U != (IData)(vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.wb))) + & ((0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))) == (0xfU + & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0U]))); vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd - = (((((0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0x14U)) == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rd)) - & (0U != (0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0x14U)))) & (0U - != (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb))) - & ((IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num) - == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__warp_num))); - vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_mem_result[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data - [3U]; - vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_mem_result[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data - [2U]; - vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_mem_result[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data - [1U]; - vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_mem_result[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data - [0U]; - vlTOPp->Vortex__DOT__m_w_valid[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_valid - [3U]; - vlTOPp->Vortex__DOT__m_w_valid[2U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_valid - [2U]; - vlTOPp->Vortex__DOT__m_w_valid[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_valid - [1U]; - vlTOPp->Vortex__DOT__m_w_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_valid - [0U]; - vlTOPp->Vortex__DOT__f_d_valid[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_f_d_reg__out_valid - [3U]; - vlTOPp->Vortex__DOT__f_d_valid[2U] = vlTOPp->Vortex__DOT____Vcellout__vx_f_d_reg__out_valid - [2U]; - vlTOPp->Vortex__DOT__f_d_valid[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_f_d_reg__out_valid - [1U]; - vlTOPp->Vortex__DOT__f_d_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_f_d_reg__out_valid - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0x1fU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs - [0x1fU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0x1eU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs - [0x1eU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0x1dU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs - [0x1dU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0x1cU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs - [0x1cU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0x1bU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs - [0x1bU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0x1aU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs - [0x1aU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0x19U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs - [0x19U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0x18U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs - [0x18U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0x17U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs - [0x17U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0x16U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs - [0x16U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0x15U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs - [0x15U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0x14U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs - [0x14U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0x13U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs - [0x13U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0x12U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs - [0x12U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0x11U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs - [0x11U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0x10U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs - [0x10U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0xfU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs - [0xfU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0xeU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs - [0xeU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0xdU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs - [0xdU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0xcU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs - [0xcU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0xbU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs - [0xbU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0xaU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs - [0xaU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[9U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs - [9U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[8U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs - [8U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[7U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs - [7U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[6U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs - [6U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[5U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs - [5U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[4U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs - [4U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs - [0U]; - vlTOPp->Vortex__DOT__m_w_alu_result[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_alu_result - [3U]; - vlTOPp->Vortex__DOT__m_w_alu_result[2U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_alu_result - [2U]; - vlTOPp->Vortex__DOT__m_w_alu_result[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_alu_result - [1U]; - vlTOPp->Vortex__DOT__m_w_alu_result[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_alu_result - [0U]; - vlTOPp->Vortex__DOT__m_w_mem_result[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_mem_result - [3U]; - vlTOPp->Vortex__DOT__m_w_mem_result[2U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_mem_result - [2U]; - vlTOPp->Vortex__DOT__m_w_mem_result[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_mem_result - [1U]; - vlTOPp->Vortex__DOT__m_w_mem_result[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_mem_result - [0U]; - // ALWAYS at VX_decode.v:508 - vlTOPp->Vortex__DOT__decode_itype_immed = ((0x40U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? ( - (0x20U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? - ((0x10U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? 0xdeadbeefU - : - ((8U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? 0xdeadbeefU - : - ((4U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? 0xdeadbeefU - : - ((2U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? - ((1U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? - ((0xfffff000U - & (VL_NEGATE_I((IData)( - (1U - & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0x1fU)))) - << 0xcU)) - | ((0x800U - & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0x14U)) - | ((0x400U - & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - << 3U)) - | ((0x3f0U - & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0x15U)) - | (0xfU - & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 8U)))))) - : 0xdeadbeefU) - : 0xdeadbeefU)))) - : 0xdeadbeefU) - : ( - (0x20U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? - ((0x10U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? 0xdeadbeefU - : - ((8U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? 0xdeadbeefU - : - ((4U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? 0xdeadbeefU - : - ((2U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? - ((1U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? - ((0xfffff000U - & (VL_NEGATE_I((IData)( - (1U - & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0x1fU)))) - << 0xcU)) - | ((0xfe0U - & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0x14U)) - | (0x1fU - & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 7U)))) - : 0xdeadbeefU) - : 0xdeadbeefU)))) - : - ((0x10U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? - ((8U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? 0xdeadbeefU - : - ((4U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? 0xdeadbeefU - : - ((2U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? - ((1U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? - ((0xfffff000U - & (VL_NEGATE_I((IData)( - (1U - & ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__alu_tempp) - >> 0xbU)))) - << 0xcU)) - | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__alu_tempp)) - : 0xdeadbeefU) - : 0xdeadbeefU))) - : - ((8U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? 0xdeadbeefU - : - ((4U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? 0xdeadbeefU - : - ((2U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? - ((1U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? - ((0xfffff000U - & (VL_NEGATE_I((IData)( - (1U - & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0x1fU)))) - << 0xcU)) - | (0xfffU - & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0x14U))) - : 0xdeadbeefU) - : 0xdeadbeefU)))))); - vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__real_wspawn - = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_wspawn) - & (1U == (0xfU & ((IData)(1U) + (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_state))))); - vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__real_wspawn - = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_wspawn) - & (2U == (0xfU & ((IData)(1U) + (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_state))))); - vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__real_wspawn - = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_wspawn) - & (3U == (0xfU & ((IData)(1U) + (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_state))))); - vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__real_wspawn - = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_wspawn) - & (4U == (0xfU & ((IData)(1U) + (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_state))))); - vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__real_wspawn - = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_wspawn) - & (5U == (0xfU & ((IData)(1U) + (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_state))))); - vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__real_wspawn - = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_wspawn) - & (6U == (0xfU & ((IData)(1U) + (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_state))))); - vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__real_wspawn - = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_wspawn) - & (7U == (0xfU & ((IData)(1U) + (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_state))))); - vlTOPp->Vortex__DOT__vx_decode__DOT__real_zero_isclone - = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone) - & (0U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num))); - vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__real_isclone - = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone) - & (1U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num))); - vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__real_isclone - = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone) - & (2U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num))); - vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__real_isclone - = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone) - & (3U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num))); - vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__real_isclone - = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone) - & (4U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num))); - vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__real_isclone - = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone) - & (5U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num))); - vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__real_isclone - = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone) - & (6U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num))); - vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__real_isclone - = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone) - & (7U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num))); - // ALWAYS at VX_decode.v:451 - if ((0x40U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { - if ((0x20U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { - if ((0x10U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { - vlTOPp->Vortex__DOT__decode_jal_offset - = ((8U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? 0xdeadbeefU : ((4U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + = (((((0x1fU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 4U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x1cU))) == (0x1fU + & ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xeU] + << 8U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + >> 0x18U)))) + & (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 4U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x1cU))))) + & (0U != (IData)(vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.wb))) + & ((0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))) == (0xfU + & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0U]))); + // ALWAYS at VX_decode.v:503 + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.itype_immed + = ((0x4000U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? ((0x2000U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? ((0x1000U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? 0xdeadbeefU : ((0x800U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? 0xdeadbeefU + : ((0x400U & + vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) ? 0xdeadbeefU - : ((2U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? ((1U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + : ((0x200U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? ((0x100U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? + ((0xfffff000U + & (VL_NEGATE_I((IData)( + (1U + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + >> 7U)))) + << 0xcU)) + | ((0x800U + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 4U)) + | ((0x400U + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 5U)) + | ((0x3f0U + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 3U)) + | (0xfU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x10U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x10U))))))) + : 0xdeadbeefU) + : 0xdeadbeefU)))) + : 0xdeadbeefU) : ((0x2000U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? ((0x1000U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? 0xdeadbeefU + : ((0x800U & + vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? 0xdeadbeefU + : ((0x400U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? 0xdeadbeefU + : ((0x200U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? + ((0x100U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? + ((0xfffff000U + & (VL_NEGATE_I((IData)( + (1U + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + >> 7U)))) + << 0xcU)) + | ((0xfe0U + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 4U)) + | (0x1fU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x11U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0xfU))))) + : 0xdeadbeefU) + : 0xdeadbeefU)))) + : ((0x1000U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? ((0x800U & + vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? 0xdeadbeefU + : ((0x400U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? 0xdeadbeefU + : ((0x200U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? + ((0x100U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? + ((0xfffff000U + & (VL_NEGATE_I((IData)( + (1U + & ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__alu_tempp) + >> 0xbU)))) + << 0xcU)) + | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__alu_tempp)) + : 0xdeadbeefU) + : 0xdeadbeefU))) + : ((0x800U & + vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? 0xdeadbeefU + : ((0x400U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? 0xdeadbeefU + : ((0x200U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? + ((0x100U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? + ((0xfffff000U + & (VL_NEGATE_I((IData)( + (1U + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + >> 7U)))) + << 0xcU)) + | (0xfffU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 4U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x1cU)))) + : 0xdeadbeefU) + : 0xdeadbeefU)))))); + vlTOPp->Vortex__DOT__vx_decode__DOT__is_ebreak + = ((0x73U == (0x7fU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) + & ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__jal_sys_jal) + & vlTOPp->Vortex__DOT__vx_decode__DOT__in_valid + [0U])); + // ALWAYS at VX_decode.v:447 + if ((0x4000U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U])) { + if ((0x2000U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U])) { + if ((0x1000U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U])) { + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.jal_offset + = ((0x800U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? 0xdeadbeefU : ((0x400U & + vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? 0xdeadbeefU + : ((0x200U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? ((0x100U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) ? (((0U == (7U - & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0xcU))) + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0xcU) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x14U)))) & (2U > (0xfffU - & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0x14U)))) + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 4U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x1cU))))) ? 0xb0000000U : 0xdeadbeefU) : 0xdeadbeefU) : 0xdeadbeefU))); } else { - if ((8U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { - if ((4U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { - vlTOPp->Vortex__DOT__decode_jal_offset - = ((2U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? ((1U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + if ((0x800U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U])) { + if ((0x400U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U])) { + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.jal_offset + = ((0x200U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? ((0x100U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) ? ((0xffe00000U & (VL_NEGATE_I((IData)( (1U - & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0x1fU)))) + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + >> 7U)))) << 0x15U)) | ((0x100000U - & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0xbU)) + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0xdU)) | ((0xff000U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (0xfff000U + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) | ((0x800U - & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 9U)) + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x11U)) | (0x7feU - & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0x14U)))))) + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 4U) + | (0xeU + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x1cU)))))))) : 0xdeadbeefU) : 0xdeadbeefU); } else { - if ((2U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { - if ((1U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { + if ((0x200U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U])) { + if ((0x100U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U])) { if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jalrs) | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jmprt))) { - vlTOPp->Vortex__DOT__decode_jal_offset = 0U; + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.jal_offset = 0U; } } else { - vlTOPp->Vortex__DOT__decode_jal_offset = 0xdeadbeefU; + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.jal_offset = 0xdeadbeefU; } } else { - vlTOPp->Vortex__DOT__decode_jal_offset = 0xdeadbeefU; + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.jal_offset = 0xdeadbeefU; } } } else { - vlTOPp->Vortex__DOT__decode_jal_offset - = ((4U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? ((2U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? ((1U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.jal_offset + = ((0x400U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? ((0x200U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? ((0x100U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) ? ((0xfffff000U & (VL_NEGATE_I((IData)( (1U - & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0x1fU)))) + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + >> 7U)))) << 0xcU)) | (0xfffU & - (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0x14U))) + ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 4U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x1cU)))) : 0xdeadbeefU) : 0xdeadbeefU) : 0xdeadbeefU); } } } else { - vlTOPp->Vortex__DOT__decode_jal_offset = 0xdeadbeefU; + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.jal_offset = 0xdeadbeefU; } } else { - vlTOPp->Vortex__DOT__decode_jal_offset = 0xdeadbeefU; + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.jal_offset = 0xdeadbeefU; } - // ALWAYS at VX_decode.v:519 - if ((0x40U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { - if ((0x20U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { - if ((0x10U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { - vlTOPp->Vortex__DOT__decode_branch_type = 0U; + // ALWAYS at VX_decode.v:447 + if ((0x4000U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U])) { + if ((0x2000U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U])) { + if ((0x1000U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U])) { + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.jal + = ((~ (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0xbU)) & ((~ (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0xaU)) + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 9U) + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U) + & ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__jal_sys_jal) + & vlTOPp->Vortex__DOT__vx_decode__DOT__in_valid + [0U]))))); } else { - if ((8U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { - if ((4U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { - vlTOPp->Vortex__DOT__decode_branch_type = 0U; + if ((0x800U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U])) { + if ((0x400U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U])) { + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.jal + = ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 9U) & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U) & + vlTOPp->Vortex__DOT__vx_decode__DOT__in_valid + [0U])); } else { - if ((2U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { - if ((1U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { + if ((0x200U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U])) { + if ((0x100U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U])) { if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jalrs) | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jmprt))) { - vlTOPp->Vortex__DOT__decode_branch_type = 0U; + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.jal + = vlTOPp->Vortex__DOT__vx_decode__DOT__in_valid + [0U]; } } else { - vlTOPp->Vortex__DOT__decode_branch_type = 0U; + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.jal = 0U; } } else { - vlTOPp->Vortex__DOT__decode_branch_type = 0U; + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.jal = 0U; } } } else { - vlTOPp->Vortex__DOT__decode_branch_type - = ((4U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? 0U : ((2U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? ((1U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? ((0x4000U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? ((0x2000U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.jal + = ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0xaU) & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 9U) & ( + (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U) + & vlTOPp->Vortex__DOT__vx_decode__DOT__in_valid + [0U]))); + } + } + } else { + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.jal = 0U; + } + } else { + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.jal = 0U; + } + // ALWAYS at VX_decode.v:514 + if ((0x4000U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U])) { + if ((0x2000U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U])) { + if ((0x1000U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U])) { + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.branch_type = 0U; + } else { + if ((0x800U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U])) { + if ((0x400U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U])) { + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.branch_type = 0U; + } else { + if ((0x200U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U])) { + if ((0x100U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U])) { + if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jalrs) + | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jmprt))) { + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.branch_type = 0U; + } + } else { + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.branch_type = 0U; + } + } else { + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.branch_type = 0U; + } + } + } else { + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.branch_type + = ((0x400U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? 0U : ((0x200U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? ((0x100U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? ((0x400000U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? ((0x200000U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) ? - ((0x1000U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ((0x100000U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) ? 6U : 5U) : - ((0x1000U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ((0x100000U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) ? 4U : 3U)) - : ((0x2000U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + : ((0x200000U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) ? 0U : - ((0x1000U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ((0x100000U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) ? 2U : 1U))) : 0U) : 0U)); } } } else { - vlTOPp->Vortex__DOT__decode_branch_type = 0U; + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.branch_type = 0U; } } else { - vlTOPp->Vortex__DOT__decode_branch_type = 0U; + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.branch_type = 0U; } - vlTOPp->Vortex__DOT__decode_change_mask = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jalrs) - | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jmprt)); - vlTOPp->Vortex__DOT__e_m_b_reg_data[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_b_reg_data - [3U]; - vlTOPp->Vortex__DOT__e_m_b_reg_data[2U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_b_reg_data - [2U]; - vlTOPp->Vortex__DOT__e_m_b_reg_data[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_b_reg_data - [1U]; - vlTOPp->Vortex__DOT__e_m_b_reg_data[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_b_reg_data - [0U]; - vlTOPp->Vortex__DOT__e_m_valid[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_valid - [3U]; - vlTOPp->Vortex__DOT__e_m_valid[2U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_valid - [2U]; - vlTOPp->Vortex__DOT__e_m_valid[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_valid - [1U]; - vlTOPp->Vortex__DOT__e_m_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_valid - [0U]; - vlTOPp->Vortex__DOT__e_m_alu_result[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_alu_result - [3U]; - vlTOPp->Vortex__DOT__e_m_alu_result[2U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_alu_result - [2U]; - vlTOPp->Vortex__DOT__e_m_alu_result[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_alu_result - [1U]; - vlTOPp->Vortex__DOT__e_m_alu_result[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_alu_result - [0U]; - vlTOPp->Vortex__DOT__d_e_valid[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_valid - [3U]; - vlTOPp->Vortex__DOT__d_e_valid[2U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_valid - [2U]; - vlTOPp->Vortex__DOT__d_e_valid[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_valid - [1U]; - vlTOPp->Vortex__DOT__d_e_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_valid - [0U]; - vlTOPp->Vortex__DOT__d_e_a_reg_data[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data - [3U]; - vlTOPp->Vortex__DOT__d_e_a_reg_data[2U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data - [2U]; - vlTOPp->Vortex__DOT__d_e_a_reg_data[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data - [1U]; - vlTOPp->Vortex__DOT__d_e_a_reg_data[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data - [0U]; - vlTOPp->Vortex__DOT__d_e_b_reg_data[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_b_reg_data - [3U]; - vlTOPp->Vortex__DOT__d_e_b_reg_data[2U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_b_reg_data - [2U]; - vlTOPp->Vortex__DOT__d_e_b_reg_data[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_b_reg_data - [1U]; - vlTOPp->Vortex__DOT__d_e_b_reg_data[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_b_reg_data - [0U]; - vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd - = ((((((0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0xfU)) == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__rd)) - & (0U != (0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0xfU)))) & (0U - != (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb))) - & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd))) - & ((IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num) - == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__warp_num))); - vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd - = ((((((0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0x14U)) == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__rd)) - & (0U != (0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0x14U)))) & (0U - != (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb))) - & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd))) - & ((IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num) - == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__warp_num))); - vlTOPp->Vortex__DOT__memory_mem_result[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_mem_result - [3U]; - vlTOPp->Vortex__DOT__memory_mem_result[2U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_mem_result - [2U]; - vlTOPp->Vortex__DOT__memory_mem_result[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_mem_result - [1U]; - vlTOPp->Vortex__DOT__memory_mem_result[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_mem_result - [0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid[3U] - = vlTOPp->Vortex__DOT__m_w_valid[3U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid[2U] - = vlTOPp->Vortex__DOT__m_w_valid[2U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid[1U] - = vlTOPp->Vortex__DOT__m_w_valid[1U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid[0U] - = vlTOPp->Vortex__DOT__m_w_valid[0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid[3U] - = vlTOPp->Vortex__DOT__f_d_valid[3U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid[2U] - = vlTOPp->Vortex__DOT__f_d_valid[2U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid[1U] - = vlTOPp->Vortex__DOT__f_d_valid[1U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid[0U] - = vlTOPp->Vortex__DOT__f_d_valid[0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1fU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x1fU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1eU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x1eU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1dU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x1dU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1cU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x1cU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1bU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x1bU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1aU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x1aU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x19U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x19U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x18U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x18U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x17U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x17U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x16U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x16U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x15U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x15U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x14U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x14U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x13U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x13U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x12U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x12U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x11U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x11U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x10U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x10U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xfU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0xfU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xeU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0xeU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xdU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0xdU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xcU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0xcU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xbU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0xbU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xaU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0xaU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[9U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [9U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[8U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [8U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[7U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [7U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[6U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [6U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[5U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [5U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[4U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [4U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1fU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x1fU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1eU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x1eU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1dU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x1dU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1cU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x1cU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1bU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x1bU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1aU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x1aU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x19U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x19U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x18U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x18U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x17U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x17U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x16U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x16U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x15U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x15U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x14U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x14U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x13U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x13U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x12U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x12U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x11U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x11U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x10U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x10U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xfU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0xfU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xeU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0xeU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xdU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0xdU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xcU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0xcU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xbU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0xbU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xaU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0xaU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[9U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [9U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[8U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [8U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[7U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [7U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[6U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [6U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[5U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [5U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[4U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [4U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1fU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x1fU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1eU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x1eU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1dU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x1dU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1cU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x1cU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1bU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x1bU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1aU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x1aU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x19U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x19U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x18U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x18U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x17U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x17U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x16U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x16U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x15U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x15U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x14U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x14U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x13U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x13U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x12U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x12U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x11U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x11U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x10U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x10U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xfU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0xfU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xeU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0xeU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xdU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0xdU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xcU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0xcU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xbU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0xbU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xaU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0xaU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[9U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [9U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[8U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [8U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[7U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [7U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[6U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [6U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[5U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [5U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[4U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [4U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0x1fU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x1fU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0x1eU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x1eU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0x1dU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x1dU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0x1cU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x1cU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0x1bU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x1bU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0x1aU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x1aU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0x19U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x19U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0x18U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x18U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0x17U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x17U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0x16U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x16U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0x15U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x15U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0x14U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x14U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0x13U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x13U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0x12U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x12U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0x11U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x11U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0x10U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x10U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0xfU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0xfU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0xeU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0xeU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0xdU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0xdU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0xcU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0xcU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0xbU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0xbU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0xaU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0xaU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[9U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [9U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[8U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [8U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[7U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [7U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[6U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [6U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[5U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [5U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[4U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [4U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_alu_result[3U] - = vlTOPp->Vortex__DOT__m_w_alu_result[3U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_alu_result[2U] - = vlTOPp->Vortex__DOT__m_w_alu_result[2U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_alu_result[1U] - = vlTOPp->Vortex__DOT__m_w_alu_result[1U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_alu_result[0U] - = vlTOPp->Vortex__DOT__m_w_alu_result[0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result[3U] - = vlTOPp->Vortex__DOT__m_w_alu_result[3U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result[2U] - = vlTOPp->Vortex__DOT__m_w_alu_result[2U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result[1U] - = vlTOPp->Vortex__DOT__m_w_alu_result[1U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result[0U] - = vlTOPp->Vortex__DOT__m_w_alu_result[0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_mem_result[3U] - = vlTOPp->Vortex__DOT__m_w_mem_result[3U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_mem_result[2U] - = vlTOPp->Vortex__DOT__m_w_mem_result[2U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_mem_result[1U] - = vlTOPp->Vortex__DOT__m_w_mem_result[1U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_mem_result[0U] - = vlTOPp->Vortex__DOT__m_w_mem_result[0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data[3U] - = vlTOPp->Vortex__DOT__m_w_mem_result[3U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data[2U] - = vlTOPp->Vortex__DOT__m_w_mem_result[2U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data[1U] - = vlTOPp->Vortex__DOT__m_w_mem_result[1U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data[0U] - = vlTOPp->Vortex__DOT__m_w_mem_result[0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall[0U] - = (((0U == (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__state_stall)) - | (1U != (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__state_stall))) - & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__real_zero_isclone)); - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall[1U] - = ((((0U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.__PVT__clone_state_stall)) - | (1U != (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.__PVT__clone_state_stall))) - & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__real_isclone)) - | (((0U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.__PVT__wspawn_state_stall)) - & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__real_wspawn)) - | (1U < (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.__PVT__wspawn_state_stall)))); - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall[2U] - = ((((0U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.__PVT__clone_state_stall)) - | (1U != (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.__PVT__clone_state_stall))) - & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__real_isclone)) - | (((0U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.__PVT__wspawn_state_stall)) - & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__real_wspawn)) - | (1U < (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.__PVT__wspawn_state_stall)))); - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall[3U] - = ((((0U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.__PVT__clone_state_stall)) - | (1U != (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.__PVT__clone_state_stall))) - & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__real_isclone)) - | (((0U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.__PVT__wspawn_state_stall)) - & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__real_wspawn)) - | (1U < (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.__PVT__wspawn_state_stall)))); - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall[4U] - = ((((0U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.__PVT__clone_state_stall)) - | (1U != (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.__PVT__clone_state_stall))) - & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__real_isclone)) - | (((0U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.__PVT__wspawn_state_stall)) - & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__real_wspawn)) - | (1U < (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.__PVT__wspawn_state_stall)))); - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall[5U] - = ((((0U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.__PVT__clone_state_stall)) - | (1U != (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.__PVT__clone_state_stall))) - & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__real_isclone)) - | (((0U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.__PVT__wspawn_state_stall)) - & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__real_wspawn)) - | (1U < (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.__PVT__wspawn_state_stall)))); - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall[6U] - = ((((0U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.__PVT__clone_state_stall)) - | (1U != (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.__PVT__clone_state_stall))) - & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__real_isclone)) - | (((0U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.__PVT__wspawn_state_stall)) - & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__real_wspawn)) - | (1U < (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.__PVT__wspawn_state_stall)))); - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall[7U] - = ((((0U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.__PVT__clone_state_stall)) - | (1U != (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.__PVT__clone_state_stall))) - & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__real_isclone)) - | (((0U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.__PVT__wspawn_state_stall)) - & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__real_wspawn)) - | (1U < (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.__PVT__wspawn_state_stall)))); - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_final_alu - = ((0x63U == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) - ? ((5U > (IData)(vlTOPp->Vortex__DOT__decode_branch_type)) - ? 1U : 0xaU) : ((0x37U == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) - ? 0xbU : ((0x17U == - (0x7fU - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) - ? 0xcU : - ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_csr) - ? ((1U - == - (3U - & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0xcU))) - ? 0xdU - : - ((2U - == - (3U - & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0xcU))) - ? 0xeU - : 0xfU)) - : (((0x23U - == - (0x7fU - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) - | (3U - == - (0x7fU - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction))) - ? 0U - : - ((0x4000U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? - ((0x2000U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? - ((0x1000U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? 9U - : 8U) - : - ((0x1000U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? - ((0U - == - (0x7fU - & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0x19U))) - ? 6U - : 7U) - : 5U)) - : - ((0x2000U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? - ((0x1000U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? 4U - : 3U) - : - ((0x1000U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? 2U - : - ((0x13U - == - (0x7fU - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) - ? 0U - : - ((0U - == - (0x7fU - & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0x19U))) - ? 0U - : 1U)))))))))); - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__0__KET____DOT__warp_zero_change_mask - = ((IData)(vlTOPp->Vortex__DOT__decode_change_mask) - & (0U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num))); - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__1__KET____DOT__warp_zero_change_mask - = ((IData)(vlTOPp->Vortex__DOT__decode_change_mask) - & (1U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num))); - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__2__KET____DOT__warp_zero_change_mask - = ((IData)(vlTOPp->Vortex__DOT__decode_change_mask) - & (2U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num))); - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__3__KET____DOT__warp_zero_change_mask - = ((IData)(vlTOPp->Vortex__DOT__decode_change_mask) - & (3U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num))); - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__4__KET____DOT__warp_zero_change_mask - = ((IData)(vlTOPp->Vortex__DOT__decode_change_mask) - & (4U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num))); - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__5__KET____DOT__warp_zero_change_mask - = ((IData)(vlTOPp->Vortex__DOT__decode_change_mask) - & (5U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num))); - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__6__KET____DOT__warp_zero_change_mask - = ((IData)(vlTOPp->Vortex__DOT__decode_change_mask) - & (6U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num))); - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__7__KET____DOT__warp_zero_change_mask - = ((IData)(vlTOPp->Vortex__DOT__decode_change_mask) - & (7U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num))); - vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_rd2[3U] - = vlTOPp->Vortex__DOT__e_m_b_reg_data[3U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_rd2[2U] - = vlTOPp->Vortex__DOT__e_m_b_reg_data[2U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_rd2[1U] - = vlTOPp->Vortex__DOT__e_m_b_reg_data[1U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_rd2[0U] - = vlTOPp->Vortex__DOT__e_m_b_reg_data[0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid[3U] - = vlTOPp->Vortex__DOT__e_m_valid[3U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid[2U] - = vlTOPp->Vortex__DOT__e_m_valid[2U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid[1U] - = vlTOPp->Vortex__DOT__e_m_valid[1U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid[0U] - = vlTOPp->Vortex__DOT__e_m_valid[0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result[3U] - = vlTOPp->Vortex__DOT__e_m_alu_result[3U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result[2U] - = vlTOPp->Vortex__DOT__e_m_alu_result[2U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result[1U] - = vlTOPp->Vortex__DOT__e_m_alu_result[1U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result[0U] - = vlTOPp->Vortex__DOT__e_m_alu_result[0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_valid[3U] - = vlTOPp->Vortex__DOT__d_e_valid[3U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_valid[2U] - = vlTOPp->Vortex__DOT__d_e_valid[2U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_valid[1U] - = vlTOPp->Vortex__DOT__d_e_valid[1U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_valid[0U] - = vlTOPp->Vortex__DOT__d_e_valid[0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data[3U] - = vlTOPp->Vortex__DOT__d_e_a_reg_data[3U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data[2U] - = vlTOPp->Vortex__DOT__d_e_a_reg_data[2U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data[1U] - = vlTOPp->Vortex__DOT__d_e_a_reg_data[1U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data[0U] - = vlTOPp->Vortex__DOT__d_e_a_reg_data[0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data[3U] - = vlTOPp->Vortex__DOT__d_e_b_reg_data[3U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data[2U] - = vlTOPp->Vortex__DOT__d_e_b_reg_data[2U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data[1U] - = vlTOPp->Vortex__DOT__d_e_b_reg_data[1U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data[0U] - = vlTOPp->Vortex__DOT__d_e_b_reg_data[0U]; - vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd - = (((((((0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0xfU)) == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd)) - & (0U != (0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0xfU)))) & (0U - != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb))) - & ((IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__warp_num) - == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num))) - & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd))) - & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd))); - vlTOPp->Vortex__DOT__forwarding_fwd_stall = ((((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd) - | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd)) - & (2U - == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb))) - | (((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd) - | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd)) - & (2U - == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)))); - vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd - = (((((((0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0x14U)) == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd)) - & (0U != (0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0x14U)))) & (0U - != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb))) - & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd))) - & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd))) - & ((IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__warp_num) - == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num))); - vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_mem_result[3U] - = vlTOPp->Vortex__DOT__memory_mem_result[3U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_mem_result[2U] - = vlTOPp->Vortex__DOT__memory_mem_result[2U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_mem_result[1U] - = vlTOPp->Vortex__DOT__memory_mem_result[1U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_mem_result[0U] - = vlTOPp->Vortex__DOT__memory_mem_result[0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data[3U] - = vlTOPp->Vortex__DOT__memory_mem_result[3U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data[2U] - = vlTOPp->Vortex__DOT__memory_mem_result[2U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data[1U] - = vlTOPp->Vortex__DOT__memory_mem_result[1U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data[0U] - = vlTOPp->Vortex__DOT__memory_mem_result[0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_valid[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_valid[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_valid[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_valid[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_valid[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_valid[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_valid[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_valid[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_valid[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_valid[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_valid[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_valid[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_valid[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_valid[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_valid[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_valid[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_valid[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_valid[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_valid[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_valid[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_valid[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_valid[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_valid[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_valid[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_valid[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_valid[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_valid[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_valid[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_valid[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_valid[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_valid[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_valid[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [0U]; - vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_valid[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid - [3U]; - vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_valid[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid - [2U]; - vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_valid[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid - [1U]; - vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_valid[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid - [0U]; - // ALWAYS at VX_decode.v:451 - if ((0x40U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { - if ((0x20U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { - if ((0x10U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { - vlTOPp->Vortex__DOT__decode_jal = ( - (~ - (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 3U)) - & ((~ - (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 2U)) - & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 1U) - & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - & ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__jal_sys_jal) - & vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid - [0U]))))); - } else { - if ((8U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { - if ((4U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { - vlTOPp->Vortex__DOT__decode_jal - = ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 1U) & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - & vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid - [0U])); - } else { - if ((2U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { - if ((1U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { - if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jalrs) - | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jmprt))) { - vlTOPp->Vortex__DOT__decode_jal - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid - [0U]; - } - } else { - vlTOPp->Vortex__DOT__decode_jal = 0U; - } - } else { - vlTOPp->Vortex__DOT__decode_jal = 0U; - } - } - } else { - vlTOPp->Vortex__DOT__decode_jal - = ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 2U) & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 1U) & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - & vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid - [0U]))); - } - } - } else { - vlTOPp->Vortex__DOT__decode_jal = 0U; - } - } else { - vlTOPp->Vortex__DOT__decode_jal = 0U; - } - // ALWAYS at VX_decode.v:519 - if ((0x40U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { - if ((0x20U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { - if ((0x10U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { + // ALWAYS at VX_decode.v:514 + if ((0x4000U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U])) { + if ((0x2000U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U])) { + if ((0x1000U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U])) { vlTOPp->Vortex__DOT__decode_branch_stall = 0U; } else { - if ((8U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { - if ((4U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { + if ((0x800U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U])) { + if ((0x400U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U])) { vlTOPp->Vortex__DOT__decode_branch_stall - = ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 1U) & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - & vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid + = ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 9U) & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U) & + vlTOPp->Vortex__DOT__vx_decode__DOT__in_valid [0U])); } else { - if ((2U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { - if ((1U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { + if ((0x200U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U])) { + if ((0x100U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U])) { if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jalrs) | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jmprt))) { vlTOPp->Vortex__DOT__decode_branch_stall - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid + = vlTOPp->Vortex__DOT__vx_decode__DOT__in_valid [0U]; } } else { @@ -2086,14 +1051,15 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) { } } else { vlTOPp->Vortex__DOT__decode_branch_stall - = ((4U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 1U) & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - & vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid + = ((0x400U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 9U) & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U) & + vlTOPp->Vortex__DOT__vx_decode__DOT__in_valid [0U])) : - ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 1U) & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - & vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid + ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 9U) & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U) & vlTOPp->Vortex__DOT__vx_decode__DOT__in_valid [0U]))); } } @@ -2103,1117 +1069,134 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) { } else { vlTOPp->Vortex__DOT__decode_branch_stall = 0U; } - vlTOPp->Vortex__DOT__vx_decode__DOT__is_ebreak - = ((0x73U == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) - & ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__jal_sys_jal) - & vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid - [0U])); - vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0x1fU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers - [0x1fU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0x1eU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers - [0x1eU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0x1dU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers - [0x1dU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0x1cU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers - [0x1cU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0x1bU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers - [0x1bU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0x1aU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers - [0x1aU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0x19U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers - [0x19U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0x18U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers - [0x18U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0x17U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers - [0x17U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0x16U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers - [0x16U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0x15U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers - [0x15U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0x14U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers - [0x14U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0x13U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers - [0x13U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0x12U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers - [0x12U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0x11U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers - [0x11U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0x10U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers - [0x10U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0xfU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers - [0xfU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0xeU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers - [0xeU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0xdU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers - [0xdU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0xcU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers - [0xcU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0xbU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers - [0xbU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0xaU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers - [0xaU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[9U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers - [9U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[8U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers - [8U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[7U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers - [7U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[6U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers - [6U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[5U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers - [5U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[4U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers - [4U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers + vlSymsp->TOP__Vortex__DOT__VX_warp_ctl.change_mask + = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jalrs) + | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jmprt)); + vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__real_wspawn + = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_wspawn) + & (1U == (0xfU & ((IData)(1U) + (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_state))))); + vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__real_wspawn + = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_wspawn) + & (2U == (0xfU & ((IData)(1U) + (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_state))))); + vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__real_wspawn + = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_wspawn) + & (3U == (0xfU & ((IData)(1U) + (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_state))))); + vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__real_wspawn + = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_wspawn) + & (4U == (0xfU & ((IData)(1U) + (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_state))))); + vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__real_wspawn + = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_wspawn) + & (5U == (0xfU & ((IData)(1U) + (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_state))))); + vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__real_wspawn + = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_wspawn) + & (6U == (0xfU & ((IData)(1U) + (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_state))))); + vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__real_wspawn + = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_wspawn) + & (7U == (0xfU & ((IData)(1U) + (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_state))))); + vlTOPp->Vortex__DOT__vx_decode__DOT__real_zero_isclone + = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone) + & (0U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))); + vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__real_isclone + = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone) + & (1U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))); + vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__real_isclone + = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone) + & (2U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))); + vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__real_isclone + = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone) + & (3U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))); + vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__real_isclone + = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone) + & (4U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))); + vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__real_isclone + = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone) + & (5U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))); + vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__real_isclone + = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone) + & (6U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))); + vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__real_isclone + = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone) + & (7U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))); + vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[0U] + = ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) ? + vlTOPp->Vortex__DOT__vx_writeback__DOT__out_pc_data[0U] + : ((1U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + ? ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[6U] + << 7U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[5U] + >> 0x19U)) : ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 7U) + | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x19U)))); + vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[1U] + = ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) ? + vlTOPp->Vortex__DOT__vx_writeback__DOT__out_pc_data[1U] + : ((1U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + ? ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[7U] + << 7U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[6U] + >> 0x19U)) : ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[3U] + << 7U) + | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + >> 0x19U)))); + vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[2U] + = ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) ? + vlTOPp->Vortex__DOT__vx_writeback__DOT__out_pc_data[2U] + : ((1U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + ? ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[8U] + << 7U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[7U] + >> 0x19U)) : ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[4U] + << 7U) + | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[3U] + >> 0x19U)))); + vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[3U] + = ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) ? + vlTOPp->Vortex__DOT__vx_writeback__DOT__out_pc_data[3U] + : ((1U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + ? ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[9U] + << 7U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[8U] + >> 0x19U)) : ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[5U] + << 7U) + | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[4U] + >> 0x19U)))); + vlTOPp->out_cache_driver_in_address[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers + vlTOPp->out_cache_driver_in_address[2U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers + vlTOPp->out_cache_driver_in_address[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers + vlTOPp->out_cache_driver_in_address[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address [0U]; - vlTOPp->Vortex__DOT____Vcellout__vx_writeback__out_write_data[3U] - = ((3U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT__vx_writeback__DOT__out_pc_data - [3U] : ((1U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_alu_result - [3U] : vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_mem_result - [3U])); - vlTOPp->Vortex__DOT____Vcellout__vx_writeback__out_write_data[2U] - = ((3U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT__vx_writeback__DOT__out_pc_data - [2U] : ((1U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_alu_result - [2U] : vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_mem_result - [2U])); - vlTOPp->Vortex__DOT____Vcellout__vx_writeback__out_write_data[1U] - = ((3U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT__vx_writeback__DOT__out_pc_data - [1U] : ((1U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_alu_result - [1U] : vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_mem_result - [1U])); - vlTOPp->Vortex__DOT____Vcellout__vx_writeback__out_write_data[0U] - = ((3U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT__vx_writeback__DOT__out_pc_data - [0U] : ((1U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_alu_result - [0U] : vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_mem_result - [0U])); - // ALWAYS at VX_decode.v:276 - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall - = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall) - | vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall - [1U]); - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall - = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall) - | vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall - [2U]); - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall - = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall) - | vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall - [3U]); - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall - = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall) - | vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall - [4U]); - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall - = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall) - | vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall - [5U]); - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall - = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall) - | vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall - [6U]); - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall - = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall) - | vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall - [7U]); - vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_rd2 - [3U]; - vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_rd2 - [2U]; - vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_rd2 - [1U]; - vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_rd2 - [0U]; - vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid - [3U]; - vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid - [2U]; - vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid - [1U]; - vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid - [0U]; - vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_valid[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid - [3U]; - vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_valid[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid - [2U]; - vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_valid[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid - [1U]; - vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_valid[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid - [0U]; - vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result - [3U]; - vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result - [2U]; - vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result - [1U]; - vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result - [0U]; - // ALWAYS at VX_memory.v:113 - vlTOPp->Vortex__DOT__memory_branch_dir = (1U & - ((4U - & (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type)) - ? ( - (2U - & (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type)) - ? - ((~ (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type)) - & (~ - (vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result - [0U] - >> 0x1fU))) - : - ((1U - & (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type)) - ? - (vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result - [0U] - >> 0x1fU) - : - (~ - (vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result - [0U] - >> 0x1fU)))) - : ( - (2U - & (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type)) - ? - ((1U - & (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type)) - ? - (vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result - [0U] - >> 0x1fU) - : - (0U - != - vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result - [0U])) - : - ((IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type) - & (0U - == - vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result - [0U]))))); - vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_alu_result[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result - [3U]; - vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_alu_result[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result - [2U]; - vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_alu_result[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result - [1U]; - vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_alu_result[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result - [0U]; - vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_valid[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_valid - [3U]; - vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_valid[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_valid - [2U]; - vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_valid[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_valid - [1U]; - vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_valid[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_valid - [0U]; - vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data - [3U]; - vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data - [2U]; - vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data - [1U]; - vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data - [0U]; - vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2 - = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rs2_src) - ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__itype_immed - : vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data - [0U]); - vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2 - = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rs2_src) - ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__itype_immed - : vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data - [1U]); - vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2 - = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rs2_src) - ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__itype_immed - : vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data - [2U]); - vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2 - = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rs2_src) - ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__itype_immed - : vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data - [3U]); - vlTOPp->Vortex__DOT__forwarding_src1_fwd = (((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd) - | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd)) - | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd)); - vlTOPp->Vortex__DOT__forwarding_src2_fwd = (((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd) - | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd)) - | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd)); - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_valid[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_valid - [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_valid[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_valid - [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_valid[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_valid - [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_valid[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_valid - [0U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_valid[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_valid - [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_valid[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_valid - [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_valid[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_valid - [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_valid[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_valid - [0U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_valid[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_valid - [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_valid[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_valid - [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_valid[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_valid - [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_valid[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_valid - [0U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_valid[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_valid - [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_valid[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_valid - [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_valid[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_valid - [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_valid[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_valid - [0U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_valid[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_valid - [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_valid[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_valid - [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_valid[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_valid - [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_valid[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_valid - [0U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_valid[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_valid - [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_valid[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_valid - [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_valid[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_valid - [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_valid[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_valid - [0U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_valid[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_valid - [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_valid[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_valid - [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_valid[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_valid - [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_valid[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_valid - [0U]; - vlTOPp->Vortex__DOT__decode_valid[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_valid - [3U]; - vlTOPp->Vortex__DOT__decode_valid[2U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_valid - [2U]; - vlTOPp->Vortex__DOT__decode_valid[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_valid - [1U]; - vlTOPp->Vortex__DOT__decode_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_valid - [0U]; - vlTOPp->out_ebreak = ((0U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num)) - & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_ebreak)); - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[0x1fU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1fU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[0x1eU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1eU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[0x1dU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1dU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[0x1cU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1cU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[0x1bU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1bU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[0x1aU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1aU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[0x19U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x19U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[0x18U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x18U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[0x17U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x17U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[0x16U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x16U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[0x15U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x15U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[0x14U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x14U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[0x13U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x13U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[0x12U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x12U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[0x11U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x11U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[0x10U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x10U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[0xfU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xfU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[0xeU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xeU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[0xdU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xdU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[0xcU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xcU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[0xbU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xbU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[0xaU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xaU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[9U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [9U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[8U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [8U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[7U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [7U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[6U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [6U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[5U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [5U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[4U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [4U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[0x1fU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1fU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[0x1eU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1eU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[0x1dU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1dU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[0x1cU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1cU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[0x1bU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1bU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[0x1aU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1aU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[0x19U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x19U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[0x18U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x18U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[0x17U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x17U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[0x16U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x16U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[0x15U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x15U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[0x14U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x14U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[0x13U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x13U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[0x12U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x12U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[0x11U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x11U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[0x10U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x10U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[0xfU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xfU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[0xeU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xeU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[0xdU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xdU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[0xcU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xcU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[0xbU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xbU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[0xaU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xaU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[9U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [9U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[8U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [8U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[7U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [7U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[6U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [6U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[5U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [5U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[4U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [4U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[0x1fU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1fU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[0x1eU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1eU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[0x1dU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1dU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[0x1cU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1cU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[0x1bU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1bU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[0x1aU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1aU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[0x19U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x19U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[0x18U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x18U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[0x17U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x17U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[0x16U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x16U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[0x15U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x15U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[0x14U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x14U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[0x13U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x13U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[0x12U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x12U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[0x11U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x11U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[0x10U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x10U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[0xfU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xfU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[0xeU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xeU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[0xdU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xdU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[0xcU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xcU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[0xbU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xbU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[0xaU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xaU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[9U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [9U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[8U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [8U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[7U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [7U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[6U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [6U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[5U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [5U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[4U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [4U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[0x1fU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1fU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[0x1eU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1eU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[0x1dU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1dU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[0x1cU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1cU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[0x1bU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1bU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[0x1aU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1aU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[0x19U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x19U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[0x18U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x18U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[0x17U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x17U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[0x16U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x16U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[0x15U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x15U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[0x14U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x14U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[0x13U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x13U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[0x12U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x12U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[0x11U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x11U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[0x10U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x10U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[0xfU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xfU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[0xeU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xeU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[0xdU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xdU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[0xcU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xcU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[0xbU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xbU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[0xaU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xaU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[9U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [9U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[8U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [8U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[7U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [7U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[6U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [6U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[5U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [5U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[4U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [4U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[0x1fU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1fU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[0x1eU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1eU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[0x1dU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1dU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[0x1cU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1cU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[0x1bU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1bU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[0x1aU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1aU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[0x19U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x19U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[0x18U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x18U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[0x17U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x17U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[0x16U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x16U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[0x15U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x15U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[0x14U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x14U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[0x13U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x13U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[0x12U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x12U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[0x11U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x11U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[0x10U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x10U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[0xfU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xfU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[0xeU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xeU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[0xdU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xdU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[0xcU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xcU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[0xbU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xbU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[0xaU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xaU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[9U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [9U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[8U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [8U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[7U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [7U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[6U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [6U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[5U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [5U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[4U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [4U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[0x1fU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1fU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[0x1eU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1eU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[0x1dU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1dU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[0x1cU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1cU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[0x1bU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1bU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[0x1aU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1aU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[0x19U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x19U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[0x18U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x18U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[0x17U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x17U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[0x16U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x16U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[0x15U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x15U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[0x14U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x14U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[0x13U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x13U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[0x12U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x12U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[0x11U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x11U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[0x10U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x10U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[0xfU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xfU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[0xeU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xeU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[0xdU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xdU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[0xcU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xcU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[0xbU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xbU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[0xaU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xaU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[9U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [9U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[8U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [8U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[7U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [7U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[6U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [6U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[5U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [5U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[4U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [4U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[0x1fU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1fU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[0x1eU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1eU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[0x1dU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1dU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[0x1cU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1cU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[0x1bU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1bU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[0x1aU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1aU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[0x19U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x19U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[0x18U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x18U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[0x17U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x17U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[0x16U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x16U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[0x15U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x15U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[0x14U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x14U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[0x13U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x13U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[0x12U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x12U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[0x11U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x11U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[0x10U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x10U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[0xfU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xfU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[0xeU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xeU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[0xdU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xdU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[0xcU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xcU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[0xbU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xbU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[0xaU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xaU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[9U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [9U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[8U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [8U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[7U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [7U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[6U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [6U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[5U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [5U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[4U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [4U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0U]; - vlTOPp->Vortex__DOT__writeback_write_data[3U] = - vlTOPp->Vortex__DOT____Vcellout__vx_writeback__out_write_data - [3U]; - vlTOPp->Vortex__DOT__writeback_write_data[2U] = - vlTOPp->Vortex__DOT____Vcellout__vx_writeback__out_write_data - [2U]; - vlTOPp->Vortex__DOT__writeback_write_data[1U] = - vlTOPp->Vortex__DOT____Vcellout__vx_writeback__out_write_data - [1U]; - vlTOPp->Vortex__DOT__writeback_write_data[0U] = - vlTOPp->Vortex__DOT____Vcellout__vx_writeback__out_write_data - [0U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT__add_warp = - (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_wspawn) - & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_ebreak))) - & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall))); - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling - = (((IData)(vlTOPp->Vortex__DOT__forwarding_fwd_stall) - | (IData)(vlTOPp->Vortex__DOT__execute_branch_stall)) - | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall)); - vlTOPp->Vortex__DOT__vx_fetch__DOT__stall = ((((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall) - | (IData)(vlTOPp->Vortex__DOT__decode_branch_stall)) - | (IData)(vlTOPp->Vortex__DOT__forwarding_fwd_stall)) - | (IData)(vlTOPp->Vortex__DOT__execute_branch_stall)); - vlTOPp->Vortex__DOT__vx_fetch__DOT__remove_warp - = (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_ebreak) - & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_wspawn))) - & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall))); vlTOPp->out_cache_driver_in_data[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data [3U]; vlTOPp->out_cache_driver_in_data[2U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data @@ -3230,1515 +1213,1077 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) { [1U]; vlTOPp->out_cache_driver_in_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid [0U]; - vlTOPp->Vortex__DOT__memory_valid[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_valid - [3U]; - vlTOPp->Vortex__DOT__memory_valid[2U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_valid - [2U]; - vlTOPp->Vortex__DOT__memory_valid[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_valid - [1U]; - vlTOPp->Vortex__DOT__memory_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_valid - [0U]; - vlTOPp->out_cache_driver_in_address[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address - [3U]; - vlTOPp->out_cache_driver_in_address[2U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address - [2U]; - vlTOPp->out_cache_driver_in_address[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address - [1U]; - vlTOPp->out_cache_driver_in_address[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address - [0U]; // ALWAYS at VX_warp.v:57 - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__0__KET____DOT__VX_Warp__DOT__temp_PC - = (((IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal) - & (0U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__warp_num))) - ? vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal_dest - : (((IData)(vlTOPp->Vortex__DOT__memory_branch_dir) - & (0U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__warp_num))) - ? vlTOPp->Vortex__DOT__memory_branch_dest - : vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__0__KET____DOT__VX_Warp__DOT__real_PC)); + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__VX_Warp__DOT__temp_PC + = (((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0x15U] + >> 2U) & (0U == (0xfU & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U]))) + ? ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0x15U] + << 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0x14U] + >> 2U)) : (((IData)(vlTOPp->Vortex__DOT__vx_memory__DOT__temp_branch_dir) + & (0U == (0xfU + & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U]))) + ? vlTOPp->Vortex__DOT__memory_branch_dest + : vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__VX_Warp__DOT__real_PC)); // ALWAYS at VX_warp.v:57 - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__1__KET____DOT__VX_Warp__DOT__temp_PC - = (((IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal) - & (1U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__warp_num))) - ? vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal_dest - : (((IData)(vlTOPp->Vortex__DOT__memory_branch_dir) - & (1U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__warp_num))) - ? vlTOPp->Vortex__DOT__memory_branch_dest - : vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__1__KET____DOT__VX_Warp__DOT__real_PC)); + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__temp_PC + = (((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0x15U] + >> 2U) & (1U == (0xfU & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U]))) + ? ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0x15U] + << 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0x14U] + >> 2U)) : (((IData)(vlTOPp->Vortex__DOT__vx_memory__DOT__temp_branch_dir) + & (1U == (0xfU + & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U]))) + ? vlTOPp->Vortex__DOT__memory_branch_dest + : vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__real_PC)); // ALWAYS at VX_warp.v:57 - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__2__KET____DOT__VX_Warp__DOT__temp_PC - = (((IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal) - & (2U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__warp_num))) - ? vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal_dest - : (((IData)(vlTOPp->Vortex__DOT__memory_branch_dir) - & (2U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__warp_num))) - ? vlTOPp->Vortex__DOT__memory_branch_dest - : vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__2__KET____DOT__VX_Warp__DOT__real_PC)); + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__temp_PC + = (((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0x15U] + >> 2U) & (2U == (0xfU & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U]))) + ? ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0x15U] + << 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0x14U] + >> 2U)) : (((IData)(vlTOPp->Vortex__DOT__vx_memory__DOT__temp_branch_dir) + & (2U == (0xfU + & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U]))) + ? vlTOPp->Vortex__DOT__memory_branch_dest + : vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__real_PC)); // ALWAYS at VX_warp.v:57 - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__3__KET____DOT__VX_Warp__DOT__temp_PC - = (((IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal) - & (3U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__warp_num))) - ? vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal_dest - : (((IData)(vlTOPp->Vortex__DOT__memory_branch_dir) - & (3U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__warp_num))) - ? vlTOPp->Vortex__DOT__memory_branch_dest - : vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__3__KET____DOT__VX_Warp__DOT__real_PC)); + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__temp_PC + = (((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0x15U] + >> 2U) & (3U == (0xfU & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U]))) + ? ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0x15U] + << 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0x14U] + >> 2U)) : (((IData)(vlTOPp->Vortex__DOT__vx_memory__DOT__temp_branch_dir) + & (3U == (0xfU + & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U]))) + ? vlTOPp->Vortex__DOT__memory_branch_dest + : vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__real_PC)); // ALWAYS at VX_warp.v:57 - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__4__KET____DOT__VX_Warp__DOT__temp_PC - = (((IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal) - & (4U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__warp_num))) - ? vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal_dest - : (((IData)(vlTOPp->Vortex__DOT__memory_branch_dir) - & (4U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__warp_num))) - ? vlTOPp->Vortex__DOT__memory_branch_dest - : vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__4__KET____DOT__VX_Warp__DOT__real_PC)); + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__temp_PC + = (((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0x15U] + >> 2U) & (4U == (0xfU & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U]))) + ? ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0x15U] + << 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0x14U] + >> 2U)) : (((IData)(vlTOPp->Vortex__DOT__vx_memory__DOT__temp_branch_dir) + & (4U == (0xfU + & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U]))) + ? vlTOPp->Vortex__DOT__memory_branch_dest + : vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__real_PC)); // ALWAYS at VX_warp.v:57 - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__5__KET____DOT__VX_Warp__DOT__temp_PC - = (((IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal) - & (5U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__warp_num))) - ? vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal_dest - : (((IData)(vlTOPp->Vortex__DOT__memory_branch_dir) - & (5U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__warp_num))) - ? vlTOPp->Vortex__DOT__memory_branch_dest - : vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__5__KET____DOT__VX_Warp__DOT__real_PC)); + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__temp_PC + = (((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0x15U] + >> 2U) & (5U == (0xfU & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U]))) + ? ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0x15U] + << 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0x14U] + >> 2U)) : (((IData)(vlTOPp->Vortex__DOT__vx_memory__DOT__temp_branch_dir) + & (5U == (0xfU + & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U]))) + ? vlTOPp->Vortex__DOT__memory_branch_dest + : vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__real_PC)); // ALWAYS at VX_warp.v:57 - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__6__KET____DOT__VX_Warp__DOT__temp_PC - = (((IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal) - & (6U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__warp_num))) - ? vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal_dest - : (((IData)(vlTOPp->Vortex__DOT__memory_branch_dir) - & (6U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__warp_num))) - ? vlTOPp->Vortex__DOT__memory_branch_dest - : vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__6__KET____DOT__VX_Warp__DOT__real_PC)); + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__temp_PC + = (((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0x15U] + >> 2U) & (6U == (0xfU & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U]))) + ? ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0x15U] + << 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0x14U] + >> 2U)) : (((IData)(vlTOPp->Vortex__DOT__vx_memory__DOT__temp_branch_dir) + & (6U == (0xfU + & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U]))) + ? vlTOPp->Vortex__DOT__memory_branch_dest + : vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__real_PC)); // ALWAYS at VX_warp.v:57 - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__7__KET____DOT__VX_Warp__DOT__temp_PC - = (((IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal) - & (7U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__warp_num))) - ? vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal_dest - : (((IData)(vlTOPp->Vortex__DOT__memory_branch_dir) - & (7U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__warp_num))) - ? vlTOPp->Vortex__DOT__memory_branch_dest - : vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__7__KET____DOT__VX_Warp__DOT__real_PC)); - vlTOPp->Vortex__DOT__memory_alu_result[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_alu_result - [3U]; - vlTOPp->Vortex__DOT__memory_alu_result[2U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_alu_result - [2U]; - vlTOPp->Vortex__DOT__memory_alu_result[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_alu_result - [1U]; - vlTOPp->Vortex__DOT__memory_alu_result[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_alu_result - [0U]; - vlTOPp->Vortex__DOT__execute_valid[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_valid - [3U]; - vlTOPp->Vortex__DOT__execute_valid[2U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_valid - [2U]; - vlTOPp->Vortex__DOT__execute_valid[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_valid - [1U]; - vlTOPp->Vortex__DOT__execute_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_valid - [0U]; - vlTOPp->Vortex__DOT__execute_b_reg_data[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data - [3U]; - vlTOPp->Vortex__DOT__execute_b_reg_data[2U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data - [2U]; - vlTOPp->Vortex__DOT__execute_b_reg_data[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data - [1U]; - vlTOPp->Vortex__DOT__execute_b_reg_data[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data - [0U]; - vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__mult_signed_result - = VL_MULS_QQQ(64,64,64, VL_EXTENDS_QI(64,32, - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [0U]), - VL_EXTENDS_QI(64,32, vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)); - vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__mult_signed_result - = VL_MULS_QQQ(64,64,64, VL_EXTENDS_QI(64,32, - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [1U]), - VL_EXTENDS_QI(64,32, vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)); - vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__mult_signed_result - = VL_MULS_QQQ(64,64,64, VL_EXTENDS_QI(64,32, - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [2U]), - VL_EXTENDS_QI(64,32, vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)); - vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__mult_signed_result - = VL_MULS_QQQ(64,64,64, VL_EXTENDS_QI(64,32, - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [3U]), - VL_EXTENDS_QI(64,32, vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)); - vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_valid[3U] - = vlTOPp->Vortex__DOT__decode_valid[3U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_valid[2U] - = vlTOPp->Vortex__DOT__decode_valid[2U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_valid[1U] - = vlTOPp->Vortex__DOT__decode_valid[1U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_valid[0U] - = vlTOPp->Vortex__DOT__decode_valid[0U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_wspawn_regs[0x1fU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1fU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_wspawn_regs[0x1eU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1eU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_wspawn_regs[0x1dU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1dU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_wspawn_regs[0x1cU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1cU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_wspawn_regs[0x1bU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1bU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_wspawn_regs[0x1aU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1aU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_wspawn_regs[0x19U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs - [0x19U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_wspawn_regs[0x18U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs - [0x18U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_wspawn_regs[0x17U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs - [0x17U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_wspawn_regs[0x16U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs - [0x16U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_wspawn_regs[0x15U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs - [0x15U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_wspawn_regs[0x14U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs - [0x14U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_wspawn_regs[0x13U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs - [0x13U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_wspawn_regs[0x12U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs - [0x12U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_wspawn_regs[0x11U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs - [0x11U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_wspawn_regs[0x10U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs - [0x10U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_wspawn_regs[0xfU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs - [0xfU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_wspawn_regs[0xeU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs - [0xeU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_wspawn_regs[0xdU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs - [0xdU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_wspawn_regs[0xcU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs - [0xcU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_wspawn_regs[0xbU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs - [0xbU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_wspawn_regs[0xaU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs - [0xaU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_wspawn_regs[9U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs - [9U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_wspawn_regs[8U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs - [8U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_wspawn_regs[7U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs - [7U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_wspawn_regs[6U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs - [6U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_wspawn_regs[5U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs - [5U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_wspawn_regs[4U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs - [4U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_wspawn_regs[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs - [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_wspawn_regs[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs - [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_wspawn_regs[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs - [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_wspawn_regs[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs - [0U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_wspawn_regs[0x1fU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1fU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_wspawn_regs[0x1eU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1eU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_wspawn_regs[0x1dU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1dU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_wspawn_regs[0x1cU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1cU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_wspawn_regs[0x1bU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1bU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_wspawn_regs[0x1aU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1aU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_wspawn_regs[0x19U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs - [0x19U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_wspawn_regs[0x18U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs - [0x18U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_wspawn_regs[0x17U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs - [0x17U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_wspawn_regs[0x16U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs - [0x16U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_wspawn_regs[0x15U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs - [0x15U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_wspawn_regs[0x14U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs - [0x14U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_wspawn_regs[0x13U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs - [0x13U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_wspawn_regs[0x12U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs - [0x12U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_wspawn_regs[0x11U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs - [0x11U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_wspawn_regs[0x10U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs - [0x10U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_wspawn_regs[0xfU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs - [0xfU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_wspawn_regs[0xeU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs - [0xeU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_wspawn_regs[0xdU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs - [0xdU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_wspawn_regs[0xcU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs - [0xcU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_wspawn_regs[0xbU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs - [0xbU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_wspawn_regs[0xaU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs - [0xaU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_wspawn_regs[9U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs - [9U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_wspawn_regs[8U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs - [8U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_wspawn_regs[7U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs - [7U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_wspawn_regs[6U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs - [6U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_wspawn_regs[5U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs - [5U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_wspawn_regs[4U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs - [4U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_wspawn_regs[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs - [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_wspawn_regs[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs - [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_wspawn_regs[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs - [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_wspawn_regs[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs - [0U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_wspawn_regs[0x1fU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1fU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_wspawn_regs[0x1eU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1eU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_wspawn_regs[0x1dU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1dU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_wspawn_regs[0x1cU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1cU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_wspawn_regs[0x1bU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1bU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_wspawn_regs[0x1aU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1aU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_wspawn_regs[0x19U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs - [0x19U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_wspawn_regs[0x18U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs - [0x18U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_wspawn_regs[0x17U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs - [0x17U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_wspawn_regs[0x16U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs - [0x16U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_wspawn_regs[0x15U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs - [0x15U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_wspawn_regs[0x14U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs - [0x14U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_wspawn_regs[0x13U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs - [0x13U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_wspawn_regs[0x12U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs - [0x12U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_wspawn_regs[0x11U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs - [0x11U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_wspawn_regs[0x10U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs - [0x10U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_wspawn_regs[0xfU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs - [0xfU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_wspawn_regs[0xeU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs - [0xeU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_wspawn_regs[0xdU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs - [0xdU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_wspawn_regs[0xcU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs - [0xcU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_wspawn_regs[0xbU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs - [0xbU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_wspawn_regs[0xaU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs - [0xaU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_wspawn_regs[9U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs - [9U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_wspawn_regs[8U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs - [8U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_wspawn_regs[7U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs - [7U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_wspawn_regs[6U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs - [6U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_wspawn_regs[5U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs - [5U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_wspawn_regs[4U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs - [4U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_wspawn_regs[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs - [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_wspawn_regs[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs - [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_wspawn_regs[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs - [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_wspawn_regs[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs - [0U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_wspawn_regs[0x1fU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1fU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_wspawn_regs[0x1eU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1eU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_wspawn_regs[0x1dU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1dU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_wspawn_regs[0x1cU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1cU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_wspawn_regs[0x1bU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1bU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_wspawn_regs[0x1aU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1aU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_wspawn_regs[0x19U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs - [0x19U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_wspawn_regs[0x18U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs - [0x18U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_wspawn_regs[0x17U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs - [0x17U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_wspawn_regs[0x16U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs - [0x16U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_wspawn_regs[0x15U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs - [0x15U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_wspawn_regs[0x14U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs - [0x14U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_wspawn_regs[0x13U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs - [0x13U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_wspawn_regs[0x12U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs - [0x12U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_wspawn_regs[0x11U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs - [0x11U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_wspawn_regs[0x10U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs - [0x10U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_wspawn_regs[0xfU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs - [0xfU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_wspawn_regs[0xeU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs - [0xeU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_wspawn_regs[0xdU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs - [0xdU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_wspawn_regs[0xcU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs - [0xcU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_wspawn_regs[0xbU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs - [0xbU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_wspawn_regs[0xaU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs - [0xaU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_wspawn_regs[9U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs - [9U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_wspawn_regs[8U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs - [8U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_wspawn_regs[7U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs - [7U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_wspawn_regs[6U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs - [6U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_wspawn_regs[5U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs - [5U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_wspawn_regs[4U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs - [4U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_wspawn_regs[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs - [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_wspawn_regs[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs - [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_wspawn_regs[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs - [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_wspawn_regs[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs - [0U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_wspawn_regs[0x1fU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1fU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_wspawn_regs[0x1eU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1eU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_wspawn_regs[0x1dU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1dU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_wspawn_regs[0x1cU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1cU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_wspawn_regs[0x1bU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1bU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_wspawn_regs[0x1aU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1aU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_wspawn_regs[0x19U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs - [0x19U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_wspawn_regs[0x18U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs - [0x18U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_wspawn_regs[0x17U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs - [0x17U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_wspawn_regs[0x16U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs - [0x16U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_wspawn_regs[0x15U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs - [0x15U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_wspawn_regs[0x14U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs - [0x14U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_wspawn_regs[0x13U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs - [0x13U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_wspawn_regs[0x12U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs - [0x12U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_wspawn_regs[0x11U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs - [0x11U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_wspawn_regs[0x10U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs - [0x10U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_wspawn_regs[0xfU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs - [0xfU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_wspawn_regs[0xeU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs - [0xeU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_wspawn_regs[0xdU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs - [0xdU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_wspawn_regs[0xcU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs - [0xcU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_wspawn_regs[0xbU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs - [0xbU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_wspawn_regs[0xaU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs - [0xaU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_wspawn_regs[9U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs - [9U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_wspawn_regs[8U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs - [8U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_wspawn_regs[7U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs - [7U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_wspawn_regs[6U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs - [6U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_wspawn_regs[5U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs - [5U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_wspawn_regs[4U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs - [4U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_wspawn_regs[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs - [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_wspawn_regs[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs - [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_wspawn_regs[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs - [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_wspawn_regs[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs - [0U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_wspawn_regs[0x1fU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1fU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_wspawn_regs[0x1eU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1eU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_wspawn_regs[0x1dU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1dU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_wspawn_regs[0x1cU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1cU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_wspawn_regs[0x1bU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1bU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_wspawn_regs[0x1aU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1aU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_wspawn_regs[0x19U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs - [0x19U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_wspawn_regs[0x18U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs - [0x18U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_wspawn_regs[0x17U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs - [0x17U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_wspawn_regs[0x16U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs - [0x16U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_wspawn_regs[0x15U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs - [0x15U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_wspawn_regs[0x14U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs - [0x14U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_wspawn_regs[0x13U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs - [0x13U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_wspawn_regs[0x12U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs - [0x12U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_wspawn_regs[0x11U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs - [0x11U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_wspawn_regs[0x10U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs - [0x10U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_wspawn_regs[0xfU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs - [0xfU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_wspawn_regs[0xeU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs - [0xeU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_wspawn_regs[0xdU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs - [0xdU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_wspawn_regs[0xcU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs - [0xcU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_wspawn_regs[0xbU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs - [0xbU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_wspawn_regs[0xaU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs - [0xaU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_wspawn_regs[9U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs - [9U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_wspawn_regs[8U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs - [8U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_wspawn_regs[7U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs - [7U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_wspawn_regs[6U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs - [6U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_wspawn_regs[5U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs - [5U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_wspawn_regs[4U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs - [4U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_wspawn_regs[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs - [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_wspawn_regs[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs - [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_wspawn_regs[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs - [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_wspawn_regs[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs - [0U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_wspawn_regs[0x1fU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1fU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_wspawn_regs[0x1eU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1eU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_wspawn_regs[0x1dU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1dU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_wspawn_regs[0x1cU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1cU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_wspawn_regs[0x1bU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1bU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_wspawn_regs[0x1aU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1aU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_wspawn_regs[0x19U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs - [0x19U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_wspawn_regs[0x18U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs - [0x18U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_wspawn_regs[0x17U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs - [0x17U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_wspawn_regs[0x16U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs - [0x16U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_wspawn_regs[0x15U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs - [0x15U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_wspawn_regs[0x14U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs - [0x14U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_wspawn_regs[0x13U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs - [0x13U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_wspawn_regs[0x12U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs - [0x12U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_wspawn_regs[0x11U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs - [0x11U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_wspawn_regs[0x10U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs - [0x10U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_wspawn_regs[0xfU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs - [0xfU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_wspawn_regs[0xeU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs - [0xeU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_wspawn_regs[0xdU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs - [0xdU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_wspawn_regs[0xcU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs - [0xcU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_wspawn_regs[0xbU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs - [0xbU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_wspawn_regs[0xaU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs - [0xaU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_wspawn_regs[9U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs - [9U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_wspawn_regs[8U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs - [8U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_wspawn_regs[7U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs - [7U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_wspawn_regs[6U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs - [6U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_wspawn_regs[5U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs - [5U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_wspawn_regs[4U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs - [4U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_wspawn_regs[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs - [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_wspawn_regs[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs - [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_wspawn_regs[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs - [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_wspawn_regs[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs - [0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data[3U] - = vlTOPp->Vortex__DOT__writeback_write_data - [3U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data[2U] - = vlTOPp->Vortex__DOT__writeback_write_data - [2U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data[1U] - = vlTOPp->Vortex__DOT__writeback_write_data - [1U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data[0U] - = vlTOPp->Vortex__DOT__writeback_write_data - [0U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__0__KET____DOT__warp_zero_stall - = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__stall) - | (0U != (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num))); - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__1__KET____DOT__warp_zero_stall - = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__stall) - | (1U != (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num))); - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__2__KET____DOT__warp_zero_stall - = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__stall) - | (2U != (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num))); - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__3__KET____DOT__warp_zero_stall - = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__stall) - | (3U != (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num))); - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__4__KET____DOT__warp_zero_stall - = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__stall) - | (4U != (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num))); - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__5__KET____DOT__warp_zero_stall - = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__stall) - | (5U != (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num))); - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__6__KET____DOT__warp_zero_stall - = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__stall) - | (6U != (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num))); - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__7__KET____DOT__warp_zero_stall - = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__stall) - | (7U != (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num))); - vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_valid[3U] - = vlTOPp->Vortex__DOT__memory_valid[3U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_valid[2U] - = vlTOPp->Vortex__DOT__memory_valid[2U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_valid[1U] - = vlTOPp->Vortex__DOT__memory_valid[1U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_valid[0U] - = vlTOPp->Vortex__DOT__memory_valid[0U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_pc[0U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__0__KET____DOT__VX_Warp__DOT__temp_PC; - vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_pc[1U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__1__KET____DOT__VX_Warp__DOT__temp_PC; - vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_pc[2U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__2__KET____DOT__VX_Warp__DOT__temp_PC; - vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_pc[3U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__3__KET____DOT__VX_Warp__DOT__temp_PC; - vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_pc[4U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__4__KET____DOT__VX_Warp__DOT__temp_PC; - vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_pc[5U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__5__KET____DOT__VX_Warp__DOT__temp_PC; - vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_pc[6U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__6__KET____DOT__VX_Warp__DOT__temp_PC; - vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_pc[7U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__7__KET____DOT__VX_Warp__DOT__temp_PC; - vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_alu_result[3U] - = vlTOPp->Vortex__DOT__memory_alu_result[3U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_alu_result[2U] - = vlTOPp->Vortex__DOT__memory_alu_result[2U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_alu_result[1U] - = vlTOPp->Vortex__DOT__memory_alu_result[1U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_alu_result[0U] - = vlTOPp->Vortex__DOT__memory_alu_result[0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result[3U] - = vlTOPp->Vortex__DOT__memory_alu_result[3U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result[2U] - = vlTOPp->Vortex__DOT__memory_alu_result[2U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result[1U] - = vlTOPp->Vortex__DOT__memory_alu_result[1U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result[0U] - = vlTOPp->Vortex__DOT__memory_alu_result[0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_valid[3U] - = vlTOPp->Vortex__DOT__execute_valid[3U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_valid[2U] - = vlTOPp->Vortex__DOT__execute_valid[2U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_valid[1U] - = vlTOPp->Vortex__DOT__execute_valid[1U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_valid[0U] - = vlTOPp->Vortex__DOT__execute_valid[0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_b_reg_data[3U] - = vlTOPp->Vortex__DOT__execute_b_reg_data[3U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_b_reg_data[2U] - = vlTOPp->Vortex__DOT__execute_b_reg_data[2U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_b_reg_data[1U] - = vlTOPp->Vortex__DOT__execute_b_reg_data[1U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_b_reg_data[0U] - = vlTOPp->Vortex__DOT__execute_b_reg_data[0U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__temp_PC + = (((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0x15U] + >> 2U) & (7U == (0xfU & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U]))) + ? ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0x15U] + << 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0x14U] + >> 2U)) : (((IData)(vlTOPp->Vortex__DOT__vx_memory__DOT__temp_branch_dir) + & (7U == (0xfU + & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U]))) + ? vlTOPp->Vortex__DOT__memory_branch_dest + : vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__real_PC)); // ALWAYS at VX_alu.v:48 vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__0__KET____DOT__vx_alu__out_alu_result - = ((0x10U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((8U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? 0U : ((4U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + = ((0x2000U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x1000U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? 0U : ((0x800U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x400U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) ? ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2) - ? vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [0U] : VL_MODDIV_III(32, - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [0U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)) + ? ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] + >> 0xeU)) + : VL_MODDIV_III(32, + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] + >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)) : ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2) - ? vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [0U] : VL_MODDIVS_III(32, - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [0U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))) - : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] + >> 0xeU)) + : VL_MODDIVS_III(32, + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] + >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))) + : ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) ? ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2) ? 0xffffffffU : VL_DIV_III(32, - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [0U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)) + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] + >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)) : ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2) ? 0xffffffffU : VL_DIVS_III(32, - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [0U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)))) - : ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] + >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)))) + : ((0x400U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) ? (IData)((((QData)((IData)( - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [0U])) + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] + >> 0xeU)))) * (QData)((IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))) >> 0x20U)) : (IData)((((((QData)((IData)( VL_NEGATE_I((IData)( (1U - & (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [0U] - >> 0x1fU)))))) + & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + >> 0xdU)))))) << 0x20U) | (QData)((IData)( - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [0U]))) + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] + >> 0xeU))))) * (QData)((IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))) >> 0x20U))) - : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + : ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) ? (IData)((vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__mult_signed_result >> 0x20U)) : (IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__mult_signed_result))))) - : ((8U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((4U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + : ((0x1000U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x800U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x400U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) ? vlTOPp->Vortex__DOT__csr_decode_csr_data - : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + : ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) ? vlTOPp->Vortex__DOT__csr_decode_csr_data - : (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__curr_PC - + (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__upper_immed - << 0xcU)))) : ((2U - & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? - ((1U - & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? - (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__upper_immed - << 0xcU) - : - ((vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [0U] - >= vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2) - ? 0U - : 0xffffffffU)) - : - ((1U - & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? - (vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2 - & vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [0U]) - : - (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [0U] - | vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)))) - : ((4U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + : (((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[3U] + << 0x17U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[2U] + >> 9U)) + + (0xfffff000U & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[3U] + << 3U))))) + : ((0x400U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? (0xfffff000U & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[3U] + << 3U)) + : ((((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + << 0x12U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] + >> 0xeU)) + >= vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2) + ? 0U : 0xffffffffU)) + : ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? (vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2 + & ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + << 0x12U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] + >> 0xeU))) + : (((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + << 0x12U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] + >> 0xeU)) + | vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)))) + : ((0x800U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x400U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) ? VL_SHIFTRS_III(32,32,5, - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [0U], + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] + >> 0xeU)), (0x1fU & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)) - : (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [0U] >> (0x1fU & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))) - : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [0U] ^ vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2) - : ((vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [0U] < vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2) - ? 1U : 0U))) : ((2U - & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + : (((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + << 0x12U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] + >> 0xeU)) + >> (0x1fU & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))) + : ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? (((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + << 0x12U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] + >> 0xeU)) + ^ vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2) + : ((((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + << 0x12U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] + >> 0xeU)) + < vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2) + ? 1U : 0U))) : ((0x400U + & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) ? - ((1U - & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ((0x200U + & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) ? (VL_LTS_III(1,32,32, - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [0U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2) + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] + >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2) ? 1U : 0U) : - (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [0U] + (((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] + >> 0xeU)) << (0x1fU & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))) : - ((1U - & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ((0x200U + & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) ? - (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [0U] + (((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] + >> 0xeU)) - vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2) : - (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [0U] + (((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] + >> 0xeU)) + vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)))))); // ALWAYS at VX_alu.v:48 vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__1__KET____DOT__vx_alu__out_alu_result - = ((0x10U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((8U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? 0U : ((4U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + = ((0x2000U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x1000U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? 0U : ((0x800U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x400U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) ? ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2) - ? vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [1U] : VL_MODDIV_III(32, - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [1U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)) + ? ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + >> 0xeU)) + : VL_MODDIV_III(32, + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)) : ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2) - ? vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [1U] : VL_MODDIVS_III(32, - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [1U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2))) - : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + >> 0xeU)) + : VL_MODDIVS_III(32, + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2))) + : ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) ? ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2) ? 0xffffffffU : VL_DIV_III(32, - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [1U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)) + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)) : ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2) ? 0xffffffffU : VL_DIVS_III(32, - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [1U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)))) - : ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)))) + : ((0x400U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) ? (IData)((((QData)((IData)( - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [1U])) + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + >> 0xeU)))) * (QData)((IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2))) >> 0x20U)) : (IData)((((((QData)((IData)( VL_NEGATE_I((IData)( (1U - & (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [1U] - >> 0x1fU)))))) + & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + >> 0xdU)))))) << 0x20U) | (QData)((IData)( - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [1U]))) + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + >> 0xeU))))) * (QData)((IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2))) >> 0x20U))) - : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + : ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) ? (IData)((vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__mult_signed_result >> 0x20U)) : (IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__mult_signed_result))))) - : ((8U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((4U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + : ((0x1000U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x800U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x400U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) ? vlTOPp->Vortex__DOT__csr_decode_csr_data - : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + : ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) ? vlTOPp->Vortex__DOT__csr_decode_csr_data - : (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__curr_PC - + (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__upper_immed - << 0xcU)))) : ((2U - & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? - ((1U - & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? - (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__upper_immed - << 0xcU) - : - ((vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [1U] - >= vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2) - ? 0U - : 0xffffffffU)) - : - ((1U - & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? - (vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2 - & vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [1U]) - : - (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [1U] - | vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)))) - : ((4U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + : (((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[3U] + << 0x17U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[2U] + >> 9U)) + + (0xfffff000U & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[3U] + << 3U))))) + : ((0x400U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? (0xfffff000U & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[3U] + << 3U)) + : ((((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + << 0x12U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + >> 0xeU)) + >= vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2) + ? 0U : 0xffffffffU)) + : ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? (vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2 + & ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + << 0x12U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + >> 0xeU))) + : (((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + << 0x12U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + >> 0xeU)) + | vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)))) + : ((0x800U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x400U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) ? VL_SHIFTRS_III(32,32,5, - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [1U], + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + >> 0xeU)), (0x1fU & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)) - : (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [1U] >> (0x1fU & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2))) - : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [1U] ^ vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2) - : ((vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [1U] < vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2) - ? 1U : 0U))) : ((2U - & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + : (((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + << 0x12U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + >> 0xeU)) + >> (0x1fU & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2))) + : ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? (((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + << 0x12U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + >> 0xeU)) + ^ vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2) + : ((((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + << 0x12U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + >> 0xeU)) + < vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2) + ? 1U : 0U))) : ((0x400U + & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) ? - ((1U - & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ((0x200U + & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) ? (VL_LTS_III(1,32,32, - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [1U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2) + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2) ? 1U : 0U) : - (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [1U] + (((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + >> 0xeU)) << (0x1fU & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2))) : - ((1U - & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ((0x200U + & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) ? - (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [1U] + (((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + >> 0xeU)) - vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2) : - (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [1U] + (((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + >> 0xeU)) + vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)))))); // ALWAYS at VX_alu.v:48 vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__2__KET____DOT__vx_alu__out_alu_result - = ((0x10U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((8U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? 0U : ((4U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + = ((0x2000U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x1000U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? 0U : ((0x800U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x400U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) ? ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2) - ? vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [2U] : VL_MODDIV_III(32, - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [2U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)) + ? ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + >> 0xeU)) + : VL_MODDIV_III(32, + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)) : ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2) - ? vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [2U] : VL_MODDIVS_III(32, - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [2U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2))) - : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + >> 0xeU)) + : VL_MODDIVS_III(32, + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2))) + : ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) ? ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2) ? 0xffffffffU : VL_DIV_III(32, - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [2U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)) + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)) : ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2) ? 0xffffffffU : VL_DIVS_III(32, - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [2U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)))) - : ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)))) + : ((0x400U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) ? (IData)((((QData)((IData)( - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [2U])) + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + >> 0xeU)))) * (QData)((IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2))) >> 0x20U)) : (IData)((((((QData)((IData)( VL_NEGATE_I((IData)( (1U - & (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [2U] - >> 0x1fU)))))) + & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + >> 0xdU)))))) << 0x20U) | (QData)((IData)( - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [2U]))) + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + >> 0xeU))))) * (QData)((IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2))) >> 0x20U))) - : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + : ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) ? (IData)((vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__mult_signed_result >> 0x20U)) : (IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__mult_signed_result))))) - : ((8U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((4U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + : ((0x1000U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x800U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x400U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) ? vlTOPp->Vortex__DOT__csr_decode_csr_data - : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + : ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) ? vlTOPp->Vortex__DOT__csr_decode_csr_data - : (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__curr_PC - + (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__upper_immed - << 0xcU)))) : ((2U - & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? - ((1U - & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? - (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__upper_immed - << 0xcU) - : - ((vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [2U] - >= vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2) - ? 0U - : 0xffffffffU)) - : - ((1U - & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? - (vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2 - & vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [2U]) - : - (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [2U] - | vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)))) - : ((4U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + : (((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[3U] + << 0x17U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[2U] + >> 9U)) + + (0xfffff000U & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[3U] + << 3U))))) + : ((0x400U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? (0xfffff000U & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[3U] + << 3U)) + : ((((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + << 0x12U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + >> 0xeU)) + >= vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2) + ? 0U : 0xffffffffU)) + : ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? (vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2 + & ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + << 0x12U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + >> 0xeU))) + : (((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + << 0x12U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + >> 0xeU)) + | vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)))) + : ((0x800U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x400U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) ? VL_SHIFTRS_III(32,32,5, - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [2U], + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + >> 0xeU)), (0x1fU & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)) - : (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [2U] >> (0x1fU & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2))) - : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [2U] ^ vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2) - : ((vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [2U] < vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2) - ? 1U : 0U))) : ((2U - & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + : (((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + << 0x12U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + >> 0xeU)) + >> (0x1fU & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2))) + : ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? (((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + << 0x12U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + >> 0xeU)) + ^ vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2) + : ((((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + << 0x12U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + >> 0xeU)) + < vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2) + ? 1U : 0U))) : ((0x400U + & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) ? - ((1U - & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ((0x200U + & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) ? (VL_LTS_III(1,32,32, - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [2U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2) + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2) ? 1U : 0U) : - (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [2U] + (((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + >> 0xeU)) << (0x1fU & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2))) : - ((1U - & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ((0x200U + & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) ? - (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [2U] + (((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + >> 0xeU)) - vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2) : - (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [2U] + (((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + >> 0xeU)) + vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)))))); // ALWAYS at VX_alu.v:48 vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__3__KET____DOT__vx_alu__out_alu_result - = ((0x10U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((8U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? 0U : ((4U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + = ((0x2000U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x1000U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? 0U : ((0x800U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x400U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) ? ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2) - ? vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [3U] : VL_MODDIV_III(32, - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [3U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)) + ? ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + >> 0xeU)) + : VL_MODDIV_III(32, + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)) : ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2) - ? vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [3U] : VL_MODDIVS_III(32, - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [3U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2))) - : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + >> 0xeU)) + : VL_MODDIVS_III(32, + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2))) + : ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) ? ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2) ? 0xffffffffU : VL_DIV_III(32, - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [3U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)) + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)) : ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2) ? 0xffffffffU : VL_DIVS_III(32, - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [3U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)))) - : ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)))) + : ((0x400U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) ? (IData)((((QData)((IData)( - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [3U])) + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + >> 0xeU)))) * (QData)((IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2))) >> 0x20U)) : (IData)((((((QData)((IData)( VL_NEGATE_I((IData)( (1U - & (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [3U] - >> 0x1fU)))))) + & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + >> 0xdU)))))) << 0x20U) | (QData)((IData)( - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [3U]))) + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + >> 0xeU))))) * (QData)((IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2))) >> 0x20U))) - : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + : ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) ? (IData)((vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__mult_signed_result >> 0x20U)) : (IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__mult_signed_result))))) - : ((8U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((4U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + : ((0x1000U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x800U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x400U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) ? vlTOPp->Vortex__DOT__csr_decode_csr_data - : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + : ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) ? vlTOPp->Vortex__DOT__csr_decode_csr_data - : (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__curr_PC - + (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__upper_immed - << 0xcU)))) : ((2U - & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? - ((1U - & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? - (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__upper_immed - << 0xcU) - : - ((vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [3U] - >= vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2) - ? 0U - : 0xffffffffU)) - : - ((1U - & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? - (vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2 - & vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [3U]) - : - (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [3U] - | vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)))) - : ((4U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + : (((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[3U] + << 0x17U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[2U] + >> 9U)) + + (0xfffff000U & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[3U] + << 3U))))) + : ((0x400U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? (0xfffff000U & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[3U] + << 3U)) + : ((((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + << 0x12U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + >> 0xeU)) + >= vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2) + ? 0U : 0xffffffffU)) + : ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? (vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2 + & ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + << 0x12U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + >> 0xeU))) + : (((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + << 0x12U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + >> 0xeU)) + | vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)))) + : ((0x800U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x400U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) ? VL_SHIFTRS_III(32,32,5, - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [3U], + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + >> 0xeU)), (0x1fU & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)) - : (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [3U] >> (0x1fU & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2))) - : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [3U] ^ vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2) - : ((vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [3U] < vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2) - ? 1U : 0U))) : ((2U - & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + : (((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + << 0x12U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + >> 0xeU)) + >> (0x1fU & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2))) + : ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? (((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + << 0x12U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + >> 0xeU)) + ^ vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2) + : ((((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + << 0x12U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + >> 0xeU)) + < vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2) + ? 1U : 0U))) : ((0x400U + & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) ? - ((1U - & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ((0x200U + & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) ? (VL_LTS_III(1,32,32, - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [3U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2) + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2) ? 1U : 0U) : - (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [3U] + (((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + >> 0xeU)) << (0x1fU & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2))) : - ((1U - & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ((0x200U + & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) ? - (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [3U] + (((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + >> 0xeU)) - vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2) : - (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [3U] + (((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + >> 0xeU)) + vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)))))); - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_write_data[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_write_data[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_write_data[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_write_data[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_write_data[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_write_data[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_write_data[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_write_data[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_write_data[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_write_data[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_write_data[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_write_data[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_write_data[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_write_data[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_write_data[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_write_data[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_write_data[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_write_data[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_write_data[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_write_data[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_write_data[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_write_data[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_write_data[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_write_data[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_write_data[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_write_data[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_write_data[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_write_data[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_write_data[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_write_data[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_write_data[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_write_data[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [0U]; - // ALWAYS at VX_fetch.v:172 + vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd + = ((((((0x1fU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 9U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x17U))) == + (0x1fU & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + << 9U) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] + >> 0x17U)))) & + (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 9U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x17U))))) + & (0U != (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + << 0xbU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] + >> 0x15U))))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd))) + & ((0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))) == (0xfU + & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U]))); + vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd + = ((((((0x1fU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 4U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x1cU))) == + (0x1fU & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + << 9U) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] + >> 0x17U)))) & + (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 4U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x1cU))))) + & (0U != (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + << 0xbU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] + >> 0x15U))))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd))) + & ((0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))) == (0xfU + & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U]))); + vlTOPp->out_ebreak = ((0U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U)))) + & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_ebreak)); + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_final_alu + = ((0x63U == (0x7fU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) + ? ((5U > (IData)(vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.branch_type)) + ? 1U : 0xaU) : ((0x37U == (0x7fU & + ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) + ? 0xbU : ((0x17U == + (0x7fU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) + ? 0xcU : + ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_csr) + ? ((1U + == + (3U + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0xcU) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x14U)))) + ? 0xdU + : + ((2U + == + (3U + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0xcU) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x14U)))) + ? 0xeU + : 0xfU)) + : (((0x23U + == + (0x7fU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) + | (3U + == + (0x7fU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U))))) + ? 0U + : + ((0x400000U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? + ((0x200000U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? + ((0x100000U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? 9U + : 8U) + : + ((0x100000U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? + ((0U + == + (0x7fU + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + >> 1U))) + ? 6U + : 7U) + : 5U)) + : + ((0x200000U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? + ((0x100000U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? 4U + : 3U) + : + ((0x100000U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? 2U + : + ((0x13U + == + (0x7fU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) + ? 0U + : + ((0U + == + (0x7fU + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + >> 1U))) + ? 0U + : 1U)))))))))); + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__warp_zero_change_mask + = ((IData)(vlSymsp->TOP__Vortex__DOT__VX_warp_ctl.change_mask) + & (0U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))); + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__warp_zero_change_mask + = ((IData)(vlSymsp->TOP__Vortex__DOT__VX_warp_ctl.change_mask) + & (1U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))); + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__warp_zero_change_mask + = ((IData)(vlSymsp->TOP__Vortex__DOT__VX_warp_ctl.change_mask) + & (2U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))); + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__warp_zero_change_mask + = ((IData)(vlSymsp->TOP__Vortex__DOT__VX_warp_ctl.change_mask) + & (3U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))); + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__warp_zero_change_mask + = ((IData)(vlSymsp->TOP__Vortex__DOT__VX_warp_ctl.change_mask) + & (4U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))); + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__warp_zero_change_mask + = ((IData)(vlSymsp->TOP__Vortex__DOT__VX_warp_ctl.change_mask) + & (5U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))); + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__warp_zero_change_mask + = ((IData)(vlSymsp->TOP__Vortex__DOT__VX_warp_ctl.change_mask) + & (6U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))); + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__warp_zero_change_mask + = ((IData)(vlSymsp->TOP__Vortex__DOT__VX_warp_ctl.change_mask) + & (7U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))); + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall + = ((0xfeU & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall)) + | (((0U == (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__state_stall)) + | (1U != (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__state_stall))) + & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__real_zero_isclone))); + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall + = ((0xfdU & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall)) + | (((((0U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one.__PVT__clone_state_stall)) + | (1U != (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one.__PVT__clone_state_stall))) + & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__real_isclone)) + | (((0U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one.__PVT__wspawn_state_stall)) + & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__real_wspawn)) + | (1U < (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one.__PVT__wspawn_state_stall)))) + << 1U)); + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall + = ((0xfbU & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall)) + | (((((0U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__VX_Context_one.__PVT__clone_state_stall)) + | (1U != (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__VX_Context_one.__PVT__clone_state_stall))) + & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__real_isclone)) + | (((0U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__VX_Context_one.__PVT__wspawn_state_stall)) + & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__real_wspawn)) + | (1U < (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__VX_Context_one.__PVT__wspawn_state_stall)))) + << 2U)); + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall + = ((0xf7U & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall)) + | (((((0U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__VX_Context_one.__PVT__clone_state_stall)) + | (1U != (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__VX_Context_one.__PVT__clone_state_stall))) + & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__real_isclone)) + | (((0U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__VX_Context_one.__PVT__wspawn_state_stall)) + & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__real_wspawn)) + | (1U < (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__VX_Context_one.__PVT__wspawn_state_stall)))) + << 3U)); + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall + = ((0xefU & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall)) + | (((((0U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__VX_Context_one.__PVT__clone_state_stall)) + | (1U != (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__VX_Context_one.__PVT__clone_state_stall))) + & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__real_isclone)) + | (((0U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__VX_Context_one.__PVT__wspawn_state_stall)) + & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__real_wspawn)) + | (1U < (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__VX_Context_one.__PVT__wspawn_state_stall)))) + << 4U)); + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall + = ((0xdfU & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall)) + | (((((0U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__VX_Context_one.__PVT__clone_state_stall)) + | (1U != (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__VX_Context_one.__PVT__clone_state_stall))) + & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__real_isclone)) + | (((0U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__VX_Context_one.__PVT__wspawn_state_stall)) + & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__real_wspawn)) + | (1U < (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__VX_Context_one.__PVT__wspawn_state_stall)))) + << 5U)); + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall + = ((0xbfU & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall)) + | (((((0U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__VX_Context_one.__PVT__clone_state_stall)) + | (1U != (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__VX_Context_one.__PVT__clone_state_stall))) + & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__real_isclone)) + | (((0U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__VX_Context_one.__PVT__wspawn_state_stall)) + & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__real_wspawn)) + | (1U < (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__VX_Context_one.__PVT__wspawn_state_stall)))) + << 6U)); + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall + = ((0x7fU & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall)) + | (((((0U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one.__PVT__clone_state_stall)) + | (1U != (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one.__PVT__clone_state_stall))) + & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__real_isclone)) + | (((0U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one.__PVT__wspawn_state_stall)) + & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__real_wspawn)) + | (1U < (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one.__PVT__wspawn_state_stall)))) + << 7U)); + vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_pc[0U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__VX_Warp__DOT__temp_PC; + vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_pc[1U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__temp_PC; + vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_pc[2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__temp_PC; + vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_pc[3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__temp_PC; + vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_pc[4U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__temp_PC; + vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_pc[5U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__temp_PC; + vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_pc[6U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__temp_PC; + vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_pc[7U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__temp_PC; + vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[0U] + = vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__0__KET____DOT__vx_alu__out_alu_result; + vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[1U] + = vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__1__KET____DOT__vx_alu__out_alu_result; + vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[2U] + = vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__2__KET____DOT__vx_alu__out_alu_result; + vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[3U] + = vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__3__KET____DOT__vx_alu__out_alu_result; + vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd + = (((((((0x1fU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 9U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x17U))) == + (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xcU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x14U)))) + & (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 9U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x17U))))) + & (0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U))))) + & ((0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]) + == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd))); + vlTOPp->Vortex__DOT__forwarding_fwd_stall = ((((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd) + | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd)) + & (2U + == (IData)(vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.wb))) + | (((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd) + | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd)) + & (2U + == + (3U + & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + << 0xbU) + | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] + >> 0x15U)))))); + vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd + = (((((((0x1fU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 4U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x1cU))) == + (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xcU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x14U)))) + & (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 4U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x1cU))))) + & (0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U))))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd))) + & ((0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]) + == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))); + // ALWAYS at VX_decode.v:271 + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall + = (1U & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall)); + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall + = (1U & ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall) + | ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall) + >> 1U))); + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall + = (1U & ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall) + | ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall) + >> 2U))); + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall + = (1U & ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall) + | ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall) + >> 3U))); + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall + = (1U & ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall) + | ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall) + >> 4U))); + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall + = (1U & ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall) + | ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall) + >> 5U))); + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall + = (1U & ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall) + | ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall) + >> 6U))); + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall + = (1U & ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall) + | ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall) + >> 7U))); + // ALWAYS at VX_fetch.v:177 if ((0U == (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num))) { vlTOPp->Vortex__DOT__vx_fetch__DOT__out_PC_var = vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_pc @@ -4779,2132 +2324,2128 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) { = vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_pc [7U]; } - vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_alu_result[0U] - = vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__0__KET____DOT__vx_alu__out_alu_result; - vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_alu_result[1U] - = vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__1__KET____DOT__vx_alu__out_alu_result; - vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_alu_result[2U] - = vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__2__KET____DOT__vx_alu__out_alu_result; - vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_alu_result[3U] - = vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__3__KET____DOT__vx_alu__out_alu_result; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_write_data[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_write_data - [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_write_data[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_write_data - [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_write_data[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_write_data - [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_write_data[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_write_data - [0U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_write_data[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_write_data - [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_write_data[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_write_data - [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_write_data[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_write_data - [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_write_data[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_write_data - [0U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_write_data[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_write_data - [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_write_data[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_write_data - [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_write_data[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_write_data - [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_write_data[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_write_data - [0U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_write_data[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_write_data - [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_write_data[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_write_data - [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_write_data[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_write_data - [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_write_data[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_write_data - [0U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_write_data[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_write_data - [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_write_data[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_write_data - [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_write_data[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_write_data - [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_write_data[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_write_data - [0U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_write_data[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_write_data - [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_write_data[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_write_data - [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_write_data[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_write_data - [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_write_data[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_write_data - [0U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_write_data[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_write_data - [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_write_data[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_write_data - [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_write_data[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_write_data - [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_write_data[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_write_data - [0U]; - vlTOPp->icache_request_pc_address = vlTOPp->Vortex__DOT__vx_fetch__DOT__out_PC_var; - vlTOPp->Vortex__DOT__execute_alu_result[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_alu_result - [3U]; - vlTOPp->Vortex__DOT__execute_alu_result[2U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_alu_result - [2U]; - vlTOPp->Vortex__DOT__execute_alu_result[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_alu_result - [1U]; - vlTOPp->Vortex__DOT__execute_alu_result[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_alu_result - [0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_alu_result[3U] - = vlTOPp->Vortex__DOT__execute_alu_result[3U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_alu_result[2U] - = vlTOPp->Vortex__DOT__execute_alu_result[2U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_alu_result[1U] - = vlTOPp->Vortex__DOT__execute_alu_result[1U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_alu_result[0U] - = vlTOPp->Vortex__DOT__execute_alu_result[0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result[3U] - = vlTOPp->Vortex__DOT__execute_alu_result[3U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result[2U] - = vlTOPp->Vortex__DOT__execute_alu_result[2U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result[1U] - = vlTOPp->Vortex__DOT__execute_alu_result[1U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result[0U] - = vlTOPp->Vortex__DOT__execute_alu_result[0U]; - vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data[3U] - = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd) - ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next - [3U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result - [3U]) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd) - ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next - [3U] : ((2U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data - [3U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result - [3U])) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd) - ? ((3U - == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - ? - vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next - [3U] - : - ((2U - == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - ? - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data - [3U] - : - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result - [3U])) - : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result - [3U]))); - vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data[2U] - = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd) - ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next - [2U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result - [2U]) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd) - ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next - [2U] : ((2U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data - [2U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result - [2U])) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd) - ? ((3U - == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - ? - vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next - [2U] - : - ((2U - == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - ? - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data - [2U] - : - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result - [2U])) - : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result - [2U]))); - vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data[1U] - = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd) - ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next - [1U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result - [1U]) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd) - ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next - [1U] : ((2U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data - [1U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result - [1U])) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd) - ? ((3U - == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - ? - vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next - [1U] - : - ((2U - == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - ? - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data - [1U] - : - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result - [1U])) - : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result - [1U]))); + __Vtemp19[0xdU] = ((0xfff80000U & (((0xdU == (0x1fU + & ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[6U] + << 0x17U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U] + >> 9U)))) + ? ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xeU] + << 3U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + >> 0x1dU)) + : ((0xeU == + (0x1fU + & ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[6U] + << 0x17U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U] + >> 9U)))) + ? (vlTOPp->Vortex__DOT__csr_decode_csr_data + | ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xeU] + << 3U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + >> 0x1dU))) + : ((0xfU + == + (0x1fU + & ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[6U] + << 0x17U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U] + >> 9U)))) + ? + (vlTOPp->Vortex__DOT__csr_decode_csr_data + & ((IData)(0xffffffffU) + - + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xeU] + << 3U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + >> 0x1dU)))) + : 0xdeadbeefU))) + << 0x13U)) | + ((0x40000U & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[2U] + << 0xaU)) | (0x3ffffU + & ((((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] + >> 0xeU)) + + + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[1U] + >> 8U))) + >> 0xeU)))); + __Vtemp19[0xeU] = (0x7ffffU & (((0xdU == (0x1fU + & ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[6U] + << 0x17U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U] + >> 9U)))) + ? ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xeU] + << 3U) | ( + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + >> 0x1dU)) + : ((0xeU == (0x1fU + & ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[6U] + << 0x17U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U] + >> 9U)))) + ? (vlTOPp->Vortex__DOT__csr_decode_csr_data + | ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xeU] + << 3U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + >> 0x1dU))) + : ((0xfU == + (0x1fU + & ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[6U] + << 0x17U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U] + >> 9U)))) + ? (vlTOPp->Vortex__DOT__csr_decode_csr_data + & ((IData)(0xffffffffU) + - + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xeU] + << 3U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + >> 0x1dU)))) + : 0xdeadbeefU))) + >> 0xdU)); + __Vtemp28[7U] = ((0xffff0000U & ((0x80000000U & + (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[4U] + << 0x1cU)) | + ((0x70000000U + & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[4U] + << 0x1cU)) + | ((0xf800000U + & ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xeU] + << 0x1fU) + | (0x7f800000U + & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + >> 1U)))) + | (((IData)(vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.wb) + << 0x15U) + | (0x1f0000U + & ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xeU] + << 0x1dU) + | (0x1fff0000U + & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + >> 3U))))))))) + | ((0xf800U & ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xeU] + << 0x1dU) | (0x1ffff800U + & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + >> 3U)))) + | (0x7ffU & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] + >> 3U)))); + __Vtemp28[8U] = ((0xffffU & ((0xfffcU & (vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[0U] + << 2U)) + | ((3U & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[4U] + >> 4U)) + | (0xffffU & ((IData)(vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.wb) + >> 0xbU))))) + | (0xffff0000U & (vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[0U] + << 2U))); + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0U] + = ((0xfffff800U & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[4U] + << 5U)) | ((0x700U & ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[4U] + << 0xbU) + | (0x700U + & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[3U] + >> 0x15U)))) + | (0xffU & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0U]))); + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[1U] + = ((0x7ffU & ((0x7e0U & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U] + << 5U)) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[4U] + >> 0x1bU))) + | (0xfffff800U & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[2U] + << 2U))); + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[2U] + = ((0x7ffU & ((0x7fcU & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[3U] + << 2U)) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[2U] + >> 0x1eU))) + | (0xfffff800U & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0U] + << 3U))); + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[3U] + = ((0x7ffU & ((0x7f8U & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[1U] + << 3U)) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0U] + >> 0x1dU))) + | (0xfffff800U & ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[6U] + << 0x1dU) | (0x1ffff800U + & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U] + >> 3U))))); + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[4U] + = ((0x7ffU & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[6U] + >> 3U)) | (0xfffff800U & ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[7U] + << 0x1dU) + | (0x1ffff800U + & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[6U] + >> 3U))))); + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[5U] + = ((0x7ffU & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[7U] + >> 3U)) | (0xfffff800U & ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[8U] + << 0x1dU) + | (0x1ffff800U + & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[7U] + >> 3U))))); + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[6U] + = ((0x7ffU & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[8U] + >> 3U)) | (0xfffff800U & ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] + << 0x1dU) + | (0x1ffff800U + & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[8U] + >> 3U))))); + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[7U] + = __Vtemp28[7U]; + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[8U] + = __Vtemp28[8U]; + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[9U] + = ((0xffffU & ((3U & (vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[0U] + >> 0x1eU)) | (0xfffcU + & (vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[1U] + << 2U)))) + | (0xffff0000U & (vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[1U] + << 2U))); + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0xaU] + = ((0xffffU & ((3U & (vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[1U] + >> 0x1eU)) | (0xfffcU + & (vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[2U] + << 2U)))) + | (0xffff0000U & (vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[2U] + << 2U))); + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0xbU] + = ((0xffffU & ((3U & (vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[2U] + >> 0x1eU)) | (0xfffcU + & (vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[3U] + << 2U)))) + | (0xffff0000U & (vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[3U] + << 2U))); + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0xcU] + = ((0xffffU & ((3U & (vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[3U] + >> 0x1eU)) | (0xfffcU + & (vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data[0U] + << 2U)))) + | (0xffff0000U & (vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data[0U] + << 2U))); + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0xdU] + = ((0xffffU & ((3U & (vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data[0U] + >> 0x1eU)) | (0xfffcU + & (vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data[1U] + << 2U)))) + | (0xffff0000U & (vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data[1U] + << 2U))); + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0xeU] + = ((0xffffU & ((3U & (vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data[1U] + >> 0x1eU)) | (0xfffcU + & (vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data[2U] + << 2U)))) + | (0xffff0000U & (vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data[2U] + << 2U))); + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0xfU] + = ((0xffffU & ((3U & (vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data[2U] + >> 0x1eU)) | (0xfffcU + & (vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data[3U] + << 2U)))) + | (0xffff0000U & (vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data[3U] + << 2U))); + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0x10U] + = ((0xffffU & ((3U & (vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data[3U] + >> 0x1eU)) | (0xfffcU + & (vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_a_reg_data[0U] + << 2U)))) + | (0xffff0000U & (vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_a_reg_data[0U] + << 2U))); + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0x11U] + = ((0xffffU & ((3U & (vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_a_reg_data[0U] + >> 0x1eU)) | (0xfffcU + & (vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_a_reg_data[1U] + << 2U)))) + | (0xffff0000U & (vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_a_reg_data[1U] + << 2U))); + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0x12U] + = ((0xffffU & ((3U & (vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_a_reg_data[1U] + >> 0x1eU)) | (0xfffcU + & (vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_a_reg_data[2U] + << 2U)))) + | (0xffff0000U & (vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_a_reg_data[2U] + << 2U))); + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0x13U] + = ((0xffffU & ((3U & (vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_a_reg_data[2U] + >> 0x1eU)) | (0xfffcU + & (vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_a_reg_data[3U] + << 2U)))) + | (0xffff0000U & (vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_a_reg_data[3U] + << 2U))); + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0x14U] + = ((0xffffU & ((3U & (vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_a_reg_data[3U] + >> 0x1eU)) | (0xfffcU + & ((((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] + >> 0xeU)) + + ( + (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[1U] + >> 8U))) + << 2U)))) + | (0xffff0000U & (__Vtemp19[0xdU] << 0x10U))); + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0x15U] + = ((0xffffU & (__Vtemp19[0xdU] >> 0x10U)) | + (0xffff0000U & (__Vtemp19[0xeU] << 0x10U))); + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0x16U] + = (0xffffU & ((0xfff0U & ((0xffc0U & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xfU] + << 6U)) + | (0x30U & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xeU] + >> 0x1aU)))) + | ((8U & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xeU] + >> 0x1aU)) | (__Vtemp19[0xeU] + >> 0x10U)))); + vlTOPp->Vortex__DOT__forwarding_src1_fwd = (((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd) + | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd)) + | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd)); + __Vtemp43[0U] = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd) + ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + << 0xbU) | + (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] + >> 0x15U)))) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[0U] + : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + << 0xbU) + | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] + >> 0x15U)))) + ? vlSymsp->TOP__Vortex__DOT__VX_mem_wb.mem_result[0U] + : ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] + << 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + >> 2U)))) + : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd) + ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) + | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[0U] + : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) + | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + ? ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 7U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x19U)) + : ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[6U] + << 7U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[5U] + >> 0x19U)))) + : vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[0U])); + __Vtemp43[1U] = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd) + ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + << 0xbU) | + (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] + >> 0x15U)))) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[1U] + : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + << 0xbU) + | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] + >> 0x15U)))) + ? vlSymsp->TOP__Vortex__DOT__VX_mem_wb.mem_result[1U] + : ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xaU] + << 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] + >> 2U)))) + : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd) + ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) + | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[1U] + : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) + | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + ? ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[3U] + << 7U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + >> 0x19U)) + : ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[7U] + << 7U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[6U] + >> 0x19U)))) + : vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[1U])); + __Vtemp43[2U] = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd) + ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + << 0xbU) | + (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] + >> 0x15U)))) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[2U] + : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + << 0xbU) + | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] + >> 0x15U)))) + ? vlSymsp->TOP__Vortex__DOT__VX_mem_wb.mem_result[2U] + : ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xbU] + << 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xaU] + >> 2U)))) + : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd) + ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) + | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[2U] + : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) + | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + ? ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[4U] + << 7U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[3U] + >> 0x19U)) + : ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[8U] + << 7U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[7U] + >> 0x19U)))) + : vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[2U])); + __Vtemp43[3U] = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd) + ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + << 0xbU) | + (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] + >> 0x15U)))) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[3U] + : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + << 0xbU) + | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] + >> 0x15U)))) + ? vlSymsp->TOP__Vortex__DOT__VX_mem_wb.mem_result[3U] + : ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xcU] + << 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xbU] + >> 2U)))) + : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd) + ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) + | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[3U] + : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) + | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + ? ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[5U] + << 7U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[4U] + >> 0x19U)) + : ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[9U] + << 7U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[8U] + >> 0x19U)))) + : vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[3U])); vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data[0U] = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd) - ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next - [0U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result - [0U]) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd) - ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next - [0U] : ((2U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data - [0U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result - [0U])) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd) - ? ((3U - == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - ? - vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next - [0U] - : - ((2U - == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - ? - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data - [0U] - : - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result - [0U])) - : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result - [0U]))); - vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data[3U] - = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd) - ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next - [3U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result - [3U]) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd) - ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next - [3U] : ((2U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data - [3U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result - [3U])) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd) - ? ((3U - == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - ? - vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next - [3U] - : - ((2U - == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - ? - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data - [3U] - : - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result - [3U])) - : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result - [3U]))); - vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data[2U] - = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd) - ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next - [2U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result - [2U]) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd) - ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next - [2U] : ((2U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data - [2U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result - [2U])) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd) - ? ((3U - == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - ? - vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next - [2U] - : - ((2U - == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - ? - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data - [2U] - : - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result - [2U])) - : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result - [2U]))); - vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data[1U] - = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd) - ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next - [1U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result - [1U]) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd) - ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next - [1U] : ((2U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data - [1U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result - [1U])) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd) - ? ((3U - == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - ? - vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next - [1U] - : - ((2U - == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - ? - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data - [1U] - : - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result - [1U])) - : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result - [1U]))); + ? ((3U == (IData)(vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.wb)) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[0U] + : vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[0U]) + : __Vtemp43[0U]); + vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data[1U] + = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd) + ? ((3U == (IData)(vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.wb)) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[1U] + : vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[1U]) + : __Vtemp43[1U]); + vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data[2U] + = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd) + ? ((3U == (IData)(vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.wb)) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[2U] + : vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[2U]) + : __Vtemp43[2U]); + vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data[3U] + = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd) + ? ((3U == (IData)(vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.wb)) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[3U] + : vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[3U]) + : __Vtemp43[3U]); + vlTOPp->Vortex__DOT__forwarding_src2_fwd = (((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd) + | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd)) + | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd)); + __Vtemp59[0U] = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd) + ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + << 0xbU) | + (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] + >> 0x15U)))) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[0U] + : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + << 0xbU) + | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] + >> 0x15U)))) + ? vlSymsp->TOP__Vortex__DOT__VX_mem_wb.mem_result[0U] + : ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] + << 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + >> 2U)))) + : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd) + ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) + | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[0U] + : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) + | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + ? ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 7U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x19U)) + : ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[6U] + << 7U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[5U] + >> 0x19U)))) + : vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[0U])); + __Vtemp59[1U] = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd) + ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + << 0xbU) | + (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] + >> 0x15U)))) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[1U] + : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + << 0xbU) + | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] + >> 0x15U)))) + ? vlSymsp->TOP__Vortex__DOT__VX_mem_wb.mem_result[1U] + : ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xaU] + << 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] + >> 2U)))) + : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd) + ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) + | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[1U] + : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) + | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + ? ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[3U] + << 7U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + >> 0x19U)) + : ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[7U] + << 7U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[6U] + >> 0x19U)))) + : vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[1U])); + __Vtemp59[2U] = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd) + ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + << 0xbU) | + (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] + >> 0x15U)))) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[2U] + : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + << 0xbU) + | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] + >> 0x15U)))) + ? vlSymsp->TOP__Vortex__DOT__VX_mem_wb.mem_result[2U] + : ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xbU] + << 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xaU] + >> 2U)))) + : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd) + ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) + | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[2U] + : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) + | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + ? ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[4U] + << 7U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[3U] + >> 0x19U)) + : ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[8U] + << 7U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[7U] + >> 0x19U)))) + : vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[2U])); + __Vtemp59[3U] = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd) + ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + << 0xbU) | + (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] + >> 0x15U)))) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[3U] + : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + << 0xbU) + | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] + >> 0x15U)))) + ? vlSymsp->TOP__Vortex__DOT__VX_mem_wb.mem_result[3U] + : ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xcU] + << 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xbU] + >> 2U)))) + : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd) + ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) + | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[3U] + : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) + | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + ? ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[5U] + << 7U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[4U] + >> 0x19U)) + : ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[9U] + << 7U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[8U] + >> 0x19U)))) + : vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[3U])); vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data[0U] = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd) - ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next - [0U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result - [0U]) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd) - ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next - [0U] : ((2U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data - [0U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result - [0U])) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd) - ? ((3U - == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - ? - vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next - [0U] - : - ((2U - == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - ? - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data - [0U] - : - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result - [0U])) - : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result - [0U]))); - vlTOPp->Vortex__DOT__forwarding_src1_fwd_data[3U] - = vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data - [3U]; - vlTOPp->Vortex__DOT__forwarding_src1_fwd_data[2U] - = vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data - [2U]; - vlTOPp->Vortex__DOT__forwarding_src1_fwd_data[1U] - = vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data - [1U]; - vlTOPp->Vortex__DOT__forwarding_src1_fwd_data[0U] - = vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data - [0U]; - vlTOPp->Vortex__DOT__forwarding_src2_fwd_data[3U] - = vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data - [3U]; - vlTOPp->Vortex__DOT__forwarding_src2_fwd_data[2U] - = vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data - [2U]; - vlTOPp->Vortex__DOT__forwarding_src2_fwd_data[1U] - = vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data - [1U]; - vlTOPp->Vortex__DOT__forwarding_src2_fwd_data[0U] - = vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data - [0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data[3U] - = vlTOPp->Vortex__DOT__forwarding_src1_fwd_data - [3U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data[2U] - = vlTOPp->Vortex__DOT__forwarding_src1_fwd_data - [2U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data[1U] - = vlTOPp->Vortex__DOT__forwarding_src1_fwd_data - [1U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data[0U] - = vlTOPp->Vortex__DOT__forwarding_src1_fwd_data - [0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data[3U] - = vlTOPp->Vortex__DOT__forwarding_src2_fwd_data - [3U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data[2U] - = vlTOPp->Vortex__DOT__forwarding_src2_fwd_data - [2U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data[1U] - = vlTOPp->Vortex__DOT__forwarding_src2_fwd_data - [1U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data[0U] - = vlTOPp->Vortex__DOT__forwarding_src2_fwd_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_src1_fwd_data[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_src1_fwd_data[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_src1_fwd_data[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_src1_fwd_data[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_src1_fwd_data[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_src1_fwd_data[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_src1_fwd_data[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_src1_fwd_data[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_src1_fwd_data[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_src1_fwd_data[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_src1_fwd_data[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_src1_fwd_data[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_src1_fwd_data[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_src1_fwd_data[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_src1_fwd_data[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_src1_fwd_data[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_src1_fwd_data[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_src1_fwd_data[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_src1_fwd_data[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_src1_fwd_data[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_src1_fwd_data[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_src1_fwd_data[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_src1_fwd_data[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_src1_fwd_data[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_src1_fwd_data[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_src1_fwd_data[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_src1_fwd_data[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_src1_fwd_data[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_src1_fwd_data[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_src1_fwd_data[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_src1_fwd_data[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_src1_fwd_data[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_src2_fwd_data[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_src2_fwd_data[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_src2_fwd_data[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_src2_fwd_data[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_src2_fwd_data[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_src2_fwd_data[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_src2_fwd_data[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_src2_fwd_data[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_src2_fwd_data[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_src2_fwd_data[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_src2_fwd_data[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_src2_fwd_data[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_src2_fwd_data[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_src2_fwd_data[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_src2_fwd_data[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_src2_fwd_data[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_src2_fwd_data[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_src2_fwd_data[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_src2_fwd_data[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_src2_fwd_data[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_src2_fwd_data[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_src2_fwd_data[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_src2_fwd_data[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_src2_fwd_data[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_src2_fwd_data[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_src2_fwd_data[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_src2_fwd_data[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_src2_fwd_data[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_src2_fwd_data[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_src2_fwd_data[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_src2_fwd_data[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_src2_fwd_data[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data - [0U]; + ? ((3U == (IData)(vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.wb)) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[0U] + : vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[0U]) + : __Vtemp59[0U]); + vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data[1U] + = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd) + ? ((3U == (IData)(vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.wb)) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[1U] + : vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[1U]) + : __Vtemp59[1U]); + vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data[2U] + = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd) + ? ((3U == (IData)(vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.wb)) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[2U] + : vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[2U]) + : __Vtemp59[2U]); + vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data[3U] + = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd) + ? ((3U == (IData)(vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.wb)) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[3U] + : vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[3U]) + : __Vtemp59[3U]); + vlTOPp->Vortex__DOT__vx_fetch__DOT__add_warp = + (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_wspawn) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_ebreak))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall))); + vlTOPp->Vortex__DOT__vx_fetch__DOT__remove_warp + = (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_ebreak) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_wspawn))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall))); + vlTOPp->Vortex__DOT__vx_fetch__DOT__stall = ((((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall) + | (IData)(vlTOPp->Vortex__DOT__decode_branch_stall)) + | (IData)(vlTOPp->Vortex__DOT__forwarding_fwd_stall)) + | (IData)(vlTOPp->Vortex__DOT__execute_branch_stall)); + vlTOPp->icache_request_pc_address = vlTOPp->Vortex__DOT__vx_fetch__DOT__out_PC_var; vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_a_reg_data[0U] - = ((0x6fU == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) - ? vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__curr_PC - : ((IData)(vlTOPp->Vortex__DOT__forwarding_src1_fwd) - ? vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_src1_fwd_data - [0U] : vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd1_register - [0U])); + = ((0x6fU == (0x7fU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) + ? ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x18U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 8U)) : ((IData)(vlTOPp->Vortex__DOT__forwarding_src1_fwd) + ? vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data[0U] + : vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd1_register[0U])); vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_a_reg_data[1U] - = ((0x6fU == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) - ? vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__curr_PC - : ((IData)(vlTOPp->Vortex__DOT__forwarding_src1_fwd) - ? vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_src1_fwd_data - [1U] : vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd1_register - [1U])); + = ((0x6fU == (0x7fU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) + ? ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x18U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 8U)) : ((IData)(vlTOPp->Vortex__DOT__forwarding_src1_fwd) + ? vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data[1U] + : vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd1_register[1U])); vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_a_reg_data[2U] - = ((0x6fU == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) - ? vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__curr_PC - : ((IData)(vlTOPp->Vortex__DOT__forwarding_src1_fwd) - ? vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_src1_fwd_data - [2U] : vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd1_register - [2U])); + = ((0x6fU == (0x7fU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) + ? ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x18U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 8U)) : ((IData)(vlTOPp->Vortex__DOT__forwarding_src1_fwd) + ? vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data[2U] + : vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd1_register[2U])); vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_a_reg_data[3U] - = ((0x6fU == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) - ? vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__curr_PC - : ((IData)(vlTOPp->Vortex__DOT__forwarding_src1_fwd) - ? vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_src1_fwd_data - [3U] : vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd1_register - [3U])); - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_src1_fwd_data[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_src1_fwd_data - [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_src1_fwd_data[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_src1_fwd_data - [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_src1_fwd_data[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_src1_fwd_data - [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_src1_fwd_data[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_src1_fwd_data - [0U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_src1_fwd_data[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_src1_fwd_data - [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_src1_fwd_data[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_src1_fwd_data - [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_src1_fwd_data[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_src1_fwd_data - [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_src1_fwd_data[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_src1_fwd_data - [0U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_src1_fwd_data[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_src1_fwd_data - [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_src1_fwd_data[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_src1_fwd_data - [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_src1_fwd_data[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_src1_fwd_data - [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_src1_fwd_data[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_src1_fwd_data - [0U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_src1_fwd_data[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_src1_fwd_data - [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_src1_fwd_data[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_src1_fwd_data - [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_src1_fwd_data[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_src1_fwd_data - [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_src1_fwd_data[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_src1_fwd_data - [0U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_src1_fwd_data[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_src1_fwd_data - [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_src1_fwd_data[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_src1_fwd_data - [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_src1_fwd_data[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_src1_fwd_data - [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_src1_fwd_data[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_src1_fwd_data - [0U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_src1_fwd_data[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_src1_fwd_data - [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_src1_fwd_data[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_src1_fwd_data - [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_src1_fwd_data[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_src1_fwd_data - [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_src1_fwd_data[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_src1_fwd_data - [0U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_src1_fwd_data[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_src1_fwd_data - [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_src1_fwd_data[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_src1_fwd_data - [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_src1_fwd_data[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_src1_fwd_data - [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_src1_fwd_data[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_src1_fwd_data - [0U]; + = ((0x6fU == (0x7fU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) + ? ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x18U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 8U)) : ((IData)(vlTOPp->Vortex__DOT__forwarding_src1_fwd) + ? vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data[3U] + : vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd1_register[3U])); vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_b_reg_data[0U] = ((IData)(vlTOPp->Vortex__DOT__forwarding_src2_fwd) - ? vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_src2_fwd_data - [0U] : vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd2_register - [0U]); + ? vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data[0U] + : vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd2_register[0U]); vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_b_reg_data[1U] = ((IData)(vlTOPp->Vortex__DOT__forwarding_src2_fwd) - ? vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_src2_fwd_data - [1U] : vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd2_register - [1U]); + ? vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data[1U] + : vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd2_register[1U]); vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_b_reg_data[2U] = ((IData)(vlTOPp->Vortex__DOT__forwarding_src2_fwd) - ? vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_src2_fwd_data - [2U] : vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd2_register - [2U]); + ? vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data[2U] + : vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd2_register[2U]); vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_b_reg_data[3U] = ((IData)(vlTOPp->Vortex__DOT__forwarding_src2_fwd) - ? vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_src2_fwd_data - [3U] : vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd2_register - [3U]); - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_src2_fwd_data[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_src2_fwd_data - [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_src2_fwd_data[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_src2_fwd_data - [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_src2_fwd_data[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_src2_fwd_data - [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_src2_fwd_data[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_src2_fwd_data - [0U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_src2_fwd_data[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_src2_fwd_data - [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_src2_fwd_data[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_src2_fwd_data - [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_src2_fwd_data[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_src2_fwd_data - [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_src2_fwd_data[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_src2_fwd_data - [0U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_src2_fwd_data[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_src2_fwd_data - [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_src2_fwd_data[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_src2_fwd_data - [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_src2_fwd_data[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_src2_fwd_data - [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_src2_fwd_data[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_src2_fwd_data - [0U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_src2_fwd_data[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_src2_fwd_data - [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_src2_fwd_data[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_src2_fwd_data - [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_src2_fwd_data[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_src2_fwd_data - [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_src2_fwd_data[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_src2_fwd_data - [0U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_src2_fwd_data[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_src2_fwd_data - [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_src2_fwd_data[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_src2_fwd_data - [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_src2_fwd_data[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_src2_fwd_data - [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_src2_fwd_data[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_src2_fwd_data - [0U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_src2_fwd_data[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_src2_fwd_data - [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_src2_fwd_data[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_src2_fwd_data - [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_src2_fwd_data[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_src2_fwd_data - [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_src2_fwd_data[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_src2_fwd_data - [0U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_src2_fwd_data[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_src2_fwd_data - [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_src2_fwd_data[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_src2_fwd_data - [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_src2_fwd_data[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_src2_fwd_data - [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_src2_fwd_data[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_src2_fwd_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0U][3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_a_reg_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0U][2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_a_reg_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0U][1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_a_reg_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0U][0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_a_reg_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0U][3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_b_reg_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0U][2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_b_reg_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0U][1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_b_reg_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0U][0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_b_reg_data - [0U]; + ? vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data[3U] + : vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd2_register[3U]); + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__warp_zero_stall + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__stall) + | (0U != (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num))); + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__warp_zero_stall + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__stall) + | (1U != (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num))); + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__warp_zero_stall + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__stall) + | (2U != (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num))); + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__warp_zero_stall + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__stall) + | (3U != (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num))); + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__warp_zero_stall + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__stall) + | (4U != (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num))); + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__warp_zero_stall + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__stall) + | (5U != (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num))); + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__warp_zero_stall + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__stall) + | (6U != (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num))); + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__warp_zero_stall + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__stall) + | (7U != (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num))); + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0U] + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_a_reg_data[0U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[1U] + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_a_reg_data[1U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_a_reg_data[2U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[3U] + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_a_reg_data[3U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0U] + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_b_reg_data[0U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[1U] + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_b_reg_data[1U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_b_reg_data[2U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[3U] + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_b_reg_data[3U]; } -VL_INLINE_OPT void VVortex::_settle__TOP__3(VVortex__Syms* __restrict vlSymsp) { +void VVortex::_settle__TOP__3(VVortex__Syms* __restrict vlSymsp) { VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex::_settle__TOP__3\n"); ); VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; + // Variables + // Begin mtask footprint all: + VL_SIGW(__Vtemp78,319,0,10); // Body - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__1__KET____DOT__VX_Context_one__out_a_reg_data[3U] - = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.out_a_reg_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__1__KET____DOT__VX_Context_one__out_a_reg_data[2U] - = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.out_a_reg_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__1__KET____DOT__VX_Context_one__out_a_reg_data[1U] - = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.out_a_reg_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__1__KET____DOT__VX_Context_one__out_a_reg_data[0U] - = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.out_a_reg_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__1__KET____DOT__VX_Context_one__out_b_reg_data[3U] - = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.out_b_reg_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__1__KET____DOT__VX_Context_one__out_b_reg_data[2U] - = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.out_b_reg_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__1__KET____DOT__VX_Context_one__out_b_reg_data[1U] - = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.out_b_reg_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__1__KET____DOT__VX_Context_one__out_b_reg_data[0U] - = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.out_b_reg_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__2__KET____DOT__VX_Context_one__out_a_reg_data[3U] - = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.out_a_reg_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__2__KET____DOT__VX_Context_one__out_a_reg_data[2U] - = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.out_a_reg_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__2__KET____DOT__VX_Context_one__out_a_reg_data[1U] - = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.out_a_reg_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__2__KET____DOT__VX_Context_one__out_a_reg_data[0U] - = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.out_a_reg_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__2__KET____DOT__VX_Context_one__out_b_reg_data[3U] - = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.out_b_reg_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__2__KET____DOT__VX_Context_one__out_b_reg_data[2U] - = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.out_b_reg_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__2__KET____DOT__VX_Context_one__out_b_reg_data[1U] - = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.out_b_reg_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__2__KET____DOT__VX_Context_one__out_b_reg_data[0U] - = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.out_b_reg_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__3__KET____DOT__VX_Context_one__out_a_reg_data[3U] - = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.out_a_reg_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__3__KET____DOT__VX_Context_one__out_a_reg_data[2U] - = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.out_a_reg_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__3__KET____DOT__VX_Context_one__out_a_reg_data[1U] - = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.out_a_reg_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__3__KET____DOT__VX_Context_one__out_a_reg_data[0U] - = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.out_a_reg_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__3__KET____DOT__VX_Context_one__out_b_reg_data[3U] - = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.out_b_reg_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__3__KET____DOT__VX_Context_one__out_b_reg_data[2U] - = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.out_b_reg_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__3__KET____DOT__VX_Context_one__out_b_reg_data[1U] - = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.out_b_reg_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__3__KET____DOT__VX_Context_one__out_b_reg_data[0U] - = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.out_b_reg_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__4__KET____DOT__VX_Context_one__out_a_reg_data[3U] - = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.out_a_reg_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__4__KET____DOT__VX_Context_one__out_a_reg_data[2U] - = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.out_a_reg_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__4__KET____DOT__VX_Context_one__out_a_reg_data[1U] - = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.out_a_reg_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__4__KET____DOT__VX_Context_one__out_a_reg_data[0U] - = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.out_a_reg_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__4__KET____DOT__VX_Context_one__out_b_reg_data[3U] - = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.out_b_reg_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__4__KET____DOT__VX_Context_one__out_b_reg_data[2U] - = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.out_b_reg_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__4__KET____DOT__VX_Context_one__out_b_reg_data[1U] - = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.out_b_reg_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__4__KET____DOT__VX_Context_one__out_b_reg_data[0U] - = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.out_b_reg_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__5__KET____DOT__VX_Context_one__out_a_reg_data[3U] - = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.out_a_reg_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__5__KET____DOT__VX_Context_one__out_a_reg_data[2U] - = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.out_a_reg_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__5__KET____DOT__VX_Context_one__out_a_reg_data[1U] - = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.out_a_reg_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__5__KET____DOT__VX_Context_one__out_a_reg_data[0U] - = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.out_a_reg_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__5__KET____DOT__VX_Context_one__out_b_reg_data[3U] - = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.out_b_reg_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__5__KET____DOT__VX_Context_one__out_b_reg_data[2U] - = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.out_b_reg_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__5__KET____DOT__VX_Context_one__out_b_reg_data[1U] - = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.out_b_reg_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__5__KET____DOT__VX_Context_one__out_b_reg_data[0U] - = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.out_b_reg_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__6__KET____DOT__VX_Context_one__out_a_reg_data[3U] - = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.out_a_reg_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__6__KET____DOT__VX_Context_one__out_a_reg_data[2U] - = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.out_a_reg_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__6__KET____DOT__VX_Context_one__out_a_reg_data[1U] - = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.out_a_reg_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__6__KET____DOT__VX_Context_one__out_a_reg_data[0U] - = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.out_a_reg_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__6__KET____DOT__VX_Context_one__out_b_reg_data[3U] - = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.out_b_reg_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__6__KET____DOT__VX_Context_one__out_b_reg_data[2U] - = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.out_b_reg_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__6__KET____DOT__VX_Context_one__out_b_reg_data[1U] - = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.out_b_reg_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__6__KET____DOT__VX_Context_one__out_b_reg_data[0U] - = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.out_b_reg_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__7__KET____DOT__VX_Context_one__out_a_reg_data[3U] - = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.out_a_reg_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__7__KET____DOT__VX_Context_one__out_a_reg_data[2U] - = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.out_a_reg_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__7__KET____DOT__VX_Context_one__out_a_reg_data[1U] - = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.out_a_reg_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__7__KET____DOT__VX_Context_one__out_a_reg_data[0U] - = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.out_a_reg_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__7__KET____DOT__VX_Context_one__out_b_reg_data[3U] - = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.out_b_reg_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__7__KET____DOT__VX_Context_one__out_b_reg_data[2U] - = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.out_b_reg_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__7__KET____DOT__VX_Context_one__out_b_reg_data[1U] - = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.out_b_reg_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__7__KET____DOT__VX_Context_one__out_b_reg_data[0U] - = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.out_b_reg_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[1U][3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__1__KET____DOT__VX_Context_one__out_a_reg_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[1U][2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__1__KET____DOT__VX_Context_one__out_a_reg_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[1U][1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__1__KET____DOT__VX_Context_one__out_a_reg_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[1U][0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__1__KET____DOT__VX_Context_one__out_a_reg_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[1U][3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__1__KET____DOT__VX_Context_one__out_b_reg_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[1U][2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__1__KET____DOT__VX_Context_one__out_b_reg_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[1U][1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__1__KET____DOT__VX_Context_one__out_b_reg_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[1U][0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__1__KET____DOT__VX_Context_one__out_b_reg_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[2U][3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__2__KET____DOT__VX_Context_one__out_a_reg_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[2U][2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__2__KET____DOT__VX_Context_one__out_a_reg_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[2U][1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__2__KET____DOT__VX_Context_one__out_a_reg_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[2U][0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__2__KET____DOT__VX_Context_one__out_a_reg_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[2U][3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__2__KET____DOT__VX_Context_one__out_b_reg_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[2U][2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__2__KET____DOT__VX_Context_one__out_b_reg_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[2U][1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__2__KET____DOT__VX_Context_one__out_b_reg_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[2U][0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__2__KET____DOT__VX_Context_one__out_b_reg_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[3U][3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__3__KET____DOT__VX_Context_one__out_a_reg_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[3U][2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__3__KET____DOT__VX_Context_one__out_a_reg_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[3U][1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__3__KET____DOT__VX_Context_one__out_a_reg_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[3U][0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__3__KET____DOT__VX_Context_one__out_a_reg_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[3U][3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__3__KET____DOT__VX_Context_one__out_b_reg_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[3U][2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__3__KET____DOT__VX_Context_one__out_b_reg_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[3U][1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__3__KET____DOT__VX_Context_one__out_b_reg_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[3U][0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__3__KET____DOT__VX_Context_one__out_b_reg_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[4U][3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__4__KET____DOT__VX_Context_one__out_a_reg_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[4U][2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__4__KET____DOT__VX_Context_one__out_a_reg_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[4U][1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__4__KET____DOT__VX_Context_one__out_a_reg_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[4U][0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__4__KET____DOT__VX_Context_one__out_a_reg_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[4U][3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__4__KET____DOT__VX_Context_one__out_b_reg_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[4U][2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__4__KET____DOT__VX_Context_one__out_b_reg_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[4U][1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__4__KET____DOT__VX_Context_one__out_b_reg_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[4U][0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__4__KET____DOT__VX_Context_one__out_b_reg_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[5U][3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__5__KET____DOT__VX_Context_one__out_a_reg_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[5U][2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__5__KET____DOT__VX_Context_one__out_a_reg_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[5U][1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__5__KET____DOT__VX_Context_one__out_a_reg_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[5U][0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__5__KET____DOT__VX_Context_one__out_a_reg_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[5U][3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__5__KET____DOT__VX_Context_one__out_b_reg_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[5U][2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__5__KET____DOT__VX_Context_one__out_b_reg_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[5U][1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__5__KET____DOT__VX_Context_one__out_b_reg_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[5U][0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__5__KET____DOT__VX_Context_one__out_b_reg_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[6U][3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__6__KET____DOT__VX_Context_one__out_a_reg_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[6U][2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__6__KET____DOT__VX_Context_one__out_a_reg_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[6U][1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__6__KET____DOT__VX_Context_one__out_a_reg_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[6U][0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__6__KET____DOT__VX_Context_one__out_a_reg_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[6U][3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__6__KET____DOT__VX_Context_one__out_b_reg_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[6U][2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__6__KET____DOT__VX_Context_one__out_b_reg_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[6U][1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__6__KET____DOT__VX_Context_one__out_b_reg_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[6U][0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__6__KET____DOT__VX_Context_one__out_b_reg_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[7U][3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__7__KET____DOT__VX_Context_one__out_a_reg_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[7U][2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__7__KET____DOT__VX_Context_one__out_a_reg_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[7U][1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__7__KET____DOT__VX_Context_one__out_a_reg_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[7U][0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__7__KET____DOT__VX_Context_one__out_a_reg_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[7U][3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__7__KET____DOT__VX_Context_one__out_b_reg_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[7U][2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__7__KET____DOT__VX_Context_one__out_b_reg_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[7U][1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__7__KET____DOT__VX_Context_one__out_b_reg_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[7U][0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__7__KET____DOT__VX_Context_one__out_b_reg_data - [0U]; - // ALWAYS at VX_decode.v:247 - if ((0U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num))) { - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data - [0U][3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data - [0U][2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data - [0U][1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data - [0U][0U]; - } - if ((1U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num))) { - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data - [1U][3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data - [1U][2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data - [1U][1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data - [1U][0U]; - } - if ((2U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num))) { - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data - [2U][3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data - [2U][2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data - [2U][1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data - [2U][0U]; - } - if ((3U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num))) { - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data - [3U][3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data - [3U][2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data - [3U][1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data - [3U][0U]; - } - if ((4U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num))) { - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data - [4U][3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data - [4U][2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data - [4U][1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data - [4U][0U]; - } - if ((5U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num))) { - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data - [5U][3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data - [5U][2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data - [5U][1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data - [5U][0U]; - } - if ((6U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num))) { - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data - [6U][3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data - [6U][2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data - [6U][1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data - [6U][0U]; - } - if ((7U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num))) { - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data - [7U][3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data - [7U][2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data - [7U][1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data - [7U][0U]; - } - // ALWAYS at VX_decode.v:247 - if ((0U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num))) { - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data - [0U][3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data - [0U][2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data - [0U][1U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[4U] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one.out_b_reg_data[0U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[5U] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one.out_b_reg_data[1U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[6U] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one.out_b_reg_data[2U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[7U] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one.out_b_reg_data[3U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[4U] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one.out_a_reg_data[0U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[5U] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one.out_a_reg_data[1U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[6U] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one.out_a_reg_data[2U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[7U] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one.out_a_reg_data[3U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[8U] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__VX_Context_one.out_b_reg_data[0U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[9U] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__VX_Context_one.out_b_reg_data[1U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0xaU] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__VX_Context_one.out_b_reg_data[2U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0xbU] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__VX_Context_one.out_b_reg_data[3U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[8U] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__VX_Context_one.out_a_reg_data[0U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[9U] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__VX_Context_one.out_a_reg_data[1U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0xaU] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__VX_Context_one.out_a_reg_data[2U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0xbU] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__VX_Context_one.out_a_reg_data[3U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0xcU] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__VX_Context_one.out_b_reg_data[0U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0xdU] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__VX_Context_one.out_b_reg_data[1U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0xeU] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__VX_Context_one.out_b_reg_data[2U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0xfU] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__VX_Context_one.out_b_reg_data[3U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0xcU] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__VX_Context_one.out_a_reg_data[0U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0xdU] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__VX_Context_one.out_a_reg_data[1U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0xeU] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__VX_Context_one.out_a_reg_data[2U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0xfU] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__VX_Context_one.out_a_reg_data[3U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0x10U] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__VX_Context_one.out_b_reg_data[0U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0x11U] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__VX_Context_one.out_b_reg_data[1U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0x12U] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__VX_Context_one.out_b_reg_data[2U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0x13U] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__VX_Context_one.out_b_reg_data[3U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0x10U] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__VX_Context_one.out_a_reg_data[0U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0x11U] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__VX_Context_one.out_a_reg_data[1U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0x12U] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__VX_Context_one.out_a_reg_data[2U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0x13U] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__VX_Context_one.out_a_reg_data[3U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0x14U] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__VX_Context_one.out_b_reg_data[0U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0x15U] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__VX_Context_one.out_b_reg_data[1U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0x16U] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__VX_Context_one.out_b_reg_data[2U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0x17U] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__VX_Context_one.out_b_reg_data[3U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0x14U] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__VX_Context_one.out_a_reg_data[0U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0x15U] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__VX_Context_one.out_a_reg_data[1U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0x16U] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__VX_Context_one.out_a_reg_data[2U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0x17U] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__VX_Context_one.out_a_reg_data[3U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0x18U] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__VX_Context_one.out_b_reg_data[0U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0x19U] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__VX_Context_one.out_b_reg_data[1U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0x1aU] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__VX_Context_one.out_b_reg_data[2U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0x1bU] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__VX_Context_one.out_b_reg_data[3U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0x18U] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__VX_Context_one.out_a_reg_data[0U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0x19U] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__VX_Context_one.out_a_reg_data[1U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0x1aU] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__VX_Context_one.out_a_reg_data[2U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0x1bU] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__VX_Context_one.out_a_reg_data[3U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0x1cU] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one.out_b_reg_data[0U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0x1dU] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one.out_b_reg_data[1U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0x1eU] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one.out_b_reg_data[2U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0x1fU] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one.out_b_reg_data[3U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0x1cU] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one.out_a_reg_data[0U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0x1dU] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one.out_a_reg_data[1U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0x1eU] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one.out_a_reg_data[2U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0x1fU] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one.out_a_reg_data[3U]; + // ALWAYS at VX_decode.v:238 + if ((0U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))) { vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data - [0U][0U]; - } - if ((1U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num))) { - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data - [1U][3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data - [1U][2U]; + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0U]; vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data - [1U][1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data - [1U][0U]; - } - if ((2U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num))) { - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data - [2U][3U]; + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[1U]; vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data - [2U][2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data - [2U][1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data - [2U][0U]; - } - if ((3U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num))) { + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[2U]; vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data - [3U][3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data - [3U][2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data - [3U][1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data - [3U][0U]; + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[3U]; } - if ((4U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num))) { + if ((1U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))) { + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[0U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[4U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[1U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[5U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[6U]; vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data - [4U][3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data - [4U][2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data - [4U][1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data - [4U][0U]; + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[7U]; } - if ((5U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num))) { + if ((2U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))) { + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[0U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[8U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[1U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[9U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0xaU]; vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data - [5U][3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data - [5U][2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data - [5U][1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data - [5U][0U]; + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0xbU]; } - if ((6U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num))) { + if ((3U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))) { + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[0U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0xcU]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[1U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0xdU]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0xeU]; vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data - [6U][3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data - [6U][2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data - [6U][1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data - [6U][0U]; + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0xfU]; } - if ((7U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num))) { + if ((4U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))) { + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[0U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0x10U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[1U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0x11U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0x12U]; vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data - [7U][3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data - [7U][2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data - [7U][1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data - [7U][0U]; + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0x13U]; } - vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_a_reg_data[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data - [3U]; - vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_a_reg_data[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data - [2U]; - vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_a_reg_data[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data - [1U]; - vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_a_reg_data[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data - [0U]; - vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_b_reg_data[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data - [3U]; - vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_b_reg_data[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data - [2U]; - vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_b_reg_data[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data - [1U]; - vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_b_reg_data[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data - [0U]; - vlTOPp->Vortex__DOT__decode_a_reg_data[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_a_reg_data - [3U]; - vlTOPp->Vortex__DOT__decode_a_reg_data[2U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_a_reg_data - [2U]; - vlTOPp->Vortex__DOT__decode_a_reg_data[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_a_reg_data - [1U]; - vlTOPp->Vortex__DOT__decode_a_reg_data[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_a_reg_data - [0U]; - vlTOPp->Vortex__DOT__decode_b_reg_data[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_b_reg_data - [3U]; - vlTOPp->Vortex__DOT__decode_b_reg_data[2U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_b_reg_data - [2U]; - vlTOPp->Vortex__DOT__decode_b_reg_data[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_b_reg_data - [1U]; - vlTOPp->Vortex__DOT__decode_b_reg_data[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_b_reg_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__jalrs_thread_mask[0U] - = VL_LTES_III(1,32,32, 0U, vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_b_reg_data - [0U]); - vlTOPp->Vortex__DOT__vx_decode__DOT__jalrs_thread_mask[1U] - = VL_LTES_III(1,32,32, 1U, vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_b_reg_data - [0U]); - vlTOPp->Vortex__DOT__vx_decode__DOT__jalrs_thread_mask[2U] - = VL_LTES_III(1,32,32, 2U, vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_b_reg_data - [0U]); - vlTOPp->Vortex__DOT__vx_decode__DOT__jalrs_thread_mask[3U] - = VL_LTES_III(1,32,32, 3U, vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_b_reg_data - [0U]); - vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_a_reg_data[3U] - = vlTOPp->Vortex__DOT__decode_a_reg_data[3U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_a_reg_data[2U] - = vlTOPp->Vortex__DOT__decode_a_reg_data[2U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_a_reg_data[1U] - = vlTOPp->Vortex__DOT__decode_a_reg_data[1U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_a_reg_data[0U] - = vlTOPp->Vortex__DOT__decode_a_reg_data[0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_b_reg_data[3U] - = vlTOPp->Vortex__DOT__decode_b_reg_data[3U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_b_reg_data[2U] - = vlTOPp->Vortex__DOT__decode_b_reg_data[2U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_b_reg_data[1U] - = vlTOPp->Vortex__DOT__decode_b_reg_data[1U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_b_reg_data[0U] - = vlTOPp->Vortex__DOT__decode_b_reg_data[0U]; - vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_thread_mask[3U] + if ((5U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))) { + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[0U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0x14U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[1U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0x15U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0x16U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[3U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0x17U]; + } + if ((6U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))) { + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[0U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0x18U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[1U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0x19U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0x1aU]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[3U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0x1bU]; + } + if ((7U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))) { + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[0U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0x1cU]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[1U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0x1dU]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0x1eU]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[3U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0x1fU]; + } + // ALWAYS at VX_decode.v:238 + if ((0U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))) { + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[0U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[1U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[1U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[2U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[3U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[3U]; + } + if ((1U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))) { + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[0U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[4U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[1U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[5U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[6U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[3U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[7U]; + } + if ((2U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))) { + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[0U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[8U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[1U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[9U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0xaU]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[3U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0xbU]; + } + if ((3U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))) { + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[0U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0xcU]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[1U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0xdU]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0xeU]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[3U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0xfU]; + } + if ((4U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))) { + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[0U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0x10U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[1U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0x11U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0x12U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[3U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0x13U]; + } + if ((5U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))) { + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[0U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0x14U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[1U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0x15U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0x16U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[3U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0x17U]; + } + if ((6U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))) { + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[0U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0x18U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[1U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0x19U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0x1aU]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[3U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0x1bU]; + } + if ((7U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))) { + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[0U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0x1cU]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[1U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0x1dU]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0x1eU]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[3U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0x1fU]; + } + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.b_reg_data[0U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[0U]; + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.b_reg_data[1U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[1U]; + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.b_reg_data[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[2U]; + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.b_reg_data[3U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[3U]; + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.a_reg_data[0U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[0U]; + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.a_reg_data[1U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[1U]; + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.a_reg_data[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[2U]; + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.a_reg_data[3U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[3U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__jalrs_thread_mask + = ((0xdU & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__jalrs_thread_mask)) + | ((1U <= vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.b_reg_data[0U]) + << 1U)); + vlTOPp->Vortex__DOT__vx_decode__DOT__jalrs_thread_mask + = ((0xbU & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__jalrs_thread_mask)) + | ((2U <= vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.b_reg_data[0U]) + << 2U)); + vlTOPp->Vortex__DOT__vx_decode__DOT__jalrs_thread_mask + = ((7U & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__jalrs_thread_mask)) + | ((3U <= vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.b_reg_data[0U]) + << 3U)); + __Vtemp78[0U] = (IData)((((QData)((IData)((((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + >> 1U) + & (0x33U + == + (0x7fU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U))))) + ? (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__mul_alu) + : (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_final_alu)))) + << 0x2cU) | (((QData)((IData)( + (((((0x6fU + == + (0x7fU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) + | (0x67U + == + (0x7fU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U))))) + | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jalrs)) + | ((0x73U + == + (0x7fU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) + & (0U + == + (7U + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0xcU) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x14U)))))) + ? 3U + : + ((3U + == + (0x7fU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) + ? 2U + : + ((((((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_itype) + | (0x33U + == + (0x7fU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U))))) + | (0x37U + == + (0x7fU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U))))) + | (0x17U + == + (0x7fU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U))))) + | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_csr)) + ? 1U + : 0U))))) + << 0x2aU) + | (((QData)((IData)( + (1U + & (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_itype) + | (0x23U + == + (0x7fU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U))))) + ? 1U + : 0U)))) + << 0x29U) + | (((QData)((IData)(vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.itype_immed)) + << 9U) + | (QData)((IData)( + ((0x1c0U + & (((3U + == + (0x7fU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) + ? + ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0xcU) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x14U)) + : 7U) + << 6U)) + | ((0x38U + & (((0x23U + == + (0x7fU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) + ? + ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0xcU) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x14U)) + : 7U) + << 3U)) + | (IData)(vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.branch_type)))))))))); + __Vtemp78[1U] = ((0xfffe0000U & (vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.b_reg_data[0U] + << 0x11U)) | (IData)( + ((((QData)((IData)( + (((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + >> 1U) + & (0x33U + == + (0x7fU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U))))) + ? (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__mul_alu) + : (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_final_alu)))) + << 0x2cU) + | (((QData)((IData)( + (((((0x6fU + == + (0x7fU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) + | (0x67U + == + (0x7fU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U))))) + | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jalrs)) + | ((0x73U + == + (0x7fU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) + & (0U + == + (7U + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0xcU) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x14U)))))) + ? 3U + : + ((3U + == + (0x7fU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) + ? 2U + : + ((((((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_itype) + | (0x33U + == + (0x7fU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U))))) + | (0x37U + == + (0x7fU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U))))) + | (0x17U + == + (0x7fU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U))))) + | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_csr)) + ? 1U + : 0U))))) + << 0x2aU) + | (((QData)((IData)( + (1U + & (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_itype) + | (0x23U + == + (0x7fU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U))))) + ? 1U + : 0U)))) + << 0x29U) + | (((QData)((IData)(vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.itype_immed)) + << 9U) + | (QData)((IData)( + ((0x1c0U + & (((3U + == + (0x7fU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) + ? + ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0xcU) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x14U)) + : 7U) + << 6U)) + | ((0x38U + & (((0x23U + == + (0x7fU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) + ? + ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0xcU) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x14U)) + : 7U) + << 3U)) + | (IData)(vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.branch_type))))))))) + >> 0x20U))); + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT____Vcellinp__d_e_reg__in[0U] + = ((0xffffff00U & ((IData)((((QData)((IData)(vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.jal_offset)) + << 0x20U) | (QData)((IData)( + ((IData)(4U) + + + ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 8U))))))) + << 8U)) | ((0xf0U & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + << 4U)) + | (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))); + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT____Vcellinp__d_e_reg__in[1U] + = ((0xffU & ((IData)((((QData)((IData)(vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.jal_offset)) + << 0x20U) | (QData)((IData)( + ((IData)(4U) + + + ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 8U))))))) + >> 0x18U)) | (0xffffff00U & ((IData)( + ((((QData)((IData)(vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.jal_offset)) + << 0x20U) + | (QData)((IData)( + ((IData)(4U) + + + ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 8U)))))) + >> 0x20U)) + << 8U))); + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT____Vcellinp__d_e_reg__in[2U] + = ((0xfffffe00U & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + << 1U)) | ((0xffffff00U + & ((IData)(vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.jal) + << 8U)) | + (0xffU & ((IData)( + ((((QData)((IData)(vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.jal_offset)) + << 0x20U) + | (QData)((IData)( + ((IData)(4U) + + + ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 8U)))))) + >> 0x20U)) + >> 0x18U)))); + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT____Vcellinp__d_e_reg__in[3U] + = ((0xe0000000U & (__Vtemp78[0U] << 0x1dU)) + | ((0x1ffffe00U & (((0x37U == (0x7fU & ( + (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) + ? ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0xcU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x14U)) + : ((0x17U == (0x7fU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) + ? ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0xcU) | + (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x14U)) : 0U)) + << 9U)) | (0x1ffU & ( + (0x1feU + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 1U)) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 0x1fU))))); + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT____Vcellinp__d_e_reg__in[4U] + = ((0x1fffffffU & (__Vtemp78[0U] >> 3U)) | + (0xe0000000U & (__Vtemp78[1U] << 0x1dU))); + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT____Vcellinp__d_e_reg__in[5U] + = ((0x1fffffffU & (__Vtemp78[1U] >> 3U)) | + (0xe0000000U & (vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.b_reg_data[0U] + << 0xeU))); + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT____Vcellinp__d_e_reg__in[6U] + = ((0x1fffffffU & ((0x3fffU & (vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.b_reg_data[0U] + >> 0x12U)) | + (0x1fffc000U & (vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.b_reg_data[1U] + << 0xeU)))) + | (0xe0000000U & (vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.b_reg_data[1U] + << 0xeU))); + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT____Vcellinp__d_e_reg__in[7U] + = ((0x1fffffffU & ((0x3fffU & (vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.b_reg_data[1U] + >> 0x12U)) | + (0x1fffc000U & (vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.b_reg_data[2U] + << 0xeU)))) + | (0xe0000000U & (vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.b_reg_data[2U] + << 0xeU))); + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT____Vcellinp__d_e_reg__in[8U] + = ((0x1fffffffU & ((0x3fffU & (vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.b_reg_data[2U] + >> 0x12U)) | + (0x1fffc000U & (vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.b_reg_data[3U] + << 0xeU)))) + | (0xe0000000U & (vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.b_reg_data[3U] + << 0xeU))); + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT____Vcellinp__d_e_reg__in[9U] + = ((0x1fffffffU & ((0x3fffU & (vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.b_reg_data[3U] + >> 0x12U)) | + (0x1fffc000U & (vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.a_reg_data[0U] + << 0xeU)))) + | (0xe0000000U & (vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.a_reg_data[0U] + << 0xeU))); + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT____Vcellinp__d_e_reg__in[0xaU] + = ((0x1fffffffU & ((0x3fffU & (vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.a_reg_data[0U] + >> 0x12U)) | + (0x1fffc000U & (vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.a_reg_data[1U] + << 0xeU)))) + | (0xe0000000U & (vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.a_reg_data[1U] + << 0xeU))); + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT____Vcellinp__d_e_reg__in[0xbU] + = ((0x1fffffffU & ((0x3fffU & (vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.a_reg_data[1U] + >> 0x12U)) | + (0x1fffc000U & (vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.a_reg_data[2U] + << 0xeU)))) + | (0xe0000000U & (vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.a_reg_data[2U] + << 0xeU))); + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT____Vcellinp__d_e_reg__in[0xcU] + = ((0x1fffffffU & ((0x3fffU & (vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.a_reg_data[2U] + >> 0x12U)) | + (0x1fffc000U & (vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.a_reg_data[3U] + << 0xeU)))) + | (0xe0000000U & (vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.a_reg_data[3U] + << 0xeU))); + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT____Vcellinp__d_e_reg__in[0xdU] + = ((0x1fffffffU & ((0x1f000000U & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 9U)) + | ((0xf80000U & ((0x10000000U + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x1cU)) + | (0xff80000U + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 4U)))) + | ((0x7c000U & ((0x1ffc0000U + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x12U)) + | (0x3c000U + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0xeU)))) + | (0x3fffU & (vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.a_reg_data[3U] + >> 0x12U)))))) + | (0xe0000000U & ((((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_csr) + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x16U)) ? (0x1fU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 9U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x17U))) + : vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.a_reg_data[0U]) + << 0x1dU))); + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT____Vcellinp__d_e_reg__in[0xeU] + = ((0xc0000000U & ((IData)(vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.csr_address) + << 0x1eU)) | ((0xe0000000U + & ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_csr) + << 0x1dU)) + | (0x1fffffffU + & ((((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_csr) + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x16U)) + ? + (0x1fU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 9U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x17U))) + : + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.a_reg_data[0U]) + >> 3U)))); + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT____Vcellinp__d_e_reg__in[0xfU] + = (0x3fffffffU & ((IData)(vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.csr_address) + >> 2U)); + vlSymsp->TOP__Vortex__DOT__VX_warp_ctl.thread_mask = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jalrs) - ? vlTOPp->Vortex__DOT__vx_decode__DOT__jalrs_thread_mask - [3U] : vlTOPp->Vortex__DOT__vx_decode__DOT__jmprt_thread_mask - [3U]); - vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_thread_mask[2U] - = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jalrs) - ? vlTOPp->Vortex__DOT__vx_decode__DOT__jalrs_thread_mask - [2U] : vlTOPp->Vortex__DOT__vx_decode__DOT__jmprt_thread_mask - [2U]); - vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_thread_mask[1U] - = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jalrs) - ? vlTOPp->Vortex__DOT__vx_decode__DOT__jalrs_thread_mask - [1U] : vlTOPp->Vortex__DOT__vx_decode__DOT__jmprt_thread_mask - [1U]); - vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_thread_mask[0U] - = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jalrs) - ? vlTOPp->Vortex__DOT__vx_decode__DOT__jalrs_thread_mask - [0U] : vlTOPp->Vortex__DOT__vx_decode__DOT__jmprt_thread_mask - [0U]); - vlTOPp->Vortex__DOT__decode_thread_mask[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_thread_mask + ? (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__jalrs_thread_mask) + : (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__jmprt_thread_mask)); + vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask[0U] + = (1U & (IData)(vlSymsp->TOP__Vortex__DOT__VX_warp_ctl.thread_mask)); + vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask[1U] + = (1U & ((IData)(vlSymsp->TOP__Vortex__DOT__VX_warp_ctl.thread_mask) + >> 1U)); + vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask[2U] + = (1U & ((IData)(vlSymsp->TOP__Vortex__DOT__VX_warp_ctl.thread_mask) + >> 2U)); + vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask[3U] + = (1U & ((IData)(vlSymsp->TOP__Vortex__DOT__VX_warp_ctl.thread_mask) + >> 3U)); + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__0__KET____DOT__VX_Warp__in_thread_mask[3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask [3U]; - vlTOPp->Vortex__DOT__decode_thread_mask[2U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_thread_mask + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__0__KET____DOT__VX_Warp__in_thread_mask[2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask [2U]; - vlTOPp->Vortex__DOT__decode_thread_mask[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_thread_mask + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__0__KET____DOT__VX_Warp__in_thread_mask[1U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask [1U]; - vlTOPp->Vortex__DOT__decode_thread_mask[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_thread_mask + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__0__KET____DOT__VX_Warp__in_thread_mask[0U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask [0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask[3U] - = vlTOPp->Vortex__DOT__decode_thread_mask[3U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask[2U] - = vlTOPp->Vortex__DOT__decode_thread_mask[2U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask[1U] - = vlTOPp->Vortex__DOT__decode_thread_mask[1U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask[0U] - = vlTOPp->Vortex__DOT__decode_thread_mask[0U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__0__KET____DOT__VX_Warp__in_thread_mask[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__1__KET____DOT__VX_Warp__in_thread_mask[3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask [3U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__0__KET____DOT__VX_Warp__in_thread_mask[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__1__KET____DOT__VX_Warp__in_thread_mask[2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask [2U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__0__KET____DOT__VX_Warp__in_thread_mask[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__1__KET____DOT__VX_Warp__in_thread_mask[1U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask [1U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__0__KET____DOT__VX_Warp__in_thread_mask[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__1__KET____DOT__VX_Warp__in_thread_mask[0U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask [0U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Warp__in_thread_mask[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__2__KET____DOT__VX_Warp__in_thread_mask[3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask [3U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Warp__in_thread_mask[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__2__KET____DOT__VX_Warp__in_thread_mask[2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask [2U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Warp__in_thread_mask[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__2__KET____DOT__VX_Warp__in_thread_mask[1U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask [1U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Warp__in_thread_mask[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__2__KET____DOT__VX_Warp__in_thread_mask[0U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask [0U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Warp__in_thread_mask[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__3__KET____DOT__VX_Warp__in_thread_mask[3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask [3U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Warp__in_thread_mask[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__3__KET____DOT__VX_Warp__in_thread_mask[2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask [2U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Warp__in_thread_mask[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__3__KET____DOT__VX_Warp__in_thread_mask[1U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask [1U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Warp__in_thread_mask[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__3__KET____DOT__VX_Warp__in_thread_mask[0U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask [0U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Warp__in_thread_mask[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__4__KET____DOT__VX_Warp__in_thread_mask[3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask [3U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Warp__in_thread_mask[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__4__KET____DOT__VX_Warp__in_thread_mask[2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask [2U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Warp__in_thread_mask[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__4__KET____DOT__VX_Warp__in_thread_mask[1U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask [1U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Warp__in_thread_mask[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__4__KET____DOT__VX_Warp__in_thread_mask[0U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask [0U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Warp__in_thread_mask[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__5__KET____DOT__VX_Warp__in_thread_mask[3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask [3U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Warp__in_thread_mask[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__5__KET____DOT__VX_Warp__in_thread_mask[2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask [2U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Warp__in_thread_mask[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__5__KET____DOT__VX_Warp__in_thread_mask[1U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask [1U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Warp__in_thread_mask[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__5__KET____DOT__VX_Warp__in_thread_mask[0U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask [0U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Warp__in_thread_mask[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__6__KET____DOT__VX_Warp__in_thread_mask[3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask [3U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Warp__in_thread_mask[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__6__KET____DOT__VX_Warp__in_thread_mask[2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask [2U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Warp__in_thread_mask[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__6__KET____DOT__VX_Warp__in_thread_mask[1U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask [1U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Warp__in_thread_mask[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__6__KET____DOT__VX_Warp__in_thread_mask[0U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask [0U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Warp__in_thread_mask[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__7__KET____DOT__VX_Warp__in_thread_mask[3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask [3U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Warp__in_thread_mask[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__7__KET____DOT__VX_Warp__in_thread_mask[2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask [2U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Warp__in_thread_mask[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__7__KET____DOT__VX_Warp__in_thread_mask[1U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask [1U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Warp__in_thread_mask[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask - [0U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Warp__in_thread_mask[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask - [3U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Warp__in_thread_mask[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask - [2U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Warp__in_thread_mask[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask - [1U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Warp__in_thread_mask[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__7__KET____DOT__VX_Warp__in_thread_mask[0U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask [0U]; // ALWAYS at VX_warp.v:41 if (((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__remove_warp) - & (0U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num)))) { - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__0__KET____DOT__VX_Warp__DOT__valid[3U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__0__KET____DOT__VX_Warp__DOT__valid_zero + & (0U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U)))))) { + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__VX_Warp__DOT__valid[3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__VX_Warp__DOT__valid_zero [3U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__0__KET____DOT__VX_Warp__DOT__valid[2U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__0__KET____DOT__VX_Warp__DOT__valid_zero + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__VX_Warp__DOT__valid[2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__VX_Warp__DOT__valid_zero [2U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__0__KET____DOT__VX_Warp__DOT__valid[1U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__0__KET____DOT__VX_Warp__DOT__valid_zero + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__VX_Warp__DOT__valid[1U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__VX_Warp__DOT__valid_zero [1U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__0__KET____DOT__VX_Warp__DOT__valid[0U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__0__KET____DOT__VX_Warp__DOT__valid_zero + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__VX_Warp__DOT__valid[0U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__VX_Warp__DOT__valid_zero [0U]; } else { - if (vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__0__KET____DOT__warp_zero_change_mask) { - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__0__KET____DOT__VX_Warp__DOT__valid[3U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__0__KET____DOT__VX_Warp__in_thread_mask + if (vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__warp_zero_change_mask) { + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__VX_Warp__DOT__valid[3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__0__KET____DOT__VX_Warp__in_thread_mask [3U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__0__KET____DOT__VX_Warp__DOT__valid[2U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__0__KET____DOT__VX_Warp__in_thread_mask + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__VX_Warp__DOT__valid[2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__0__KET____DOT__VX_Warp__in_thread_mask [2U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__0__KET____DOT__VX_Warp__DOT__valid[1U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__0__KET____DOT__VX_Warp__in_thread_mask + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__VX_Warp__DOT__valid[1U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__0__KET____DOT__VX_Warp__in_thread_mask [1U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__0__KET____DOT__VX_Warp__DOT__valid[0U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__0__KET____DOT__VX_Warp__in_thread_mask + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__VX_Warp__DOT__valid[0U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__0__KET____DOT__VX_Warp__in_thread_mask [0U]; } } // ALWAYS at VX_warp.v:41 if (((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__remove_warp) - & (1U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num)))) { - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__1__KET____DOT__VX_Warp__DOT__valid[3U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__1__KET____DOT__VX_Warp__DOT__valid_zero + & (1U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U)))))) { + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__valid[3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__valid_zero [3U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__1__KET____DOT__VX_Warp__DOT__valid[2U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__1__KET____DOT__VX_Warp__DOT__valid_zero + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__valid[2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__valid_zero [2U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__1__KET____DOT__VX_Warp__DOT__valid[1U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__1__KET____DOT__VX_Warp__DOT__valid_zero + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__valid[1U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__valid_zero [1U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__1__KET____DOT__VX_Warp__DOT__valid[0U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__1__KET____DOT__VX_Warp__DOT__valid_zero + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__valid[0U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__valid_zero [0U]; } else { - if (vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__1__KET____DOT__warp_zero_change_mask) { - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__1__KET____DOT__VX_Warp__DOT__valid[3U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Warp__in_thread_mask + if (vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__warp_zero_change_mask) { + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__valid[3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__1__KET____DOT__VX_Warp__in_thread_mask [3U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__1__KET____DOT__VX_Warp__DOT__valid[2U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Warp__in_thread_mask + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__valid[2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__1__KET____DOT__VX_Warp__in_thread_mask [2U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__1__KET____DOT__VX_Warp__DOT__valid[1U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Warp__in_thread_mask + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__valid[1U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__1__KET____DOT__VX_Warp__in_thread_mask [1U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__1__KET____DOT__VX_Warp__DOT__valid[0U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Warp__in_thread_mask + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__valid[0U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__1__KET____DOT__VX_Warp__in_thread_mask [0U]; } } // ALWAYS at VX_warp.v:41 if (((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__remove_warp) - & (2U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num)))) { - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__2__KET____DOT__VX_Warp__DOT__valid[3U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__2__KET____DOT__VX_Warp__DOT__valid_zero + & (2U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U)))))) { + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__valid[3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__valid_zero [3U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__2__KET____DOT__VX_Warp__DOT__valid[2U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__2__KET____DOT__VX_Warp__DOT__valid_zero + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__valid[2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__valid_zero [2U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__2__KET____DOT__VX_Warp__DOT__valid[1U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__2__KET____DOT__VX_Warp__DOT__valid_zero + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__valid[1U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__valid_zero [1U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__2__KET____DOT__VX_Warp__DOT__valid[0U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__2__KET____DOT__VX_Warp__DOT__valid_zero + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__valid[0U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__valid_zero [0U]; } else { - if (vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__2__KET____DOT__warp_zero_change_mask) { - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__2__KET____DOT__VX_Warp__DOT__valid[3U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Warp__in_thread_mask + if (vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__warp_zero_change_mask) { + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__valid[3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__2__KET____DOT__VX_Warp__in_thread_mask [3U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__2__KET____DOT__VX_Warp__DOT__valid[2U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Warp__in_thread_mask + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__valid[2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__2__KET____DOT__VX_Warp__in_thread_mask [2U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__2__KET____DOT__VX_Warp__DOT__valid[1U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Warp__in_thread_mask + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__valid[1U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__2__KET____DOT__VX_Warp__in_thread_mask [1U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__2__KET____DOT__VX_Warp__DOT__valid[0U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Warp__in_thread_mask + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__valid[0U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__2__KET____DOT__VX_Warp__in_thread_mask [0U]; } } // ALWAYS at VX_warp.v:41 if (((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__remove_warp) - & (3U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num)))) { - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__3__KET____DOT__VX_Warp__DOT__valid[3U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__3__KET____DOT__VX_Warp__DOT__valid_zero + & (3U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U)))))) { + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__valid[3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__valid_zero [3U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__3__KET____DOT__VX_Warp__DOT__valid[2U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__3__KET____DOT__VX_Warp__DOT__valid_zero + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__valid[2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__valid_zero [2U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__3__KET____DOT__VX_Warp__DOT__valid[1U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__3__KET____DOT__VX_Warp__DOT__valid_zero + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__valid[1U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__valid_zero [1U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__3__KET____DOT__VX_Warp__DOT__valid[0U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__3__KET____DOT__VX_Warp__DOT__valid_zero + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__valid[0U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__valid_zero [0U]; } else { - if (vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__3__KET____DOT__warp_zero_change_mask) { - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__3__KET____DOT__VX_Warp__DOT__valid[3U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Warp__in_thread_mask + if (vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__warp_zero_change_mask) { + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__valid[3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__3__KET____DOT__VX_Warp__in_thread_mask [3U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__3__KET____DOT__VX_Warp__DOT__valid[2U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Warp__in_thread_mask + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__valid[2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__3__KET____DOT__VX_Warp__in_thread_mask [2U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__3__KET____DOT__VX_Warp__DOT__valid[1U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Warp__in_thread_mask + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__valid[1U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__3__KET____DOT__VX_Warp__in_thread_mask [1U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__3__KET____DOT__VX_Warp__DOT__valid[0U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Warp__in_thread_mask + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__valid[0U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__3__KET____DOT__VX_Warp__in_thread_mask [0U]; } } // ALWAYS at VX_warp.v:41 if (((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__remove_warp) - & (4U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num)))) { - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__4__KET____DOT__VX_Warp__DOT__valid[3U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__4__KET____DOT__VX_Warp__DOT__valid_zero + & (4U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U)))))) { + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__valid[3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__valid_zero [3U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__4__KET____DOT__VX_Warp__DOT__valid[2U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__4__KET____DOT__VX_Warp__DOT__valid_zero + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__valid[2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__valid_zero [2U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__4__KET____DOT__VX_Warp__DOT__valid[1U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__4__KET____DOT__VX_Warp__DOT__valid_zero + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__valid[1U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__valid_zero [1U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__4__KET____DOT__VX_Warp__DOT__valid[0U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__4__KET____DOT__VX_Warp__DOT__valid_zero + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__valid[0U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__valid_zero [0U]; } else { - if (vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__4__KET____DOT__warp_zero_change_mask) { - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__4__KET____DOT__VX_Warp__DOT__valid[3U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Warp__in_thread_mask + if (vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__warp_zero_change_mask) { + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__valid[3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__4__KET____DOT__VX_Warp__in_thread_mask [3U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__4__KET____DOT__VX_Warp__DOT__valid[2U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Warp__in_thread_mask + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__valid[2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__4__KET____DOT__VX_Warp__in_thread_mask [2U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__4__KET____DOT__VX_Warp__DOT__valid[1U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Warp__in_thread_mask + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__valid[1U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__4__KET____DOT__VX_Warp__in_thread_mask [1U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__4__KET____DOT__VX_Warp__DOT__valid[0U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Warp__in_thread_mask + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__valid[0U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__4__KET____DOT__VX_Warp__in_thread_mask [0U]; } } // ALWAYS at VX_warp.v:41 if (((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__remove_warp) - & (5U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num)))) { - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__5__KET____DOT__VX_Warp__DOT__valid[3U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__5__KET____DOT__VX_Warp__DOT__valid_zero + & (5U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U)))))) { + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__valid[3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__valid_zero [3U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__5__KET____DOT__VX_Warp__DOT__valid[2U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__5__KET____DOT__VX_Warp__DOT__valid_zero + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__valid[2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__valid_zero [2U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__5__KET____DOT__VX_Warp__DOT__valid[1U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__5__KET____DOT__VX_Warp__DOT__valid_zero + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__valid[1U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__valid_zero [1U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__5__KET____DOT__VX_Warp__DOT__valid[0U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__5__KET____DOT__VX_Warp__DOT__valid_zero + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__valid[0U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__valid_zero [0U]; } else { - if (vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__5__KET____DOT__warp_zero_change_mask) { - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__5__KET____DOT__VX_Warp__DOT__valid[3U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Warp__in_thread_mask + if (vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__warp_zero_change_mask) { + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__valid[3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__5__KET____DOT__VX_Warp__in_thread_mask [3U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__5__KET____DOT__VX_Warp__DOT__valid[2U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Warp__in_thread_mask + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__valid[2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__5__KET____DOT__VX_Warp__in_thread_mask [2U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__5__KET____DOT__VX_Warp__DOT__valid[1U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Warp__in_thread_mask + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__valid[1U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__5__KET____DOT__VX_Warp__in_thread_mask [1U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__5__KET____DOT__VX_Warp__DOT__valid[0U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Warp__in_thread_mask + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__valid[0U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__5__KET____DOT__VX_Warp__in_thread_mask [0U]; } } // ALWAYS at VX_warp.v:41 if (((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__remove_warp) - & (6U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num)))) { - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__6__KET____DOT__VX_Warp__DOT__valid[3U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__6__KET____DOT__VX_Warp__DOT__valid_zero + & (6U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U)))))) { + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__valid[3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__valid_zero [3U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__6__KET____DOT__VX_Warp__DOT__valid[2U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__6__KET____DOT__VX_Warp__DOT__valid_zero + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__valid[2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__valid_zero [2U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__6__KET____DOT__VX_Warp__DOT__valid[1U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__6__KET____DOT__VX_Warp__DOT__valid_zero + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__valid[1U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__valid_zero [1U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__6__KET____DOT__VX_Warp__DOT__valid[0U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__6__KET____DOT__VX_Warp__DOT__valid_zero + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__valid[0U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__valid_zero [0U]; } else { - if (vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__6__KET____DOT__warp_zero_change_mask) { - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__6__KET____DOT__VX_Warp__DOT__valid[3U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Warp__in_thread_mask + if (vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__warp_zero_change_mask) { + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__valid[3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__6__KET____DOT__VX_Warp__in_thread_mask [3U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__6__KET____DOT__VX_Warp__DOT__valid[2U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Warp__in_thread_mask + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__valid[2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__6__KET____DOT__VX_Warp__in_thread_mask [2U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__6__KET____DOT__VX_Warp__DOT__valid[1U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Warp__in_thread_mask + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__valid[1U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__6__KET____DOT__VX_Warp__in_thread_mask [1U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__6__KET____DOT__VX_Warp__DOT__valid[0U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Warp__in_thread_mask + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__valid[0U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__6__KET____DOT__VX_Warp__in_thread_mask [0U]; } } // ALWAYS at VX_warp.v:41 if (((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__remove_warp) - & (7U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num)))) { - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__7__KET____DOT__VX_Warp__DOT__valid[3U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__7__KET____DOT__VX_Warp__DOT__valid_zero + & (7U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U)))))) { + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__valid[3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__valid_zero [3U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__7__KET____DOT__VX_Warp__DOT__valid[2U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__7__KET____DOT__VX_Warp__DOT__valid_zero + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__valid[2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__valid_zero [2U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__7__KET____DOT__VX_Warp__DOT__valid[1U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__7__KET____DOT__VX_Warp__DOT__valid_zero + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__valid[1U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__valid_zero [1U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__7__KET____DOT__VX_Warp__DOT__valid[0U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__7__KET____DOT__VX_Warp__DOT__valid_zero + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__valid[0U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__valid_zero [0U]; } else { - if (vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__7__KET____DOT__warp_zero_change_mask) { - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__7__KET____DOT__VX_Warp__DOT__valid[3U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Warp__in_thread_mask + if (vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__warp_zero_change_mask) { + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__valid[3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__7__KET____DOT__VX_Warp__in_thread_mask [3U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__7__KET____DOT__VX_Warp__DOT__valid[2U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Warp__in_thread_mask + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__valid[2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__7__KET____DOT__VX_Warp__in_thread_mask [2U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__7__KET____DOT__VX_Warp__DOT__valid[1U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Warp__in_thread_mask + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__valid[1U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__7__KET____DOT__VX_Warp__in_thread_mask [1U]; - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__7__KET____DOT__VX_Warp__DOT__valid[0U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Warp__in_thread_mask + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__valid[0U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__7__KET____DOT__VX_Warp__in_thread_mask [0U]; } } - vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__0__KET____DOT__VX_Warp__out_valid[0U] - = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__0__KET____DOT__warp_zero_change_mask) - ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__0__KET____DOT__VX_Warp__in_thread_mask - [0U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__0__KET____DOT__warp_zero_stall)) - & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__0__KET____DOT__VX_Warp__DOT__valid + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__0__KET____DOT__VX_Warp__out_valid[0U] + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__warp_zero_change_mask) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__0__KET____DOT__VX_Warp__in_thread_mask + [0U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__warp_zero_stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__VX_Warp__DOT__valid [0U])); - vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__0__KET____DOT__VX_Warp__out_valid[1U] - = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__0__KET____DOT__warp_zero_change_mask) - ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__0__KET____DOT__VX_Warp__in_thread_mask - [1U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__0__KET____DOT__warp_zero_stall)) - & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__0__KET____DOT__VX_Warp__DOT__valid + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__0__KET____DOT__VX_Warp__out_valid[1U] + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__warp_zero_change_mask) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__0__KET____DOT__VX_Warp__in_thread_mask + [1U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__warp_zero_stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__VX_Warp__DOT__valid [1U])); - vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__0__KET____DOT__VX_Warp__out_valid[2U] - = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__0__KET____DOT__warp_zero_change_mask) - ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__0__KET____DOT__VX_Warp__in_thread_mask - [2U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__0__KET____DOT__warp_zero_stall)) - & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__0__KET____DOT__VX_Warp__DOT__valid + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__0__KET____DOT__VX_Warp__out_valid[2U] + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__warp_zero_change_mask) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__0__KET____DOT__VX_Warp__in_thread_mask + [2U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__warp_zero_stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__VX_Warp__DOT__valid [2U])); - vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__0__KET____DOT__VX_Warp__out_valid[3U] - = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__0__KET____DOT__warp_zero_change_mask) - ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__0__KET____DOT__VX_Warp__in_thread_mask - [3U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__0__KET____DOT__warp_zero_stall)) - & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__0__KET____DOT__VX_Warp__DOT__valid + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__0__KET____DOT__VX_Warp__out_valid[3U] + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__warp_zero_change_mask) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__0__KET____DOT__VX_Warp__in_thread_mask + [3U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__warp_zero_stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__VX_Warp__DOT__valid [3U])); - vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__1__KET____DOT__VX_Warp__out_valid[0U] - = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__1__KET____DOT__warp_zero_change_mask) - ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Warp__in_thread_mask - [0U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__1__KET____DOT__warp_zero_stall)) - & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__1__KET____DOT__VX_Warp__DOT__valid + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__1__KET____DOT__VX_Warp__out_valid[0U] + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__warp_zero_change_mask) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__1__KET____DOT__VX_Warp__in_thread_mask + [0U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__warp_zero_stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__valid [0U])); - vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__1__KET____DOT__VX_Warp__out_valid[1U] - = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__1__KET____DOT__warp_zero_change_mask) - ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Warp__in_thread_mask - [1U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__1__KET____DOT__warp_zero_stall)) - & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__1__KET____DOT__VX_Warp__DOT__valid + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__1__KET____DOT__VX_Warp__out_valid[1U] + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__warp_zero_change_mask) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__1__KET____DOT__VX_Warp__in_thread_mask + [1U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__warp_zero_stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__valid [1U])); - vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__1__KET____DOT__VX_Warp__out_valid[2U] - = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__1__KET____DOT__warp_zero_change_mask) - ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Warp__in_thread_mask - [2U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__1__KET____DOT__warp_zero_stall)) - & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__1__KET____DOT__VX_Warp__DOT__valid + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__1__KET____DOT__VX_Warp__out_valid[2U] + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__warp_zero_change_mask) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__1__KET____DOT__VX_Warp__in_thread_mask + [2U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__warp_zero_stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__valid [2U])); - vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__1__KET____DOT__VX_Warp__out_valid[3U] - = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__1__KET____DOT__warp_zero_change_mask) - ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Warp__in_thread_mask - [3U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__1__KET____DOT__warp_zero_stall)) - & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__1__KET____DOT__VX_Warp__DOT__valid + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__1__KET____DOT__VX_Warp__out_valid[3U] + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__warp_zero_change_mask) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__1__KET____DOT__VX_Warp__in_thread_mask + [3U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__warp_zero_stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__valid [3U])); - vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__2__KET____DOT__VX_Warp__out_valid[0U] - = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__2__KET____DOT__warp_zero_change_mask) - ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Warp__in_thread_mask - [0U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__2__KET____DOT__warp_zero_stall)) - & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__2__KET____DOT__VX_Warp__DOT__valid + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__2__KET____DOT__VX_Warp__out_valid[0U] + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__warp_zero_change_mask) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__2__KET____DOT__VX_Warp__in_thread_mask + [0U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__warp_zero_stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__valid [0U])); - vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__2__KET____DOT__VX_Warp__out_valid[1U] - = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__2__KET____DOT__warp_zero_change_mask) - ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Warp__in_thread_mask - [1U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__2__KET____DOT__warp_zero_stall)) - & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__2__KET____DOT__VX_Warp__DOT__valid + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__2__KET____DOT__VX_Warp__out_valid[1U] + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__warp_zero_change_mask) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__2__KET____DOT__VX_Warp__in_thread_mask + [1U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__warp_zero_stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__valid [1U])); - vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__2__KET____DOT__VX_Warp__out_valid[2U] - = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__2__KET____DOT__warp_zero_change_mask) - ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Warp__in_thread_mask - [2U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__2__KET____DOT__warp_zero_stall)) - & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__2__KET____DOT__VX_Warp__DOT__valid + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__2__KET____DOT__VX_Warp__out_valid[2U] + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__warp_zero_change_mask) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__2__KET____DOT__VX_Warp__in_thread_mask + [2U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__warp_zero_stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__valid [2U])); - vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__2__KET____DOT__VX_Warp__out_valid[3U] - = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__2__KET____DOT__warp_zero_change_mask) - ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Warp__in_thread_mask - [3U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__2__KET____DOT__warp_zero_stall)) - & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__2__KET____DOT__VX_Warp__DOT__valid + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__2__KET____DOT__VX_Warp__out_valid[3U] + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__warp_zero_change_mask) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__2__KET____DOT__VX_Warp__in_thread_mask + [3U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__warp_zero_stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__valid [3U])); - vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__3__KET____DOT__VX_Warp__out_valid[0U] - = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__3__KET____DOT__warp_zero_change_mask) - ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Warp__in_thread_mask - [0U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__3__KET____DOT__warp_zero_stall)) - & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__3__KET____DOT__VX_Warp__DOT__valid + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__3__KET____DOT__VX_Warp__out_valid[0U] + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__warp_zero_change_mask) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__3__KET____DOT__VX_Warp__in_thread_mask + [0U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__warp_zero_stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__valid [0U])); - vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__3__KET____DOT__VX_Warp__out_valid[1U] - = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__3__KET____DOT__warp_zero_change_mask) - ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Warp__in_thread_mask - [1U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__3__KET____DOT__warp_zero_stall)) - & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__3__KET____DOT__VX_Warp__DOT__valid + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__3__KET____DOT__VX_Warp__out_valid[1U] + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__warp_zero_change_mask) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__3__KET____DOT__VX_Warp__in_thread_mask + [1U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__warp_zero_stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__valid [1U])); - vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__3__KET____DOT__VX_Warp__out_valid[2U] - = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__3__KET____DOT__warp_zero_change_mask) - ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Warp__in_thread_mask - [2U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__3__KET____DOT__warp_zero_stall)) - & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__3__KET____DOT__VX_Warp__DOT__valid + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__3__KET____DOT__VX_Warp__out_valid[2U] + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__warp_zero_change_mask) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__3__KET____DOT__VX_Warp__in_thread_mask + [2U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__warp_zero_stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__valid [2U])); - vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__3__KET____DOT__VX_Warp__out_valid[3U] - = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__3__KET____DOT__warp_zero_change_mask) - ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Warp__in_thread_mask - [3U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__3__KET____DOT__warp_zero_stall)) - & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__3__KET____DOT__VX_Warp__DOT__valid + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__3__KET____DOT__VX_Warp__out_valid[3U] + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__warp_zero_change_mask) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__3__KET____DOT__VX_Warp__in_thread_mask + [3U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__warp_zero_stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__valid [3U])); - vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__4__KET____DOT__VX_Warp__out_valid[0U] - = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__4__KET____DOT__warp_zero_change_mask) - ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Warp__in_thread_mask - [0U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__4__KET____DOT__warp_zero_stall)) - & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__4__KET____DOT__VX_Warp__DOT__valid + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__4__KET____DOT__VX_Warp__out_valid[0U] + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__warp_zero_change_mask) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__4__KET____DOT__VX_Warp__in_thread_mask + [0U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__warp_zero_stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__valid [0U])); - vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__4__KET____DOT__VX_Warp__out_valid[1U] - = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__4__KET____DOT__warp_zero_change_mask) - ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Warp__in_thread_mask - [1U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__4__KET____DOT__warp_zero_stall)) - & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__4__KET____DOT__VX_Warp__DOT__valid + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__4__KET____DOT__VX_Warp__out_valid[1U] + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__warp_zero_change_mask) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__4__KET____DOT__VX_Warp__in_thread_mask + [1U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__warp_zero_stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__valid [1U])); - vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__4__KET____DOT__VX_Warp__out_valid[2U] - = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__4__KET____DOT__warp_zero_change_mask) - ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Warp__in_thread_mask - [2U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__4__KET____DOT__warp_zero_stall)) - & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__4__KET____DOT__VX_Warp__DOT__valid + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__4__KET____DOT__VX_Warp__out_valid[2U] + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__warp_zero_change_mask) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__4__KET____DOT__VX_Warp__in_thread_mask + [2U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__warp_zero_stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__valid [2U])); - vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__4__KET____DOT__VX_Warp__out_valid[3U] - = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__4__KET____DOT__warp_zero_change_mask) - ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Warp__in_thread_mask - [3U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__4__KET____DOT__warp_zero_stall)) - & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__4__KET____DOT__VX_Warp__DOT__valid + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__4__KET____DOT__VX_Warp__out_valid[3U] + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__warp_zero_change_mask) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__4__KET____DOT__VX_Warp__in_thread_mask + [3U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__warp_zero_stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__valid [3U])); - vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__5__KET____DOT__VX_Warp__out_valid[0U] - = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__5__KET____DOT__warp_zero_change_mask) - ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Warp__in_thread_mask - [0U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__5__KET____DOT__warp_zero_stall)) - & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__5__KET____DOT__VX_Warp__DOT__valid + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__5__KET____DOT__VX_Warp__out_valid[0U] + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__warp_zero_change_mask) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__5__KET____DOT__VX_Warp__in_thread_mask + [0U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__warp_zero_stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__valid [0U])); - vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__5__KET____DOT__VX_Warp__out_valid[1U] - = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__5__KET____DOT__warp_zero_change_mask) - ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Warp__in_thread_mask - [1U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__5__KET____DOT__warp_zero_stall)) - & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__5__KET____DOT__VX_Warp__DOT__valid + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__5__KET____DOT__VX_Warp__out_valid[1U] + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__warp_zero_change_mask) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__5__KET____DOT__VX_Warp__in_thread_mask + [1U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__warp_zero_stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__valid [1U])); - vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__5__KET____DOT__VX_Warp__out_valid[2U] - = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__5__KET____DOT__warp_zero_change_mask) - ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Warp__in_thread_mask - [2U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__5__KET____DOT__warp_zero_stall)) - & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__5__KET____DOT__VX_Warp__DOT__valid + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__5__KET____DOT__VX_Warp__out_valid[2U] + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__warp_zero_change_mask) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__5__KET____DOT__VX_Warp__in_thread_mask + [2U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__warp_zero_stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__valid [2U])); - vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__5__KET____DOT__VX_Warp__out_valid[3U] - = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__5__KET____DOT__warp_zero_change_mask) - ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Warp__in_thread_mask - [3U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__5__KET____DOT__warp_zero_stall)) - & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__5__KET____DOT__VX_Warp__DOT__valid + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__5__KET____DOT__VX_Warp__out_valid[3U] + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__warp_zero_change_mask) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__5__KET____DOT__VX_Warp__in_thread_mask + [3U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__warp_zero_stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__valid [3U])); - vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__6__KET____DOT__VX_Warp__out_valid[0U] - = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__6__KET____DOT__warp_zero_change_mask) - ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Warp__in_thread_mask - [0U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__6__KET____DOT__warp_zero_stall)) - & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__6__KET____DOT__VX_Warp__DOT__valid + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__6__KET____DOT__VX_Warp__out_valid[0U] + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__warp_zero_change_mask) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__6__KET____DOT__VX_Warp__in_thread_mask + [0U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__warp_zero_stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__valid [0U])); - vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__6__KET____DOT__VX_Warp__out_valid[1U] - = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__6__KET____DOT__warp_zero_change_mask) - ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Warp__in_thread_mask - [1U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__6__KET____DOT__warp_zero_stall)) - & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__6__KET____DOT__VX_Warp__DOT__valid + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__6__KET____DOT__VX_Warp__out_valid[1U] + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__warp_zero_change_mask) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__6__KET____DOT__VX_Warp__in_thread_mask + [1U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__warp_zero_stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__valid [1U])); - vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__6__KET____DOT__VX_Warp__out_valid[2U] - = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__6__KET____DOT__warp_zero_change_mask) - ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Warp__in_thread_mask - [2U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__6__KET____DOT__warp_zero_stall)) - & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__6__KET____DOT__VX_Warp__DOT__valid + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__6__KET____DOT__VX_Warp__out_valid[2U] + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__warp_zero_change_mask) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__6__KET____DOT__VX_Warp__in_thread_mask + [2U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__warp_zero_stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__valid [2U])); - vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__6__KET____DOT__VX_Warp__out_valid[3U] - = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__6__KET____DOT__warp_zero_change_mask) - ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Warp__in_thread_mask - [3U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__6__KET____DOT__warp_zero_stall)) - & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__6__KET____DOT__VX_Warp__DOT__valid + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__6__KET____DOT__VX_Warp__out_valid[3U] + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__warp_zero_change_mask) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__6__KET____DOT__VX_Warp__in_thread_mask + [3U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__warp_zero_stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__valid [3U])); - vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__7__KET____DOT__VX_Warp__out_valid[0U] - = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__7__KET____DOT__warp_zero_change_mask) - ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Warp__in_thread_mask - [0U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__7__KET____DOT__warp_zero_stall)) - & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__7__KET____DOT__VX_Warp__DOT__valid + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__7__KET____DOT__VX_Warp__out_valid[0U] + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__warp_zero_change_mask) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__7__KET____DOT__VX_Warp__in_thread_mask + [0U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__warp_zero_stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__valid [0U])); - vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__7__KET____DOT__VX_Warp__out_valid[1U] - = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__7__KET____DOT__warp_zero_change_mask) - ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Warp__in_thread_mask - [1U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__7__KET____DOT__warp_zero_stall)) - & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__7__KET____DOT__VX_Warp__DOT__valid + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__7__KET____DOT__VX_Warp__out_valid[1U] + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__warp_zero_change_mask) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__7__KET____DOT__VX_Warp__in_thread_mask + [1U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__warp_zero_stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__valid [1U])); - vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__7__KET____DOT__VX_Warp__out_valid[2U] - = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__7__KET____DOT__warp_zero_change_mask) - ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Warp__in_thread_mask - [2U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__7__KET____DOT__warp_zero_stall)) - & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__7__KET____DOT__VX_Warp__DOT__valid + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__7__KET____DOT__VX_Warp__out_valid[2U] + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__warp_zero_change_mask) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__7__KET____DOT__VX_Warp__in_thread_mask + [2U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__warp_zero_stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__valid [2U])); - vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__7__KET____DOT__VX_Warp__out_valid[3U] - = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__7__KET____DOT__warp_zero_change_mask) - ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Warp__in_thread_mask - [3U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__7__KET____DOT__warp_zero_stall)) - & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__7__KET____DOT__VX_Warp__DOT__valid + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__7__KET____DOT__VX_Warp__out_valid[3U] + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__warp_zero_change_mask) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__7__KET____DOT__VX_Warp__in_thread_mask + [3U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__warp_zero_stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__valid [3U])); vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[0U][3U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__0__KET____DOT__VX_Warp__out_valid + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__0__KET____DOT__VX_Warp__out_valid [3U]; vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[0U][2U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__0__KET____DOT__VX_Warp__out_valid + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__0__KET____DOT__VX_Warp__out_valid [2U]; vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[0U][1U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__0__KET____DOT__VX_Warp__out_valid + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__0__KET____DOT__VX_Warp__out_valid [1U]; vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[0U][0U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__0__KET____DOT__VX_Warp__out_valid + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__0__KET____DOT__VX_Warp__out_valid [0U]; vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[1U][3U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__1__KET____DOT__VX_Warp__out_valid + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__1__KET____DOT__VX_Warp__out_valid [3U]; vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[1U][2U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__1__KET____DOT__VX_Warp__out_valid + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__1__KET____DOT__VX_Warp__out_valid [2U]; vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[1U][1U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__1__KET____DOT__VX_Warp__out_valid + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__1__KET____DOT__VX_Warp__out_valid [1U]; vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[1U][0U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__1__KET____DOT__VX_Warp__out_valid + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__1__KET____DOT__VX_Warp__out_valid [0U]; vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[2U][3U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__2__KET____DOT__VX_Warp__out_valid + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__2__KET____DOT__VX_Warp__out_valid [3U]; vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[2U][2U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__2__KET____DOT__VX_Warp__out_valid + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__2__KET____DOT__VX_Warp__out_valid [2U]; vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[2U][1U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__2__KET____DOT__VX_Warp__out_valid + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__2__KET____DOT__VX_Warp__out_valid [1U]; vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[2U][0U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__2__KET____DOT__VX_Warp__out_valid + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__2__KET____DOT__VX_Warp__out_valid [0U]; vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[3U][3U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__3__KET____DOT__VX_Warp__out_valid + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__3__KET____DOT__VX_Warp__out_valid [3U]; vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[3U][2U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__3__KET____DOT__VX_Warp__out_valid + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__3__KET____DOT__VX_Warp__out_valid [2U]; vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[3U][1U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__3__KET____DOT__VX_Warp__out_valid + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__3__KET____DOT__VX_Warp__out_valid [1U]; vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[3U][0U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__3__KET____DOT__VX_Warp__out_valid + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__3__KET____DOT__VX_Warp__out_valid [0U]; vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[4U][3U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__4__KET____DOT__VX_Warp__out_valid + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__4__KET____DOT__VX_Warp__out_valid [3U]; vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[4U][2U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__4__KET____DOT__VX_Warp__out_valid + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__4__KET____DOT__VX_Warp__out_valid [2U]; vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[4U][1U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__4__KET____DOT__VX_Warp__out_valid + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__4__KET____DOT__VX_Warp__out_valid [1U]; vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[4U][0U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__4__KET____DOT__VX_Warp__out_valid + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__4__KET____DOT__VX_Warp__out_valid [0U]; vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[5U][3U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__5__KET____DOT__VX_Warp__out_valid + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__5__KET____DOT__VX_Warp__out_valid [3U]; vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[5U][2U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__5__KET____DOT__VX_Warp__out_valid + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__5__KET____DOT__VX_Warp__out_valid [2U]; vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[5U][1U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__5__KET____DOT__VX_Warp__out_valid + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__5__KET____DOT__VX_Warp__out_valid [1U]; vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[5U][0U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__5__KET____DOT__VX_Warp__out_valid + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__5__KET____DOT__VX_Warp__out_valid [0U]; vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[6U][3U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__6__KET____DOT__VX_Warp__out_valid + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__6__KET____DOT__VX_Warp__out_valid [3U]; vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[6U][2U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__6__KET____DOT__VX_Warp__out_valid + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__6__KET____DOT__VX_Warp__out_valid [2U]; vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[6U][1U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__6__KET____DOT__VX_Warp__out_valid + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__6__KET____DOT__VX_Warp__out_valid [1U]; vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[6U][0U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__6__KET____DOT__VX_Warp__out_valid + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__6__KET____DOT__VX_Warp__out_valid [0U]; vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[7U][3U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__7__KET____DOT__VX_Warp__out_valid + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__7__KET____DOT__VX_Warp__out_valid [3U]; vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[7U][2U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__7__KET____DOT__VX_Warp__out_valid + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__7__KET____DOT__VX_Warp__out_valid [2U]; vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[7U][1U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__7__KET____DOT__VX_Warp__out_valid + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__7__KET____DOT__VX_Warp__out_valid [1U]; vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[7U][0U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__7__KET____DOT__VX_Warp__out_valid + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__7__KET____DOT__VX_Warp__out_valid [0U]; - // ALWAYS at VX_fetch.v:172 + // ALWAYS at VX_fetch.v:177 if ((0U == (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num))) { vlTOPp->Vortex__DOT__vx_fetch__DOT__out_valid_var[0U] = vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid @@ -7017,34 +4558,22 @@ VL_INLINE_OPT void VVortex::_settle__TOP__3(VVortex__Syms* __restrict vlSymsp) { = vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid [7U][3U]; } - vlTOPp->Vortex__DOT____Vcellout__vx_fetch__out_valid[3U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT__out_valid_var - [3U]; - vlTOPp->Vortex__DOT____Vcellout__vx_fetch__out_valid[2U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT__out_valid_var - [2U]; - vlTOPp->Vortex__DOT____Vcellout__vx_fetch__out_valid[1U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT__out_valid_var - [1U]; - vlTOPp->Vortex__DOT____Vcellout__vx_fetch__out_valid[0U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT__out_valid_var - [0U]; - vlTOPp->Vortex__DOT__fetch_valid[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_fetch__out_valid - [3U]; - vlTOPp->Vortex__DOT__fetch_valid[2U] = vlTOPp->Vortex__DOT____Vcellout__vx_fetch__out_valid - [2U]; - vlTOPp->Vortex__DOT__fetch_valid[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_fetch__out_valid - [1U]; - vlTOPp->Vortex__DOT__fetch_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_fetch__out_valid - [0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_f_d_reg__in_valid[3U] - = vlTOPp->Vortex__DOT__fetch_valid[3U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_f_d_reg__in_valid[2U] - = vlTOPp->Vortex__DOT__fetch_valid[2U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_f_d_reg__in_valid[1U] - = vlTOPp->Vortex__DOT__fetch_valid[1U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_f_d_reg__in_valid[0U] - = vlTOPp->Vortex__DOT__fetch_valid[0U]; + vlSymsp->TOP__Vortex__DOT__fe_inst_meta_fd.valid + = ((0xeU & (IData)(vlSymsp->TOP__Vortex__DOT__fe_inst_meta_fd.valid)) + | vlTOPp->Vortex__DOT__vx_fetch__DOT__out_valid_var + [0U]); + vlSymsp->TOP__Vortex__DOT__fe_inst_meta_fd.valid + = ((0xdU & (IData)(vlSymsp->TOP__Vortex__DOT__fe_inst_meta_fd.valid)) + | (vlTOPp->Vortex__DOT__vx_fetch__DOT__out_valid_var + [1U] << 1U)); + vlSymsp->TOP__Vortex__DOT__fe_inst_meta_fd.valid + = ((0xbU & (IData)(vlSymsp->TOP__Vortex__DOT__fe_inst_meta_fd.valid)) + | (vlTOPp->Vortex__DOT__vx_fetch__DOT__out_valid_var + [2U] << 2U)); + vlSymsp->TOP__Vortex__DOT__fe_inst_meta_fd.valid + = ((7U & (IData)(vlSymsp->TOP__Vortex__DOT__fe_inst_meta_fd.valid)) + | (vlTOPp->Vortex__DOT__vx_fetch__DOT__out_valid_var + [3U] << 3U)); } VL_INLINE_OPT void VVortex::_sequent__TOP__4(VVortex__Syms* __restrict vlSymsp) { @@ -7052,4912 +4581,105 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__4(VVortex__Syms* __restrict vlSymsp) VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; // Variables // Begin mtask footprint all: - VL_SIG8(__Vdly__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__state_stall,5,0); - VL_SIG8(__Vdlyvdim0__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers__v0,4,0); - VL_SIG8(__Vdlyvset__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers__v0,0,0); - VL_SIG8(__Vdlyvdim0__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0,4,0); - VL_SIG8(__Vdlyvset__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0,0,0); - VL_SIG8(__Vdlyvset__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1,0,0); - VL_SIG8(__Vdlyvdim0__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0,4,0); - VL_SIG8(__Vdlyvset__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0,0,0); - VL_SIG8(__Vdlyvset__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v1,0,0); - VL_SIG8(__Vdlyvdim0__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0,4,0); - VL_SIG8(__Vdlyvset__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0,0,0); - VL_SIG8(__Vdlyvset__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v1,0,0); - VL_SIG8(__Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__valid__v0,0,0); - VL_SIG8(__Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__valid__v1,0,0); - VL_SIG8(__Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__valid__v2,0,0); - VL_SIG8(__Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__valid__v3,0,0); - VL_SIG8(__Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__valid__v0,0,0); - VL_SIG8(__Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__valid__v1,0,0); - VL_SIG8(__Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__valid__v2,0,0); - VL_SIG8(__Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__valid__v3,0,0); - VL_SIG8(__Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__valid__v0,0,0); - VL_SIG8(__Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__valid__v1,0,0); - VL_SIG8(__Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__valid__v2,0,0); - VL_SIG8(__Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__valid__v3,0,0); - VL_SIG8(__Vdlyvset__Vortex__DOT__vx_csr_handler__DOT__csr__v0,0,0); - VL_SIG16(__Vdlyvdim0__Vortex__DOT__vx_csr_handler__DOT__csr__v0,10,0); - VL_SIG16(__Vdlyvval__Vortex__DOT__vx_csr_handler__DOT__csr__v0,11,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers__v0,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v2,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v3,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v4,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v5,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v6,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v7,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v8,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v9,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v10,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v11,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v12,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v13,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v14,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v15,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v16,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v17,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v18,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v19,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v20,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v21,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v22,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v23,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v24,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v25,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v26,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v27,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v28,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v29,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v30,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v31,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v32,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v1,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v2,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v3,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v4,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v5,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v6,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v7,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v8,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v9,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v10,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v11,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v12,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v13,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v14,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v15,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v16,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v17,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v18,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v19,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v20,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v21,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v22,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v23,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v24,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v25,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v26,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v27,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v28,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v29,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v30,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v31,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v32,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v1,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v2,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v3,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v4,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v5,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v6,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v7,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v8,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v9,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v10,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v11,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v12,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v13,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v14,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v15,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v16,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v17,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v18,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v19,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v20,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v21,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v22,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v23,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v24,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v25,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v26,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v27,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v28,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v29,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v30,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v31,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v32,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__a_reg_data__v0,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__a_reg_data__v1,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__a_reg_data__v2,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__a_reg_data__v3,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__b_reg_data__v0,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__b_reg_data__v1,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__b_reg_data__v2,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__b_reg_data__v3,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__alu_result__v0,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__alu_result__v1,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__alu_result__v2,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__alu_result__v3,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__b_reg_data__v0,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__b_reg_data__v1,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__b_reg_data__v2,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__b_reg_data__v3,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__alu_result__v0,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__alu_result__v1,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__alu_result__v2,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__alu_result__v3,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__mem_result__v0,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__mem_result__v1,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__mem_result__v2,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__mem_result__v3,31,0); - // Body - __Vdly__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__state_stall - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__state_stall; - __Vdlyvset__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers__v0 = 0U; - __Vdlyvset__Vortex__DOT__vx_csr_handler__DOT__csr__v0 = 0U; - __Vdlyvset__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 0U; - __Vdlyvset__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 0U; - __Vdlyvset__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 0U; - __Vdlyvset__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 0U; - __Vdlyvset__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 0U; - __Vdlyvset__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 0U; - // ALWAYS at VX_e_m_reg.v:128 - __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__b_reg_data__v0 - = vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_b_reg_data - [3U]; - __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__b_reg_data__v1 - = vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_b_reg_data - [2U]; - __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__b_reg_data__v2 - = vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_b_reg_data - [1U]; - __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__b_reg_data__v3 - = vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_b_reg_data - [0U]; - // ALWAYS at VX_m_w_reg.v:63 - __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__valid__v0 - = vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_valid - [3U]; - __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__valid__v1 - = vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_valid - [2U]; - __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__valid__v2 - = vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_valid - [1U]; - __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__valid__v3 - = vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_valid - [0U]; - // ALWAYS at VX_e_m_reg.v:128 - __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__valid__v0 - = vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_valid - [3U]; - __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__valid__v1 - = vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_valid - [2U]; - __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__valid__v2 - = vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_valid - [1U]; - __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__valid__v3 - = vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_valid - [0U]; - // ALWAYS at VX_context.v:83 - if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__real_zero_isclone) - & (0U == (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__state_stall)))) { - __Vdly__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__state_stall = 0xaU; - } else { - if ((1U == (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__state_stall))) { - __Vdly__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__state_stall = 0U; - } else { - if ((0U < (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__state_stall))) { - __Vdly__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__state_stall - = (0x3fU & ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__state_stall) - - (IData)(1U))); - } - } - } - // ALWAYS at VX_d_e_reg.v:145 - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__upper_immed - = (0xfffffU & ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) - ? 0U : ((0x37U == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) - ? (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0xcU) : ((0x17U - == - (0x7fU - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) - ? - (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0xcU) - : 0U)))); - // ALWAYS at VX_m_w_reg.v:63 - __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__mem_result__v0 - = vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_mem_result - [3U]; - __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__mem_result__v1 - = vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_mem_result - [2U]; - __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__mem_result__v2 - = vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_mem_result - [1U]; - __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__mem_result__v3 - = vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_mem_result - [0U]; - // ALWAYS at VX_m_w_reg.v:63 - __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__alu_result__v0 - = vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_alu_result - [3U]; - __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__alu_result__v1 - = vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_alu_result - [2U]; - __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__alu_result__v2 - = vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_alu_result - [1U]; - __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__alu_result__v3 - = vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_alu_result - [0U]; - // ALWAYS at VX_csr_handler.v:36 - vlTOPp->Vortex__DOT__vx_csr_handler__DOT__decode_csr_address - = vlTOPp->Vortex__DOT__decode_csr_address; - // ALWAYS at VX_csr_handler.v:36 - if (vlTOPp->Vortex__DOT__m_w_valid[0U]) { - vlTOPp->Vortex__DOT__vx_csr_handler__DOT__instret - = (VL_ULL(1) + vlTOPp->Vortex__DOT__vx_csr_handler__DOT__instret); - } - // ALWAYS at VX_csr_handler.v:36 - vlTOPp->Vortex__DOT__vx_csr_handler__DOT__cycle - = (VL_ULL(1) + vlTOPp->Vortex__DOT__vx_csr_handler__DOT__cycle); - // ALWAYS at VX_d_e_reg.v:145 - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rs2_src = - (1U & ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) - ? 0U : (1U & (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_itype) - | (0x23U == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction))) - ? 1U : 0U)))); - // ALWAYS at VX_e_m_reg.v:128 - __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__alu_result__v0 - = vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_alu_result - [3U]; - __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__alu_result__v1 - = vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_alu_result - [2U]; - __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__alu_result__v2 - = vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_alu_result - [1U]; - __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__alu_result__v3 - = vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_alu_result - [0U]; - // ALWAYS at VX_e_m_reg.v:128 - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type - = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__branch_type; - // ALWAYS at VX_e_m_reg.v:128 - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__jal; - // ALWAYS at VX_d_e_reg.v:145 - __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__valid__v0 - = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) - ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid_z - [3U] : vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_valid - [3U]); - __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__valid__v1 - = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) - ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid_z - [2U] : vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_valid - [2U]); - __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__valid__v2 - = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) - ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid_z - [1U] : vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_valid - [1U]); - __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__valid__v3 - = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) - ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid_z - [0U] : vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_valid - [0U]); - // ALWAYS at VX_e_m_reg.v:128 - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__mem_write - = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__mem_write; - // ALWAYS at VX_e_m_reg.v:128 - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__mem_read - = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__mem_read; - // ALWAYS at VX_e_m_reg.v:128 - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__curr_PC = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__curr_PC; - // ALWAYS at VX_e_m_reg.v:128 - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_offset - = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__itype_immed; - // ALWAYS at VX_e_m_reg.v:128 - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal_dest - = (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [0U] + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__jal_offset); - // ALWAYS at VX_m_w_reg.v:63 - vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__PC_next = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__PC_next; - // ALWAYS at VX_register_file.v:45 - if (((((0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - & (0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd))) - & vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_valid - [0U]) & (0U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__warp_num)))) { - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers__v0 - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_write_data - [0U]; - __Vdlyvset__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers__v0 = 1U; - __Vdlyvdim0__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers__v0 - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd; - } - // ALWAYS at VX_d_e_reg.v:145 - __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__a_reg_data__v0 - = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) - ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__reg_data_z - [3U] : vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_a_reg_data - [3U]); - __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__a_reg_data__v1 - = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) - ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__reg_data_z - [2U] : vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_a_reg_data - [2U]); - __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__a_reg_data__v2 - = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) - ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__reg_data_z - [1U] : vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_a_reg_data - [1U]); - __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__a_reg_data__v3 - = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) - ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__reg_data_z - [0U] : vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_a_reg_data - [0U]); - // ALWAYS at VX_csr_handler.v:45 - if (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__is_csr) { - vlTOPp->Vortex__DOT__vx_csr_handler__DOT____Vlvbound1 - = (0xfffU & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__csr_result); - if (VL_LIKELY((0x400U >= (0x7ffU & (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__csr_address))))) { - __Vdlyvval__Vortex__DOT__vx_csr_handler__DOT__csr__v0 - = vlTOPp->Vortex__DOT__vx_csr_handler__DOT____Vlvbound1; - __Vdlyvset__Vortex__DOT__vx_csr_handler__DOT__csr__v0 = 1U; - __Vdlyvdim0__Vortex__DOT__vx_csr_handler__DOT__csr__v0 - = (0x7ffU & (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__csr_address)); - } - } - // ALWAYS at VX_d_e_reg.v:145 - __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__b_reg_data__v0 - = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) - ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__reg_data_z - [3U] : vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_b_reg_data - [3U]); - __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__b_reg_data__v1 - = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) - ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__reg_data_z - [2U] : vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_b_reg_data - [2U]); - __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__b_reg_data__v2 - = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) - ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__reg_data_z - [1U] : vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_b_reg_data - [1U]); - __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__b_reg_data__v3 - = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) - ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__reg_data_z - [0U] : vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_b_reg_data - [0U]); - // ALWAYS at VX_register_file_slave.v:53 - if ((((((0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - & (0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd))) - & vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_valid - [3U]) & (0U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__warp_num))) - & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__real_zero_isclone)))) { - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0 - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_write_data - [3U]; - __Vdlyvset__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 1U; - __Vdlyvdim0__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0 - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd; - } else { - if ((((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__real_zero_isclone) - & ((3U == vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd1_register - [0U]) & (1U == (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__state_stall)))) - & (0U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num)))) { - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v1 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x1fU]; - __Vdlyvset__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 1U; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v2 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x1eU]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v3 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x1dU]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v4 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x1cU]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v5 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x1bU]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v6 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x1aU]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v7 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x19U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v8 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x18U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v9 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x17U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v10 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x16U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v11 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x15U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v12 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x14U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v13 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x13U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v14 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x12U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v15 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x11U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v16 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x10U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v17 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0xfU]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v18 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0xeU]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v19 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0xdU]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v20 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0xcU]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v21 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0xbU]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v22 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0xaU]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v23 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [9U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v24 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [8U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v25 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [7U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v26 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [6U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v27 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [5U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v28 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [4U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v29 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [3U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v30 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [2U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v31 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [1U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v32 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0U]; - } - } - // ALWAYS at VX_register_file_slave.v:53 - if ((((((0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - & (0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd))) - & vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_valid - [2U]) & (0U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__warp_num))) - & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__real_zero_isclone)))) { - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0 - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_write_data - [2U]; - __Vdlyvset__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 1U; - __Vdlyvdim0__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0 - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd; - } else { - if ((((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__real_zero_isclone) - & ((2U == vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd1_register - [0U]) & (1U == (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__state_stall)))) - & (0U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num)))) { - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v1 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x1fU]; - __Vdlyvset__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 1U; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v2 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x1eU]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v3 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x1dU]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v4 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x1cU]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v5 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x1bU]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v6 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x1aU]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v7 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x19U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v8 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x18U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v9 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x17U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v10 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x16U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v11 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x15U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v12 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x14U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v13 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x13U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v14 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x12U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v15 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x11U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v16 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x10U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v17 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0xfU]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v18 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0xeU]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v19 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0xdU]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v20 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0xcU]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v21 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0xbU]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v22 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0xaU]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v23 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [9U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v24 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [8U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v25 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [7U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v26 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [6U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v27 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [5U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v28 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [4U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v29 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [3U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v30 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [2U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v31 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [1U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v32 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0U]; - } - } - // ALWAYS at VX_register_file_slave.v:53 - if ((((((0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - & (0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd))) - & vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_valid - [1U]) & (0U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__warp_num))) - & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__real_zero_isclone)))) { - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0 - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_write_data - [1U]; - __Vdlyvset__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 1U; - __Vdlyvdim0__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0 - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd; - } else { - if ((((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__real_zero_isclone) - & ((1U == vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd1_register - [0U]) & (1U == (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__state_stall)))) - & (0U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num)))) { - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x1fU]; - __Vdlyvset__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 1U; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v2 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x1eU]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v3 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x1dU]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v4 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x1cU]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v5 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x1bU]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v6 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x1aU]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v7 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x19U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v8 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x18U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v9 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x17U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v10 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x16U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v11 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x15U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v12 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x14U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v13 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x13U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v14 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x12U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v15 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x11U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v16 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x10U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v17 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0xfU]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v18 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0xeU]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v19 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0xdU]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v20 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0xcU]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v21 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0xbU]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v22 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0xaU]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v23 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [9U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v24 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [8U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v25 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [7U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v26 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [6U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v27 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [5U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v28 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [4U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v29 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [3U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v30 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [2U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v31 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [1U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v32 - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0U]; - } - } - // ALWAYSPOST at VX_e_m_reg.v:139 - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__b_reg_data[3U] - = __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__b_reg_data__v0; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__b_reg_data[2U] - = __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__b_reg_data__v1; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__b_reg_data[1U] - = __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__b_reg_data__v2; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__b_reg_data[0U] - = __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__b_reg_data__v3; - // ALWAYSPOST at VX_m_w_reg.v:72 - vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__valid[3U] - = __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__valid__v0; - vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__valid[2U] - = __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__valid__v1; - vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__valid[1U] - = __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__valid__v2; - vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__valid[0U] - = __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__valid__v3; - // ALWAYSPOST at VX_e_m_reg.v:148 - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__valid[3U] - = __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__valid__v0; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__valid[2U] - = __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__valid__v1; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__valid[1U] - = __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__valid__v2; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__valid[0U] - = __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__valid__v3; - // ALWAYSPOST at VX_m_w_reg.v:66 - vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__mem_result[3U] - = __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__mem_result__v0; - vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__mem_result[2U] - = __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__mem_result__v1; - vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__mem_result[1U] - = __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__mem_result__v2; - vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__mem_result[0U] - = __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__mem_result__v3; - // ALWAYSPOST at VX_m_w_reg.v:65 - vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__alu_result[3U] - = __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__alu_result__v0; - vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__alu_result[2U] - = __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__alu_result__v1; - vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__alu_result[1U] - = __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__alu_result__v2; - vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__alu_result[0U] - = __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__alu_result__v3; - // ALWAYSPOST at VX_e_m_reg.v:130 - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result[3U] - = __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__alu_result__v0; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result[2U] - = __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__alu_result__v1; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result[1U] - = __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__alu_result__v2; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result[0U] - = __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__alu_result__v3; - // ALWAYSPOST at VX_d_e_reg.v:167 - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid[3U] - = __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__valid__v0; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid[2U] - = __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__valid__v1; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid[1U] - = __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__valid__v2; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid[0U] - = __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__valid__v3; - // ALWAYSPOST at VX_register_file.v:48 - if (__Vdlyvset__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers__v0) { - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[__Vdlyvdim0__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers__v0] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers__v0; - } - // ALWAYSPOST at VX_d_e_reg.v:150 - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__a_reg_data[3U] - = __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__a_reg_data__v0; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__a_reg_data[2U] - = __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__a_reg_data__v1; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__a_reg_data[1U] - = __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__a_reg_data__v2; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__a_reg_data[0U] - = __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__a_reg_data__v3; - // ALWAYSPOST at VX_csr_handler.v:48 - if (__Vdlyvset__Vortex__DOT__vx_csr_handler__DOT__csr__v0) { - vlTOPp->Vortex__DOT__vx_csr_handler__DOT__csr[__Vdlyvdim0__Vortex__DOT__vx_csr_handler__DOT__csr__v0] - = __Vdlyvval__Vortex__DOT__vx_csr_handler__DOT__csr__v0; - } - // ALWAYSPOST at VX_d_e_reg.v:151 - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__b_reg_data[3U] - = __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__b_reg_data__v0; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__b_reg_data[2U] - = __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__b_reg_data__v1; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__b_reg_data[1U] - = __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__b_reg_data__v2; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__b_reg_data[0U] - = __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__b_reg_data__v3; - // ALWAYSPOST at VX_register_file_slave.v:56 - if (__Vdlyvset__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0) { - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[__Vdlyvdim0__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0; - } - if (__Vdlyvset__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v1) { - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1fU] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v1; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1eU] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v2; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1dU] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v3; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1cU] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v4; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1bU] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v5; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1aU] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v6; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x19U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v7; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x18U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v8; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x17U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v9; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x16U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v10; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x15U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v11; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x14U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v12; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x13U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v13; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x12U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v14; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x11U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v15; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x10U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v16; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xfU] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v17; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xeU] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v18; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xdU] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v19; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xcU] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v20; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xbU] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v21; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xaU] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v22; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[9U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v23; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[8U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v24; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[7U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v25; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[6U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v26; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[5U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v27; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[4U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v28; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[3U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v29; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[2U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v30; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[1U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v31; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v32; - } - // ALWAYSPOST at VX_register_file_slave.v:56 - if (__Vdlyvset__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0) { - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[__Vdlyvdim0__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0; - } - if (__Vdlyvset__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v1) { - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1fU] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v1; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1eU] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v2; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1dU] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v3; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1cU] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v4; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1bU] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v5; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1aU] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v6; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x19U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v7; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x18U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v8; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x17U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v9; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x16U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v10; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x15U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v11; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x14U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v12; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x13U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v13; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x12U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v14; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x11U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v15; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x10U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v16; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xfU] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v17; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xeU] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v18; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xdU] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v19; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xcU] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v20; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xbU] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v21; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xaU] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v22; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[9U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v23; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[8U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v24; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[7U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v25; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[6U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v26; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[5U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v27; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[4U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v28; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[3U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v29; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[2U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v30; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[1U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v31; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v32; - } - // ALWAYSPOST at VX_register_file_slave.v:56 - if (__Vdlyvset__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0) { - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[__Vdlyvdim0__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0; - } - if (__Vdlyvset__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1) { - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1fU] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1eU] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v2; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1dU] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v3; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1cU] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v4; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1bU] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v5; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1aU] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v6; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x19U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v7; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x18U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v8; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x17U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v9; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x16U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v10; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x15U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v11; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x14U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v12; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x13U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v13; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x12U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v14; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x11U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v15; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x10U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v16; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xfU] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v17; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xeU] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v18; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xdU] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v19; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xcU] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v20; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xbU] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v21; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xaU] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v22; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[9U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v23; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[8U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v24; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[7U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v25; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[6U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v26; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[5U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v27; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[4U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v28; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[3U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v29; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[2U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v30; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[1U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v31; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v32; - } - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__state_stall - = __Vdly__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__state_stall; - vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_b_reg_data[3U] - = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__b_reg_data - [3U]; - vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_b_reg_data[2U] - = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__b_reg_data - [2U]; - vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_b_reg_data[1U] - = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__b_reg_data - [1U]; - vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_b_reg_data[0U] - = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__b_reg_data - [0U]; - vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_valid[3U] - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__valid - [3U]; - vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_valid[2U] - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__valid - [2U]; - vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_valid[1U] - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__valid - [1U]; - vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_valid[0U] - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__valid - [0U]; - vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_valid[3U] - = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__valid - [3U]; - vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_valid[2U] - = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__valid - [2U]; - vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_valid[1U] - = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__valid - [1U]; - vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_valid[0U] - = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__valid - [0U]; - vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_mem_result[3U] - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__mem_result - [3U]; - vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_mem_result[2U] - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__mem_result - [2U]; - vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_mem_result[1U] - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__mem_result - [1U]; - vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_mem_result[0U] - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__mem_result - [0U]; - vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_alu_result[3U] - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__alu_result - [3U]; - vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_alu_result[2U] - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__alu_result - [2U]; - vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_alu_result[1U] - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__alu_result - [1U]; - vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_alu_result[0U] - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__alu_result - [0U]; - vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_alu_result[3U] - = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result - [3U]; - vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_alu_result[2U] - = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result - [2U]; - vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_alu_result[1U] - = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result - [1U]; - vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_alu_result[0U] - = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result - [0U]; - // ALWAYS at VX_d_e_reg.v:145 - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__branch_type - = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) - ? 0U : (IData)(vlTOPp->Vortex__DOT__decode_branch_type)); - // ALWAYS at VX_d_e_reg.v:145 - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__jal = ((~ (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling)) - & (IData)(vlTOPp->Vortex__DOT__decode_jal)); - vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_valid[3U] - = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid - [3U]; - vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_valid[2U] - = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid - [2U]; - vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_valid[1U] - = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid - [1U]; - vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_valid[0U] - = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid - [0U]; - vlTOPp->out_cache_driver_in_mem_write = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__mem_write; - // ALWAYS at VX_d_e_reg.v:145 - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__mem_write - = (7U & ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) - ? 7U : ((0x23U == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) - ? (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0xcU) : 7U))); - vlTOPp->out_cache_driver_in_mem_read = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__mem_read; - // ALWAYS at VX_d_e_reg.v:145 - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__mem_read - = (7U & ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) - ? 7U : ((3U == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) - ? (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0xcU) : 7U))); - // ALWAYS at VX_d_e_reg.v:145 - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__curr_PC = - ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) - ? 0U : vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__curr_PC); - vlTOPp->Vortex__DOT__memory_branch_dest = (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__curr_PC - + (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_offset - << 1U)); - // ALWAYS at VX_d_e_reg.v:145 - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__itype_immed - = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) - ? 0xdeadbeefU : vlTOPp->Vortex__DOT__decode_itype_immed); - // ALWAYS at VX_d_e_reg.v:145 - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__jal_offset - = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) - ? 0U : vlTOPp->Vortex__DOT__decode_jal_offset); - vlTOPp->Vortex__DOT__vx_writeback__DOT__out_pc_data[0U] - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__PC_next; - vlTOPp->Vortex__DOT__vx_writeback__DOT__out_pc_data[1U] - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__PC_next; - vlTOPp->Vortex__DOT__vx_writeback__DOT__out_pc_data[2U] - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__PC_next; - vlTOPp->Vortex__DOT__vx_writeback__DOT__out_pc_data[3U] - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__PC_next; - vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[0U] - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__PC_next; - vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[1U] - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__PC_next; - vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[2U] - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__PC_next; - vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[3U] - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__PC_next; - // ALWAYS at VX_e_m_reg.v:128 - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__PC_next = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__PC_next_out; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0x1fU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [0x1fU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0x1eU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [0x1eU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0x1dU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [0x1dU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0x1cU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [0x1cU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0x1bU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [0x1bU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0x1aU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [0x1aU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0x19U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [0x19U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0x18U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [0x18U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0x17U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [0x17U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0x16U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [0x16U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0x15U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [0x15U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0x14U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [0x14U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0x13U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [0x13U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0x12U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [0x12U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0x11U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [0x11U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0x10U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [0x10U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0xfU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [0xfU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0xeU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [0xeU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0xdU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [0xdU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0xcU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [0xcU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0xbU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [0xbU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0xaU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [0xaU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[9U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [9U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[8U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [8U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[7U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [7U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[6U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [6U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[5U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [5U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[4U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [4U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [0U]; - vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data[3U] - = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__a_reg_data - [3U]; - vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data[2U] - = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__a_reg_data - [2U]; - vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data[1U] - = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__a_reg_data - [1U]; - vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data[0U] - = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__a_reg_data - [0U]; - // ALWAYS at VX_e_m_reg.v:128 - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__is_csr = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__is_csr; - // ALWAYS at VX_e_m_reg.v:128 - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__csr_address - = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__csr_address; - // ALWAYS at VX_e_m_reg.v:128 - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__csr_result - = ((0xdU == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__csr_mask - : ((0xeU == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? (vlTOPp->Vortex__DOT__csr_decode_csr_data - | vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__csr_mask) - : ((0xfU == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? (vlTOPp->Vortex__DOT__csr_decode_csr_data - & ((IData)(0xffffffffU) - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__csr_mask)) - : 0xdeadbeefU))); - vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_b_reg_data[3U] - = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__b_reg_data - [3U]; - vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_b_reg_data[2U] - = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__b_reg_data - [2U]; - vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_b_reg_data[1U] - = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__b_reg_data - [1U]; - vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_b_reg_data[0U] - = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__b_reg_data - [0U]; - vlTOPp->Vortex__DOT__e_m_b_reg_data[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_b_reg_data - [3U]; - vlTOPp->Vortex__DOT__e_m_b_reg_data[2U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_b_reg_data - [2U]; - vlTOPp->Vortex__DOT__e_m_b_reg_data[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_b_reg_data - [1U]; - vlTOPp->Vortex__DOT__e_m_b_reg_data[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_b_reg_data - [0U]; - vlTOPp->Vortex__DOT__m_w_valid[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_valid - [3U]; - vlTOPp->Vortex__DOT__m_w_valid[2U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_valid - [2U]; - vlTOPp->Vortex__DOT__m_w_valid[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_valid - [1U]; - vlTOPp->Vortex__DOT__m_w_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_valid - [0U]; - vlTOPp->Vortex__DOT__e_m_valid[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_valid - [3U]; - vlTOPp->Vortex__DOT__e_m_valid[2U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_valid - [2U]; - vlTOPp->Vortex__DOT__e_m_valid[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_valid - [1U]; - vlTOPp->Vortex__DOT__e_m_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_valid - [0U]; - vlTOPp->Vortex__DOT__m_w_mem_result[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_mem_result - [3U]; - vlTOPp->Vortex__DOT__m_w_mem_result[2U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_mem_result - [2U]; - vlTOPp->Vortex__DOT__m_w_mem_result[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_mem_result - [1U]; - vlTOPp->Vortex__DOT__m_w_mem_result[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_mem_result - [0U]; - vlTOPp->Vortex__DOT__m_w_alu_result[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_alu_result - [3U]; - vlTOPp->Vortex__DOT__m_w_alu_result[2U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_alu_result - [2U]; - vlTOPp->Vortex__DOT__m_w_alu_result[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_alu_result - [1U]; - vlTOPp->Vortex__DOT__m_w_alu_result[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_alu_result - [0U]; - vlTOPp->Vortex__DOT__e_m_alu_result[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_alu_result - [3U]; - vlTOPp->Vortex__DOT__e_m_alu_result[2U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_alu_result - [2U]; - vlTOPp->Vortex__DOT__e_m_alu_result[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_alu_result - [1U]; - vlTOPp->Vortex__DOT__e_m_alu_result[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_alu_result - [0U]; - vlTOPp->Vortex__DOT__d_e_valid[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_valid - [3U]; - vlTOPp->Vortex__DOT__d_e_valid[2U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_valid - [2U]; - vlTOPp->Vortex__DOT__d_e_valid[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_valid - [1U]; - vlTOPp->Vortex__DOT__d_e_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_valid - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0x1fU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs - [0x1fU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0x1eU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs - [0x1eU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0x1dU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs - [0x1dU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0x1cU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs - [0x1cU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0x1bU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs - [0x1bU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0x1aU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs - [0x1aU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0x19U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs - [0x19U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0x18U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs - [0x18U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0x17U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs - [0x17U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0x16U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs - [0x16U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0x15U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs - [0x15U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0x14U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs - [0x14U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0x13U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs - [0x13U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0x12U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs - [0x12U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0x11U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs - [0x11U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0x10U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs - [0x10U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0xfU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs - [0xfU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0xeU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs - [0xeU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0xdU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs - [0xdU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0xcU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs - [0xcU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0xbU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs - [0xbU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0xaU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs - [0xaU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[9U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs - [9U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[8U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs - [8U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[7U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs - [7U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[6U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs - [6U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[5U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs - [5U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[4U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs - [4U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs - [0U]; - vlTOPp->Vortex__DOT__d_e_a_reg_data[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data - [3U]; - vlTOPp->Vortex__DOT__d_e_a_reg_data[2U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data - [2U]; - vlTOPp->Vortex__DOT__d_e_a_reg_data[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data - [1U]; - vlTOPp->Vortex__DOT__d_e_a_reg_data[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data - [0U]; - vlTOPp->Vortex__DOT__csr_decode_csr_data = ((0xc00U - == (IData)(vlTOPp->Vortex__DOT__vx_csr_handler__DOT__decode_csr_address)) - ? (IData)(vlTOPp->Vortex__DOT__vx_csr_handler__DOT__cycle) - : - ((0xc80U - == (IData)(vlTOPp->Vortex__DOT__vx_csr_handler__DOT__decode_csr_address)) - ? (IData)( - (vlTOPp->Vortex__DOT__vx_csr_handler__DOT__cycle - >> 0x20U)) - : - ((0xc02U - == (IData)(vlTOPp->Vortex__DOT__vx_csr_handler__DOT__decode_csr_address)) - ? (IData)(vlTOPp->Vortex__DOT__vx_csr_handler__DOT__instret) - : - ((0xc82U - == (IData)(vlTOPp->Vortex__DOT__vx_csr_handler__DOT__decode_csr_address)) - ? (IData)( - (vlTOPp->Vortex__DOT__vx_csr_handler__DOT__instret - >> 0x20U)) - : - ((0x400U - >= - (0x7ffU - & (IData)(vlTOPp->Vortex__DOT__vx_csr_handler__DOT__decode_csr_address))) - ? - vlTOPp->Vortex__DOT__vx_csr_handler__DOT__csr - [ - (0x7ffU - & (IData)(vlTOPp->Vortex__DOT__vx_csr_handler__DOT__decode_csr_address))] - : 0U))))); - vlTOPp->Vortex__DOT__d_e_b_reg_data[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_b_reg_data - [3U]; - vlTOPp->Vortex__DOT__d_e_b_reg_data[2U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_b_reg_data - [2U]; - vlTOPp->Vortex__DOT__d_e_b_reg_data[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_b_reg_data - [1U]; - vlTOPp->Vortex__DOT__d_e_b_reg_data[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_b_reg_data - [0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_rd2[3U] - = vlTOPp->Vortex__DOT__e_m_b_reg_data[3U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_rd2[2U] - = vlTOPp->Vortex__DOT__e_m_b_reg_data[2U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_rd2[1U] - = vlTOPp->Vortex__DOT__e_m_b_reg_data[1U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_rd2[0U] - = vlTOPp->Vortex__DOT__e_m_b_reg_data[0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid[3U] - = vlTOPp->Vortex__DOT__m_w_valid[3U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid[2U] - = vlTOPp->Vortex__DOT__m_w_valid[2U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid[1U] - = vlTOPp->Vortex__DOT__m_w_valid[1U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid[0U] - = vlTOPp->Vortex__DOT__m_w_valid[0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid[3U] - = vlTOPp->Vortex__DOT__e_m_valid[3U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid[2U] - = vlTOPp->Vortex__DOT__e_m_valid[2U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid[1U] - = vlTOPp->Vortex__DOT__e_m_valid[1U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid[0U] - = vlTOPp->Vortex__DOT__e_m_valid[0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_mem_result[3U] - = vlTOPp->Vortex__DOT__m_w_mem_result[3U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_mem_result[2U] - = vlTOPp->Vortex__DOT__m_w_mem_result[2U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_mem_result[1U] - = vlTOPp->Vortex__DOT__m_w_mem_result[1U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_mem_result[0U] - = vlTOPp->Vortex__DOT__m_w_mem_result[0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data[3U] - = vlTOPp->Vortex__DOT__m_w_mem_result[3U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data[2U] - = vlTOPp->Vortex__DOT__m_w_mem_result[2U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data[1U] - = vlTOPp->Vortex__DOT__m_w_mem_result[1U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data[0U] - = vlTOPp->Vortex__DOT__m_w_mem_result[0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_alu_result[3U] - = vlTOPp->Vortex__DOT__m_w_alu_result[3U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_alu_result[2U] - = vlTOPp->Vortex__DOT__m_w_alu_result[2U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_alu_result[1U] - = vlTOPp->Vortex__DOT__m_w_alu_result[1U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_alu_result[0U] - = vlTOPp->Vortex__DOT__m_w_alu_result[0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result[3U] - = vlTOPp->Vortex__DOT__m_w_alu_result[3U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result[2U] - = vlTOPp->Vortex__DOT__m_w_alu_result[2U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result[1U] - = vlTOPp->Vortex__DOT__m_w_alu_result[1U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result[0U] - = vlTOPp->Vortex__DOT__m_w_alu_result[0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result[3U] - = vlTOPp->Vortex__DOT__e_m_alu_result[3U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result[2U] - = vlTOPp->Vortex__DOT__e_m_alu_result[2U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result[1U] - = vlTOPp->Vortex__DOT__e_m_alu_result[1U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result[0U] - = vlTOPp->Vortex__DOT__e_m_alu_result[0U]; - vlTOPp->Vortex__DOT__execute_branch_stall = ((0U - != (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__branch_type)) - | (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__jal)); - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_valid[3U] - = vlTOPp->Vortex__DOT__d_e_valid[3U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_valid[2U] - = vlTOPp->Vortex__DOT__d_e_valid[2U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_valid[1U] - = vlTOPp->Vortex__DOT__d_e_valid[1U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_valid[0U] - = vlTOPp->Vortex__DOT__d_e_valid[0U]; - vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[0U] - = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__PC_next; - vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[1U] - = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__PC_next; - vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[2U] - = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__PC_next; - vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[3U] - = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__PC_next; - // ALWAYS at VX_d_e_reg.v:145 - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__PC_next_out - = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) - ? 0U : ((IData)(4U) + vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__curr_PC)); - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1fU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x1fU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1eU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x1eU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1dU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x1dU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1cU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x1cU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1bU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x1bU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1aU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x1aU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x19U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x19U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x18U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x18U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x17U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x17U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x16U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x16U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x15U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x15U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x14U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x14U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x13U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x13U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x12U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x12U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x11U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x11U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x10U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x10U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xfU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0xfU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xeU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0xeU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xdU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0xdU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xcU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0xcU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xbU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0xbU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xaU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0xaU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[9U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [9U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[8U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [8U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[7U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [7U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[6U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [6U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[5U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [5U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[4U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [4U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1fU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x1fU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1eU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x1eU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1dU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x1dU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1cU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x1cU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1bU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x1bU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1aU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x1aU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x19U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x19U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x18U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x18U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x17U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x17U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x16U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x16U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x15U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x15U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x14U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x14U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x13U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x13U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x12U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x12U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x11U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x11U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x10U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x10U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xfU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0xfU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xeU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0xeU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xdU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0xdU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xcU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0xcU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xbU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0xbU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xaU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0xaU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[9U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [9U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[8U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [8U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[7U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [7U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[6U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [6U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[5U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [5U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[4U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [4U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1fU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x1fU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1eU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x1eU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1dU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x1dU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1cU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x1cU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1bU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x1bU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1aU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x1aU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x19U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x19U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x18U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x18U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x17U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x17U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x16U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x16U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x15U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x15U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x14U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x14U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x13U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x13U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x12U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x12U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x11U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x11U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x10U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x10U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xfU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0xfU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xeU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0xeU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xdU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0xdU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xcU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0xcU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xbU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0xbU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xaU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0xaU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[9U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [9U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[8U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [8U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[7U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [7U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[6U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [6U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[5U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [5U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[4U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [4U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0x1fU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x1fU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0x1eU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x1eU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0x1dU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x1dU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0x1cU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x1cU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0x1bU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x1bU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0x1aU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x1aU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0x19U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x19U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0x18U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x18U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0x17U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x17U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0x16U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x16U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0x15U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x15U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0x14U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x14U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0x13U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x13U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0x12U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x12U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0x11U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x11U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0x10U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0x10U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0xfU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0xfU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0xeU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0xeU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0xdU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0xdU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0xcU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0xcU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0xbU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0xbU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0xaU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0xaU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[9U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [9U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[8U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [8U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[7U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [7U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[6U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [6U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[5U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [5U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[4U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [4U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters - [0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data[3U] - = vlTOPp->Vortex__DOT__d_e_a_reg_data[3U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data[2U] - = vlTOPp->Vortex__DOT__d_e_a_reg_data[2U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data[1U] - = vlTOPp->Vortex__DOT__d_e_a_reg_data[1U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data[0U] - = vlTOPp->Vortex__DOT__d_e_a_reg_data[0U]; - // ALWAYS at VX_d_e_reg.v:145 - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__is_csr = - ((~ (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling)) - & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_csr)); - // ALWAYS at VX_d_e_reg.v:145 - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__csr_address - = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) - ? 0U : (IData)(vlTOPp->Vortex__DOT__decode_csr_address)); - // ALWAYS at VX_d_e_reg.v:145 - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__csr_mask - = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) - ? 0U : (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_csr) - & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0xeU)) ? (0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0xfU)) - : vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_a_reg_data - [0U])); - // ALWAYS at VX_d_e_reg.v:145 - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op = - ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) - ? 0xfU : (((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0x19U) & (0x33U == (0x7fU - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction))) - ? (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__mul_alu) - : (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_final_alu))); - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data[3U] - = vlTOPp->Vortex__DOT__d_e_b_reg_data[3U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data[2U] - = vlTOPp->Vortex__DOT__d_e_b_reg_data[2U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data[1U] - = vlTOPp->Vortex__DOT__d_e_b_reg_data[1U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data[0U] - = vlTOPp->Vortex__DOT__d_e_b_reg_data[0U]; - vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_rd2 - [3U]; - vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_rd2 - [2U]; - vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_rd2 - [1U]; - vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_rd2 - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_valid[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_valid[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_valid[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_valid[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_valid[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_valid[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_valid[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_valid[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_valid[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_valid[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_valid[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_valid[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_valid[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_valid[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_valid[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_valid[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_valid[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_valid[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_valid[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_valid[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_valid[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_valid[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_valid[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_valid[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_valid[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_valid[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_valid[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_valid[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_valid[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_valid[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_valid[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_valid[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [0U]; - vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid - [3U]; - vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid - [2U]; - vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid - [1U]; - vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid - [0U]; - vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_valid[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid - [3U]; - vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_valid[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid - [2U]; - vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_valid[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid - [1U]; - vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_valid[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid - [0U]; - vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result - [3U]; - vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result - [2U]; - vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result - [1U]; - vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result - [0U]; - // ALWAYS at VX_memory.v:113 - vlTOPp->Vortex__DOT__memory_branch_dir = (1U & - ((4U - & (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type)) - ? ( - (2U - & (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type)) - ? - ((~ (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type)) - & (~ - (vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result - [0U] - >> 0x1fU))) - : - ((1U - & (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type)) - ? - (vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result - [0U] - >> 0x1fU) - : - (~ - (vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result - [0U] - >> 0x1fU)))) - : ( - (2U - & (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type)) - ? - ((1U - & (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type)) - ? - (vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result - [0U] - >> 0x1fU) - : - (0U - != - vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result - [0U])) - : - ((IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type) - & (0U - == - vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result - [0U]))))); - vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_alu_result[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result - [3U]; - vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_alu_result[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result - [2U]; - vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_alu_result[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result - [1U]; - vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_alu_result[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result - [0U]; - vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_valid[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_valid - [3U]; - vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_valid[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_valid - [2U]; - vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_valid[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_valid - [1U]; - vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_valid[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_valid - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0x1fU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers - [0x1fU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0x1eU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers - [0x1eU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0x1dU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers - [0x1dU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0x1cU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers - [0x1cU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0x1bU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers - [0x1bU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0x1aU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers - [0x1aU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0x19U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers - [0x19U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0x18U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers - [0x18U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0x17U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers - [0x17U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0x16U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers - [0x16U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0x15U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers - [0x15U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0x14U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers - [0x14U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0x13U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers - [0x13U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0x12U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers - [0x12U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0x11U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers - [0x11U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0x10U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers - [0x10U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0xfU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers - [0xfU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0xeU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers - [0xeU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0xdU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers - [0xdU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0xcU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers - [0xcU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0xbU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers - [0xbU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0xaU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers - [0xaU]; - vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[9U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers - [9U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[8U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers - [8U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[7U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers - [7U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[6U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers - [6U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[5U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers - [5U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[4U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers - [4U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers - [0U]; - vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data - [3U]; - vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data - [2U]; - vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data - [1U]; - vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data - [0U]; - vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2 - = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rs2_src) - ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__itype_immed - : vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data - [0U]); - vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2 - = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rs2_src) - ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__itype_immed - : vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data - [1U]); - vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2 - = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rs2_src) - ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__itype_immed - : vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data - [2U]); - vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2 - = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rs2_src) - ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__itype_immed - : vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data - [3U]); - vlTOPp->out_cache_driver_in_data[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data - [3U]; - vlTOPp->out_cache_driver_in_data[2U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data - [2U]; - vlTOPp->out_cache_driver_in_data[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data - [1U]; - vlTOPp->out_cache_driver_in_data[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data - [0U]; - vlTOPp->out_cache_driver_in_valid[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid - [3U]; - vlTOPp->out_cache_driver_in_valid[2U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid - [2U]; - vlTOPp->out_cache_driver_in_valid[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid - [1U]; - vlTOPp->out_cache_driver_in_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid - [0U]; - vlTOPp->Vortex__DOT__memory_valid[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_valid - [3U]; - vlTOPp->Vortex__DOT__memory_valid[2U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_valid - [2U]; - vlTOPp->Vortex__DOT__memory_valid[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_valid - [1U]; - vlTOPp->Vortex__DOT__memory_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_valid - [0U]; - vlTOPp->out_cache_driver_in_address[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address - [3U]; - vlTOPp->out_cache_driver_in_address[2U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address - [2U]; - vlTOPp->out_cache_driver_in_address[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address - [1U]; - vlTOPp->out_cache_driver_in_address[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address - [0U]; - vlTOPp->Vortex__DOT__memory_alu_result[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_alu_result - [3U]; - vlTOPp->Vortex__DOT__memory_alu_result[2U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_alu_result - [2U]; - vlTOPp->Vortex__DOT__memory_alu_result[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_alu_result - [1U]; - vlTOPp->Vortex__DOT__memory_alu_result[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_alu_result - [0U]; - vlTOPp->Vortex__DOT__execute_valid[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_valid - [3U]; - vlTOPp->Vortex__DOT__execute_valid[2U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_valid - [2U]; - vlTOPp->Vortex__DOT__execute_valid[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_valid - [1U]; - vlTOPp->Vortex__DOT__execute_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_valid - [0U]; - vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[0U] - = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__PC_next_out; - vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[1U] - = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__PC_next_out; - vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[2U] - = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__PC_next_out; - vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[3U] - = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__PC_next_out; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[0x1fU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1fU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[0x1eU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1eU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[0x1dU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1dU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[0x1cU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1cU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[0x1bU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1bU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[0x1aU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1aU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[0x19U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x19U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[0x18U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x18U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[0x17U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x17U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[0x16U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x16U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[0x15U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x15U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[0x14U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x14U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[0x13U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x13U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[0x12U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x12U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[0x11U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x11U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[0x10U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x10U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[0xfU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xfU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[0xeU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xeU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[0xdU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xdU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[0xcU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xcU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[0xbU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xbU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[0xaU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xaU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[9U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [9U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[8U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [8U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[7U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [7U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[6U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [6U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[5U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [5U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[4U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [4U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[0x1fU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1fU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[0x1eU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1eU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[0x1dU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1dU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[0x1cU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1cU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[0x1bU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1bU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[0x1aU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1aU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[0x19U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x19U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[0x18U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x18U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[0x17U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x17U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[0x16U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x16U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[0x15U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x15U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[0x14U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x14U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[0x13U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x13U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[0x12U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x12U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[0x11U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x11U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[0x10U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x10U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[0xfU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xfU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[0xeU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xeU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[0xdU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xdU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[0xcU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xcU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[0xbU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xbU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[0xaU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xaU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[9U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [9U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[8U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [8U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[7U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [7U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[6U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [6U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[5U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [5U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[4U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [4U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[0x1fU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1fU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[0x1eU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1eU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[0x1dU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1dU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[0x1cU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1cU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[0x1bU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1bU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[0x1aU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1aU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[0x19U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x19U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[0x18U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x18U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[0x17U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x17U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[0x16U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x16U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[0x15U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x15U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[0x14U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x14U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[0x13U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x13U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[0x12U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x12U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[0x11U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x11U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[0x10U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x10U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[0xfU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xfU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[0xeU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xeU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[0xdU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xdU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[0xcU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xcU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[0xbU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xbU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[0xaU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xaU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[9U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [9U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[8U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [8U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[7U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [7U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[6U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [6U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[5U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [5U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[4U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [4U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[0x1fU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1fU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[0x1eU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1eU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[0x1dU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1dU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[0x1cU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1cU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[0x1bU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1bU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[0x1aU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1aU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[0x19U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x19U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[0x18U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x18U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[0x17U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x17U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[0x16U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x16U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[0x15U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x15U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[0x14U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x14U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[0x13U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x13U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[0x12U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x12U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[0x11U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x11U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[0x10U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x10U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[0xfU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xfU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[0xeU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xeU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[0xdU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xdU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[0xcU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xcU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[0xbU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xbU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[0xaU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xaU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[9U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [9U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[8U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [8U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[7U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [7U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[6U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [6U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[5U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [5U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[4U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [4U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[0x1fU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1fU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[0x1eU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1eU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[0x1dU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1dU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[0x1cU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1cU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[0x1bU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1bU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[0x1aU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1aU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[0x19U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x19U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[0x18U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x18U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[0x17U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x17U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[0x16U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x16U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[0x15U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x15U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[0x14U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x14U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[0x13U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x13U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[0x12U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x12U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[0x11U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x11U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[0x10U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x10U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[0xfU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xfU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[0xeU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xeU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[0xdU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xdU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[0xcU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xcU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[0xbU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xbU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[0xaU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xaU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[9U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [9U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[8U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [8U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[7U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [7U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[6U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [6U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[5U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [5U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[4U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [4U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[0x1fU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1fU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[0x1eU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1eU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[0x1dU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1dU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[0x1cU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1cU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[0x1bU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1bU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[0x1aU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1aU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[0x19U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x19U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[0x18U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x18U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[0x17U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x17U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[0x16U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x16U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[0x15U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x15U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[0x14U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x14U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[0x13U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x13U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[0x12U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x12U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[0x11U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x11U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[0x10U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x10U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[0xfU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xfU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[0xeU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xeU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[0xdU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xdU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[0xcU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xcU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[0xbU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xbU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[0xaU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xaU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[9U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [9U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[8U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [8U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[7U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [7U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[6U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [6U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[5U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [5U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[4U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [4U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[0x1fU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1fU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[0x1eU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1eU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[0x1dU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1dU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[0x1cU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1cU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[0x1bU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1bU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[0x1aU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x1aU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[0x19U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x19U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[0x18U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x18U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[0x17U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x17U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[0x16U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x16U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[0x15U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x15U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[0x14U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x14U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[0x13U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x13U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[0x12U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x12U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[0x11U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x11U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[0x10U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0x10U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[0xfU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xfU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[0xeU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xeU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[0xdU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xdU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[0xcU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xcU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[0xbU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xbU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[0xaU] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0xaU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[9U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [9U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[8U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [8U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[7U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [7U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[6U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [6U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[5U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [5U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[4U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [4U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__w0_t0_registers - [0U]; - vlTOPp->Vortex__DOT__execute_b_reg_data[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data - [3U]; - vlTOPp->Vortex__DOT__execute_b_reg_data[2U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data - [2U]; - vlTOPp->Vortex__DOT__execute_b_reg_data[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data - [1U]; - vlTOPp->Vortex__DOT__execute_b_reg_data[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data - [0U]; - vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__mult_signed_result - = VL_MULS_QQQ(64,64,64, VL_EXTENDS_QI(64,32, - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [0U]), - VL_EXTENDS_QI(64,32, vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)); - vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__mult_signed_result - = VL_MULS_QQQ(64,64,64, VL_EXTENDS_QI(64,32, - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [1U]), - VL_EXTENDS_QI(64,32, vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)); - vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__mult_signed_result - = VL_MULS_QQQ(64,64,64, VL_EXTENDS_QI(64,32, - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [2U]), - VL_EXTENDS_QI(64,32, vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)); - vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__mult_signed_result - = VL_MULS_QQQ(64,64,64, VL_EXTENDS_QI(64,32, - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [3U]), - VL_EXTENDS_QI(64,32, vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)); - vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_valid[3U] - = vlTOPp->Vortex__DOT__memory_valid[3U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_valid[2U] - = vlTOPp->Vortex__DOT__memory_valid[2U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_valid[1U] - = vlTOPp->Vortex__DOT__memory_valid[1U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_valid[0U] - = vlTOPp->Vortex__DOT__memory_valid[0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_alu_result[3U] - = vlTOPp->Vortex__DOT__memory_alu_result[3U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_alu_result[2U] - = vlTOPp->Vortex__DOT__memory_alu_result[2U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_alu_result[1U] - = vlTOPp->Vortex__DOT__memory_alu_result[1U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_alu_result[0U] - = vlTOPp->Vortex__DOT__memory_alu_result[0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result[3U] - = vlTOPp->Vortex__DOT__memory_alu_result[3U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result[2U] - = vlTOPp->Vortex__DOT__memory_alu_result[2U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result[1U] - = vlTOPp->Vortex__DOT__memory_alu_result[1U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result[0U] - = vlTOPp->Vortex__DOT__memory_alu_result[0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_valid[3U] - = vlTOPp->Vortex__DOT__execute_valid[3U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_valid[2U] - = vlTOPp->Vortex__DOT__execute_valid[2U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_valid[1U] - = vlTOPp->Vortex__DOT__execute_valid[1U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_valid[0U] - = vlTOPp->Vortex__DOT__execute_valid[0U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_wspawn_regs[0x1fU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1fU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_wspawn_regs[0x1eU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1eU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_wspawn_regs[0x1dU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1dU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_wspawn_regs[0x1cU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1cU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_wspawn_regs[0x1bU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1bU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_wspawn_regs[0x1aU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1aU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_wspawn_regs[0x19U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs - [0x19U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_wspawn_regs[0x18U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs - [0x18U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_wspawn_regs[0x17U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs - [0x17U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_wspawn_regs[0x16U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs - [0x16U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_wspawn_regs[0x15U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs - [0x15U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_wspawn_regs[0x14U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs - [0x14U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_wspawn_regs[0x13U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs - [0x13U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_wspawn_regs[0x12U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs - [0x12U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_wspawn_regs[0x11U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs - [0x11U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_wspawn_regs[0x10U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs - [0x10U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_wspawn_regs[0xfU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs - [0xfU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_wspawn_regs[0xeU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs - [0xeU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_wspawn_regs[0xdU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs - [0xdU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_wspawn_regs[0xcU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs - [0xcU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_wspawn_regs[0xbU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs - [0xbU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_wspawn_regs[0xaU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs - [0xaU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_wspawn_regs[9U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs - [9U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_wspawn_regs[8U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs - [8U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_wspawn_regs[7U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs - [7U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_wspawn_regs[6U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs - [6U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_wspawn_regs[5U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs - [5U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_wspawn_regs[4U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs - [4U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_wspawn_regs[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs - [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_wspawn_regs[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs - [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_wspawn_regs[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs - [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_wspawn_regs[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs - [0U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_wspawn_regs[0x1fU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1fU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_wspawn_regs[0x1eU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1eU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_wspawn_regs[0x1dU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1dU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_wspawn_regs[0x1cU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1cU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_wspawn_regs[0x1bU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1bU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_wspawn_regs[0x1aU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1aU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_wspawn_regs[0x19U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs - [0x19U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_wspawn_regs[0x18U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs - [0x18U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_wspawn_regs[0x17U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs - [0x17U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_wspawn_regs[0x16U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs - [0x16U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_wspawn_regs[0x15U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs - [0x15U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_wspawn_regs[0x14U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs - [0x14U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_wspawn_regs[0x13U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs - [0x13U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_wspawn_regs[0x12U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs - [0x12U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_wspawn_regs[0x11U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs - [0x11U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_wspawn_regs[0x10U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs - [0x10U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_wspawn_regs[0xfU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs - [0xfU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_wspawn_regs[0xeU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs - [0xeU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_wspawn_regs[0xdU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs - [0xdU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_wspawn_regs[0xcU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs - [0xcU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_wspawn_regs[0xbU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs - [0xbU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_wspawn_regs[0xaU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs - [0xaU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_wspawn_regs[9U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs - [9U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_wspawn_regs[8U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs - [8U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_wspawn_regs[7U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs - [7U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_wspawn_regs[6U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs - [6U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_wspawn_regs[5U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs - [5U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_wspawn_regs[4U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs - [4U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_wspawn_regs[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs - [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_wspawn_regs[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs - [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_wspawn_regs[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs - [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_wspawn_regs[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs - [0U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_wspawn_regs[0x1fU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1fU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_wspawn_regs[0x1eU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1eU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_wspawn_regs[0x1dU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1dU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_wspawn_regs[0x1cU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1cU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_wspawn_regs[0x1bU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1bU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_wspawn_regs[0x1aU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1aU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_wspawn_regs[0x19U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs - [0x19U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_wspawn_regs[0x18U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs - [0x18U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_wspawn_regs[0x17U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs - [0x17U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_wspawn_regs[0x16U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs - [0x16U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_wspawn_regs[0x15U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs - [0x15U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_wspawn_regs[0x14U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs - [0x14U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_wspawn_regs[0x13U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs - [0x13U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_wspawn_regs[0x12U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs - [0x12U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_wspawn_regs[0x11U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs - [0x11U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_wspawn_regs[0x10U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs - [0x10U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_wspawn_regs[0xfU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs - [0xfU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_wspawn_regs[0xeU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs - [0xeU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_wspawn_regs[0xdU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs - [0xdU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_wspawn_regs[0xcU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs - [0xcU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_wspawn_regs[0xbU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs - [0xbU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_wspawn_regs[0xaU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs - [0xaU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_wspawn_regs[9U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs - [9U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_wspawn_regs[8U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs - [8U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_wspawn_regs[7U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs - [7U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_wspawn_regs[6U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs - [6U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_wspawn_regs[5U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs - [5U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_wspawn_regs[4U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs - [4U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_wspawn_regs[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs - [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_wspawn_regs[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs - [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_wspawn_regs[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs - [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_wspawn_regs[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs - [0U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_wspawn_regs[0x1fU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1fU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_wspawn_regs[0x1eU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1eU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_wspawn_regs[0x1dU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1dU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_wspawn_regs[0x1cU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1cU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_wspawn_regs[0x1bU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1bU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_wspawn_regs[0x1aU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1aU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_wspawn_regs[0x19U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs - [0x19U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_wspawn_regs[0x18U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs - [0x18U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_wspawn_regs[0x17U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs - [0x17U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_wspawn_regs[0x16U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs - [0x16U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_wspawn_regs[0x15U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs - [0x15U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_wspawn_regs[0x14U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs - [0x14U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_wspawn_regs[0x13U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs - [0x13U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_wspawn_regs[0x12U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs - [0x12U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_wspawn_regs[0x11U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs - [0x11U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_wspawn_regs[0x10U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs - [0x10U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_wspawn_regs[0xfU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs - [0xfU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_wspawn_regs[0xeU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs - [0xeU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_wspawn_regs[0xdU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs - [0xdU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_wspawn_regs[0xcU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs - [0xcU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_wspawn_regs[0xbU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs - [0xbU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_wspawn_regs[0xaU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs - [0xaU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_wspawn_regs[9U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs - [9U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_wspawn_regs[8U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs - [8U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_wspawn_regs[7U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs - [7U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_wspawn_regs[6U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs - [6U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_wspawn_regs[5U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs - [5U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_wspawn_regs[4U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs - [4U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_wspawn_regs[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs - [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_wspawn_regs[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs - [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_wspawn_regs[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs - [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_wspawn_regs[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs - [0U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_wspawn_regs[0x1fU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1fU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_wspawn_regs[0x1eU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1eU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_wspawn_regs[0x1dU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1dU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_wspawn_regs[0x1cU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1cU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_wspawn_regs[0x1bU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1bU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_wspawn_regs[0x1aU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1aU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_wspawn_regs[0x19U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs - [0x19U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_wspawn_regs[0x18U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs - [0x18U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_wspawn_regs[0x17U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs - [0x17U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_wspawn_regs[0x16U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs - [0x16U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_wspawn_regs[0x15U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs - [0x15U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_wspawn_regs[0x14U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs - [0x14U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_wspawn_regs[0x13U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs - [0x13U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_wspawn_regs[0x12U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs - [0x12U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_wspawn_regs[0x11U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs - [0x11U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_wspawn_regs[0x10U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs - [0x10U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_wspawn_regs[0xfU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs - [0xfU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_wspawn_regs[0xeU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs - [0xeU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_wspawn_regs[0xdU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs - [0xdU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_wspawn_regs[0xcU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs - [0xcU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_wspawn_regs[0xbU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs - [0xbU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_wspawn_regs[0xaU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs - [0xaU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_wspawn_regs[9U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs - [9U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_wspawn_regs[8U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs - [8U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_wspawn_regs[7U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs - [7U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_wspawn_regs[6U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs - [6U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_wspawn_regs[5U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs - [5U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_wspawn_regs[4U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs - [4U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_wspawn_regs[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs - [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_wspawn_regs[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs - [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_wspawn_regs[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs - [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_wspawn_regs[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs - [0U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_wspawn_regs[0x1fU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1fU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_wspawn_regs[0x1eU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1eU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_wspawn_regs[0x1dU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1dU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_wspawn_regs[0x1cU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1cU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_wspawn_regs[0x1bU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1bU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_wspawn_regs[0x1aU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1aU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_wspawn_regs[0x19U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs - [0x19U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_wspawn_regs[0x18U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs - [0x18U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_wspawn_regs[0x17U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs - [0x17U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_wspawn_regs[0x16U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs - [0x16U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_wspawn_regs[0x15U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs - [0x15U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_wspawn_regs[0x14U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs - [0x14U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_wspawn_regs[0x13U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs - [0x13U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_wspawn_regs[0x12U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs - [0x12U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_wspawn_regs[0x11U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs - [0x11U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_wspawn_regs[0x10U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs - [0x10U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_wspawn_regs[0xfU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs - [0xfU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_wspawn_regs[0xeU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs - [0xeU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_wspawn_regs[0xdU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs - [0xdU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_wspawn_regs[0xcU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs - [0xcU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_wspawn_regs[0xbU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs - [0xbU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_wspawn_regs[0xaU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs - [0xaU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_wspawn_regs[9U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs - [9U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_wspawn_regs[8U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs - [8U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_wspawn_regs[7U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs - [7U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_wspawn_regs[6U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs - [6U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_wspawn_regs[5U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs - [5U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_wspawn_regs[4U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs - [4U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_wspawn_regs[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs - [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_wspawn_regs[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs - [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_wspawn_regs[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs - [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_wspawn_regs[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs - [0U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_wspawn_regs[0x1fU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1fU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_wspawn_regs[0x1eU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1eU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_wspawn_regs[0x1dU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1dU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_wspawn_regs[0x1cU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1cU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_wspawn_regs[0x1bU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1bU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_wspawn_regs[0x1aU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs - [0x1aU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_wspawn_regs[0x19U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs - [0x19U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_wspawn_regs[0x18U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs - [0x18U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_wspawn_regs[0x17U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs - [0x17U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_wspawn_regs[0x16U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs - [0x16U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_wspawn_regs[0x15U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs - [0x15U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_wspawn_regs[0x14U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs - [0x14U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_wspawn_regs[0x13U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs - [0x13U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_wspawn_regs[0x12U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs - [0x12U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_wspawn_regs[0x11U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs - [0x11U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_wspawn_regs[0x10U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs - [0x10U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_wspawn_regs[0xfU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs - [0xfU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_wspawn_regs[0xeU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs - [0xeU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_wspawn_regs[0xdU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs - [0xdU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_wspawn_regs[0xcU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs - [0xcU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_wspawn_regs[0xbU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs - [0xbU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_wspawn_regs[0xaU] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs - [0xaU]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_wspawn_regs[9U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs - [9U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_wspawn_regs[8U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs - [8U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_wspawn_regs[7U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs - [7U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_wspawn_regs[6U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs - [6U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_wspawn_regs[5U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs - [5U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_wspawn_regs[4U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs - [4U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_wspawn_regs[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs - [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_wspawn_regs[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs - [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_wspawn_regs[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs - [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_wspawn_regs[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs - [0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_b_reg_data[3U] - = vlTOPp->Vortex__DOT__execute_b_reg_data[3U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_b_reg_data[2U] - = vlTOPp->Vortex__DOT__execute_b_reg_data[2U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_b_reg_data[1U] - = vlTOPp->Vortex__DOT__execute_b_reg_data[1U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_b_reg_data[0U] - = vlTOPp->Vortex__DOT__execute_b_reg_data[0U]; - // ALWAYS at VX_alu.v:48 - vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__0__KET____DOT__vx_alu__out_alu_result - = ((0x10U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((8U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? 0U : ((4U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2) - ? vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [0U] : VL_MODDIV_III(32, - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [0U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)) - : ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2) - ? vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [0U] : VL_MODDIVS_III(32, - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [0U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))) - : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2) - ? 0xffffffffU : - VL_DIV_III(32, - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [0U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)) - : ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2) - ? 0xffffffffU : - VL_DIVS_III(32, - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [0U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)))) - : ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? (IData)((((QData)((IData)( - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [0U])) - * (QData)((IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))) - >> 0x20U)) - : (IData)((((((QData)((IData)( - VL_NEGATE_I((IData)( - (1U - & (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [0U] - >> 0x1fU)))))) - << 0x20U) - | (QData)((IData)( - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [0U]))) - * (QData)((IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))) - >> 0x20U))) - : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? (IData)((vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__mult_signed_result - >> 0x20U)) - : (IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__mult_signed_result))))) - : ((8U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((4U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? vlTOPp->Vortex__DOT__csr_decode_csr_data - : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? vlTOPp->Vortex__DOT__csr_decode_csr_data - : (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__curr_PC - + (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__upper_immed - << 0xcU)))) : ((2U - & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? - ((1U - & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? - (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__upper_immed - << 0xcU) - : - ((vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [0U] - >= vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2) - ? 0U - : 0xffffffffU)) - : - ((1U - & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? - (vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2 - & vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [0U]) - : - (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [0U] - | vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)))) - : ((4U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? VL_SHIFTRS_III(32,32,5, - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [0U], - (0x1fU - & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)) - : (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [0U] >> (0x1fU & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))) - : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [0U] ^ vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2) - : ((vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [0U] < vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2) - ? 1U : 0U))) : ((2U - & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? - ((1U - & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? - (VL_LTS_III(1,32,32, - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [0U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2) - ? 1U - : 0U) - : - (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [0U] - << - (0x1fU - & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))) - : - ((1U - & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? - (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [0U] - - vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2) - : - (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [0U] - + vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)))))); - // ALWAYS at VX_alu.v:48 - vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__1__KET____DOT__vx_alu__out_alu_result - = ((0x10U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((8U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? 0U : ((4U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2) - ? vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [1U] : VL_MODDIV_III(32, - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [1U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)) - : ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2) - ? vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [1U] : VL_MODDIVS_III(32, - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [1U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2))) - : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2) - ? 0xffffffffU : - VL_DIV_III(32, - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [1U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)) - : ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2) - ? 0xffffffffU : - VL_DIVS_III(32, - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [1U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)))) - : ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? (IData)((((QData)((IData)( - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [1U])) - * (QData)((IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2))) - >> 0x20U)) - : (IData)((((((QData)((IData)( - VL_NEGATE_I((IData)( - (1U - & (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [1U] - >> 0x1fU)))))) - << 0x20U) - | (QData)((IData)( - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [1U]))) - * (QData)((IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2))) - >> 0x20U))) - : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? (IData)((vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__mult_signed_result - >> 0x20U)) - : (IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__mult_signed_result))))) - : ((8U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((4U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? vlTOPp->Vortex__DOT__csr_decode_csr_data - : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? vlTOPp->Vortex__DOT__csr_decode_csr_data - : (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__curr_PC - + (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__upper_immed - << 0xcU)))) : ((2U - & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? - ((1U - & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? - (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__upper_immed - << 0xcU) - : - ((vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [1U] - >= vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2) - ? 0U - : 0xffffffffU)) - : - ((1U - & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? - (vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2 - & vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [1U]) - : - (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [1U] - | vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)))) - : ((4U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? VL_SHIFTRS_III(32,32,5, - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [1U], - (0x1fU - & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)) - : (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [1U] >> (0x1fU & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2))) - : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [1U] ^ vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2) - : ((vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [1U] < vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2) - ? 1U : 0U))) : ((2U - & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? - ((1U - & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? - (VL_LTS_III(1,32,32, - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [1U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2) - ? 1U - : 0U) - : - (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [1U] - << - (0x1fU - & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2))) - : - ((1U - & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? - (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [1U] - - vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2) - : - (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [1U] - + vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)))))); - // ALWAYS at VX_alu.v:48 - vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__2__KET____DOT__vx_alu__out_alu_result - = ((0x10U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((8U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? 0U : ((4U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2) - ? vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [2U] : VL_MODDIV_III(32, - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [2U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)) - : ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2) - ? vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [2U] : VL_MODDIVS_III(32, - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [2U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2))) - : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2) - ? 0xffffffffU : - VL_DIV_III(32, - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [2U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)) - : ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2) - ? 0xffffffffU : - VL_DIVS_III(32, - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [2U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)))) - : ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? (IData)((((QData)((IData)( - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [2U])) - * (QData)((IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2))) - >> 0x20U)) - : (IData)((((((QData)((IData)( - VL_NEGATE_I((IData)( - (1U - & (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [2U] - >> 0x1fU)))))) - << 0x20U) - | (QData)((IData)( - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [2U]))) - * (QData)((IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2))) - >> 0x20U))) - : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? (IData)((vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__mult_signed_result - >> 0x20U)) - : (IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__mult_signed_result))))) - : ((8U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((4U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? vlTOPp->Vortex__DOT__csr_decode_csr_data - : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? vlTOPp->Vortex__DOT__csr_decode_csr_data - : (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__curr_PC - + (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__upper_immed - << 0xcU)))) : ((2U - & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? - ((1U - & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? - (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__upper_immed - << 0xcU) - : - ((vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [2U] - >= vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2) - ? 0U - : 0xffffffffU)) - : - ((1U - & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? - (vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2 - & vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [2U]) - : - (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [2U] - | vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)))) - : ((4U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? VL_SHIFTRS_III(32,32,5, - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [2U], - (0x1fU - & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)) - : (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [2U] >> (0x1fU & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2))) - : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [2U] ^ vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2) - : ((vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [2U] < vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2) - ? 1U : 0U))) : ((2U - & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? - ((1U - & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? - (VL_LTS_III(1,32,32, - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [2U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2) - ? 1U - : 0U) - : - (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [2U] - << - (0x1fU - & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2))) - : - ((1U - & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? - (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [2U] - - vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2) - : - (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [2U] - + vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)))))); - // ALWAYS at VX_alu.v:48 - vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__3__KET____DOT__vx_alu__out_alu_result - = ((0x10U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((8U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? 0U : ((4U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2) - ? vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [3U] : VL_MODDIV_III(32, - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [3U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)) - : ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2) - ? vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [3U] : VL_MODDIVS_III(32, - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [3U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2))) - : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2) - ? 0xffffffffU : - VL_DIV_III(32, - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [3U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)) - : ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2) - ? 0xffffffffU : - VL_DIVS_III(32, - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [3U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)))) - : ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? (IData)((((QData)((IData)( - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [3U])) - * (QData)((IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2))) - >> 0x20U)) - : (IData)((((((QData)((IData)( - VL_NEGATE_I((IData)( - (1U - & (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [3U] - >> 0x1fU)))))) - << 0x20U) - | (QData)((IData)( - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [3U]))) - * (QData)((IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2))) - >> 0x20U))) - : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? (IData)((vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__mult_signed_result - >> 0x20U)) - : (IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__mult_signed_result))))) - : ((8U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((4U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? vlTOPp->Vortex__DOT__csr_decode_csr_data - : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? vlTOPp->Vortex__DOT__csr_decode_csr_data - : (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__curr_PC - + (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__upper_immed - << 0xcU)))) : ((2U - & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? - ((1U - & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? - (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__upper_immed - << 0xcU) - : - ((vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [3U] - >= vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2) - ? 0U - : 0xffffffffU)) - : - ((1U - & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? - (vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2 - & vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [3U]) - : - (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [3U] - | vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)))) - : ((4U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? VL_SHIFTRS_III(32,32,5, - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [3U], - (0x1fU - & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)) - : (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [3U] >> (0x1fU & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2))) - : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [3U] ^ vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2) - : ((vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [3U] < vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2) - ? 1U : 0U))) : ((2U - & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? - ((1U - & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? - (VL_LTS_III(1,32,32, - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [3U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2) - ? 1U - : 0U) - : - (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [3U] - << - (0x1fU - & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2))) - : - ((1U - & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? - (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [3U] - - vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2) - : - (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [3U] - + vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)))))); - vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_alu_result[0U] - = vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__0__KET____DOT__vx_alu__out_alu_result; - vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_alu_result[1U] - = vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__1__KET____DOT__vx_alu__out_alu_result; - vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_alu_result[2U] - = vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__2__KET____DOT__vx_alu__out_alu_result; - vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_alu_result[3U] - = vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__3__KET____DOT__vx_alu__out_alu_result; - vlTOPp->Vortex__DOT__execute_alu_result[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_alu_result - [3U]; - vlTOPp->Vortex__DOT__execute_alu_result[2U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_alu_result - [2U]; - vlTOPp->Vortex__DOT__execute_alu_result[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_alu_result - [1U]; - vlTOPp->Vortex__DOT__execute_alu_result[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_alu_result - [0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_alu_result[3U] - = vlTOPp->Vortex__DOT__execute_alu_result[3U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_alu_result[2U] - = vlTOPp->Vortex__DOT__execute_alu_result[2U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_alu_result[1U] - = vlTOPp->Vortex__DOT__execute_alu_result[1U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_alu_result[0U] - = vlTOPp->Vortex__DOT__execute_alu_result[0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result[3U] - = vlTOPp->Vortex__DOT__execute_alu_result[3U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result[2U] - = vlTOPp->Vortex__DOT__execute_alu_result[2U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result[1U] - = vlTOPp->Vortex__DOT__execute_alu_result[1U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result[0U] - = vlTOPp->Vortex__DOT__execute_alu_result[0U]; -} - -VL_INLINE_OPT void VVortex::_sequent__TOP__5(VVortex__Syms* __restrict vlSymsp) { - VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex::_sequent__TOP__5\n"); ); - VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; - // Body - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_valid[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_valid - [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_valid[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_valid - [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_valid[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_valid - [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_valid[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_valid - [0U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_valid[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_valid - [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_valid[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_valid - [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_valid[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_valid - [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_valid[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_valid - [0U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_valid[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_valid - [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_valid[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_valid - [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_valid[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_valid - [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_valid[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_valid - [0U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_valid[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_valid - [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_valid[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_valid - [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_valid[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_valid - [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_valid[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_valid - [0U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_valid[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_valid - [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_valid[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_valid - [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_valid[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_valid - [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_valid[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_valid - [0U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_valid[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_valid - [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_valid[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_valid - [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_valid[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_valid - [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_valid[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_valid - [0U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_valid[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_valid - [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_valid[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_valid - [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_valid[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_valid - [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_valid[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_valid - [0U]; - // ALWAYS at VX_m_w_reg.v:63 - vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__rd; - // ALWAYS at VX_m_w_reg.v:63 - vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__warp_num - = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__warp_num; - // ALWAYS at VX_m_w_reg.v:63 - vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb; - // ALWAYS at VX_e_m_reg.v:128 - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__rd = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rd; - // ALWAYS at VX_e_m_reg.v:128 - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__warp_num - = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__warp_num; - vlTOPp->Vortex__DOT____Vcellout__vx_writeback__out_write_data[3U] - = ((3U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT__vx_writeback__DOT__out_pc_data - [3U] : ((1U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_alu_result - [3U] : vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_mem_result - [3U])); - vlTOPp->Vortex__DOT____Vcellout__vx_writeback__out_write_data[2U] - = ((3U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT__vx_writeback__DOT__out_pc_data - [2U] : ((1U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_alu_result - [2U] : vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_mem_result - [2U])); - vlTOPp->Vortex__DOT____Vcellout__vx_writeback__out_write_data[1U] - = ((3U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT__vx_writeback__DOT__out_pc_data - [1U] : ((1U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_alu_result - [1U] : vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_mem_result - [1U])); - vlTOPp->Vortex__DOT____Vcellout__vx_writeback__out_write_data[0U] - = ((3U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT__vx_writeback__DOT__out_pc_data - [0U] : ((1U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_alu_result - [0U] : vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_mem_result - [0U])); - // ALWAYS at VX_e_m_reg.v:128 - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb; - vlTOPp->Vortex__DOT__writeback_write_data[3U] = - vlTOPp->Vortex__DOT____Vcellout__vx_writeback__out_write_data - [3U]; - vlTOPp->Vortex__DOT__writeback_write_data[2U] = - vlTOPp->Vortex__DOT____Vcellout__vx_writeback__out_write_data - [2U]; - vlTOPp->Vortex__DOT__writeback_write_data[1U] = - vlTOPp->Vortex__DOT____Vcellout__vx_writeback__out_write_data - [1U]; - vlTOPp->Vortex__DOT__writeback_write_data[0U] = - vlTOPp->Vortex__DOT____Vcellout__vx_writeback__out_write_data - [0U]; - // ALWAYS at VX_d_e_reg.v:145 - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rd = (0x1fU - & ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) - ? 0U - : - (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 7U))); - // ALWAYS at VX_d_e_reg.v:145 - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__warp_num - = (0xfU & ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) - ? 0U : (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num))); - vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data[3U] - = vlTOPp->Vortex__DOT__writeback_write_data - [3U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data[2U] - = vlTOPp->Vortex__DOT__writeback_write_data - [2U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data[1U] - = vlTOPp->Vortex__DOT__writeback_write_data - [1U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data[0U] - = vlTOPp->Vortex__DOT__writeback_write_data - [0U]; - // ALWAYS at VX_d_e_reg.v:145 - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) - ? 0U - : - (((((0x6fU - == - (0x7fU - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) - | (0x67U - == - (0x7fU - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction))) - | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jalrs)) - | ((0x73U - == - (0x7fU - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) - & (0U - == - (7U - & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0xcU))))) - ? 3U - : - ((3U - == - (0x7fU - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) - ? 2U - : - ((((((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_itype) - | (0x33U - == - (0x7fU - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction))) - | (0x37U - == - (0x7fU - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction))) - | (0x17U - == - (0x7fU - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction))) - | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_csr)) - ? 1U - : 0U)))); - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_write_data[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_write_data[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_write_data[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_write_data[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_write_data[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_write_data[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_write_data[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_write_data[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_write_data[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_write_data[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_write_data[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_write_data[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_write_data[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_write_data[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_write_data[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_write_data[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_write_data[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_write_data[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_write_data[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_write_data[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_write_data[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_write_data[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_write_data[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_write_data[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_write_data[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_write_data[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_write_data[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_write_data[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_write_data[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_write_data[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_write_data[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_write_data[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [0U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_write_data[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_write_data - [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_write_data[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_write_data - [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_write_data[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_write_data - [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_write_data[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_write_data - [0U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_write_data[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_write_data - [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_write_data[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_write_data - [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_write_data[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_write_data - [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_write_data[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_write_data - [0U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_write_data[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_write_data - [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_write_data[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_write_data - [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_write_data[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_write_data - [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_write_data[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_write_data - [0U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_write_data[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_write_data - [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_write_data[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_write_data - [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_write_data[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_write_data - [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_write_data[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_write_data - [0U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_write_data[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_write_data - [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_write_data[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_write_data - [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_write_data[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_write_data - [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_write_data[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_write_data - [0U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_write_data[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_write_data - [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_write_data[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_write_data - [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_write_data[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_write_data - [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_write_data[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_write_data - [0U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_write_data[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_write_data - [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_write_data[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_write_data - [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_write_data[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_write_data - [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_write_data[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_write_data - [0U]; -} - -VL_INLINE_OPT void VVortex::_sequent__TOP__6(VVortex__Syms* __restrict vlSymsp) { - VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex::_sequent__TOP__6\n"); ); - VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; - // Variables - // Begin mtask footprint all: - VL_SIG8(__Vdly__Vortex__DOT__vx_fetch__DOT__warp_num,3,0); VL_SIG8(__Vdly__Vortex__DOT__vx_fetch__DOT__warp_count,3,0); - VL_SIG8(__Vdlyvset__Vortex__DOT__vx_f_d_reg__DOT__valid__v0,0,0); - VL_SIG8(__Vdlyvval__Vortex__DOT__vx_f_d_reg__DOT__valid__v4,0,0); - VL_SIG8(__Vdlyvset__Vortex__DOT__vx_f_d_reg__DOT__valid__v4,0,0); - VL_SIG8(__Vdlyvval__Vortex__DOT__vx_f_d_reg__DOT__valid__v5,0,0); - VL_SIG8(__Vdlyvval__Vortex__DOT__vx_f_d_reg__DOT__valid__v6,0,0); - VL_SIG8(__Vdlyvval__Vortex__DOT__vx_f_d_reg__DOT__valid__v7,0,0); // Body __Vdly__Vortex__DOT__vx_fetch__DOT__warp_count = vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_count; - __Vdly__Vortex__DOT__vx_fetch__DOT__warp_num = vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num; - __Vdlyvset__Vortex__DOT__vx_f_d_reg__DOT__valid__v0 = 0U; - __Vdlyvset__Vortex__DOT__vx_f_d_reg__DOT__valid__v4 = 0U; + vlTOPp->__Vdly__Vortex__DOT__vx_fetch__DOT__warp_num + = vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num; // ALWAYS at VX_warp.v:71 - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__0__KET____DOT__VX_Warp__DOT__real_PC - = ((IData)(vlTOPp->reset) ? 0U : ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__0__KET____DOT__warp_zero_stall) - ? vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__0__KET____DOT__VX_Warp__DOT__temp_PC + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__VX_Warp__DOT__real_PC + = ((IData)(vlTOPp->reset) ? 0U : ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__warp_zero_stall) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__VX_Warp__DOT__temp_PC : ((IData)(4U) - + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__0__KET____DOT__VX_Warp__DOT__temp_PC))); - // ALWAYS at VX_f_d_reg.v:50 - if (vlTOPp->reset) { - vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__curr_PC = 0U; - } else { - if ((1U & (~ ((IData)(vlTOPp->Vortex__DOT__forwarding_fwd_stall) - | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall))))) { - vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__curr_PC - = vlTOPp->Vortex__DOT__vx_fetch__DOT__out_PC_var; - } - } + + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__VX_Warp__DOT__temp_PC))); // ALWAYS at VX_warp.v:71 - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__7__KET____DOT__VX_Warp__DOT__real_PC + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__real_PC = ((IData)(vlTOPp->reset) ? 0U : (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_wspawn) & (7U == ((IData)(1U) + (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_state)))) - ? vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_a_reg_data - [0U] : ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__7__KET____DOT__warp_zero_stall) - ? vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__7__KET____DOT__VX_Warp__DOT__temp_PC - : - ((IData)(4U) - + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__7__KET____DOT__VX_Warp__DOT__temp_PC)))); + ? vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.a_reg_data[0U] + : ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__warp_zero_stall) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__temp_PC + : ((IData)(4U) + + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__temp_PC)))); // ALWAYS at VX_warp.v:71 - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__6__KET____DOT__VX_Warp__DOT__real_PC + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__real_PC = ((IData)(vlTOPp->reset) ? 0U : (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_wspawn) & (6U == ((IData)(1U) + (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_state)))) - ? vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_a_reg_data - [0U] : ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__6__KET____DOT__warp_zero_stall) - ? vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__6__KET____DOT__VX_Warp__DOT__temp_PC - : - ((IData)(4U) - + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__6__KET____DOT__VX_Warp__DOT__temp_PC)))); + ? vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.a_reg_data[0U] + : ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__warp_zero_stall) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__temp_PC + : ((IData)(4U) + + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__temp_PC)))); // ALWAYS at VX_warp.v:71 - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__5__KET____DOT__VX_Warp__DOT__real_PC + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__real_PC = ((IData)(vlTOPp->reset) ? 0U : (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_wspawn) & (5U == ((IData)(1U) + (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_state)))) - ? vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_a_reg_data - [0U] : ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__5__KET____DOT__warp_zero_stall) - ? vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__5__KET____DOT__VX_Warp__DOT__temp_PC - : - ((IData)(4U) - + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__5__KET____DOT__VX_Warp__DOT__temp_PC)))); + ? vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.a_reg_data[0U] + : ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__warp_zero_stall) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__temp_PC + : ((IData)(4U) + + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__temp_PC)))); // ALWAYS at VX_warp.v:71 - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__4__KET____DOT__VX_Warp__DOT__real_PC + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__real_PC = ((IData)(vlTOPp->reset) ? 0U : (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_wspawn) & (4U == ((IData)(1U) + (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_state)))) - ? vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_a_reg_data - [0U] : ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__4__KET____DOT__warp_zero_stall) - ? vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__4__KET____DOT__VX_Warp__DOT__temp_PC - : - ((IData)(4U) - + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__4__KET____DOT__VX_Warp__DOT__temp_PC)))); + ? vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.a_reg_data[0U] + : ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__warp_zero_stall) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__temp_PC + : ((IData)(4U) + + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__temp_PC)))); // ALWAYS at VX_warp.v:71 - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__3__KET____DOT__VX_Warp__DOT__real_PC + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__real_PC = ((IData)(vlTOPp->reset) ? 0U : (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_wspawn) & (3U == ((IData)(1U) + (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_state)))) - ? vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_a_reg_data - [0U] : ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__3__KET____DOT__warp_zero_stall) - ? vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__3__KET____DOT__VX_Warp__DOT__temp_PC - : - ((IData)(4U) - + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__3__KET____DOT__VX_Warp__DOT__temp_PC)))); + ? vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.a_reg_data[0U] + : ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__warp_zero_stall) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__temp_PC + : ((IData)(4U) + + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__temp_PC)))); // ALWAYS at VX_warp.v:71 - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__2__KET____DOT__VX_Warp__DOT__real_PC + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__real_PC = ((IData)(vlTOPp->reset) ? 0U : (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_wspawn) & (2U == ((IData)(1U) + (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_state)))) - ? vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_a_reg_data - [0U] : ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__2__KET____DOT__warp_zero_stall) - ? vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__2__KET____DOT__VX_Warp__DOT__temp_PC - : - ((IData)(4U) - + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__2__KET____DOT__VX_Warp__DOT__temp_PC)))); + ? vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.a_reg_data[0U] + : ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__warp_zero_stall) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__temp_PC + : ((IData)(4U) + + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__temp_PC)))); // ALWAYS at VX_warp.v:71 - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__1__KET____DOT__VX_Warp__DOT__real_PC + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__real_PC = ((IData)(vlTOPp->reset) ? 0U : (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_wspawn) & (1U == ((IData)(1U) + (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_state)))) - ? vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_a_reg_data - [0U] : ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__1__KET____DOT__warp_zero_stall) - ? vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__1__KET____DOT__VX_Warp__DOT__temp_PC - : - ((IData)(4U) - + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__1__KET____DOT__VX_Warp__DOT__temp_PC)))); - // ALWAYS at VX_fetch.v:65 - __Vdly__Vortex__DOT__vx_fetch__DOT__warp_num = - (0xfU & (((((IData)(vlTOPp->reset) | ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num) - >= (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_state))) - | (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__remove_warp)) - | (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__add_warp)) - ? 0U : (vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid - [(7U & ((IData)(1U) + (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num)))] - ? ((IData)(1U) + (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num)) - : ((IData)(2U) + (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num))))); + ? vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.a_reg_data[0U] + : ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__warp_zero_stall) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__temp_PC + : ((IData)(4U) + + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__temp_PC)))); + // ALWAYS at VX_fetch.v:70 + vlTOPp->__Vdly__Vortex__DOT__vx_fetch__DOT__warp_num + = (0xfU & (((((IData)(vlTOPp->reset) | ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num) + >= (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_state))) + | (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__remove_warp)) + | (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__add_warp)) + ? 0U : (vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid + [(7U & ((IData)(1U) + (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num)))] + ? ((IData)(1U) + (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num)) + : ((IData)(2U) + (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num))))); if (vlTOPp->Vortex__DOT__vx_fetch__DOT__add_warp) { vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_state = (0xfU & ((IData)(1U) + (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_state))); @@ -11973,166 +4695,3095 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__6(VVortex__Syms* __restrict vlSymsp) } } } - // ALWAYS at VX_f_d_reg.v:50 - if (vlTOPp->reset) { - __Vdlyvset__Vortex__DOT__vx_f_d_reg__DOT__valid__v0 = 1U; - } else { - if ((1U & (~ ((IData)(vlTOPp->Vortex__DOT__forwarding_fwd_stall) - | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall))))) { - __Vdlyvval__Vortex__DOT__vx_f_d_reg__DOT__valid__v4 - = vlTOPp->Vortex__DOT____Vcellinp__vx_f_d_reg__in_valid - [3U]; - __Vdlyvset__Vortex__DOT__vx_f_d_reg__DOT__valid__v4 = 1U; - __Vdlyvval__Vortex__DOT__vx_f_d_reg__DOT__valid__v5 - = vlTOPp->Vortex__DOT____Vcellinp__vx_f_d_reg__in_valid - [2U]; - __Vdlyvval__Vortex__DOT__vx_f_d_reg__DOT__valid__v6 - = vlTOPp->Vortex__DOT____Vcellinp__vx_f_d_reg__in_valid - [1U]; - __Vdlyvval__Vortex__DOT__vx_f_d_reg__DOT__valid__v7 - = vlTOPp->Vortex__DOT____Vcellinp__vx_f_d_reg__in_valid - [0U]; - } - } - // ALWAYS at VX_f_d_reg.v:50 - if (vlTOPp->reset) { - vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num = 0U; - } else { - if ((1U & (~ ((IData)(vlTOPp->Vortex__DOT__forwarding_fwd_stall) - | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall))))) { - vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num - = vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num; - } - } + // ALWAYS at VX_generic_register.v:20 + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0U] + = (((IData)(vlTOPp->reset) | (((IData)(vlTOPp->Vortex__DOT__forwarding_fwd_stall) + | (IData)(vlTOPp->Vortex__DOT__execute_branch_stall)) + | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall))) + ? 0U : vlTOPp->Vortex__DOT__vx_d_e_reg__DOT____Vcellinp__d_e_reg__in[0U]); + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[1U] + = (((IData)(vlTOPp->reset) | (((IData)(vlTOPp->Vortex__DOT__forwarding_fwd_stall) + | (IData)(vlTOPp->Vortex__DOT__execute_branch_stall)) + | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall))) + ? 0U : vlTOPp->Vortex__DOT__vx_d_e_reg__DOT____Vcellinp__d_e_reg__in[1U]); + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[2U] + = (((IData)(vlTOPp->reset) | (((IData)(vlTOPp->Vortex__DOT__forwarding_fwd_stall) + | (IData)(vlTOPp->Vortex__DOT__execute_branch_stall)) + | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall))) + ? 0U : vlTOPp->Vortex__DOT__vx_d_e_reg__DOT____Vcellinp__d_e_reg__in[2U]); + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[3U] + = (((IData)(vlTOPp->reset) | (((IData)(vlTOPp->Vortex__DOT__forwarding_fwd_stall) + | (IData)(vlTOPp->Vortex__DOT__execute_branch_stall)) + | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall))) + ? 0U : vlTOPp->Vortex__DOT__vx_d_e_reg__DOT____Vcellinp__d_e_reg__in[3U]); + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[4U] + = (((IData)(vlTOPp->reset) | (((IData)(vlTOPp->Vortex__DOT__forwarding_fwd_stall) + | (IData)(vlTOPp->Vortex__DOT__execute_branch_stall)) + | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall))) + ? 0U : vlTOPp->Vortex__DOT__vx_d_e_reg__DOT____Vcellinp__d_e_reg__in[4U]); + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U] + = (((IData)(vlTOPp->reset) | (((IData)(vlTOPp->Vortex__DOT__forwarding_fwd_stall) + | (IData)(vlTOPp->Vortex__DOT__execute_branch_stall)) + | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall))) + ? 0U : vlTOPp->Vortex__DOT__vx_d_e_reg__DOT____Vcellinp__d_e_reg__in[5U]); + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[6U] + = (((IData)(vlTOPp->reset) | (((IData)(vlTOPp->Vortex__DOT__forwarding_fwd_stall) + | (IData)(vlTOPp->Vortex__DOT__execute_branch_stall)) + | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall))) + ? 0U : vlTOPp->Vortex__DOT__vx_d_e_reg__DOT____Vcellinp__d_e_reg__in[6U]); + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[7U] + = (((IData)(vlTOPp->reset) | (((IData)(vlTOPp->Vortex__DOT__forwarding_fwd_stall) + | (IData)(vlTOPp->Vortex__DOT__execute_branch_stall)) + | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall))) + ? 0U : vlTOPp->Vortex__DOT__vx_d_e_reg__DOT____Vcellinp__d_e_reg__in[7U]); + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[8U] + = (((IData)(vlTOPp->reset) | (((IData)(vlTOPp->Vortex__DOT__forwarding_fwd_stall) + | (IData)(vlTOPp->Vortex__DOT__execute_branch_stall)) + | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall))) + ? 0U : vlTOPp->Vortex__DOT__vx_d_e_reg__DOT____Vcellinp__d_e_reg__in[8U]); + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] + = (((IData)(vlTOPp->reset) | (((IData)(vlTOPp->Vortex__DOT__forwarding_fwd_stall) + | (IData)(vlTOPp->Vortex__DOT__execute_branch_stall)) + | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall))) + ? 0U : vlTOPp->Vortex__DOT__vx_d_e_reg__DOT____Vcellinp__d_e_reg__in[9U]); + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + = (((IData)(vlTOPp->reset) | (((IData)(vlTOPp->Vortex__DOT__forwarding_fwd_stall) + | (IData)(vlTOPp->Vortex__DOT__execute_branch_stall)) + | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall))) + ? 0U : vlTOPp->Vortex__DOT__vx_d_e_reg__DOT____Vcellinp__d_e_reg__in[0xaU]); + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + = (((IData)(vlTOPp->reset) | (((IData)(vlTOPp->Vortex__DOT__forwarding_fwd_stall) + | (IData)(vlTOPp->Vortex__DOT__execute_branch_stall)) + | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall))) + ? 0U : vlTOPp->Vortex__DOT__vx_d_e_reg__DOT____Vcellinp__d_e_reg__in[0xbU]); + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + = (((IData)(vlTOPp->reset) | (((IData)(vlTOPp->Vortex__DOT__forwarding_fwd_stall) + | (IData)(vlTOPp->Vortex__DOT__execute_branch_stall)) + | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall))) + ? 0U : vlTOPp->Vortex__DOT__vx_d_e_reg__DOT____Vcellinp__d_e_reg__in[0xcU]); + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + = (((IData)(vlTOPp->reset) | (((IData)(vlTOPp->Vortex__DOT__forwarding_fwd_stall) + | (IData)(vlTOPp->Vortex__DOT__execute_branch_stall)) + | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall))) + ? 0U : vlTOPp->Vortex__DOT__vx_d_e_reg__DOT____Vcellinp__d_e_reg__in[0xdU]); + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xeU] + = (((IData)(vlTOPp->reset) | (((IData)(vlTOPp->Vortex__DOT__forwarding_fwd_stall) + | (IData)(vlTOPp->Vortex__DOT__execute_branch_stall)) + | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall))) + ? 0U : vlTOPp->Vortex__DOT__vx_d_e_reg__DOT____Vcellinp__d_e_reg__in[0xeU]); + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xfU] + = (((IData)(vlTOPp->reset) | (((IData)(vlTOPp->Vortex__DOT__forwarding_fwd_stall) + | (IData)(vlTOPp->Vortex__DOT__execute_branch_stall)) + | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall))) + ? 0U : vlTOPp->Vortex__DOT__vx_d_e_reg__DOT____Vcellinp__d_e_reg__in[0xfU]); vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_count = __Vdly__Vortex__DOT__vx_fetch__DOT__warp_count; - // ALWAYSPOST at VX_f_d_reg.v:56 - if (__Vdlyvset__Vortex__DOT__vx_f_d_reg__DOT__valid__v0) { - vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__valid[0U] = 0U; - vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__valid[1U] = 0U; - vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__valid[2U] = 0U; - vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__valid[3U] = 0U; + vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_a_reg_data[0U] + = ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + << 0x12U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] + >> 0xeU)); + vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data[0U] + = ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[6U] + << 0x12U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U] + >> 0xeU)); + vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_a_reg_data[1U] + = ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + << 0x12U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + >> 0xeU)); + vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data[1U] + = ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[7U] + << 0x12U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[6U] + >> 0xeU)); + vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_a_reg_data[2U] + = ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + << 0x12U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + >> 0xeU)); + vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data[2U] + = ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[8U] + << 0x12U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[7U] + >> 0xeU)); + vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_a_reg_data[3U] + = ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + << 0x12U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + >> 0xeU)); + vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data[3U] + = ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] + << 0x12U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[8U] + >> 0xeU)); + vlTOPp->Vortex__DOT__execute_branch_stall = (1U + & ((0U + != + (7U + & ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[4U] + << 3U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[3U] + >> 0x1dU)))) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[2U] + >> 8U))); + vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[0U] + = ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[1U] + << 0x18U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0U] + >> 8U)); + vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[1U] + = ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[1U] + << 0x18U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0U] + >> 8U)); + vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[2U] + = ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[1U] + << 0x18U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0U] + >> 8U)); + vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[3U] + = ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[1U] + << 0x18U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0U] + >> 8U)); + vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2 + = ((0x40U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U] + << 0x1aU) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[4U] + >> 6U)) : ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[6U] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U] + >> 0xeU))); + vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2 + = ((0x40U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U] + << 0x1aU) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[4U] + >> 6U)) : ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[7U] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[6U] + >> 0xeU))); + vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2 + = ((0x40U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U] + << 0x1aU) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[4U] + >> 6U)) : ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[8U] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[7U] + >> 0xeU))); + vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2 + = ((0x40U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U] + << 0x1aU) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[4U] + >> 6U)) : ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[8U] + >> 0xeU))); + vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.wb = + (3U & ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[6U] + << 0x19U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U] + >> 7U))); + vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__mult_signed_result + = VL_MULS_QQQ(64,64,64, VL_EXTENDS_QI(64,32, + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] + >> 0xeU))), + VL_EXTENDS_QI(64,32, vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)); + vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__mult_signed_result + = VL_MULS_QQQ(64,64,64, VL_EXTENDS_QI(64,32, + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + >> 0xeU))), + VL_EXTENDS_QI(64,32, vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)); + vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__mult_signed_result + = VL_MULS_QQQ(64,64,64, VL_EXTENDS_QI(64,32, + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + >> 0xeU))), + VL_EXTENDS_QI(64,32, vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)); + vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__mult_signed_result + = VL_MULS_QQQ(64,64,64, VL_EXTENDS_QI(64,32, + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + >> 0xeU))), + VL_EXTENDS_QI(64,32, vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)); +} + +VL_INLINE_OPT void VVortex::_sequent__TOP__5(VVortex__Syms* __restrict vlSymsp) { + VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex::_sequent__TOP__5\n"); ); + VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; + // Variables + // Begin mtask footprint all: + VL_SIG8(__Vdly__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__state_stall,5,0); + VL_SIG8(__Vdlyvset__Vortex__DOT__vx_csr_handler__DOT__csr__v0,0,0); + VL_SIG16(__Vdlyvdim0__Vortex__DOT__vx_csr_handler__DOT__csr__v0,10,0); + VL_SIG16(__Vdlyvval__Vortex__DOT__vx_csr_handler__DOT__csr__v0,11,0); + // Body + __Vdly__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__state_stall + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__state_stall; + __Vdlyvset__Vortex__DOT__vx_csr_handler__DOT__csr__v0 = 0U; + // ALWAYS at VX_context.v:83 + if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__real_zero_isclone) + & (0U == (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__state_stall)))) { + __Vdly__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__state_stall = 0xaU; + } else { + if ((1U == (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__state_stall))) { + __Vdly__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__state_stall = 0U; + } else { + if ((0U < (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__state_stall))) { + __Vdly__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__state_stall + = (0x3fU & ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__state_stall) + - (IData)(1U))); + } + } } - if (__Vdlyvset__Vortex__DOT__vx_f_d_reg__DOT__valid__v4) { - vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__valid[3U] - = __Vdlyvval__Vortex__DOT__vx_f_d_reg__DOT__valid__v4; - vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__valid[2U] - = __Vdlyvval__Vortex__DOT__vx_f_d_reg__DOT__valid__v5; - vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__valid[1U] - = __Vdlyvval__Vortex__DOT__vx_f_d_reg__DOT__valid__v6; - vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__valid[0U] - = __Vdlyvval__Vortex__DOT__vx_f_d_reg__DOT__valid__v7; + // ALWAYS at VX_csr_handler.v:36 + vlTOPp->Vortex__DOT__vx_csr_handler__DOT__decode_csr_address + = vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.csr_address; + // ALWAYS at VX_csr_handler.v:45 + if ((8U & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0x16U])) { + vlTOPp->Vortex__DOT__vx_csr_handler__DOT____Vlvbound1 + = (0xfffU & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0x16U] + << 0x1dU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0x15U] + >> 3U))); + if (VL_LIKELY((0x400U >= (0x7ffU & (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0x16U] + >> 4U))))) { + __Vdlyvval__Vortex__DOT__vx_csr_handler__DOT__csr__v0 + = vlTOPp->Vortex__DOT__vx_csr_handler__DOT____Vlvbound1; + __Vdlyvset__Vortex__DOT__vx_csr_handler__DOT__csr__v0 = 1U; + __Vdlyvdim0__Vortex__DOT__vx_csr_handler__DOT__csr__v0 + = (0x7ffU & (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0x16U] + >> 4U)); + } } - vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num = __Vdly__Vortex__DOT__vx_fetch__DOT__warp_num; - // ALWAYS at VX_warp.v:57 - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__0__KET____DOT__VX_Warp__DOT__temp_PC - = (((IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal) - & (0U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__warp_num))) - ? vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal_dest - : (((IData)(vlTOPp->Vortex__DOT__memory_branch_dir) - & (0U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__warp_num))) - ? vlTOPp->Vortex__DOT__memory_branch_dest - : vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__0__KET____DOT__VX_Warp__DOT__real_PC)); - // ALWAYS at VX_warp.v:57 - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__7__KET____DOT__VX_Warp__DOT__temp_PC - = (((IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal) - & (7U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__warp_num))) - ? vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal_dest - : (((IData)(vlTOPp->Vortex__DOT__memory_branch_dir) - & (7U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__warp_num))) - ? vlTOPp->Vortex__DOT__memory_branch_dest - : vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__7__KET____DOT__VX_Warp__DOT__real_PC)); - // ALWAYS at VX_warp.v:57 - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__6__KET____DOT__VX_Warp__DOT__temp_PC - = (((IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal) - & (6U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__warp_num))) - ? vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal_dest - : (((IData)(vlTOPp->Vortex__DOT__memory_branch_dir) - & (6U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__warp_num))) - ? vlTOPp->Vortex__DOT__memory_branch_dest - : vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__6__KET____DOT__VX_Warp__DOT__real_PC)); - // ALWAYS at VX_warp.v:57 - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__5__KET____DOT__VX_Warp__DOT__temp_PC - = (((IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal) - & (5U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__warp_num))) - ? vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal_dest - : (((IData)(vlTOPp->Vortex__DOT__memory_branch_dir) - & (5U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__warp_num))) - ? vlTOPp->Vortex__DOT__memory_branch_dest - : vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__5__KET____DOT__VX_Warp__DOT__real_PC)); - // ALWAYS at VX_warp.v:57 - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__4__KET____DOT__VX_Warp__DOT__temp_PC - = (((IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal) - & (4U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__warp_num))) - ? vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal_dest - : (((IData)(vlTOPp->Vortex__DOT__memory_branch_dir) - & (4U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__warp_num))) - ? vlTOPp->Vortex__DOT__memory_branch_dest - : vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__4__KET____DOT__VX_Warp__DOT__real_PC)); - // ALWAYS at VX_warp.v:57 - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__3__KET____DOT__VX_Warp__DOT__temp_PC - = (((IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal) - & (3U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__warp_num))) - ? vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal_dest - : (((IData)(vlTOPp->Vortex__DOT__memory_branch_dir) - & (3U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__warp_num))) - ? vlTOPp->Vortex__DOT__memory_branch_dest - : vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__3__KET____DOT__VX_Warp__DOT__real_PC)); - // ALWAYS at VX_warp.v:57 - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__2__KET____DOT__VX_Warp__DOT__temp_PC - = (((IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal) - & (2U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__warp_num))) - ? vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal_dest - : (((IData)(vlTOPp->Vortex__DOT__memory_branch_dir) - & (2U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__warp_num))) - ? vlTOPp->Vortex__DOT__memory_branch_dest - : vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__2__KET____DOT__VX_Warp__DOT__real_PC)); - // ALWAYS at VX_warp.v:57 - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__1__KET____DOT__VX_Warp__DOT__temp_PC - = (((IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal) - & (1U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__warp_num))) - ? vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal_dest - : (((IData)(vlTOPp->Vortex__DOT__memory_branch_dir) - & (1U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__warp_num))) - ? vlTOPp->Vortex__DOT__memory_branch_dest - : vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__1__KET____DOT__VX_Warp__DOT__real_PC)); - vlTOPp->Vortex__DOT____Vcellout__vx_f_d_reg__out_valid[3U] - = vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__valid + // ALWAYS at VX_csr_handler.v:36 + vlTOPp->Vortex__DOT__vx_csr_handler__DOT__cycle + = (VL_ULL(1) + vlTOPp->Vortex__DOT__vx_csr_handler__DOT__cycle); + // ALWAYS at VX_csr_handler.v:36 + if ((0x10U & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U])) { + vlTOPp->Vortex__DOT__vx_csr_handler__DOT__instret + = (VL_ULL(1) + vlTOPp->Vortex__DOT__vx_csr_handler__DOT__instret); + } + // ALWAYS at VX_register_file_slave.v:53 + if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + & (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xcU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x14U))))) + & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] + >> 7U)) & (0U == (0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__real_zero_isclone)))) { + VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0x11U) + | (0x1ffe0U + & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0xfU)))), vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers, + vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[3U]); + } else { + if ((((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__real_zero_isclone) + & ((3U == vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd1_register[0U]) + & (1U == (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__state_stall)))) + & (0U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U)))))) { + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[1U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[1U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[2U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[3U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[3U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[4U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[4U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[5U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[5U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[6U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[6U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[7U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[7U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[8U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[8U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[9U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[9U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xaU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0xaU]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xbU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0xbU]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xcU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0xcU]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xdU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0xdU]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xeU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0xeU]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xfU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0xfU]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x10U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x10U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x11U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x11U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x12U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x12U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x13U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x13U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x14U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x14U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x15U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x15U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x16U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x16U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x17U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x17U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x18U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x18U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x19U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x19U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1aU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x1aU]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1bU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x1bU]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1cU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x1cU]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1dU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x1dU]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1eU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x1eU]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1fU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x1fU]; + } + } + // ALWAYS at VX_register_file_slave.v:53 + if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + & (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xcU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x14U))))) + & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] + >> 6U)) & (0U == (0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__real_zero_isclone)))) { + VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0x11U) + | (0x1ffe0U + & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0xfU)))), vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers, + vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[2U]); + } else { + if ((((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__real_zero_isclone) + & ((2U == vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd1_register[0U]) + & (1U == (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__state_stall)))) + & (0U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U)))))) { + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[1U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[1U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[2U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[3U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[3U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[4U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[4U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[5U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[5U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[6U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[6U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[7U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[7U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[8U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[8U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[9U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[9U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xaU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0xaU]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xbU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0xbU]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xcU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0xcU]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xdU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0xdU]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xeU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0xeU]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xfU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0xfU]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x10U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x10U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x11U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x11U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x12U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x12U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x13U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x13U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x14U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x14U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x15U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x15U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x16U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x16U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x17U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x17U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x18U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x18U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x19U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x19U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1aU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x1aU]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1bU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x1bU]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1cU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x1cU]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1dU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x1dU]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1eU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x1eU]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1fU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x1fU]; + } + } + // ALWAYS at VX_register_file_slave.v:53 + if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + & (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xcU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x14U))))) + & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] + >> 5U)) & (0U == (0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__real_zero_isclone)))) { + VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0x11U) + | (0x1ffe0U + & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0xfU)))), vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers, + vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[1U]); + } else { + if ((((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__real_zero_isclone) + & ((1U == vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd1_register[0U]) + & (1U == (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__state_stall)))) + & (0U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U)))))) { + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[1U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[1U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[2U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[3U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[3U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[4U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[4U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[5U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[5U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[6U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[6U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[7U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[7U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[8U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[8U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[9U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[9U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xaU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0xaU]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xbU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0xbU]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xcU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0xcU]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xdU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0xdU]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xeU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0xeU]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xfU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0xfU]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x10U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x10U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x11U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x11U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x12U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x12U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x13U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x13U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x14U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x14U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x15U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x15U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x16U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x16U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x17U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x17U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x18U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x18U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x19U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x19U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1aU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x1aU]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1bU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x1bU]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1cU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x1cU]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1dU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x1dU]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1eU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x1eU]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1fU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x1fU]; + } + } + // ALWAYSPOST at VX_csr_handler.v:48 + if (__Vdlyvset__Vortex__DOT__vx_csr_handler__DOT__csr__v0) { + vlTOPp->Vortex__DOT__vx_csr_handler__DOT__csr[__Vdlyvdim0__Vortex__DOT__vx_csr_handler__DOT__csr__v0] + = __Vdlyvval__Vortex__DOT__vx_csr_handler__DOT__csr__v0; + } + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__state_stall + = __Vdly__Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__state_stall; + vlTOPp->Vortex__DOT__csr_decode_csr_data = ((0xc00U + == (IData)(vlTOPp->Vortex__DOT__vx_csr_handler__DOT__decode_csr_address)) + ? (IData)(vlTOPp->Vortex__DOT__vx_csr_handler__DOT__cycle) + : + ((0xc80U + == (IData)(vlTOPp->Vortex__DOT__vx_csr_handler__DOT__decode_csr_address)) + ? (IData)( + (vlTOPp->Vortex__DOT__vx_csr_handler__DOT__cycle + >> 0x20U)) + : + ((0xc02U + == (IData)(vlTOPp->Vortex__DOT__vx_csr_handler__DOT__decode_csr_address)) + ? (IData)(vlTOPp->Vortex__DOT__vx_csr_handler__DOT__instret) + : + ((0xc82U + == (IData)(vlTOPp->Vortex__DOT__vx_csr_handler__DOT__decode_csr_address)) + ? (IData)( + (vlTOPp->Vortex__DOT__vx_csr_handler__DOT__instret + >> 0x20U)) + : + ((0x400U + >= + (0x7ffU + & (IData)(vlTOPp->Vortex__DOT__vx_csr_handler__DOT__decode_csr_address))) + ? + vlTOPp->Vortex__DOT__vx_csr_handler__DOT__csr + [ + (0x7ffU + & (IData)(vlTOPp->Vortex__DOT__vx_csr_handler__DOT__decode_csr_address))] + : 0U))))); +} + +VL_INLINE_OPT void VVortex::_sequent__TOP__6(VVortex__Syms* __restrict vlSymsp) { + VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex::_sequent__TOP__6\n"); ); + VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; + // Body + // ALWAYS at VX_register_file.v:45 + if (((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + & (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xcU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x14U))))) + & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] + >> 4U)) & (0U == (0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U])))) { + VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0x11U) + | (0x1ffe0U + & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0xfU)))), vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers, + vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[0U]); + } +} + +VL_INLINE_OPT void VVortex::_combo__TOP__7(VVortex__Syms* __restrict vlSymsp) { + VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex::_combo__TOP__7\n"); ); + VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; + // Body + vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data[3U] + = vlTOPp->in_cache_driver_out_data[3U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data[2U] + = vlTOPp->in_cache_driver_out_data[2U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data[1U] + = vlTOPp->in_cache_driver_out_data[1U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data[0U] + = vlTOPp->in_cache_driver_out_data[0U]; +} + +VL_INLINE_OPT void VVortex::_sequent__TOP__8(VVortex__Syms* __restrict vlSymsp) { + VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex::_sequent__TOP__8\n"); ); + VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; + // Body + // ALWAYS at VX_register_file.v:52 + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_src1_data + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[ + (0x1fU & ((0x7fffe00U & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 9U)) | (0x1ffU + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x17U))))]; + // ALWAYS at VX_register_file.v:52 + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_src2_data + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[ + (0x1fU & ((0x7fffff0U & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 4U)) | (0xfU & + (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x1cU))))]; + // ALWAYS at VX_register_file_slave.v:68 + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__out_src1_data + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[ + (0x1fU & ((0x7fffe00U & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 9U)) | (0x1ffU + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x17U))))]; + // ALWAYS at VX_register_file_slave.v:68 + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__out_src1_data + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[ + (0x1fU & ((0x7fffe00U & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 9U)) | (0x1ffU + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x17U))))]; + // ALWAYS at VX_register_file_slave.v:68 + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src1_data + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[ + (0x1fU & ((0x7fffe00U & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 9U)) | (0x1ffU + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x17U))))]; + // ALWAYS at VX_register_file_slave.v:68 + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__out_src2_data + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[ + (0x1fU & ((0x7fffff0U & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 4U)) | (0xfU & + (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x1cU))))]; + // ALWAYS at VX_register_file_slave.v:68 + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__out_src2_data + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[ + (0x1fU & ((0x7fffff0U & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 4U)) | (0xfU & + (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x1cU))))]; + // ALWAYS at VX_register_file_slave.v:68 + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src2_data + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[ + (0x1fU & ((0x7fffff0U & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 4U)) | (0xfU & + (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x1cU))))]; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd1_register[0U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_src1_data; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd2_register[0U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_src2_data; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd1_register[3U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__out_src1_data; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd1_register[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__out_src1_data; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd1_register[1U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src1_data; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd2_register[3U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__out_src2_data; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd2_register[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__out_src2_data; + vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd2_register[1U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src2_data; +} + +VL_INLINE_OPT void VVortex::_sequent__TOP__9(VVortex__Syms* __restrict vlSymsp) { + VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex::_sequent__TOP__9\n"); ); + VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; + // Variables + // Begin mtask footprint all: + VL_SIGW(__Vtemp99,319,0,10); + VL_SIGW(__Vtemp115,479,0,15); + VL_SIGW(__Vtemp124,735,0,23); + // Body + // ALWAYS at VX_alu.v:48 + vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__0__KET____DOT__vx_alu__out_alu_result + = ((0x2000U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x1000U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? 0U : ((0x800U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x400U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2) + ? ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] + >> 0xeU)) + : VL_MODDIV_III(32, + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] + >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)) + : ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2) + ? ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] + >> 0xeU)) + : VL_MODDIVS_III(32, + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] + >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))) + : ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2) + ? 0xffffffffU : + VL_DIV_III(32, + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] + >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)) + : ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2) + ? 0xffffffffU : + VL_DIVS_III(32, + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] + >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)))) + : ((0x400U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? (IData)((((QData)((IData)( + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] + >> 0xeU)))) + * (QData)((IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))) + >> 0x20U)) + : (IData)((((((QData)((IData)( + VL_NEGATE_I((IData)( + (1U + & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + >> 0xdU)))))) + << 0x20U) + | (QData)((IData)( + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] + >> 0xeU))))) + * (QData)((IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))) + >> 0x20U))) + : ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? (IData)((vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__mult_signed_result + >> 0x20U)) + : (IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__mult_signed_result))))) + : ((0x1000U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x800U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x400U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? vlTOPp->Vortex__DOT__csr_decode_csr_data + : ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? vlTOPp->Vortex__DOT__csr_decode_csr_data + : (((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[3U] + << 0x17U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[2U] + >> 9U)) + + (0xfffff000U & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[3U] + << 3U))))) + : ((0x400U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? (0xfffff000U & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[3U] + << 3U)) + : ((((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + << 0x12U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] + >> 0xeU)) + >= vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2) + ? 0U : 0xffffffffU)) + : ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? (vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2 + & ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + << 0x12U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] + >> 0xeU))) + : (((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + << 0x12U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] + >> 0xeU)) + | vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)))) + : ((0x800U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x400U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? VL_SHIFTRS_III(32,32,5, + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] + >> 0xeU)), + (0x1fU + & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)) + : (((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + << 0x12U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] + >> 0xeU)) + >> (0x1fU & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))) + : ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? (((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + << 0x12U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] + >> 0xeU)) + ^ vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2) + : ((((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + << 0x12U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] + >> 0xeU)) + < vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2) + ? 1U : 0U))) : ((0x400U + & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? + ((0x200U + & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? + (VL_LTS_III(1,32,32, + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] + >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2) + ? 1U + : 0U) + : + (((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] + >> 0xeU)) + << + (0x1fU + & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))) + : + ((0x200U + & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? + (((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] + >> 0xeU)) + - vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2) + : + (((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] + >> 0xeU)) + + vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)))))); + // ALWAYS at VX_alu.v:48 + vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__1__KET____DOT__vx_alu__out_alu_result + = ((0x2000U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x1000U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? 0U : ((0x800U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x400U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2) + ? ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + >> 0xeU)) + : VL_MODDIV_III(32, + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)) + : ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2) + ? ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + >> 0xeU)) + : VL_MODDIVS_III(32, + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2))) + : ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2) + ? 0xffffffffU : + VL_DIV_III(32, + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)) + : ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2) + ? 0xffffffffU : + VL_DIVS_III(32, + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)))) + : ((0x400U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? (IData)((((QData)((IData)( + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + >> 0xeU)))) + * (QData)((IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2))) + >> 0x20U)) + : (IData)((((((QData)((IData)( + VL_NEGATE_I((IData)( + (1U + & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + >> 0xdU)))))) + << 0x20U) + | (QData)((IData)( + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + >> 0xeU))))) + * (QData)((IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2))) + >> 0x20U))) + : ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? (IData)((vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__mult_signed_result + >> 0x20U)) + : (IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__mult_signed_result))))) + : ((0x1000U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x800U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x400U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? vlTOPp->Vortex__DOT__csr_decode_csr_data + : ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? vlTOPp->Vortex__DOT__csr_decode_csr_data + : (((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[3U] + << 0x17U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[2U] + >> 9U)) + + (0xfffff000U & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[3U] + << 3U))))) + : ((0x400U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? (0xfffff000U & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[3U] + << 3U)) + : ((((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + << 0x12U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + >> 0xeU)) + >= vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2) + ? 0U : 0xffffffffU)) + : ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? (vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2 + & ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + << 0x12U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + >> 0xeU))) + : (((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + << 0x12U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + >> 0xeU)) + | vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)))) + : ((0x800U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x400U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? VL_SHIFTRS_III(32,32,5, + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + >> 0xeU)), + (0x1fU + & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)) + : (((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + << 0x12U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + >> 0xeU)) + >> (0x1fU & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2))) + : ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? (((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + << 0x12U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + >> 0xeU)) + ^ vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2) + : ((((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + << 0x12U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + >> 0xeU)) + < vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2) + ? 1U : 0U))) : ((0x400U + & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? + ((0x200U + & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? + (VL_LTS_III(1,32,32, + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2) + ? 1U + : 0U) + : + (((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + >> 0xeU)) + << + (0x1fU + & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2))) + : + ((0x200U + & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? + (((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + >> 0xeU)) + - vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2) + : + (((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + >> 0xeU)) + + vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)))))); + // ALWAYS at VX_alu.v:48 + vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__2__KET____DOT__vx_alu__out_alu_result + = ((0x2000U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x1000U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? 0U : ((0x800U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x400U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2) + ? ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + >> 0xeU)) + : VL_MODDIV_III(32, + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)) + : ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2) + ? ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + >> 0xeU)) + : VL_MODDIVS_III(32, + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2))) + : ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2) + ? 0xffffffffU : + VL_DIV_III(32, + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)) + : ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2) + ? 0xffffffffU : + VL_DIVS_III(32, + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)))) + : ((0x400U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? (IData)((((QData)((IData)( + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + >> 0xeU)))) + * (QData)((IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2))) + >> 0x20U)) + : (IData)((((((QData)((IData)( + VL_NEGATE_I((IData)( + (1U + & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + >> 0xdU)))))) + << 0x20U) + | (QData)((IData)( + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + >> 0xeU))))) + * (QData)((IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2))) + >> 0x20U))) + : ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? (IData)((vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__mult_signed_result + >> 0x20U)) + : (IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__mult_signed_result))))) + : ((0x1000U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x800U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x400U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? vlTOPp->Vortex__DOT__csr_decode_csr_data + : ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? vlTOPp->Vortex__DOT__csr_decode_csr_data + : (((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[3U] + << 0x17U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[2U] + >> 9U)) + + (0xfffff000U & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[3U] + << 3U))))) + : ((0x400U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? (0xfffff000U & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[3U] + << 3U)) + : ((((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + << 0x12U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + >> 0xeU)) + >= vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2) + ? 0U : 0xffffffffU)) + : ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? (vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2 + & ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + << 0x12U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + >> 0xeU))) + : (((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + << 0x12U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + >> 0xeU)) + | vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)))) + : ((0x800U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x400U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? VL_SHIFTRS_III(32,32,5, + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + >> 0xeU)), + (0x1fU + & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)) + : (((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + << 0x12U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + >> 0xeU)) + >> (0x1fU & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2))) + : ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? (((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + << 0x12U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + >> 0xeU)) + ^ vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2) + : ((((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + << 0x12U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + >> 0xeU)) + < vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2) + ? 1U : 0U))) : ((0x400U + & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? + ((0x200U + & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? + (VL_LTS_III(1,32,32, + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2) + ? 1U + : 0U) + : + (((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + >> 0xeU)) + << + (0x1fU + & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2))) + : + ((0x200U + & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? + (((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + >> 0xeU)) + - vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2) + : + (((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] + >> 0xeU)) + + vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)))))); + // ALWAYS at VX_alu.v:48 + vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__3__KET____DOT__vx_alu__out_alu_result + = ((0x2000U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x1000U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? 0U : ((0x800U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x400U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2) + ? ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + >> 0xeU)) + : VL_MODDIV_III(32, + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)) + : ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2) + ? ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + >> 0xeU)) + : VL_MODDIVS_III(32, + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2))) + : ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2) + ? 0xffffffffU : + VL_DIV_III(32, + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)) + : ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2) + ? 0xffffffffU : + VL_DIVS_III(32, + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)))) + : ((0x400U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? (IData)((((QData)((IData)( + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + >> 0xeU)))) + * (QData)((IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2))) + >> 0x20U)) + : (IData)((((((QData)((IData)( + VL_NEGATE_I((IData)( + (1U + & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + >> 0xdU)))))) + << 0x20U) + | (QData)((IData)( + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + >> 0xeU))))) + * (QData)((IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2))) + >> 0x20U))) + : ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? (IData)((vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__mult_signed_result + >> 0x20U)) + : (IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__mult_signed_result))))) + : ((0x1000U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x800U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x400U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? vlTOPp->Vortex__DOT__csr_decode_csr_data + : ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? vlTOPp->Vortex__DOT__csr_decode_csr_data + : (((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[3U] + << 0x17U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[2U] + >> 9U)) + + (0xfffff000U & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[3U] + << 3U))))) + : ((0x400U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? (0xfffff000U & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[3U] + << 3U)) + : ((((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + << 0x12U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + >> 0xeU)) + >= vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2) + ? 0U : 0xffffffffU)) + : ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? (vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2 + & ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + << 0x12U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + >> 0xeU))) + : (((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + << 0x12U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + >> 0xeU)) + | vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)))) + : ((0x800U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x400U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? VL_SHIFTRS_III(32,32,5, + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + >> 0xeU)), + (0x1fU + & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)) + : (((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + << 0x12U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + >> 0xeU)) + >> (0x1fU & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2))) + : ((0x200U & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? (((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + << 0x12U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + >> 0xeU)) + ^ vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2) + : ((((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + << 0x12U) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + >> 0xeU)) + < vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2) + ? 1U : 0U))) : ((0x400U + & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? + ((0x200U + & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? + (VL_LTS_III(1,32,32, + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2) + ? 1U + : 0U) + : + (((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + >> 0xeU)) + << + (0x1fU + & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2))) + : + ((0x200U + & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U]) + ? + (((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + >> 0xeU)) + - vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2) + : + (((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] + >> 0xeU)) + + vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)))))); + vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[0U] + = vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__0__KET____DOT__vx_alu__out_alu_result; + vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[1U] + = vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__1__KET____DOT__vx_alu__out_alu_result; + vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[2U] + = vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__2__KET____DOT__vx_alu__out_alu_result; + vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[3U] + = vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__3__KET____DOT__vx_alu__out_alu_result; + // ALWAYS at VX_generic_register.v:20 + __Vtemp99[0U] = (IData)((((QData)((IData)((0x1fU + & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + << 9U) + | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] + >> 0x17U))))) + << 0x34U) | (((QData)((IData)( + (3U + & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + << 0xbU) + | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] + >> 0x15U))))) + << 0x32U) + | (((QData)((IData)( + (0x1fU + & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + << 0x10U) + | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] + >> 0x10U))))) + << 0x2dU) + | (((QData)((IData)( + (0x1fU + & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + << 0x15U) + | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] + >> 0xbU))))) + << 0x28U) + | (((QData)((IData)( + ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[3U] + << 0x15U) + | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[2U] + >> 0xbU)))) + << 8U) + | (QData)((IData)( + (0xffU + & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U]))))))))); + __Vtemp99[1U] = ((0xfe000000U & (vlSymsp->TOP__Vortex__DOT__VX_mem_wb.mem_result[0U] + << 0x19U)) | (IData)( + ((((QData)((IData)( + (0x1fU + & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + << 9U) + | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] + >> 0x17U))))) + << 0x34U) + | (((QData)((IData)( + (3U + & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + << 0xbU) + | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] + >> 0x15U))))) + << 0x32U) + | (((QData)((IData)( + (0x1fU + & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + << 0x10U) + | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] + >> 0x10U))))) + << 0x2dU) + | (((QData)((IData)( + (0x1fU + & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + << 0x15U) + | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] + >> 0xbU))))) + << 0x28U) + | (((QData)((IData)( + ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[3U] + << 0x15U) + | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[2U] + >> 0xbU)))) + << 8U) + | (QData)((IData)( + (0xffU + & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))))))) + >> 0x20U))); + vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] + = ((IData)(vlTOPp->reset) ? 0U : __Vtemp99[0U]); + vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + = ((IData)(vlTOPp->reset) ? 0U : __Vtemp99[1U]); + vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + = ((IData)(vlTOPp->reset) ? 0U : ((0x1ffffffU + & (vlSymsp->TOP__Vortex__DOT__VX_mem_wb.mem_result[0U] + >> 7U)) + | (0xfe000000U + & (vlSymsp->TOP__Vortex__DOT__VX_mem_wb.mem_result[1U] + << 0x19U)))); + vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[3U] + = ((IData)(vlTOPp->reset) ? 0U : ((0x1ffffffU + & (vlSymsp->TOP__Vortex__DOT__VX_mem_wb.mem_result[1U] + >> 7U)) + | (0xfe000000U + & (vlSymsp->TOP__Vortex__DOT__VX_mem_wb.mem_result[2U] + << 0x19U)))); + vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[4U] + = ((IData)(vlTOPp->reset) ? 0U : ((0x1ffffffU + & (vlSymsp->TOP__Vortex__DOT__VX_mem_wb.mem_result[2U] + >> 7U)) + | (0xfe000000U + & (vlSymsp->TOP__Vortex__DOT__VX_mem_wb.mem_result[3U] + << 0x19U)))); + vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[5U] + = ((IData)(vlTOPp->reset) ? 0U : ((0x1ffffffU + & (vlSymsp->TOP__Vortex__DOT__VX_mem_wb.mem_result[3U] + >> 7U)) + | (0xfe000000U + & (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + << 0x17U)))); + vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[6U] + = ((IData)(vlTOPp->reset) ? 0U : ((0x1ffffffU + & ((0x1800000U + & (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] + << 0x17U)) + | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + >> 9U))) + | (0xfe000000U + & (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] + << 0x17U)))); + vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[7U] + = ((IData)(vlTOPp->reset) ? 0U : ((0x1ffffffU + & ((0x1800000U + & (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xaU] + << 0x17U)) + | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] + >> 9U))) + | (0xfe000000U + & (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xaU] + << 0x17U)))); + vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[8U] + = ((IData)(vlTOPp->reset) ? 0U : ((0x1ffffffU + & ((0x1800000U + & (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xbU] + << 0x17U)) + | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xaU] + >> 9U))) + | (0xfe000000U + & (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xbU] + << 0x17U)))); + vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[9U] + = ((IData)(vlTOPp->reset) ? 0U : (0x1ffffffU + & ((0x1800000U + & (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xcU] + << 0x17U)) + | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xbU] + >> 9U)))); + // ALWAYS at VX_generic_register.v:20 + if (vlTOPp->reset) { + vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] = 0U; + vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] = 0U; + vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] = 0U; + } else { + if ((1U & (~ ((IData)(vlTOPp->Vortex__DOT__forwarding_fwd_stall) + | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall))))) { + vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + = ((0xffffff00U & ((IData)((((QData)((IData)( + ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__stall) + ? 0U + : vlTOPp->icache_response_instruction))) + << 0x20U) + | (QData)((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__out_PC_var)))) + << 8U)) | (((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num) + << 4U) + | (IData)(vlSymsp->TOP__Vortex__DOT__fe_inst_meta_fd.valid))); + vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + = ((0xffU & ((IData)((((QData)((IData)( + ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__stall) + ? 0U + : vlTOPp->icache_response_instruction))) + << 0x20U) | (QData)((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__out_PC_var)))) + >> 0x18U)) | (0xffffff00U + & ((IData)( + ((((QData)((IData)( + ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__stall) + ? 0U + : vlTOPp->icache_response_instruction))) + << 0x20U) + | (QData)((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__out_PC_var))) + >> 0x20U)) + << 8U))); + vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + = (0xffU & ((IData)(((((QData)((IData)( + ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__stall) + ? 0U + : vlTOPp->icache_response_instruction))) + << 0x20U) | (QData)((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__out_PC_var))) + >> 0x20U)) >> 0x18U)); + } + } + vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num = vlTOPp->__Vdly__Vortex__DOT__vx_fetch__DOT__warp_num; + vlTOPp->Vortex__DOT__vx_writeback__DOT__out_pc_data[0U] + = ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] + >> 8U)); + vlTOPp->Vortex__DOT__vx_writeback__DOT__out_pc_data[1U] + = ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] + >> 8U)); + vlTOPp->Vortex__DOT__vx_writeback__DOT__out_pc_data[2U] + = ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] + >> 8U)); + vlTOPp->Vortex__DOT__vx_writeback__DOT__out_pc_data[3U] + = ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] + >> 8U)); + vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[0U] + = ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] + >> 8U)); + vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[1U] + = ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] + >> 8U)); + vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[2U] + = ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] + >> 8U)); + vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[3U] + = ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] + >> 8U)); + // ALWAYS at VX_generic_register.v:20 + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U] + = ((IData)(vlTOPp->reset) ? 0U : vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0U]); + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[1U] + = ((IData)(vlTOPp->reset) ? 0U : vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[1U]); + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[2U] + = ((IData)(vlTOPp->reset) ? 0U : vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[2U]); + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[3U] + = ((IData)(vlTOPp->reset) ? 0U : vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[3U]); + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[4U] + = ((IData)(vlTOPp->reset) ? 0U : vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[4U]); + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[5U] + = ((IData)(vlTOPp->reset) ? 0U : vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[5U]); + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[6U] + = ((IData)(vlTOPp->reset) ? 0U : vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[6U]); + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] + = ((IData)(vlTOPp->reset) ? 0U : vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[7U]); + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + = ((IData)(vlTOPp->reset) ? 0U : vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[8U]); + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] + = ((IData)(vlTOPp->reset) ? 0U : vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[9U]); + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xaU] + = ((IData)(vlTOPp->reset) ? 0U : vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0xaU]); + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xbU] + = ((IData)(vlTOPp->reset) ? 0U : vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0xbU]); + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xcU] + = ((IData)(vlTOPp->reset) ? 0U : vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0xcU]); + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] + = ((IData)(vlTOPp->reset) ? 0U : vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0xdU]); + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xeU] + = ((IData)(vlTOPp->reset) ? 0U : vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0xeU]); + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xfU] + = ((IData)(vlTOPp->reset) ? 0U : vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0xfU]); + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0x10U] + = ((IData)(vlTOPp->reset) ? 0U : vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0x10U]); + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0x11U] + = ((IData)(vlTOPp->reset) ? 0U : vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0x11U]); + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0x12U] + = ((IData)(vlTOPp->reset) ? 0U : vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0x12U]); + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0x13U] + = ((IData)(vlTOPp->reset) ? 0U : vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0x13U]); + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0x14U] + = ((IData)(vlTOPp->reset) ? 0U : vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0x14U]); + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0x15U] + = ((IData)(vlTOPp->reset) ? 0U : vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0x15U]); + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0x16U] + = ((IData)(vlTOPp->reset) ? 0U : vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0x16U]); + vlTOPp->Vortex__DOT__vx_decode__DOT__is_itype = + ((0x13U == (0x7fU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) + | (3U == (0x7fU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U))))); + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.csr_address + = (0xfffU & (((0U != (7U & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0xcU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x14U)))) + & (2U <= (0xfffU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 4U) | + (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x1cU))))) + ? ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 4U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x1cU)) : 0x55U)); + // ALWAYS at VX_decode.v:572 + vlTOPp->__Vtableidx1 = (7U & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0xcU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x14U))); + vlTOPp->Vortex__DOT__vx_decode__DOT__mul_alu = + vlTOPp->__Vtable1_Vortex__DOT__vx_decode__DOT__mul_alu + [vlTOPp->__Vtableidx1]; + vlTOPp->Vortex__DOT__vx_decode__DOT__alu_tempp + = (0xfffU & (((1U == (7U & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0xcU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x14U)))) + | (5U == (7U & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0xcU) | ( + vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x14U))))) + ? (0x1fU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 4U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x1cU))) + : ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 4U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x1cU)))); + vlTOPp->Vortex__DOT__vx_decode__DOT__is_csr = ( + (0x73U + == + (0x7fU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) + & (0U + != + (7U + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0xcU) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x14U))))); + vlTOPp->Vortex__DOT__vx_decode__DOT__jal_sys_jal + = ((0U == (7U & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0xcU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x14U)))) + & (2U > (0xfffU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 4U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x1cU))))); + vlTOPp->Vortex__DOT__vx_decode__DOT__in_valid[0U] + = (1U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U]); + vlTOPp->Vortex__DOT__vx_decode__DOT__in_valid[1U] + = (1U & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 1U)); + vlTOPp->Vortex__DOT__vx_decode__DOT__in_valid[2U] + = (1U & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 2U)); + vlTOPp->Vortex__DOT__vx_decode__DOT__in_valid[3U] + = (1U & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 3U)); + vlTOPp->Vortex__DOT__vx_decode__DOT__is_jmprt = + ((0x6bU == (0x7fU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) + & (4U == (7U & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0xcU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x14U))))); + vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd + = (((((0x1fU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 9U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x17U))) == (0x1fU + & ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xeU] + << 8U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + >> 0x18U)))) + & (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 9U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x17U))))) + & (0U != (IData)(vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.wb))) + & ((0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))) == (0xfU + & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0U]))); + vlTOPp->Vortex__DOT__vx_decode__DOT__is_jalrs = + ((0x6bU == (0x7fU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) + & (6U == (7U & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0xcU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x14U))))); + vlTOPp->Vortex__DOT__vx_decode__DOT__is_wspawn + = ((0x6bU == (0x7fU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) + & (0U == (7U & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0xcU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x14U))))); + vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone = + ((0x6bU == (0x7fU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) + & (5U == (7U & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0xcU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x14U))))); + vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd + = (((((0x1fU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 4U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x1cU))) == (0x1fU + & ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xeU] + << 8U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + >> 0x18U)))) + & (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 4U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x1cU))))) + & (0U != (IData)(vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.wb))) + & ((0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))) == (0xfU + & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0U]))); + vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[0U] + = ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) ? + vlTOPp->Vortex__DOT__vx_writeback__DOT__out_pc_data[0U] + : ((1U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + ? ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[6U] + << 7U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[5U] + >> 0x19U)) : ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 7U) + | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x19U)))); + vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[1U] + = ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) ? + vlTOPp->Vortex__DOT__vx_writeback__DOT__out_pc_data[1U] + : ((1U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + ? ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[7U] + << 7U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[6U] + >> 0x19U)) : ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[3U] + << 7U) + | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + >> 0x19U)))); + vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[2U] + = ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) ? + vlTOPp->Vortex__DOT__vx_writeback__DOT__out_pc_data[2U] + : ((1U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + ? ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[8U] + << 7U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[7U] + >> 0x19U)) : ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[4U] + << 7U) + | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[3U] + >> 0x19U)))); + vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[3U] + = ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) ? + vlTOPp->Vortex__DOT__vx_writeback__DOT__out_pc_data[3U] + : ((1U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + ? ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[9U] + << 7U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[8U] + >> 0x19U)) : ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[5U] + << 7U) + | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[4U] + >> 0x19U)))); + __Vtemp115[0xdU] = ((0xfff80000U & (((0xdU == (0x1fU + & ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[6U] + << 0x17U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U] + >> 9U)))) + ? ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xeU] + << 3U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + >> 0x1dU)) + : ((0xeU + == (0x1fU + & ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[6U] + << 0x17U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U] + >> 9U)))) + ? (vlTOPp->Vortex__DOT__csr_decode_csr_data + | ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xeU] + << 3U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + >> 0x1dU))) + : ((0xfU + == + (0x1fU + & ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[6U] + << 0x17U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U] + >> 9U)))) + ? + (vlTOPp->Vortex__DOT__csr_decode_csr_data + & ((IData)(0xffffffffU) + - + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xeU] + << 3U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + >> 0x1dU)))) + : 0xdeadbeefU))) + << 0x13U)) + | ((0x40000U & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[2U] + << 0xaU)) | + (0x3ffffU & ((((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] + >> 0xeU)) + + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[1U] + >> 8U))) + >> 0xeU)))); + __Vtemp115[0xeU] = (0x7ffffU & (((0xdU == (0x1fU + & ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[6U] + << 0x17U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U] + >> 9U)))) + ? ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xeU] + << 3U) | + (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + >> 0x1dU)) + : ((0xeU == (0x1fU + & ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[6U] + << 0x17U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U] + >> 9U)))) + ? (vlTOPp->Vortex__DOT__csr_decode_csr_data + | ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xeU] + << 3U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + >> 0x1dU))) + : ((0xfU + == (0x1fU + & ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[6U] + << 0x17U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U] + >> 9U)))) + ? (vlTOPp->Vortex__DOT__csr_decode_csr_data + & ((IData)(0xffffffffU) + - + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xeU] + << 3U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + >> 0x1dU)))) + : 0xdeadbeefU))) + >> 0xdU)); + __Vtemp124[7U] = ((0xffff0000U & ((0x80000000U + & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[4U] + << 0x1cU)) + | ((0x70000000U + & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[4U] + << 0x1cU)) + | ((0xf800000U + & ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xeU] + << 0x1fU) + | (0x7f800000U + & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + >> 1U)))) + | (((IData)(vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.wb) + << 0x15U) + | (0x1f0000U + & ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xeU] + << 0x1dU) + | (0x1fff0000U + & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + >> 3U))))))))) + | ((0xf800U & ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xeU] + << 0x1dU) | (0x1ffff800U + & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] + >> 3U)))) + | (0x7ffU & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] + >> 3U)))); + __Vtemp124[8U] = ((0xffffU & ((0xfffcU & (vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[0U] + << 2U)) + | ((3U & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[4U] + >> 4U)) + | (0xffffU & ((IData)(vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.wb) + >> 0xbU))))) + | (0xffff0000U & (vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[0U] + << 2U))); + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0U] + = ((0xfffff800U & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[4U] + << 5U)) | ((0x700U & ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[4U] + << 0xbU) + | (0x700U + & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[3U] + >> 0x15U)))) + | (0xffU & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0U]))); + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[1U] + = ((0x7ffU & ((0x7e0U & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U] + << 5U)) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[4U] + >> 0x1bU))) + | (0xfffff800U & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[2U] + << 2U))); + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[2U] + = ((0x7ffU & ((0x7fcU & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[3U] + << 2U)) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[2U] + >> 0x1eU))) + | (0xfffff800U & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0U] + << 3U))); + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[3U] + = ((0x7ffU & ((0x7f8U & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[1U] + << 3U)) | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0U] + >> 0x1dU))) + | (0xfffff800U & ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[6U] + << 0x1dU) | (0x1ffff800U + & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U] + >> 3U))))); + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[4U] + = ((0x7ffU & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[6U] + >> 3U)) | (0xfffff800U & ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[7U] + << 0x1dU) + | (0x1ffff800U + & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[6U] + >> 3U))))); + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[5U] + = ((0x7ffU & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[7U] + >> 3U)) | (0xfffff800U & ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[8U] + << 0x1dU) + | (0x1ffff800U + & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[7U] + >> 3U))))); + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[6U] + = ((0x7ffU & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[8U] + >> 3U)) | (0xfffff800U & ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] + << 0x1dU) + | (0x1ffff800U + & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[8U] + >> 3U))))); + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[7U] + = __Vtemp124[7U]; + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[8U] + = __Vtemp124[8U]; + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[9U] + = ((0xffffU & ((3U & (vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[0U] + >> 0x1eU)) | (0xfffcU + & (vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[1U] + << 2U)))) + | (0xffff0000U & (vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[1U] + << 2U))); + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0xaU] + = ((0xffffU & ((3U & (vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[1U] + >> 0x1eU)) | (0xfffcU + & (vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[2U] + << 2U)))) + | (0xffff0000U & (vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[2U] + << 2U))); + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0xbU] + = ((0xffffU & ((3U & (vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[2U] + >> 0x1eU)) | (0xfffcU + & (vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[3U] + << 2U)))) + | (0xffff0000U & (vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[3U] + << 2U))); + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0xcU] + = ((0xffffU & ((3U & (vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[3U] + >> 0x1eU)) | (0xfffcU + & (vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data[0U] + << 2U)))) + | (0xffff0000U & (vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data[0U] + << 2U))); + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0xdU] + = ((0xffffU & ((3U & (vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data[0U] + >> 0x1eU)) | (0xfffcU + & (vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data[1U] + << 2U)))) + | (0xffff0000U & (vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data[1U] + << 2U))); + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0xeU] + = ((0xffffU & ((3U & (vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data[1U] + >> 0x1eU)) | (0xfffcU + & (vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data[2U] + << 2U)))) + | (0xffff0000U & (vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data[2U] + << 2U))); + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0xfU] + = ((0xffffU & ((3U & (vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data[2U] + >> 0x1eU)) | (0xfffcU + & (vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data[3U] + << 2U)))) + | (0xffff0000U & (vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data[3U] + << 2U))); + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0x10U] + = ((0xffffU & ((3U & (vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data[3U] + >> 0x1eU)) | (0xfffcU + & (vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_a_reg_data[0U] + << 2U)))) + | (0xffff0000U & (vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_a_reg_data[0U] + << 2U))); + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0x11U] + = ((0xffffU & ((3U & (vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_a_reg_data[0U] + >> 0x1eU)) | (0xfffcU + & (vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_a_reg_data[1U] + << 2U)))) + | (0xffff0000U & (vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_a_reg_data[1U] + << 2U))); + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0x12U] + = ((0xffffU & ((3U & (vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_a_reg_data[1U] + >> 0x1eU)) | (0xfffcU + & (vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_a_reg_data[2U] + << 2U)))) + | (0xffff0000U & (vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_a_reg_data[2U] + << 2U))); + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0x13U] + = ((0xffffU & ((3U & (vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_a_reg_data[2U] + >> 0x1eU)) | (0xfffcU + & (vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_a_reg_data[3U] + << 2U)))) + | (0xffff0000U & (vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_a_reg_data[3U] + << 2U))); + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0x14U] + = ((0xffffU & ((3U & (vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_a_reg_data[3U] + >> 0x1eU)) | (0xfffcU + & ((((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] + << 0x12U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] + >> 0xeU)) + + ( + (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[1U] + >> 8U))) + << 2U)))) + | (0xffff0000U & (__Vtemp115[0xdU] << 0x10U))); + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0x15U] + = ((0xffffU & (__Vtemp115[0xdU] >> 0x10U)) + | (0xffff0000U & (__Vtemp115[0xeU] << 0x10U))); + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0x16U] + = (0xffffU & ((0xfff0U & ((0xffc0U & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xfU] + << 6U)) + | (0x30U & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xeU] + >> 0x1aU)))) + | ((8U & (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xeU] + >> 0x1aU)) | (__Vtemp115[0xeU] + >> 0x10U)))); + // ALWAYS at VX_decode.v:503 + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.itype_immed + = ((0x4000U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? ((0x2000U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? ((0x1000U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? 0xdeadbeefU : ((0x800U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? 0xdeadbeefU + : ((0x400U & + vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? 0xdeadbeefU + : ((0x200U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? ((0x100U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? + ((0xfffff000U + & (VL_NEGATE_I((IData)( + (1U + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + >> 7U)))) + << 0xcU)) + | ((0x800U + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 4U)) + | ((0x400U + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 5U)) + | ((0x3f0U + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 3U)) + | (0xfU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x10U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x10U))))))) + : 0xdeadbeefU) + : 0xdeadbeefU)))) + : 0xdeadbeefU) : ((0x2000U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? ((0x1000U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? 0xdeadbeefU + : ((0x800U & + vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? 0xdeadbeefU + : ((0x400U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? 0xdeadbeefU + : ((0x200U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? + ((0x100U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? + ((0xfffff000U + & (VL_NEGATE_I((IData)( + (1U + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + >> 7U)))) + << 0xcU)) + | ((0xfe0U + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 4U)) + | (0x1fU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x11U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0xfU))))) + : 0xdeadbeefU) + : 0xdeadbeefU)))) + : ((0x1000U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? ((0x800U & + vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? 0xdeadbeefU + : ((0x400U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? 0xdeadbeefU + : ((0x200U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? + ((0x100U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? + ((0xfffff000U + & (VL_NEGATE_I((IData)( + (1U + & ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__alu_tempp) + >> 0xbU)))) + << 0xcU)) + | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__alu_tempp)) + : 0xdeadbeefU) + : 0xdeadbeefU))) + : ((0x800U & + vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? 0xdeadbeefU + : ((0x400U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? 0xdeadbeefU + : ((0x200U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? + ((0x100U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? + ((0xfffff000U + & (VL_NEGATE_I((IData)( + (1U + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + >> 7U)))) + << 0xcU)) + | (0xfffU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 4U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x1cU)))) + : 0xdeadbeefU) + : 0xdeadbeefU)))))); + vlTOPp->Vortex__DOT__vx_decode__DOT__is_ebreak + = ((0x73U == (0x7fU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) + & ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__jal_sys_jal) + & vlTOPp->Vortex__DOT__vx_decode__DOT__in_valid + [0U])); + // ALWAYS at VX_decode.v:447 + if ((0x4000U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U])) { + if ((0x2000U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U])) { + if ((0x1000U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U])) { + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.jal_offset + = ((0x800U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? 0xdeadbeefU : ((0x400U & + vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? 0xdeadbeefU + : ((0x200U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? ((0x100U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? + (((0U + == + (7U + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0xcU) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x14U)))) + & (2U + > + (0xfffU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 4U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x1cU))))) + ? 0xb0000000U + : 0xdeadbeefU) + : 0xdeadbeefU) + : 0xdeadbeefU))); + } else { + if ((0x800U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U])) { + if ((0x400U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U])) { + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.jal_offset + = ((0x200U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? ((0x100U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? ((0xffe00000U + & (VL_NEGATE_I((IData)( + (1U + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + >> 7U)))) + << 0x15U)) + | ((0x100000U + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0xdU)) + | ((0xff000U + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (0xfff000U + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) + | ((0x800U + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x11U)) + | (0x7feU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 4U) + | (0xeU + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x1cU)))))))) + : 0xdeadbeefU) : 0xdeadbeefU); + } else { + if ((0x200U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U])) { + if ((0x100U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U])) { + if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jalrs) + | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jmprt))) { + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.jal_offset = 0U; + } + } else { + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.jal_offset = 0xdeadbeefU; + } + } else { + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.jal_offset = 0xdeadbeefU; + } + } + } else { + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.jal_offset + = ((0x400U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? ((0x200U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? ((0x100U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? ((0xfffff000U + & (VL_NEGATE_I((IData)( + (1U + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + >> 7U)))) + << 0xcU)) + | (0xfffU & + ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 4U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x1cU)))) + : 0xdeadbeefU) : 0xdeadbeefU) + : 0xdeadbeefU); + } + } + } else { + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.jal_offset = 0xdeadbeefU; + } + } else { + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.jal_offset = 0xdeadbeefU; + } + // ALWAYS at VX_decode.v:447 + if ((0x4000U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U])) { + if ((0x2000U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U])) { + if ((0x1000U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U])) { + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.jal + = ((~ (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0xbU)) & ((~ (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0xaU)) + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 9U) + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U) + & ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__jal_sys_jal) + & vlTOPp->Vortex__DOT__vx_decode__DOT__in_valid + [0U]))))); + } else { + if ((0x800U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U])) { + if ((0x400U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U])) { + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.jal + = ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 9U) & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U) & + vlTOPp->Vortex__DOT__vx_decode__DOT__in_valid + [0U])); + } else { + if ((0x200U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U])) { + if ((0x100U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U])) { + if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jalrs) + | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jmprt))) { + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.jal + = vlTOPp->Vortex__DOT__vx_decode__DOT__in_valid + [0U]; + } + } else { + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.jal = 0U; + } + } else { + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.jal = 0U; + } + } + } else { + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.jal + = ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0xaU) & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 9U) & ( + (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U) + & vlTOPp->Vortex__DOT__vx_decode__DOT__in_valid + [0U]))); + } + } + } else { + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.jal = 0U; + } + } else { + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.jal = 0U; + } + // ALWAYS at VX_decode.v:514 + if ((0x4000U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U])) { + if ((0x2000U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U])) { + if ((0x1000U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U])) { + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.branch_type = 0U; + } else { + if ((0x800U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U])) { + if ((0x400U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U])) { + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.branch_type = 0U; + } else { + if ((0x200U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U])) { + if ((0x100U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U])) { + if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jalrs) + | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jmprt))) { + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.branch_type = 0U; + } + } else { + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.branch_type = 0U; + } + } else { + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.branch_type = 0U; + } + } + } else { + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.branch_type + = ((0x400U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? 0U : ((0x200U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? ((0x100U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? ((0x400000U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? ((0x200000U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? + ((0x100000U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? 6U + : 5U) + : + ((0x100000U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? 4U + : 3U)) + : ((0x200000U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? 0U + : + ((0x100000U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? 2U + : 1U))) + : 0U) : 0U)); + } + } + } else { + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.branch_type = 0U; + } + } else { + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.branch_type = 0U; + } + // ALWAYS at VX_decode.v:514 + if ((0x4000U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U])) { + if ((0x2000U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U])) { + if ((0x1000U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U])) { + vlTOPp->Vortex__DOT__decode_branch_stall = 0U; + } else { + if ((0x800U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U])) { + if ((0x400U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U])) { + vlTOPp->Vortex__DOT__decode_branch_stall + = ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 9U) & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U) & + vlTOPp->Vortex__DOT__vx_decode__DOT__in_valid + [0U])); + } else { + if ((0x200U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U])) { + if ((0x100U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U])) { + if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jalrs) + | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jmprt))) { + vlTOPp->Vortex__DOT__decode_branch_stall + = vlTOPp->Vortex__DOT__vx_decode__DOT__in_valid + [0U]; + } + } else { + vlTOPp->Vortex__DOT__decode_branch_stall = 0U; + } + } else { + vlTOPp->Vortex__DOT__decode_branch_stall = 0U; + } + } + } else { + vlTOPp->Vortex__DOT__decode_branch_stall + = ((0x400U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 9U) & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U) & + vlTOPp->Vortex__DOT__vx_decode__DOT__in_valid + [0U])) : + ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 9U) & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U) & vlTOPp->Vortex__DOT__vx_decode__DOT__in_valid + [0U]))); + } + } + } else { + vlTOPp->Vortex__DOT__decode_branch_stall = 0U; + } + } else { + vlTOPp->Vortex__DOT__decode_branch_stall = 0U; + } + vlSymsp->TOP__Vortex__DOT__VX_warp_ctl.change_mask + = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jalrs) + | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jmprt)); + vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__real_wspawn + = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_wspawn) + & (1U == (0xfU & ((IData)(1U) + (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_state))))); + vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__real_wspawn + = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_wspawn) + & (2U == (0xfU & ((IData)(1U) + (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_state))))); + vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__real_wspawn + = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_wspawn) + & (3U == (0xfU & ((IData)(1U) + (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_state))))); + vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__real_wspawn + = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_wspawn) + & (4U == (0xfU & ((IData)(1U) + (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_state))))); + vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__real_wspawn + = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_wspawn) + & (5U == (0xfU & ((IData)(1U) + (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_state))))); + vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__real_wspawn + = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_wspawn) + & (6U == (0xfU & ((IData)(1U) + (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_state))))); + vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__real_wspawn + = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_wspawn) + & (7U == (0xfU & ((IData)(1U) + (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_state))))); + vlTOPp->Vortex__DOT__vx_decode__DOT__real_zero_isclone + = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone) + & (0U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))); + vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__real_isclone + = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone) + & (1U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))); + vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__real_isclone + = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone) + & (2U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))); + vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__real_isclone + = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone) + & (3U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))); + vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__real_isclone + = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone) + & (4U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))); + vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__real_isclone + = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone) + & (5U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))); + vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__real_isclone + = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone) + & (6U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))); + vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__real_isclone + = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone) + & (7U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))); + vlTOPp->out_cache_driver_in_mem_read = (7U & (( + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + << 1U) + | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] + >> 0x1fU))); + vlTOPp->out_cache_driver_in_mem_write = (7U & ( + (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + << 4U) + | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] + >> 0x1cU))); + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address[0U] + = ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] + << 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + >> 2U)); + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data[0U] + = ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[4U] + << 0x15U) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[3U] + >> 0xbU)); + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid[0U] + = (1U & (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U)); + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address[1U] + = ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xaU] + << 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] + >> 2U)); + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data[1U] + = ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[5U] + << 0x15U) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[4U] + >> 0xbU)); + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid[1U] + = (1U & (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U] + >> 5U)); + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address[2U] + = ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xbU] + << 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xaU] + >> 2U)); + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data[2U] + = ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[6U] + << 0x15U) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[5U] + >> 0xbU)); + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid[2U] + = (1U & (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U] + >> 6U)); + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address[3U] + = ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xcU] + << 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xbU] + >> 2U)); + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data[3U] + = ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] + << 0x15U) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[6U] + >> 0xbU)); + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid[3U] + = (1U & (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U] + >> 7U)); + vlTOPp->Vortex__DOT__memory_branch_dest = (((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[2U] + << 0x15U) + | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[1U] + >> 0xbU)) + + (( + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[1U] + << 0x16U) + | (0x3ffffeU + & (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U] + >> 0xaU)))); + // ALWAYS at VX_memory.v:56 + vlTOPp->Vortex__DOT__vx_memory__DOT__temp_branch_dir + = (1U & ((0x400U & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U]) + ? ((0x200U & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U]) + ? ((~ (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U] + >> 8U)) & (~ (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] + >> 1U))) + : ((0x100U & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U]) + ? (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] + >> 1U) : (~ (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] + >> 1U)))) + : ((0x200U & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U]) + ? ((0x100U & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U]) + ? (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] + >> 1U) : (0U != ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] + << 0x1eU) + | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + >> 2U)))) + : ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U] + >> 8U) & (0U == ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] + << 0x1eU) + | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + >> 2U))))))); + vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd + = ((((((0x1fU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 9U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x17U))) == + (0x1fU & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + << 9U) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] + >> 0x17U)))) & + (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 9U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x17U))))) + & (0U != (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + << 0xbU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] + >> 0x15U))))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd))) + & ((0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))) == (0xfU + & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U]))); + vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[0U] + = ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[3U] + << 0x15U) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[2U] + >> 0xbU)); + vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[1U] + = ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[3U] + << 0x15U) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[2U] + >> 0xbU)); + vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[2U] + = ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[3U] + << 0x15U) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[2U] + >> 0xbU)); + vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[3U] + = ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[3U] + << 0x15U) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[2U] + >> 0xbU)); + vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd + = ((((((0x1fU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 4U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x1cU))) == + (0x1fU & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + << 9U) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] + >> 0x17U)))) & + (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 4U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x1cU))))) + & (0U != (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + << 0xbU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] + >> 0x15U))))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd))) + & ((0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))) == (0xfU + & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U]))); + vlTOPp->out_ebreak = ((0U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U)))) + & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_ebreak)); + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_final_alu + = ((0x63U == (0x7fU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) + ? ((5U > (IData)(vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.branch_type)) + ? 1U : 0xaU) : ((0x37U == (0x7fU & + ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) + ? 0xbU : ((0x17U == + (0x7fU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) + ? 0xcU : + ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_csr) + ? ((1U + == + (3U + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0xcU) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x14U)))) + ? 0xdU + : + ((2U + == + (3U + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0xcU) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x14U)))) + ? 0xeU + : 0xfU)) + : (((0x23U + == + (0x7fU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) + | (3U + == + (0x7fU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U))))) + ? 0U + : + ((0x400000U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? + ((0x200000U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? + ((0x100000U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? 9U + : 8U) + : + ((0x100000U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? + ((0U + == + (0x7fU + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + >> 1U))) + ? 6U + : 7U) + : 5U)) + : + ((0x200000U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? + ((0x100000U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? 4U + : 3U) + : + ((0x100000U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U]) + ? 2U + : + ((0x13U + == + (0x7fU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) + ? 0U + : + ((0U + == + (0x7fU + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + >> 1U))) + ? 0U + : 1U)))))))))); + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__warp_zero_change_mask + = ((IData)(vlSymsp->TOP__Vortex__DOT__VX_warp_ctl.change_mask) + & (0U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))); + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__warp_zero_change_mask + = ((IData)(vlSymsp->TOP__Vortex__DOT__VX_warp_ctl.change_mask) + & (1U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))); + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__warp_zero_change_mask + = ((IData)(vlSymsp->TOP__Vortex__DOT__VX_warp_ctl.change_mask) + & (2U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))); + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__warp_zero_change_mask + = ((IData)(vlSymsp->TOP__Vortex__DOT__VX_warp_ctl.change_mask) + & (3U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))); + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__warp_zero_change_mask + = ((IData)(vlSymsp->TOP__Vortex__DOT__VX_warp_ctl.change_mask) + & (4U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))); + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__warp_zero_change_mask + = ((IData)(vlSymsp->TOP__Vortex__DOT__VX_warp_ctl.change_mask) + & (5U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))); + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__warp_zero_change_mask + = ((IData)(vlSymsp->TOP__Vortex__DOT__VX_warp_ctl.change_mask) + & (6U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))); + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__warp_zero_change_mask + = ((IData)(vlSymsp->TOP__Vortex__DOT__VX_warp_ctl.change_mask) + & (7U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))); + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall + = ((0xfeU & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall)) + | (((0U == (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__state_stall)) + | (1U != (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__state_stall))) + & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__real_zero_isclone))); + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall + = ((0xfdU & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall)) + | (((((0U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one.__PVT__clone_state_stall)) + | (1U != (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one.__PVT__clone_state_stall))) + & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__real_isclone)) + | (((0U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one.__PVT__wspawn_state_stall)) + & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__real_wspawn)) + | (1U < (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one.__PVT__wspawn_state_stall)))) + << 1U)); + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall + = ((0xfbU & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall)) + | (((((0U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__VX_Context_one.__PVT__clone_state_stall)) + | (1U != (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__VX_Context_one.__PVT__clone_state_stall))) + & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__real_isclone)) + | (((0U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__VX_Context_one.__PVT__wspawn_state_stall)) + & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__real_wspawn)) + | (1U < (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__VX_Context_one.__PVT__wspawn_state_stall)))) + << 2U)); + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall + = ((0xf7U & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall)) + | (((((0U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__VX_Context_one.__PVT__clone_state_stall)) + | (1U != (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__VX_Context_one.__PVT__clone_state_stall))) + & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__real_isclone)) + | (((0U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__VX_Context_one.__PVT__wspawn_state_stall)) + & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__real_wspawn)) + | (1U < (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__VX_Context_one.__PVT__wspawn_state_stall)))) + << 3U)); + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall + = ((0xefU & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall)) + | (((((0U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__VX_Context_one.__PVT__clone_state_stall)) + | (1U != (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__VX_Context_one.__PVT__clone_state_stall))) + & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__real_isclone)) + | (((0U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__VX_Context_one.__PVT__wspawn_state_stall)) + & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__real_wspawn)) + | (1U < (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__VX_Context_one.__PVT__wspawn_state_stall)))) + << 4U)); + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall + = ((0xdfU & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall)) + | (((((0U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__VX_Context_one.__PVT__clone_state_stall)) + | (1U != (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__VX_Context_one.__PVT__clone_state_stall))) + & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__real_isclone)) + | (((0U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__VX_Context_one.__PVT__wspawn_state_stall)) + & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__real_wspawn)) + | (1U < (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__VX_Context_one.__PVT__wspawn_state_stall)))) + << 5U)); + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall + = ((0xbfU & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall)) + | (((((0U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__VX_Context_one.__PVT__clone_state_stall)) + | (1U != (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__VX_Context_one.__PVT__clone_state_stall))) + & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__real_isclone)) + | (((0U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__VX_Context_one.__PVT__wspawn_state_stall)) + & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__real_wspawn)) + | (1U < (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__VX_Context_one.__PVT__wspawn_state_stall)))) + << 6U)); + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall + = ((0x7fU & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall)) + | (((((0U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one.__PVT__clone_state_stall)) + | (1U != (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one.__PVT__clone_state_stall))) + & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__real_isclone)) + | (((0U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one.__PVT__wspawn_state_stall)) + & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__real_wspawn)) + | (1U < (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one.__PVT__wspawn_state_stall)))) + << 7U)); + vlTOPp->out_cache_driver_in_address[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address [3U]; - vlTOPp->Vortex__DOT____Vcellout__vx_f_d_reg__out_valid[2U] - = vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__valid + vlTOPp->out_cache_driver_in_address[2U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address [2U]; - vlTOPp->Vortex__DOT____Vcellout__vx_f_d_reg__out_valid[1U] - = vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__valid + vlTOPp->out_cache_driver_in_address[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address [1U]; - vlTOPp->Vortex__DOT____Vcellout__vx_f_d_reg__out_valid[0U] - = vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__valid + vlTOPp->out_cache_driver_in_address[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address [0U]; + vlTOPp->out_cache_driver_in_data[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data + [3U]; + vlTOPp->out_cache_driver_in_data[2U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data + [2U]; + vlTOPp->out_cache_driver_in_data[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data + [1U]; + vlTOPp->out_cache_driver_in_data[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data + [0U]; + vlTOPp->out_cache_driver_in_valid[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid + [3U]; + vlTOPp->out_cache_driver_in_valid[2U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid + [2U]; + vlTOPp->out_cache_driver_in_valid[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid + [1U]; + vlTOPp->out_cache_driver_in_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid + [0U]; + // ALWAYS at VX_warp.v:57 + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__VX_Warp__DOT__temp_PC + = (((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0x15U] + >> 2U) & (0U == (0xfU & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U]))) + ? ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0x15U] + << 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0x14U] + >> 2U)) : (((IData)(vlTOPp->Vortex__DOT__vx_memory__DOT__temp_branch_dir) + & (0U == (0xfU + & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U]))) + ? vlTOPp->Vortex__DOT__memory_branch_dest + : vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__VX_Warp__DOT__real_PC)); + // ALWAYS at VX_warp.v:57 + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__temp_PC + = (((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0x15U] + >> 2U) & (1U == (0xfU & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U]))) + ? ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0x15U] + << 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0x14U] + >> 2U)) : (((IData)(vlTOPp->Vortex__DOT__vx_memory__DOT__temp_branch_dir) + & (1U == (0xfU + & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U]))) + ? vlTOPp->Vortex__DOT__memory_branch_dest + : vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__real_PC)); + // ALWAYS at VX_warp.v:57 + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__temp_PC + = (((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0x15U] + >> 2U) & (2U == (0xfU & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U]))) + ? ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0x15U] + << 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0x14U] + >> 2U)) : (((IData)(vlTOPp->Vortex__DOT__vx_memory__DOT__temp_branch_dir) + & (2U == (0xfU + & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U]))) + ? vlTOPp->Vortex__DOT__memory_branch_dest + : vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__real_PC)); + // ALWAYS at VX_warp.v:57 + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__temp_PC + = (((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0x15U] + >> 2U) & (3U == (0xfU & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U]))) + ? ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0x15U] + << 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0x14U] + >> 2U)) : (((IData)(vlTOPp->Vortex__DOT__vx_memory__DOT__temp_branch_dir) + & (3U == (0xfU + & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U]))) + ? vlTOPp->Vortex__DOT__memory_branch_dest + : vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__real_PC)); + // ALWAYS at VX_warp.v:57 + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__temp_PC + = (((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0x15U] + >> 2U) & (4U == (0xfU & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U]))) + ? ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0x15U] + << 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0x14U] + >> 2U)) : (((IData)(vlTOPp->Vortex__DOT__vx_memory__DOT__temp_branch_dir) + & (4U == (0xfU + & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U]))) + ? vlTOPp->Vortex__DOT__memory_branch_dest + : vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__real_PC)); + // ALWAYS at VX_warp.v:57 + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__temp_PC + = (((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0x15U] + >> 2U) & (5U == (0xfU & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U]))) + ? ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0x15U] + << 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0x14U] + >> 2U)) : (((IData)(vlTOPp->Vortex__DOT__vx_memory__DOT__temp_branch_dir) + & (5U == (0xfU + & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U]))) + ? vlTOPp->Vortex__DOT__memory_branch_dest + : vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__real_PC)); + // ALWAYS at VX_warp.v:57 + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__temp_PC + = (((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0x15U] + >> 2U) & (6U == (0xfU & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U]))) + ? ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0x15U] + << 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0x14U] + >> 2U)) : (((IData)(vlTOPp->Vortex__DOT__vx_memory__DOT__temp_branch_dir) + & (6U == (0xfU + & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U]))) + ? vlTOPp->Vortex__DOT__memory_branch_dest + : vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__real_PC)); + // ALWAYS at VX_warp.v:57 + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__temp_PC + = (((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0x15U] + >> 2U) & (7U == (0xfU & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U]))) + ? ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0x15U] + << 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0x14U] + >> 2U)) : (((IData)(vlTOPp->Vortex__DOT__vx_memory__DOT__temp_branch_dir) + & (7U == (0xfU + & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U]))) + ? vlTOPp->Vortex__DOT__memory_branch_dest + : vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__real_PC)); + vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd + = (((((((0x1fU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 9U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x17U))) == + (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xcU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x14U)))) + & (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 9U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x17U))))) + & (0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U))))) + & ((0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]) + == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd))); + vlTOPp->Vortex__DOT__forwarding_fwd_stall = ((((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd) + | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd)) + & (2U + == (IData)(vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.wb))) + | (((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd) + | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd)) + & (2U + == + (3U + & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + << 0xbU) + | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] + >> 0x15U)))))); + vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd + = (((((((0x1fU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 4U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x1cU))) == + (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xcU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x14U)))) + & (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 4U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x1cU))))) + & (0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U))))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd))) + & ((0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]) + == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))); + // ALWAYS at VX_decode.v:271 + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall + = (1U & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall)); + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall + = (1U & ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall) + | ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall) + >> 1U))); + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall + = (1U & ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall) + | ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall) + >> 2U))); + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall + = (1U & ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall) + | ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall) + >> 3U))); + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall + = (1U & ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall) + | ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall) + >> 4U))); + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall + = (1U & ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall) + | ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall) + >> 5U))); + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall + = (1U & ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall) + | ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall) + >> 6U))); + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall + = (1U & ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall) + | ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall) + >> 7U))); vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_pc[0U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__0__KET____DOT__VX_Warp__DOT__temp_PC; - vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_pc[7U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__7__KET____DOT__VX_Warp__DOT__temp_PC; - vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_pc[6U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__6__KET____DOT__VX_Warp__DOT__temp_PC; - vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_pc[5U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__5__KET____DOT__VX_Warp__DOT__temp_PC; - vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_pc[4U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__4__KET____DOT__VX_Warp__DOT__temp_PC; - vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_pc[3U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__3__KET____DOT__VX_Warp__DOT__temp_PC; - vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_pc[2U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__2__KET____DOT__VX_Warp__DOT__temp_PC; + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__VX_Warp__DOT__temp_PC; vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_pc[1U] - = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__1__KET____DOT__VX_Warp__DOT__temp_PC; - vlTOPp->Vortex__DOT__f_d_valid[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_f_d_reg__out_valid - [3U]; - vlTOPp->Vortex__DOT__f_d_valid[2U] = vlTOPp->Vortex__DOT____Vcellout__vx_f_d_reg__out_valid - [2U]; - vlTOPp->Vortex__DOT__f_d_valid[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_f_d_reg__out_valid - [1U]; - vlTOPp->Vortex__DOT__f_d_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_f_d_reg__out_valid - [0U]; - // ALWAYS at VX_fetch.v:172 + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__temp_PC; + vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_pc[2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__temp_PC; + vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_pc[3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__temp_PC; + vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_pc[4U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__temp_PC; + vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_pc[5U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__temp_PC; + vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_pc[6U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__temp_PC; + vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_pc[7U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__temp_PC; + vlTOPp->Vortex__DOT__forwarding_src1_fwd = (((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd) + | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd)) + | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd)); + vlTOPp->Vortex__DOT__forwarding_src2_fwd = (((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd) + | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd)) + | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd)); + vlTOPp->Vortex__DOT__vx_fetch__DOT__add_warp = + (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_wspawn) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_ebreak))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall))); + vlTOPp->Vortex__DOT__vx_fetch__DOT__remove_warp + = (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_ebreak) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_wspawn))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall))); + vlTOPp->Vortex__DOT__vx_fetch__DOT__stall = ((((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall) + | (IData)(vlTOPp->Vortex__DOT__decode_branch_stall)) + | (IData)(vlTOPp->Vortex__DOT__forwarding_fwd_stall)) + | (IData)(vlTOPp->Vortex__DOT__execute_branch_stall)); + // ALWAYS at VX_fetch.v:177 if ((0U == (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num))) { vlTOPp->Vortex__DOT__vx_fetch__DOT__out_PC_var = vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_pc @@ -12173,1736 +7824,2033 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__6(VVortex__Syms* __restrict vlSymsp) = vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_pc [7U]; } - vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid[3U] - = vlTOPp->Vortex__DOT__f_d_valid[3U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid[2U] - = vlTOPp->Vortex__DOT__f_d_valid[2U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid[1U] - = vlTOPp->Vortex__DOT__f_d_valid[1U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid[0U] - = vlTOPp->Vortex__DOT__f_d_valid[0U]; - vlTOPp->icache_request_pc_address = vlTOPp->Vortex__DOT__vx_fetch__DOT__out_PC_var; - vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_valid[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid - [3U]; - vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_valid[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid - [2U]; - vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_valid[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid - [1U]; - vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_valid[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid - [0U]; - vlTOPp->Vortex__DOT__decode_valid[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_valid - [3U]; - vlTOPp->Vortex__DOT__decode_valid[2U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_valid - [2U]; - vlTOPp->Vortex__DOT__decode_valid[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_valid - [1U]; - vlTOPp->Vortex__DOT__decode_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_valid - [0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_valid[3U] - = vlTOPp->Vortex__DOT__decode_valid[3U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_valid[2U] - = vlTOPp->Vortex__DOT__decode_valid[2U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_valid[1U] - = vlTOPp->Vortex__DOT__decode_valid[1U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_valid[0U] - = vlTOPp->Vortex__DOT__decode_valid[0U]; -} - -VL_INLINE_OPT void VVortex::_sequent__TOP__7(VVortex__Syms* __restrict vlSymsp) { - VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex::_sequent__TOP__7\n"); ); - VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; - // Body - // ALWAYS at VX_register_file_slave.v:68 - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__out_src1_data - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers - [(0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0xfU))]; - // ALWAYS at VX_register_file_slave.v:68 - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__out_src1_data - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers - [(0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0xfU))]; - // ALWAYS at VX_register_file_slave.v:68 - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src1_data - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers - [(0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0xfU))]; - // ALWAYS at VX_register_file.v:52 - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_src1_data - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [(0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0xfU))]; - // ALWAYS at VX_register_file_slave.v:68 - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__out_src2_data - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers - [(0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0x14U))]; - // ALWAYS at VX_register_file_slave.v:68 - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__out_src2_data - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers - [(0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0x14U))]; - // ALWAYS at VX_register_file_slave.v:68 - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src2_data - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers - [(0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0x14U))]; - // ALWAYS at VX_register_file.v:52 - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_src2_data - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers - [(0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0x14U))]; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd1_register[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__out_src1_data; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd1_register[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__out_src1_data; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd1_register[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src1_data; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd1_register[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_src1_data; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd2_register[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__out_src2_data; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd2_register[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__out_src2_data; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd2_register[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src2_data; - vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd2_register[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_src2_data; -} - -VL_INLINE_OPT void VVortex::_combo__TOP__8(VVortex__Syms* __restrict vlSymsp) { - VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex::_combo__TOP__8\n"); ); - VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; - // Body - vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data[3U] - = vlTOPp->in_cache_driver_out_data[3U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data[2U] - = vlTOPp->in_cache_driver_out_data[2U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data[1U] - = vlTOPp->in_cache_driver_out_data[1U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data[0U] - = vlTOPp->in_cache_driver_out_data[0U]; - vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_mem_result[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data - [3U]; - vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_mem_result[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data - [2U]; - vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_mem_result[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data - [1U]; - vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_mem_result[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data - [0U]; - vlTOPp->Vortex__DOT__memory_mem_result[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_mem_result - [3U]; - vlTOPp->Vortex__DOT__memory_mem_result[2U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_mem_result - [2U]; - vlTOPp->Vortex__DOT__memory_mem_result[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_mem_result - [1U]; - vlTOPp->Vortex__DOT__memory_mem_result[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_mem_result - [0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_mem_result[3U] - = vlTOPp->Vortex__DOT__memory_mem_result[3U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_mem_result[2U] - = vlTOPp->Vortex__DOT__memory_mem_result[2U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_mem_result[1U] - = vlTOPp->Vortex__DOT__memory_mem_result[1U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_mem_result[0U] - = vlTOPp->Vortex__DOT__memory_mem_result[0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data[3U] - = vlTOPp->Vortex__DOT__memory_mem_result[3U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data[2U] - = vlTOPp->Vortex__DOT__memory_mem_result[2U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data[1U] - = vlTOPp->Vortex__DOT__memory_mem_result[1U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data[0U] - = vlTOPp->Vortex__DOT__memory_mem_result[0U]; -} - -VL_INLINE_OPT void VVortex::_sequent__TOP__9(VVortex__Syms* __restrict vlSymsp) { - VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex::_sequent__TOP__9\n"); ); - VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; - // Body - // ALWAYS at VX_f_d_reg.v:50 - if (vlTOPp->reset) { - vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction = 0U; - } else { - if ((1U & (~ ((IData)(vlTOPp->Vortex__DOT__forwarding_fwd_stall) - | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall))))) { - vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__stall) - ? 0U : vlTOPp->icache_response_instruction); - } - } - vlTOPp->Vortex__DOT__vx_decode__DOT__is_itype = - ((0x13U == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) - | (3U == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction))); - vlTOPp->Vortex__DOT__decode_csr_address = (0xfffU - & (((0U - != - (7U - & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0xcU))) - & (2U - <= - (0xfffU - & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0x14U)))) - ? - (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0x14U) - : 0x55U)); - // ALWAYS at VX_decode.v:577 - vlTOPp->__Vtableidx1 = (7U & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0xcU)); - vlTOPp->Vortex__DOT__vx_decode__DOT__mul_alu = - vlTOPp->__Vtable1_Vortex__DOT__vx_decode__DOT__mul_alu - [vlTOPp->__Vtableidx1]; - vlTOPp->Vortex__DOT__vx_decode__DOT__alu_tempp - = (0xfffU & (((1U == (7U & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0xcU))) | (5U - == - (7U - & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0xcU)))) - ? (0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0x14U)) : (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0x14U))); - vlTOPp->Vortex__DOT__vx_decode__DOT__is_csr = ( - (0x73U - == - (0x7fU - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) - & (0U - != - (7U - & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0xcU)))); - vlTOPp->Vortex__DOT__vx_decode__DOT__jal_sys_jal - = ((0U == (7U & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0xcU))) & (2U > (0xfffU - & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0x14U)))); - vlTOPp->Vortex__DOT__vx_decode__DOT__is_jmprt = - ((0x6bU == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) - & (4U == (7U & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0xcU)))); - vlTOPp->Vortex__DOT__vx_decode__DOT__is_wspawn - = ((0x6bU == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) - & (0U == (7U & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0xcU)))); - vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone = - ((0x6bU == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) - & (5U == (7U & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0xcU)))); - vlTOPp->Vortex__DOT__vx_decode__DOT__is_jalrs = - ((0x6bU == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) - & (6U == (7U & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0xcU)))); - vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd - = (((((0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0xfU)) == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rd)) - & (0U != (0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0xfU)))) & (0U != (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb))) - & ((IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num) - == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__warp_num))); - vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd - = (((((0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0x14U)) == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rd)) - & (0U != (0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0x14U)))) & (0U - != (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb))) - & ((IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num) - == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__warp_num))); - // ALWAYS at VX_decode.v:508 - vlTOPp->Vortex__DOT__decode_itype_immed = ((0x40U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? ( - (0x20U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? - ((0x10U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? 0xdeadbeefU - : - ((8U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? 0xdeadbeefU - : - ((4U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? 0xdeadbeefU - : - ((2U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? - ((1U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? - ((0xfffff000U - & (VL_NEGATE_I((IData)( - (1U - & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0x1fU)))) - << 0xcU)) - | ((0x800U - & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0x14U)) - | ((0x400U - & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - << 3U)) - | ((0x3f0U - & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0x15U)) - | (0xfU - & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 8U)))))) - : 0xdeadbeefU) - : 0xdeadbeefU)))) - : 0xdeadbeefU) - : ( - (0x20U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? - ((0x10U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? 0xdeadbeefU - : - ((8U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? 0xdeadbeefU - : - ((4U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? 0xdeadbeefU - : - ((2U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? - ((1U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? - ((0xfffff000U - & (VL_NEGATE_I((IData)( - (1U - & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0x1fU)))) - << 0xcU)) - | ((0xfe0U - & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0x14U)) - | (0x1fU - & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 7U)))) - : 0xdeadbeefU) - : 0xdeadbeefU)))) - : - ((0x10U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? - ((8U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? 0xdeadbeefU - : - ((4U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? 0xdeadbeefU - : - ((2U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? - ((1U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? - ((0xfffff000U - & (VL_NEGATE_I((IData)( - (1U - & ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__alu_tempp) - >> 0xbU)))) - << 0xcU)) - | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__alu_tempp)) - : 0xdeadbeefU) - : 0xdeadbeefU))) - : - ((8U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? 0xdeadbeefU - : - ((4U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? 0xdeadbeefU - : - ((2U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? - ((1U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? - ((0xfffff000U - & (VL_NEGATE_I((IData)( - (1U - & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0x1fU)))) - << 0xcU)) - | (0xfffU - & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0x14U))) - : 0xdeadbeefU) - : 0xdeadbeefU)))))); - vlTOPp->Vortex__DOT__vx_decode__DOT__is_ebreak - = ((0x73U == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) - & ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__jal_sys_jal) - & vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid - [0U])); - vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__real_wspawn - = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_wspawn) - & (1U == (0xfU & ((IData)(1U) + (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_state))))); - vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__real_wspawn - = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_wspawn) - & (2U == (0xfU & ((IData)(1U) + (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_state))))); - vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__real_wspawn - = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_wspawn) - & (3U == (0xfU & ((IData)(1U) + (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_state))))); - vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__real_wspawn - = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_wspawn) - & (4U == (0xfU & ((IData)(1U) + (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_state))))); - vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__real_wspawn - = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_wspawn) - & (5U == (0xfU & ((IData)(1U) + (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_state))))); - vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__real_wspawn - = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_wspawn) - & (6U == (0xfU & ((IData)(1U) + (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_state))))); - vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__real_wspawn - = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_wspawn) - & (7U == (0xfU & ((IData)(1U) + (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_state))))); - vlTOPp->Vortex__DOT__vx_decode__DOT__real_zero_isclone - = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone) - & (0U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num))); - vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__real_isclone - = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone) - & (1U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num))); - vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__real_isclone - = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone) - & (2U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num))); - vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__real_isclone - = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone) - & (3U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num))); - vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__real_isclone - = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone) - & (4U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num))); - vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__real_isclone - = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone) - & (5U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num))); - vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__real_isclone - = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone) - & (6U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num))); - vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__real_isclone - = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone) - & (7U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num))); - // ALWAYS at VX_decode.v:451 - if ((0x40U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { - if ((0x20U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { - if ((0x10U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { - vlTOPp->Vortex__DOT__decode_jal_offset - = ((8U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? 0xdeadbeefU : ((4U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? 0xdeadbeefU - : ((2U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? ((1U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? - (((0U - == - (7U - & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0xcU))) - & (2U - > - (0xfffU - & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0x14U)))) - ? 0xb0000000U - : 0xdeadbeefU) - : 0xdeadbeefU) - : 0xdeadbeefU))); - } else { - if ((8U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { - if ((4U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { - vlTOPp->Vortex__DOT__decode_jal_offset - = ((2U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? ((1U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? ((0xffe00000U - & (VL_NEGATE_I((IData)( - (1U - & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0x1fU)))) - << 0x15U)) - | ((0x100000U - & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0xbU)) - | ((0xff000U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - | ((0x800U - & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 9U)) - | (0x7feU - & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0x14U)))))) - : 0xdeadbeefU) : 0xdeadbeefU); - } else { - if ((2U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { - if ((1U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { - if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jalrs) - | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jmprt))) { - vlTOPp->Vortex__DOT__decode_jal_offset = 0U; - } - } else { - vlTOPp->Vortex__DOT__decode_jal_offset = 0xdeadbeefU; - } - } else { - vlTOPp->Vortex__DOT__decode_jal_offset = 0xdeadbeefU; - } - } - } else { - vlTOPp->Vortex__DOT__decode_jal_offset - = ((4U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? ((2U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? ((1U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? ((0xfffff000U - & (VL_NEGATE_I((IData)( - (1U - & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0x1fU)))) - << 0xcU)) - | (0xfffU & - (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0x14U))) - : 0xdeadbeefU) : 0xdeadbeefU) - : 0xdeadbeefU); - } - } - } else { - vlTOPp->Vortex__DOT__decode_jal_offset = 0xdeadbeefU; - } - } else { - vlTOPp->Vortex__DOT__decode_jal_offset = 0xdeadbeefU; - } - // ALWAYS at VX_decode.v:451 - if ((0x40U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { - if ((0x20U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { - if ((0x10U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { - vlTOPp->Vortex__DOT__decode_jal = ( - (~ - (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 3U)) - & ((~ - (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 2U)) - & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 1U) - & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - & ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__jal_sys_jal) - & vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid - [0U]))))); - } else { - if ((8U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { - if ((4U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { - vlTOPp->Vortex__DOT__decode_jal - = ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 1U) & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - & vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid - [0U])); - } else { - if ((2U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { - if ((1U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { - if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jalrs) - | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jmprt))) { - vlTOPp->Vortex__DOT__decode_jal - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid - [0U]; - } - } else { - vlTOPp->Vortex__DOT__decode_jal = 0U; - } - } else { - vlTOPp->Vortex__DOT__decode_jal = 0U; - } - } - } else { - vlTOPp->Vortex__DOT__decode_jal - = ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 2U) & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 1U) & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - & vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid - [0U]))); - } - } - } else { - vlTOPp->Vortex__DOT__decode_jal = 0U; - } - } else { - vlTOPp->Vortex__DOT__decode_jal = 0U; - } - // ALWAYS at VX_decode.v:519 - if ((0x40U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { - if ((0x20U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { - if ((0x10U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { - vlTOPp->Vortex__DOT__decode_branch_type = 0U; - } else { - if ((8U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { - if ((4U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { - vlTOPp->Vortex__DOT__decode_branch_type = 0U; - } else { - if ((2U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { - if ((1U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { - if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jalrs) - | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jmprt))) { - vlTOPp->Vortex__DOT__decode_branch_type = 0U; - } - } else { - vlTOPp->Vortex__DOT__decode_branch_type = 0U; - } - } else { - vlTOPp->Vortex__DOT__decode_branch_type = 0U; - } - } - } else { - vlTOPp->Vortex__DOT__decode_branch_type - = ((4U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? 0U : ((2U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? ((1U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? ((0x4000U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? ((0x2000U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? - ((0x1000U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? 6U - : 5U) - : - ((0x1000U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? 4U - : 3U)) - : ((0x2000U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? 0U - : - ((0x1000U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? 2U - : 1U))) - : 0U) : 0U)); - } - } - } else { - vlTOPp->Vortex__DOT__decode_branch_type = 0U; - } - } else { - vlTOPp->Vortex__DOT__decode_branch_type = 0U; - } - // ALWAYS at VX_decode.v:519 - if ((0x40U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { - if ((0x20U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { - if ((0x10U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { - vlTOPp->Vortex__DOT__decode_branch_stall = 0U; - } else { - if ((8U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { - if ((4U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { - vlTOPp->Vortex__DOT__decode_branch_stall - = ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 1U) & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - & vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid - [0U])); - } else { - if ((2U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { - if ((1U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { - if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jalrs) - | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jmprt))) { - vlTOPp->Vortex__DOT__decode_branch_stall - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid - [0U]; - } - } else { - vlTOPp->Vortex__DOT__decode_branch_stall = 0U; - } - } else { - vlTOPp->Vortex__DOT__decode_branch_stall = 0U; - } - } - } else { - vlTOPp->Vortex__DOT__decode_branch_stall - = ((4U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 1U) & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - & vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid - [0U])) : - ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 1U) & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - & vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid - [0U]))); - } - } - } else { - vlTOPp->Vortex__DOT__decode_branch_stall = 0U; - } - } else { - vlTOPp->Vortex__DOT__decode_branch_stall = 0U; - } - vlTOPp->Vortex__DOT__decode_change_mask = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jalrs) - | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jmprt)); - vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd - = ((((((0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0xfU)) == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__rd)) - & (0U != (0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0xfU)))) & (0U - != (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb))) - & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd))) - & ((IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num) - == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__warp_num))); - vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd - = ((((((0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0x14U)) == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__rd)) - & (0U != (0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0x14U)))) & (0U - != (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb))) - & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd))) - & ((IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num) - == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__warp_num))); - vlTOPp->out_ebreak = ((0U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num)) - & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_ebreak)); - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall[0U] - = (((0U == (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__state_stall)) - | (1U != (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__state_stall))) - & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__real_zero_isclone)); - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall[1U] - = ((((0U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.__PVT__clone_state_stall)) - | (1U != (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.__PVT__clone_state_stall))) - & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__real_isclone)) - | (((0U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.__PVT__wspawn_state_stall)) - & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__real_wspawn)) - | (1U < (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.__PVT__wspawn_state_stall)))); - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall[2U] - = ((((0U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.__PVT__clone_state_stall)) - | (1U != (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.__PVT__clone_state_stall))) - & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__real_isclone)) - | (((0U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.__PVT__wspawn_state_stall)) - & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__real_wspawn)) - | (1U < (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.__PVT__wspawn_state_stall)))); - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall[3U] - = ((((0U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.__PVT__clone_state_stall)) - | (1U != (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.__PVT__clone_state_stall))) - & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__real_isclone)) - | (((0U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.__PVT__wspawn_state_stall)) - & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__real_wspawn)) - | (1U < (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.__PVT__wspawn_state_stall)))); - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall[4U] - = ((((0U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.__PVT__clone_state_stall)) - | (1U != (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.__PVT__clone_state_stall))) - & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__real_isclone)) - | (((0U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.__PVT__wspawn_state_stall)) - & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__real_wspawn)) - | (1U < (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.__PVT__wspawn_state_stall)))); - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall[5U] - = ((((0U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.__PVT__clone_state_stall)) - | (1U != (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.__PVT__clone_state_stall))) - & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__real_isclone)) - | (((0U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.__PVT__wspawn_state_stall)) - & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__real_wspawn)) - | (1U < (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.__PVT__wspawn_state_stall)))); - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall[6U] - = ((((0U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.__PVT__clone_state_stall)) - | (1U != (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.__PVT__clone_state_stall))) - & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__real_isclone)) - | (((0U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.__PVT__wspawn_state_stall)) - & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__real_wspawn)) - | (1U < (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.__PVT__wspawn_state_stall)))); - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall[7U] - = ((((0U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.__PVT__clone_state_stall)) - | (1U != (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.__PVT__clone_state_stall))) - & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__real_isclone)) - | (((0U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.__PVT__wspawn_state_stall)) - & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__real_wspawn)) - | (1U < (IData)(vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.__PVT__wspawn_state_stall)))); - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_final_alu - = ((0x63U == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) - ? ((5U > (IData)(vlTOPp->Vortex__DOT__decode_branch_type)) - ? 1U : 0xaU) : ((0x37U == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) - ? 0xbU : ((0x17U == - (0x7fU - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) - ? 0xcU : - ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_csr) - ? ((1U - == - (3U - & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0xcU))) - ? 0xdU - : - ((2U - == - (3U - & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0xcU))) - ? 0xeU - : 0xfU)) - : (((0x23U - == - (0x7fU - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) - | (3U - == - (0x7fU - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction))) - ? 0U - : - ((0x4000U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? - ((0x2000U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? - ((0x1000U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? 9U - : 8U) - : - ((0x1000U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? - ((0U - == - (0x7fU - & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0x19U))) - ? 6U - : 7U) - : 5U)) - : - ((0x2000U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? - ((0x1000U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? 4U - : 3U) - : - ((0x1000U - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) - ? 2U - : - ((0x13U - == - (0x7fU - & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) - ? 0U - : - ((0U - == - (0x7fU - & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0x19U))) - ? 0U - : 1U)))))))))); - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__0__KET____DOT__warp_zero_change_mask - = ((IData)(vlTOPp->Vortex__DOT__decode_change_mask) - & (0U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num))); - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__1__KET____DOT__warp_zero_change_mask - = ((IData)(vlTOPp->Vortex__DOT__decode_change_mask) - & (1U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num))); - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__2__KET____DOT__warp_zero_change_mask - = ((IData)(vlTOPp->Vortex__DOT__decode_change_mask) - & (2U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num))); - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__3__KET____DOT__warp_zero_change_mask - = ((IData)(vlTOPp->Vortex__DOT__decode_change_mask) - & (3U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num))); - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__4__KET____DOT__warp_zero_change_mask - = ((IData)(vlTOPp->Vortex__DOT__decode_change_mask) - & (4U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num))); - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__5__KET____DOT__warp_zero_change_mask - = ((IData)(vlTOPp->Vortex__DOT__decode_change_mask) - & (5U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num))); - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__6__KET____DOT__warp_zero_change_mask - = ((IData)(vlTOPp->Vortex__DOT__decode_change_mask) - & (6U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num))); - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__7__KET____DOT__warp_zero_change_mask - = ((IData)(vlTOPp->Vortex__DOT__decode_change_mask) - & (7U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num))); - vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd - = (((((((0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0xfU)) == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd)) - & (0U != (0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0xfU)))) & (0U - != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb))) - & ((IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__warp_num) - == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num))) - & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd))) - & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd))); - vlTOPp->Vortex__DOT__forwarding_fwd_stall = ((((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd) - | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd)) - & (2U - == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb))) - | (((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd) - | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd)) - & (2U - == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)))); - vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd - = (((((((0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0x14U)) == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd)) - & (0U != (0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0x14U)))) & (0U - != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb))) - & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd))) - & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd))) - & ((IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__warp_num) - == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num))); - // ALWAYS at VX_decode.v:276 - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall - = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall - = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall) - | vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall - [1U]); - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall - = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall) - | vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall - [2U]); - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall - = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall) - | vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall - [3U]); - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall - = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall) - | vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall - [4U]); - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall - = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall) - | vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall - [5U]); - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall - = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall) - | vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall - [6U]); - vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall - = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall) - | vlTOPp->Vortex__DOT__vx_decode__DOT__glob_clone_stall - [7U]); - vlTOPp->Vortex__DOT__forwarding_src1_fwd = (((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd) - | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd)) - | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd)); - vlTOPp->Vortex__DOT__forwarding_src2_fwd = (((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd) - | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd)) - | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd)); - vlTOPp->Vortex__DOT__vx_fetch__DOT__add_warp = - (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_wspawn) - & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_ebreak))) - & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall))); - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling - = (((IData)(vlTOPp->Vortex__DOT__forwarding_fwd_stall) - | (IData)(vlTOPp->Vortex__DOT__execute_branch_stall)) - | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall)); - vlTOPp->Vortex__DOT__vx_fetch__DOT__stall = ((((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall) - | (IData)(vlTOPp->Vortex__DOT__decode_branch_stall)) - | (IData)(vlTOPp->Vortex__DOT__forwarding_fwd_stall)) - | (IData)(vlTOPp->Vortex__DOT__execute_branch_stall)); - vlTOPp->Vortex__DOT__vx_fetch__DOT__remove_warp - = (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_ebreak) - & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_wspawn))) - & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_clone_stall))); - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__0__KET____DOT__warp_zero_stall + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__warp_zero_stall = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__stall) | (0U != (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num))); - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__1__KET____DOT__warp_zero_stall + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__warp_zero_stall = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__stall) | (1U != (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num))); - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__2__KET____DOT__warp_zero_stall + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__warp_zero_stall = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__stall) | (2U != (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num))); - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__3__KET____DOT__warp_zero_stall + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__warp_zero_stall = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__stall) | (3U != (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num))); - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__4__KET____DOT__warp_zero_stall + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__warp_zero_stall = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__stall) | (4U != (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num))); - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__5__KET____DOT__warp_zero_stall + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__warp_zero_stall = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__stall) | (5U != (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num))); - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__6__KET____DOT__warp_zero_stall + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__warp_zero_stall = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__stall) | (6U != (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num))); - vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk1__BRA__7__KET____DOT__warp_zero_stall + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__warp_zero_stall = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__stall) | (7U != (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num))); + vlTOPp->icache_request_pc_address = vlTOPp->Vortex__DOT__vx_fetch__DOT__out_PC_var; } VL_INLINE_OPT void VVortex::_combo__TOP__10(VVortex__Syms* __restrict vlSymsp) { VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex::_combo__TOP__10\n"); ); VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; + // Variables + // Begin mtask footprint all: + VL_SIGW(__Vtemp146,127,0,4); + VL_SIGW(__Vtemp162,127,0,4); // Body - vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data[3U] - = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd) - ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next - [3U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result - [3U]) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd) - ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next - [3U] : ((2U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data - [3U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result - [3U])) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd) - ? ((3U - == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - ? - vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next - [3U] - : - ((2U - == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - ? - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data - [3U] - : - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result - [3U])) - : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result - [3U]))); - vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data[2U] - = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd) - ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next - [2U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result - [2U]) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd) - ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next - [2U] : ((2U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data - [2U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result - [2U])) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd) - ? ((3U - == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - ? - vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next - [2U] - : - ((2U - == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - ? - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data - [2U] - : - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result - [2U])) - : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result - [2U]))); - vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data[1U] - = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd) - ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next - [1U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result - [1U]) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd) - ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next - [1U] : ((2U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data - [1U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result - [1U])) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd) - ? ((3U - == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - ? - vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next - [1U] - : - ((2U - == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - ? - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data - [1U] - : - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result - [1U])) - : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result - [1U]))); + vlSymsp->TOP__Vortex__DOT__VX_mem_wb.mem_result[0U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data + [0U]; + vlSymsp->TOP__Vortex__DOT__VX_mem_wb.mem_result[1U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data + [1U]; + vlSymsp->TOP__Vortex__DOT__VX_mem_wb.mem_result[2U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data + [2U]; + vlSymsp->TOP__Vortex__DOT__VX_mem_wb.mem_result[3U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data + [3U]; + __Vtemp146[0U] = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd) + ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + << 0xbU) | + (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] + >> 0x15U)))) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[0U] + : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + << 0xbU) + | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] + >> 0x15U)))) + ? vlSymsp->TOP__Vortex__DOT__VX_mem_wb.mem_result[0U] + : ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] + << 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + >> 2U)))) + : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd) + ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) + | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[0U] + : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) + | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + ? ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 7U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x19U)) + : ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[6U] + << 7U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[5U] + >> 0x19U)))) + : vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[0U])); + __Vtemp146[1U] = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd) + ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + << 0xbU) | + (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] + >> 0x15U)))) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[1U] + : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + << 0xbU) + | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] + >> 0x15U)))) + ? vlSymsp->TOP__Vortex__DOT__VX_mem_wb.mem_result[1U] + : ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xaU] + << 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] + >> 2U)))) + : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd) + ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) + | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[1U] + : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) + | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + ? ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[3U] + << 7U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + >> 0x19U)) + : ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[7U] + << 7U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[6U] + >> 0x19U)))) + : vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[1U])); + __Vtemp146[2U] = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd) + ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + << 0xbU) | + (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] + >> 0x15U)))) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[2U] + : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + << 0xbU) + | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] + >> 0x15U)))) + ? vlSymsp->TOP__Vortex__DOT__VX_mem_wb.mem_result[2U] + : ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xbU] + << 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xaU] + >> 2U)))) + : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd) + ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) + | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[2U] + : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) + | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + ? ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[4U] + << 7U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[3U] + >> 0x19U)) + : ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[8U] + << 7U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[7U] + >> 0x19U)))) + : vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[2U])); + __Vtemp146[3U] = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd) + ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + << 0xbU) | + (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] + >> 0x15U)))) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[3U] + : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + << 0xbU) + | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] + >> 0x15U)))) + ? vlSymsp->TOP__Vortex__DOT__VX_mem_wb.mem_result[3U] + : ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xcU] + << 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xbU] + >> 2U)))) + : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd) + ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) + | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[3U] + : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) + | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + ? ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[5U] + << 7U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[4U] + >> 0x19U)) + : ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[9U] + << 7U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[8U] + >> 0x19U)))) + : vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[3U])); vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data[0U] = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd) - ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next - [0U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result - [0U]) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd) - ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next - [0U] : ((2U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data - [0U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result - [0U])) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd) - ? ((3U - == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - ? - vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next - [0U] - : - ((2U - == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - ? - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data - [0U] - : - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result - [0U])) - : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result - [0U]))); - vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data[3U] - = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd) - ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next - [3U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result - [3U]) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd) - ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next - [3U] : ((2U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data - [3U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result - [3U])) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd) - ? ((3U - == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - ? - vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next - [3U] - : - ((2U - == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - ? - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data - [3U] - : - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result - [3U])) - : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result - [3U]))); - vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data[2U] - = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd) - ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next - [2U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result - [2U]) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd) - ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next - [2U] : ((2U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data - [2U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result - [2U])) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd) - ? ((3U - == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - ? - vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next - [2U] - : - ((2U - == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - ? - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data - [2U] - : - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result - [2U])) - : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result - [2U]))); - vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data[1U] - = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd) - ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next - [1U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result - [1U]) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd) - ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next - [1U] : ((2U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data - [1U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result - [1U])) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd) - ? ((3U - == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - ? - vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next - [1U] - : - ((2U - == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - ? - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data - [1U] - : - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result - [1U])) - : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result - [1U]))); + ? ((3U == (IData)(vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.wb)) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[0U] + : vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[0U]) + : __Vtemp146[0U]); + vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data[1U] + = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd) + ? ((3U == (IData)(vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.wb)) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[1U] + : vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[1U]) + : __Vtemp146[1U]); + vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data[2U] + = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd) + ? ((3U == (IData)(vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.wb)) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[2U] + : vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[2U]) + : __Vtemp146[2U]); + vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data[3U] + = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd) + ? ((3U == (IData)(vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.wb)) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[3U] + : vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[3U]) + : __Vtemp146[3U]); + __Vtemp162[0U] = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd) + ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + << 0xbU) | + (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] + >> 0x15U)))) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[0U] + : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + << 0xbU) + | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] + >> 0x15U)))) + ? vlSymsp->TOP__Vortex__DOT__VX_mem_wb.mem_result[0U] + : ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] + << 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + >> 2U)))) + : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd) + ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) + | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[0U] + : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) + | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + ? ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 7U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x19U)) + : ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[6U] + << 7U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[5U] + >> 0x19U)))) + : vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[0U])); + __Vtemp162[1U] = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd) + ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + << 0xbU) | + (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] + >> 0x15U)))) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[1U] + : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + << 0xbU) + | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] + >> 0x15U)))) + ? vlSymsp->TOP__Vortex__DOT__VX_mem_wb.mem_result[1U] + : ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xaU] + << 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] + >> 2U)))) + : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd) + ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) + | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[1U] + : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) + | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + ? ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[3U] + << 7U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + >> 0x19U)) + : ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[7U] + << 7U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[6U] + >> 0x19U)))) + : vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[1U])); + __Vtemp162[2U] = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd) + ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + << 0xbU) | + (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] + >> 0x15U)))) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[2U] + : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + << 0xbU) + | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] + >> 0x15U)))) + ? vlSymsp->TOP__Vortex__DOT__VX_mem_wb.mem_result[2U] + : ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xbU] + << 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xaU] + >> 2U)))) + : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd) + ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) + | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[2U] + : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) + | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + ? ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[4U] + << 7U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[3U] + >> 0x19U)) + : ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[8U] + << 7U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[7U] + >> 0x19U)))) + : vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[2U])); + __Vtemp162[3U] = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd) + ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + << 0xbU) | + (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] + >> 0x15U)))) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[3U] + : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] + << 0xbU) + | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] + >> 0x15U)))) + ? vlSymsp->TOP__Vortex__DOT__VX_mem_wb.mem_result[3U] + : ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xcU] + << 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xbU] + >> 2U)))) + : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd) + ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) + | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[3U] + : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) + | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + ? ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[5U] + << 7U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[4U] + >> 0x19U)) + : ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[9U] + << 7U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[8U] + >> 0x19U)))) + : vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[3U])); vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data[0U] = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd) - ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next - [0U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result - [0U]) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd) - ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next - [0U] : ((2U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data - [0U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result - [0U])) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd) - ? ((3U - == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - ? - vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next - [0U] - : - ((2U - == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - ? - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data - [0U] - : - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result - [0U])) - : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result - [0U]))); - vlTOPp->Vortex__DOT__forwarding_src1_fwd_data[3U] - = vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data - [3U]; - vlTOPp->Vortex__DOT__forwarding_src1_fwd_data[2U] - = vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data - [2U]; - vlTOPp->Vortex__DOT__forwarding_src1_fwd_data[1U] - = vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data - [1U]; - vlTOPp->Vortex__DOT__forwarding_src1_fwd_data[0U] - = vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data - [0U]; - vlTOPp->Vortex__DOT__forwarding_src2_fwd_data[3U] - = vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data - [3U]; - vlTOPp->Vortex__DOT__forwarding_src2_fwd_data[2U] - = vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data - [2U]; - vlTOPp->Vortex__DOT__forwarding_src2_fwd_data[1U] - = vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data - [1U]; - vlTOPp->Vortex__DOT__forwarding_src2_fwd_data[0U] - = vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data - [0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data[3U] - = vlTOPp->Vortex__DOT__forwarding_src1_fwd_data - [3U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data[2U] - = vlTOPp->Vortex__DOT__forwarding_src1_fwd_data - [2U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data[1U] - = vlTOPp->Vortex__DOT__forwarding_src1_fwd_data - [1U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data[0U] - = vlTOPp->Vortex__DOT__forwarding_src1_fwd_data - [0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data[3U] - = vlTOPp->Vortex__DOT__forwarding_src2_fwd_data - [3U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data[2U] - = vlTOPp->Vortex__DOT__forwarding_src2_fwd_data - [2U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data[1U] - = vlTOPp->Vortex__DOT__forwarding_src2_fwd_data - [1U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data[0U] - = vlTOPp->Vortex__DOT__forwarding_src2_fwd_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_src1_fwd_data[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_src1_fwd_data[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_src1_fwd_data[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_src1_fwd_data[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_src1_fwd_data[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_src1_fwd_data[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_src1_fwd_data[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_src1_fwd_data[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_src1_fwd_data[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_src1_fwd_data[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_src1_fwd_data[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_src1_fwd_data[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_src1_fwd_data[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_src1_fwd_data[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_src1_fwd_data[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_src1_fwd_data[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_src1_fwd_data[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_src1_fwd_data[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_src1_fwd_data[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_src1_fwd_data[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_src1_fwd_data[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_src1_fwd_data[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_src1_fwd_data[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_src1_fwd_data[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_src1_fwd_data[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_src1_fwd_data[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_src1_fwd_data[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_src1_fwd_data[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_src1_fwd_data[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_src1_fwd_data[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_src1_fwd_data[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_src1_fwd_data[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_src2_fwd_data[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_src2_fwd_data[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_src2_fwd_data[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_src2_fwd_data[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_src2_fwd_data[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_src2_fwd_data[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_src2_fwd_data[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_src2_fwd_data[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_src2_fwd_data[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_src2_fwd_data[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_src2_fwd_data[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_src2_fwd_data[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_src2_fwd_data[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_src2_fwd_data[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_src2_fwd_data[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_src2_fwd_data[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_src2_fwd_data[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_src2_fwd_data[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_src2_fwd_data[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_src2_fwd_data[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_src2_fwd_data[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_src2_fwd_data[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_src2_fwd_data[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_src2_fwd_data[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_src2_fwd_data[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_src2_fwd_data[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_src2_fwd_data[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_src2_fwd_data[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_src2_fwd_data[3U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data - [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_src2_fwd_data[2U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data - [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_src2_fwd_data[1U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data - [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_src2_fwd_data[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data - [0U]; + ? ((3U == (IData)(vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.wb)) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[0U] + : vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[0U]) + : __Vtemp162[0U]); + vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data[1U] + = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd) + ? ((3U == (IData)(vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.wb)) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[1U] + : vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[1U]) + : __Vtemp162[1U]); + vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data[2U] + = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd) + ? ((3U == (IData)(vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.wb)) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[2U] + : vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[2U]) + : __Vtemp162[2U]); + vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data[3U] + = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd) + ? ((3U == (IData)(vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.wb)) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[3U] + : vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[3U]) + : __Vtemp162[3U]); vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_a_reg_data[0U] - = ((0x6fU == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) - ? vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__curr_PC - : ((IData)(vlTOPp->Vortex__DOT__forwarding_src1_fwd) - ? vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_src1_fwd_data - [0U] : vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd1_register - [0U])); + = ((0x6fU == (0x7fU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) + ? ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x18U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 8U)) : ((IData)(vlTOPp->Vortex__DOT__forwarding_src1_fwd) + ? vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data[0U] + : vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd1_register[0U])); vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_a_reg_data[1U] - = ((0x6fU == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) - ? vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__curr_PC - : ((IData)(vlTOPp->Vortex__DOT__forwarding_src1_fwd) - ? vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_src1_fwd_data - [1U] : vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd1_register - [1U])); + = ((0x6fU == (0x7fU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) + ? ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x18U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 8U)) : ((IData)(vlTOPp->Vortex__DOT__forwarding_src1_fwd) + ? vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data[1U] + : vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd1_register[1U])); vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_a_reg_data[2U] - = ((0x6fU == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) - ? vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__curr_PC - : ((IData)(vlTOPp->Vortex__DOT__forwarding_src1_fwd) - ? vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_src1_fwd_data - [2U] : vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd1_register - [2U])); + = ((0x6fU == (0x7fU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) + ? ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x18U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 8U)) : ((IData)(vlTOPp->Vortex__DOT__forwarding_src1_fwd) + ? vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data[2U] + : vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd1_register[2U])); vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_a_reg_data[3U] - = ((0x6fU == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) - ? vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__curr_PC - : ((IData)(vlTOPp->Vortex__DOT__forwarding_src1_fwd) - ? vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_src1_fwd_data - [3U] : vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd1_register - [3U])); - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_src1_fwd_data[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_src1_fwd_data - [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_src1_fwd_data[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_src1_fwd_data - [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_src1_fwd_data[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_src1_fwd_data - [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_src1_fwd_data[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_src1_fwd_data - [0U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_src1_fwd_data[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_src1_fwd_data - [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_src1_fwd_data[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_src1_fwd_data - [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_src1_fwd_data[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_src1_fwd_data - [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_src1_fwd_data[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_src1_fwd_data - [0U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_src1_fwd_data[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_src1_fwd_data - [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_src1_fwd_data[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_src1_fwd_data - [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_src1_fwd_data[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_src1_fwd_data - [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_src1_fwd_data[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_src1_fwd_data - [0U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_src1_fwd_data[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_src1_fwd_data - [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_src1_fwd_data[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_src1_fwd_data - [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_src1_fwd_data[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_src1_fwd_data - [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_src1_fwd_data[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_src1_fwd_data - [0U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_src1_fwd_data[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_src1_fwd_data - [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_src1_fwd_data[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_src1_fwd_data - [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_src1_fwd_data[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_src1_fwd_data - [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_src1_fwd_data[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_src1_fwd_data - [0U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_src1_fwd_data[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_src1_fwd_data - [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_src1_fwd_data[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_src1_fwd_data - [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_src1_fwd_data[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_src1_fwd_data - [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_src1_fwd_data[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_src1_fwd_data - [0U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_src1_fwd_data[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_src1_fwd_data - [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_src1_fwd_data[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_src1_fwd_data - [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_src1_fwd_data[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_src1_fwd_data - [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_src1_fwd_data[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_src1_fwd_data - [0U]; + = ((0x6fU == (0x7fU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) + ? ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x18U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 8U)) : ((IData)(vlTOPp->Vortex__DOT__forwarding_src1_fwd) + ? vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data[3U] + : vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd1_register[3U])); vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_b_reg_data[0U] = ((IData)(vlTOPp->Vortex__DOT__forwarding_src2_fwd) - ? vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_src2_fwd_data - [0U] : vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd2_register - [0U]); + ? vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data[0U] + : vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd2_register[0U]); vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_b_reg_data[1U] = ((IData)(vlTOPp->Vortex__DOT__forwarding_src2_fwd) - ? vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_src2_fwd_data - [1U] : vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd2_register - [1U]); + ? vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data[1U] + : vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd2_register[1U]); vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_b_reg_data[2U] = ((IData)(vlTOPp->Vortex__DOT__forwarding_src2_fwd) - ? vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_src2_fwd_data - [2U] : vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd2_register - [2U]); + ? vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data[2U] + : vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd2_register[2U]); vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_b_reg_data[3U] = ((IData)(vlTOPp->Vortex__DOT__forwarding_src2_fwd) - ? vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_src2_fwd_data - [3U] : vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd2_register - [3U]); - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_src2_fwd_data[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_src2_fwd_data + ? vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data[3U] + : vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd2_register[3U]); + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0U] + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_a_reg_data[0U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[1U] + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_a_reg_data[1U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_a_reg_data[2U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[3U] + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_a_reg_data[3U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0U] + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_b_reg_data[0U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[1U] + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_b_reg_data[1U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_b_reg_data[2U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[3U] + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_b_reg_data[3U]; +} + +VL_INLINE_OPT void VVortex::_combo__TOP__11(VVortex__Syms* __restrict vlSymsp) { + VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex::_combo__TOP__11\n"); ); + VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; + // Variables + // Begin mtask footprint all: + VL_SIGW(__Vtemp181,319,0,10); + // Body + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[4U] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one.out_a_reg_data[0U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[5U] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one.out_a_reg_data[1U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[6U] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one.out_a_reg_data[2U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[7U] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one.out_a_reg_data[3U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[4U] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one.out_b_reg_data[0U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[5U] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one.out_b_reg_data[1U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[6U] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one.out_b_reg_data[2U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[7U] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one.out_b_reg_data[3U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[8U] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__VX_Context_one.out_a_reg_data[0U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[9U] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__VX_Context_one.out_a_reg_data[1U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0xaU] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__VX_Context_one.out_a_reg_data[2U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0xbU] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__VX_Context_one.out_a_reg_data[3U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[8U] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__VX_Context_one.out_b_reg_data[0U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[9U] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__VX_Context_one.out_b_reg_data[1U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0xaU] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__VX_Context_one.out_b_reg_data[2U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0xbU] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__VX_Context_one.out_b_reg_data[3U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0xcU] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__VX_Context_one.out_a_reg_data[0U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0xdU] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__VX_Context_one.out_a_reg_data[1U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0xeU] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__VX_Context_one.out_a_reg_data[2U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0xfU] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__VX_Context_one.out_a_reg_data[3U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0xcU] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__VX_Context_one.out_b_reg_data[0U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0xdU] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__VX_Context_one.out_b_reg_data[1U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0xeU] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__VX_Context_one.out_b_reg_data[2U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0xfU] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__VX_Context_one.out_b_reg_data[3U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0x10U] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__VX_Context_one.out_a_reg_data[0U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0x11U] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__VX_Context_one.out_a_reg_data[1U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0x12U] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__VX_Context_one.out_a_reg_data[2U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0x13U] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__VX_Context_one.out_a_reg_data[3U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0x10U] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__VX_Context_one.out_b_reg_data[0U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0x11U] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__VX_Context_one.out_b_reg_data[1U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0x12U] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__VX_Context_one.out_b_reg_data[2U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0x13U] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__VX_Context_one.out_b_reg_data[3U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0x14U] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__VX_Context_one.out_a_reg_data[0U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0x15U] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__VX_Context_one.out_a_reg_data[1U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0x16U] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__VX_Context_one.out_a_reg_data[2U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0x17U] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__VX_Context_one.out_a_reg_data[3U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0x14U] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__VX_Context_one.out_b_reg_data[0U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0x15U] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__VX_Context_one.out_b_reg_data[1U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0x16U] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__VX_Context_one.out_b_reg_data[2U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0x17U] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__VX_Context_one.out_b_reg_data[3U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0x18U] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__VX_Context_one.out_a_reg_data[0U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0x19U] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__VX_Context_one.out_a_reg_data[1U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0x1aU] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__VX_Context_one.out_a_reg_data[2U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0x1bU] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__VX_Context_one.out_a_reg_data[3U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0x18U] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__VX_Context_one.out_b_reg_data[0U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0x19U] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__VX_Context_one.out_b_reg_data[1U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0x1aU] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__VX_Context_one.out_b_reg_data[2U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0x1bU] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__VX_Context_one.out_b_reg_data[3U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0x1cU] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one.out_a_reg_data[0U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0x1dU] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one.out_a_reg_data[1U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0x1eU] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one.out_a_reg_data[2U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0x1fU] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one.out_a_reg_data[3U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0x1cU] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one.out_b_reg_data[0U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0x1dU] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one.out_b_reg_data[1U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0x1eU] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one.out_b_reg_data[2U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0x1fU] + = vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one.out_b_reg_data[3U]; + // ALWAYS at VX_decode.v:238 + if ((0U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))) { + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[0U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[1U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[1U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[2U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[3U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[3U]; + } + if ((1U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))) { + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[0U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[4U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[1U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[5U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[6U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[3U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[7U]; + } + if ((2U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))) { + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[0U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[8U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[1U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[9U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0xaU]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[3U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0xbU]; + } + if ((3U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))) { + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[0U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0xcU]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[1U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0xdU]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0xeU]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[3U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0xfU]; + } + if ((4U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))) { + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[0U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0x10U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[1U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0x11U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0x12U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[3U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0x13U]; + } + if ((5U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))) { + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[0U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0x14U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[1U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0x15U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0x16U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[3U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0x17U]; + } + if ((6U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))) { + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[0U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0x18U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[1U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0x19U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0x1aU]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[3U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0x1bU]; + } + if ((7U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))) { + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[0U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0x1cU]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[1U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0x1dU]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0x1eU]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[3U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0x1fU]; + } + // ALWAYS at VX_decode.v:238 + if ((0U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))) { + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[0U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[1U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[1U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[2U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[3U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[3U]; + } + if ((1U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))) { + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[0U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[4U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[1U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[5U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[6U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[3U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[7U]; + } + if ((2U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))) { + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[0U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[8U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[1U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[9U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0xaU]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[3U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0xbU]; + } + if ((3U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))) { + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[0U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0xcU]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[1U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0xdU]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0xeU]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[3U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0xfU]; + } + if ((4U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))) { + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[0U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0x10U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[1U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0x11U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0x12U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[3U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0x13U]; + } + if ((5U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))) { + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[0U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0x14U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[1U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0x15U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0x16U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[3U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0x17U]; + } + if ((6U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))) { + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[0U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0x18U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[1U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0x19U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0x1aU]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[3U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0x1bU]; + } + if ((7U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))) { + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[0U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0x1cU]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[1U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0x1dU]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0x1eU]; + vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[3U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0x1fU]; + } + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.a_reg_data[0U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[0U]; + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.a_reg_data[1U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[1U]; + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.a_reg_data[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[2U]; + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.a_reg_data[3U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[3U]; + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.b_reg_data[0U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[0U]; + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.b_reg_data[1U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[1U]; + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.b_reg_data[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[2U]; + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.b_reg_data[3U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[3U]; + __Vtemp181[0U] = (IData)((((QData)((IData)((((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + >> 1U) + & (0x33U + == + (0x7fU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U))))) + ? (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__mul_alu) + : (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_final_alu)))) + << 0x2cU) | (((QData)((IData)( + (((((0x6fU + == + (0x7fU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) + | (0x67U + == + (0x7fU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U))))) + | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jalrs)) + | ((0x73U + == + (0x7fU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) + & (0U + == + (7U + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0xcU) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x14U)))))) + ? 3U + : + ((3U + == + (0x7fU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) + ? 2U + : + ((((((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_itype) + | (0x33U + == + (0x7fU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U))))) + | (0x37U + == + (0x7fU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U))))) + | (0x17U + == + (0x7fU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U))))) + | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_csr)) + ? 1U + : 0U))))) + << 0x2aU) + | (((QData)((IData)( + (1U + & (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_itype) + | (0x23U + == + (0x7fU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U))))) + ? 1U + : 0U)))) + << 0x29U) + | (((QData)((IData)(vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.itype_immed)) + << 9U) + | (QData)((IData)( + ((0x1c0U + & (((3U + == + (0x7fU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) + ? + ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0xcU) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x14U)) + : 7U) + << 6U)) + | ((0x38U + & (((0x23U + == + (0x7fU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) + ? + ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0xcU) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x14U)) + : 7U) + << 3U)) + | (IData)(vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.branch_type)))))))))); + __Vtemp181[1U] = ((0xfffe0000U & (vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.b_reg_data[0U] + << 0x11U)) | (IData)( + ((((QData)((IData)( + (((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + >> 1U) + & (0x33U + == + (0x7fU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U))))) + ? (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__mul_alu) + : (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_final_alu)))) + << 0x2cU) + | (((QData)((IData)( + (((((0x6fU + == + (0x7fU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) + | (0x67U + == + (0x7fU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U))))) + | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jalrs)) + | ((0x73U + == + (0x7fU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) + & (0U + == + (7U + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0xcU) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x14U)))))) + ? 3U + : + ((3U + == + (0x7fU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) + ? 2U + : + ((((((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_itype) + | (0x33U + == + (0x7fU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U))))) + | (0x37U + == + (0x7fU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U))))) + | (0x17U + == + (0x7fU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U))))) + | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_csr)) + ? 1U + : 0U))))) + << 0x2aU) + | (((QData)((IData)( + (1U + & (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_itype) + | (0x23U + == + (0x7fU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U))))) + ? 1U + : 0U)))) + << 0x29U) + | (((QData)((IData)(vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.itype_immed)) + << 9U) + | (QData)((IData)( + ((0x1c0U + & (((3U + == + (0x7fU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) + ? + ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0xcU) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x14U)) + : 7U) + << 6U)) + | ((0x38U + & (((0x23U + == + (0x7fU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) + ? + ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0xcU) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x14U)) + : 7U) + << 3U)) + | (IData)(vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.branch_type))))))))) + >> 0x20U))); + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT____Vcellinp__d_e_reg__in[0U] + = ((0xffffff00U & ((IData)((((QData)((IData)(vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.jal_offset)) + << 0x20U) | (QData)((IData)( + ((IData)(4U) + + + ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 8U))))))) + << 8U)) | ((0xf0U & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + << 4U)) + | (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U))))); + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT____Vcellinp__d_e_reg__in[1U] + = ((0xffU & ((IData)((((QData)((IData)(vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.jal_offset)) + << 0x20U) | (QData)((IData)( + ((IData)(4U) + + + ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 8U))))))) + >> 0x18U)) | (0xffffff00U & ((IData)( + ((((QData)((IData)(vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.jal_offset)) + << 0x20U) + | (QData)((IData)( + ((IData)(4U) + + + ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 8U)))))) + >> 0x20U)) + << 8U))); + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT____Vcellinp__d_e_reg__in[2U] + = ((0xfffffe00U & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + << 1U)) | ((0xffffff00U + & ((IData)(vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.jal) + << 8U)) | + (0xffU & ((IData)( + ((((QData)((IData)(vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.jal_offset)) + << 0x20U) + | (QData)((IData)( + ((IData)(4U) + + + ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 8U)))))) + >> 0x20U)) + >> 0x18U)))); + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT____Vcellinp__d_e_reg__in[3U] + = ((0xe0000000U & (__Vtemp181[0U] << 0x1dU)) + | ((0x1ffffe00U & (((0x37U == (0x7fU & ( + (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) + ? ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0xcU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x14U)) + : ((0x17U == (0x7fU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) + ? ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0xcU) | + (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x14U)) : 0U)) + << 9U)) | (0x1ffU & ( + (0x1feU + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 1U)) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 0x1fU))))); + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT____Vcellinp__d_e_reg__in[4U] + = ((0x1fffffffU & (__Vtemp181[0U] >> 3U)) | + (0xe0000000U & (__Vtemp181[1U] << 0x1dU))); + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT____Vcellinp__d_e_reg__in[5U] + = ((0x1fffffffU & (__Vtemp181[1U] >> 3U)) | + (0xe0000000U & (vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.b_reg_data[0U] + << 0xeU))); + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT____Vcellinp__d_e_reg__in[6U] + = ((0x1fffffffU & ((0x3fffU & (vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.b_reg_data[0U] + >> 0x12U)) | + (0x1fffc000U & (vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.b_reg_data[1U] + << 0xeU)))) + | (0xe0000000U & (vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.b_reg_data[1U] + << 0xeU))); + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT____Vcellinp__d_e_reg__in[7U] + = ((0x1fffffffU & ((0x3fffU & (vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.b_reg_data[1U] + >> 0x12U)) | + (0x1fffc000U & (vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.b_reg_data[2U] + << 0xeU)))) + | (0xe0000000U & (vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.b_reg_data[2U] + << 0xeU))); + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT____Vcellinp__d_e_reg__in[8U] + = ((0x1fffffffU & ((0x3fffU & (vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.b_reg_data[2U] + >> 0x12U)) | + (0x1fffc000U & (vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.b_reg_data[3U] + << 0xeU)))) + | (0xe0000000U & (vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.b_reg_data[3U] + << 0xeU))); + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT____Vcellinp__d_e_reg__in[9U] + = ((0x1fffffffU & ((0x3fffU & (vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.b_reg_data[3U] + >> 0x12U)) | + (0x1fffc000U & (vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.a_reg_data[0U] + << 0xeU)))) + | (0xe0000000U & (vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.a_reg_data[0U] + << 0xeU))); + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT____Vcellinp__d_e_reg__in[0xaU] + = ((0x1fffffffU & ((0x3fffU & (vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.a_reg_data[0U] + >> 0x12U)) | + (0x1fffc000U & (vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.a_reg_data[1U] + << 0xeU)))) + | (0xe0000000U & (vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.a_reg_data[1U] + << 0xeU))); + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT____Vcellinp__d_e_reg__in[0xbU] + = ((0x1fffffffU & ((0x3fffU & (vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.a_reg_data[1U] + >> 0x12U)) | + (0x1fffc000U & (vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.a_reg_data[2U] + << 0xeU)))) + | (0xe0000000U & (vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.a_reg_data[2U] + << 0xeU))); + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT____Vcellinp__d_e_reg__in[0xcU] + = ((0x1fffffffU & ((0x3fffU & (vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.a_reg_data[2U] + >> 0x12U)) | + (0x1fffc000U & (vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.a_reg_data[3U] + << 0xeU)))) + | (0xe0000000U & (vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.a_reg_data[3U] + << 0xeU))); + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT____Vcellinp__d_e_reg__in[0xdU] + = ((0x1fffffffU & ((0x1f000000U & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 9U)) + | ((0xf80000U & ((0x10000000U + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x1cU)) + | (0xff80000U + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 4U)))) + | ((0x7c000U & ((0x1ffc0000U + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x12U)) + | (0x3c000U + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0xeU)))) + | (0x3fffU & (vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.a_reg_data[3U] + >> 0x12U)))))) + | (0xe0000000U & ((((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_csr) + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x16U)) ? (0x1fU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 9U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x17U))) + : vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.a_reg_data[0U]) + << 0x1dU))); + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT____Vcellinp__d_e_reg__in[0xeU] + = ((0xc0000000U & ((IData)(vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.csr_address) + << 0x1eU)) | ((0xe0000000U + & ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_csr) + << 0x1dU)) + | (0x1fffffffU + & ((((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_csr) + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x16U)) + ? + (0x1fU + & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 9U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x17U))) + : + vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.a_reg_data[0U]) + >> 3U)))); + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT____Vcellinp__d_e_reg__in[0xfU] + = (0x3fffffffU & ((IData)(vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.csr_address) + >> 2U)); + vlTOPp->Vortex__DOT__vx_decode__DOT__jalrs_thread_mask + = ((0xdU & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__jalrs_thread_mask)) + | ((1U <= vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.b_reg_data[0U]) + << 1U)); + vlTOPp->Vortex__DOT__vx_decode__DOT__jalrs_thread_mask + = ((0xbU & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__jalrs_thread_mask)) + | ((2U <= vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.b_reg_data[0U]) + << 2U)); + vlTOPp->Vortex__DOT__vx_decode__DOT__jalrs_thread_mask + = ((7U & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__jalrs_thread_mask)) + | ((3U <= vlSymsp->TOP__Vortex__DOT__VX_frE_to_bckE_req.b_reg_data[0U]) + << 3U)); + vlSymsp->TOP__Vortex__DOT__VX_warp_ctl.thread_mask + = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jalrs) + ? (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__jalrs_thread_mask) + : (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__jmprt_thread_mask)); + vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask[0U] + = (1U & (IData)(vlSymsp->TOP__Vortex__DOT__VX_warp_ctl.thread_mask)); + vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask[1U] + = (1U & ((IData)(vlSymsp->TOP__Vortex__DOT__VX_warp_ctl.thread_mask) + >> 1U)); + vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask[2U] + = (1U & ((IData)(vlSymsp->TOP__Vortex__DOT__VX_warp_ctl.thread_mask) + >> 2U)); + vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask[3U] + = (1U & ((IData)(vlSymsp->TOP__Vortex__DOT__VX_warp_ctl.thread_mask) + >> 3U)); + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__0__KET____DOT__VX_Warp__in_thread_mask[3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_src2_fwd_data[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_src2_fwd_data + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__0__KET____DOT__VX_Warp__in_thread_mask[2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_src2_fwd_data[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_src2_fwd_data + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__0__KET____DOT__VX_Warp__in_thread_mask[1U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.in_src2_fwd_data[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_src2_fwd_data + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__0__KET____DOT__VX_Warp__in_thread_mask[0U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask [0U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_src2_fwd_data[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_src2_fwd_data + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__1__KET____DOT__VX_Warp__in_thread_mask[3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_src2_fwd_data[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_src2_fwd_data + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__1__KET____DOT__VX_Warp__in_thread_mask[2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_src2_fwd_data[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_src2_fwd_data + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__1__KET____DOT__VX_Warp__in_thread_mask[1U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.in_src2_fwd_data[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_src2_fwd_data + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__1__KET____DOT__VX_Warp__in_thread_mask[0U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask [0U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_src2_fwd_data[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_src2_fwd_data + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__2__KET____DOT__VX_Warp__in_thread_mask[3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_src2_fwd_data[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_src2_fwd_data + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__2__KET____DOT__VX_Warp__in_thread_mask[2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_src2_fwd_data[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_src2_fwd_data + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__2__KET____DOT__VX_Warp__in_thread_mask[1U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.in_src2_fwd_data[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_src2_fwd_data + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__2__KET____DOT__VX_Warp__in_thread_mask[0U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask [0U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_src2_fwd_data[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_src2_fwd_data + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__3__KET____DOT__VX_Warp__in_thread_mask[3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_src2_fwd_data[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_src2_fwd_data + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__3__KET____DOT__VX_Warp__in_thread_mask[2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_src2_fwd_data[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_src2_fwd_data + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__3__KET____DOT__VX_Warp__in_thread_mask[1U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.in_src2_fwd_data[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_src2_fwd_data + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__3__KET____DOT__VX_Warp__in_thread_mask[0U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask [0U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_src2_fwd_data[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_src2_fwd_data + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__4__KET____DOT__VX_Warp__in_thread_mask[3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_src2_fwd_data[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_src2_fwd_data + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__4__KET____DOT__VX_Warp__in_thread_mask[2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_src2_fwd_data[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_src2_fwd_data + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__4__KET____DOT__VX_Warp__in_thread_mask[1U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.in_src2_fwd_data[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_src2_fwd_data + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__4__KET____DOT__VX_Warp__in_thread_mask[0U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask [0U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_src2_fwd_data[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_src2_fwd_data + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__5__KET____DOT__VX_Warp__in_thread_mask[3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_src2_fwd_data[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_src2_fwd_data + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__5__KET____DOT__VX_Warp__in_thread_mask[2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_src2_fwd_data[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_src2_fwd_data + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__5__KET____DOT__VX_Warp__in_thread_mask[1U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.in_src2_fwd_data[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_src2_fwd_data + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__5__KET____DOT__VX_Warp__in_thread_mask[0U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask [0U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_src2_fwd_data[3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_src2_fwd_data + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__6__KET____DOT__VX_Warp__in_thread_mask[3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask [3U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_src2_fwd_data[2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_src2_fwd_data + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__6__KET____DOT__VX_Warp__in_thread_mask[2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask [2U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_src2_fwd_data[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_src2_fwd_data + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__6__KET____DOT__VX_Warp__in_thread_mask[1U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask [1U]; - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.in_src2_fwd_data[0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_src2_fwd_data + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__6__KET____DOT__VX_Warp__in_thread_mask[0U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0U][3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_a_reg_data + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__7__KET____DOT__VX_Warp__in_thread_mask[3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0U][2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_a_reg_data + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__7__KET____DOT__VX_Warp__in_thread_mask[2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0U][1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_a_reg_data + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__7__KET____DOT__VX_Warp__in_thread_mask[1U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_a_reg_data[0U][0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_a_reg_data + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__7__KET____DOT__VX_Warp__in_thread_mask[0U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__in_thread_mask [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0U][3U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_b_reg_data + // ALWAYS at VX_warp.v:41 + if (((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__remove_warp) + & (0U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U)))))) { + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__VX_Warp__DOT__valid[3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__VX_Warp__DOT__valid_zero + [3U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__VX_Warp__DOT__valid[2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__VX_Warp__DOT__valid_zero + [2U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__VX_Warp__DOT__valid[1U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__VX_Warp__DOT__valid_zero + [1U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__VX_Warp__DOT__valid[0U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__VX_Warp__DOT__valid_zero + [0U]; + } else { + if (vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__warp_zero_change_mask) { + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__VX_Warp__DOT__valid[3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__0__KET____DOT__VX_Warp__in_thread_mask + [3U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__VX_Warp__DOT__valid[2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__0__KET____DOT__VX_Warp__in_thread_mask + [2U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__VX_Warp__DOT__valid[1U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__0__KET____DOT__VX_Warp__in_thread_mask + [1U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__VX_Warp__DOT__valid[0U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__0__KET____DOT__VX_Warp__in_thread_mask + [0U]; + } + } + // ALWAYS at VX_warp.v:41 + if (((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__remove_warp) + & (1U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U)))))) { + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__valid[3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__valid_zero + [3U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__valid[2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__valid_zero + [2U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__valid[1U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__valid_zero + [1U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__valid[0U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__valid_zero + [0U]; + } else { + if (vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__warp_zero_change_mask) { + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__valid[3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__1__KET____DOT__VX_Warp__in_thread_mask + [3U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__valid[2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__1__KET____DOT__VX_Warp__in_thread_mask + [2U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__valid[1U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__1__KET____DOT__VX_Warp__in_thread_mask + [1U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__valid[0U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__1__KET____DOT__VX_Warp__in_thread_mask + [0U]; + } + } + // ALWAYS at VX_warp.v:41 + if (((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__remove_warp) + & (2U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U)))))) { + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__valid[3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__valid_zero + [3U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__valid[2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__valid_zero + [2U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__valid[1U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__valid_zero + [1U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__valid[0U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__valid_zero + [0U]; + } else { + if (vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__warp_zero_change_mask) { + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__valid[3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__2__KET____DOT__VX_Warp__in_thread_mask + [3U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__valid[2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__2__KET____DOT__VX_Warp__in_thread_mask + [2U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__valid[1U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__2__KET____DOT__VX_Warp__in_thread_mask + [1U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__valid[0U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__2__KET____DOT__VX_Warp__in_thread_mask + [0U]; + } + } + // ALWAYS at VX_warp.v:41 + if (((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__remove_warp) + & (3U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U)))))) { + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__valid[3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__valid_zero + [3U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__valid[2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__valid_zero + [2U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__valid[1U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__valid_zero + [1U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__valid[0U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__valid_zero + [0U]; + } else { + if (vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__warp_zero_change_mask) { + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__valid[3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__3__KET____DOT__VX_Warp__in_thread_mask + [3U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__valid[2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__3__KET____DOT__VX_Warp__in_thread_mask + [2U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__valid[1U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__3__KET____DOT__VX_Warp__in_thread_mask + [1U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__valid[0U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__3__KET____DOT__VX_Warp__in_thread_mask + [0U]; + } + } + // ALWAYS at VX_warp.v:41 + if (((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__remove_warp) + & (4U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U)))))) { + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__valid[3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__valid_zero + [3U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__valid[2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__valid_zero + [2U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__valid[1U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__valid_zero + [1U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__valid[0U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__valid_zero + [0U]; + } else { + if (vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__warp_zero_change_mask) { + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__valid[3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__4__KET____DOT__VX_Warp__in_thread_mask + [3U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__valid[2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__4__KET____DOT__VX_Warp__in_thread_mask + [2U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__valid[1U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__4__KET____DOT__VX_Warp__in_thread_mask + [1U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__valid[0U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__4__KET____DOT__VX_Warp__in_thread_mask + [0U]; + } + } + // ALWAYS at VX_warp.v:41 + if (((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__remove_warp) + & (5U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U)))))) { + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__valid[3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__valid_zero + [3U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__valid[2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__valid_zero + [2U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__valid[1U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__valid_zero + [1U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__valid[0U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__valid_zero + [0U]; + } else { + if (vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__warp_zero_change_mask) { + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__valid[3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__5__KET____DOT__VX_Warp__in_thread_mask + [3U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__valid[2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__5__KET____DOT__VX_Warp__in_thread_mask + [2U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__valid[1U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__5__KET____DOT__VX_Warp__in_thread_mask + [1U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__valid[0U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__5__KET____DOT__VX_Warp__in_thread_mask + [0U]; + } + } + // ALWAYS at VX_warp.v:41 + if (((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__remove_warp) + & (6U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U)))))) { + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__valid[3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__valid_zero + [3U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__valid[2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__valid_zero + [2U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__valid[1U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__valid_zero + [1U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__valid[0U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__valid_zero + [0U]; + } else { + if (vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__warp_zero_change_mask) { + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__valid[3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__6__KET____DOT__VX_Warp__in_thread_mask + [3U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__valid[2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__6__KET____DOT__VX_Warp__in_thread_mask + [2U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__valid[1U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__6__KET____DOT__VX_Warp__in_thread_mask + [1U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__valid[0U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__6__KET____DOT__VX_Warp__in_thread_mask + [0U]; + } + } + // ALWAYS at VX_warp.v:41 + if (((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__remove_warp) + & (7U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U)))))) { + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__valid[3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__valid_zero + [3U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__valid[2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__valid_zero + [2U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__valid[1U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__valid_zero + [1U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__valid[0U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__valid_zero + [0U]; + } else { + if (vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__warp_zero_change_mask) { + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__valid[3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__7__KET____DOT__VX_Warp__in_thread_mask + [3U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__valid[2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__7__KET____DOT__VX_Warp__in_thread_mask + [2U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__valid[1U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__7__KET____DOT__VX_Warp__in_thread_mask + [1U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__valid[0U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__7__KET____DOT__VX_Warp__in_thread_mask + [0U]; + } + } + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__0__KET____DOT__VX_Warp__out_valid[0U] + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__warp_zero_change_mask) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__0__KET____DOT__VX_Warp__in_thread_mask + [0U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__warp_zero_stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__VX_Warp__DOT__valid + [0U])); + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__0__KET____DOT__VX_Warp__out_valid[1U] + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__warp_zero_change_mask) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__0__KET____DOT__VX_Warp__in_thread_mask + [1U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__warp_zero_stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__VX_Warp__DOT__valid + [1U])); + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__0__KET____DOT__VX_Warp__out_valid[2U] + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__warp_zero_change_mask) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__0__KET____DOT__VX_Warp__in_thread_mask + [2U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__warp_zero_stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__VX_Warp__DOT__valid + [2U])); + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__0__KET____DOT__VX_Warp__out_valid[3U] + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__warp_zero_change_mask) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__0__KET____DOT__VX_Warp__in_thread_mask + [3U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__warp_zero_stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__VX_Warp__DOT__valid + [3U])); + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__1__KET____DOT__VX_Warp__out_valid[0U] + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__warp_zero_change_mask) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__1__KET____DOT__VX_Warp__in_thread_mask + [0U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__warp_zero_stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__valid + [0U])); + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__1__KET____DOT__VX_Warp__out_valid[1U] + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__warp_zero_change_mask) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__1__KET____DOT__VX_Warp__in_thread_mask + [1U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__warp_zero_stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__valid + [1U])); + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__1__KET____DOT__VX_Warp__out_valid[2U] + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__warp_zero_change_mask) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__1__KET____DOT__VX_Warp__in_thread_mask + [2U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__warp_zero_stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__valid + [2U])); + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__1__KET____DOT__VX_Warp__out_valid[3U] + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__warp_zero_change_mask) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__1__KET____DOT__VX_Warp__in_thread_mask + [3U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__warp_zero_stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__valid + [3U])); + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__2__KET____DOT__VX_Warp__out_valid[0U] + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__warp_zero_change_mask) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__2__KET____DOT__VX_Warp__in_thread_mask + [0U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__warp_zero_stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__valid + [0U])); + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__2__KET____DOT__VX_Warp__out_valid[1U] + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__warp_zero_change_mask) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__2__KET____DOT__VX_Warp__in_thread_mask + [1U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__warp_zero_stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__valid + [1U])); + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__2__KET____DOT__VX_Warp__out_valid[2U] + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__warp_zero_change_mask) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__2__KET____DOT__VX_Warp__in_thread_mask + [2U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__warp_zero_stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__valid + [2U])); + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__2__KET____DOT__VX_Warp__out_valid[3U] + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__warp_zero_change_mask) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__2__KET____DOT__VX_Warp__in_thread_mask + [3U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__warp_zero_stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__valid + [3U])); + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__3__KET____DOT__VX_Warp__out_valid[0U] + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__warp_zero_change_mask) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__3__KET____DOT__VX_Warp__in_thread_mask + [0U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__warp_zero_stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__valid + [0U])); + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__3__KET____DOT__VX_Warp__out_valid[1U] + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__warp_zero_change_mask) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__3__KET____DOT__VX_Warp__in_thread_mask + [1U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__warp_zero_stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__valid + [1U])); + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__3__KET____DOT__VX_Warp__out_valid[2U] + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__warp_zero_change_mask) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__3__KET____DOT__VX_Warp__in_thread_mask + [2U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__warp_zero_stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__valid + [2U])); + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__3__KET____DOT__VX_Warp__out_valid[3U] + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__warp_zero_change_mask) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__3__KET____DOT__VX_Warp__in_thread_mask + [3U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__warp_zero_stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__valid + [3U])); + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__4__KET____DOT__VX_Warp__out_valid[0U] + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__warp_zero_change_mask) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__4__KET____DOT__VX_Warp__in_thread_mask + [0U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__warp_zero_stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__valid + [0U])); + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__4__KET____DOT__VX_Warp__out_valid[1U] + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__warp_zero_change_mask) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__4__KET____DOT__VX_Warp__in_thread_mask + [1U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__warp_zero_stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__valid + [1U])); + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__4__KET____DOT__VX_Warp__out_valid[2U] + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__warp_zero_change_mask) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__4__KET____DOT__VX_Warp__in_thread_mask + [2U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__warp_zero_stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__valid + [2U])); + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__4__KET____DOT__VX_Warp__out_valid[3U] + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__warp_zero_change_mask) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__4__KET____DOT__VX_Warp__in_thread_mask + [3U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__warp_zero_stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__valid + [3U])); + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__5__KET____DOT__VX_Warp__out_valid[0U] + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__warp_zero_change_mask) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__5__KET____DOT__VX_Warp__in_thread_mask + [0U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__warp_zero_stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__valid + [0U])); + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__5__KET____DOT__VX_Warp__out_valid[1U] + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__warp_zero_change_mask) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__5__KET____DOT__VX_Warp__in_thread_mask + [1U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__warp_zero_stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__valid + [1U])); + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__5__KET____DOT__VX_Warp__out_valid[2U] + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__warp_zero_change_mask) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__5__KET____DOT__VX_Warp__in_thread_mask + [2U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__warp_zero_stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__valid + [2U])); + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__5__KET____DOT__VX_Warp__out_valid[3U] + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__warp_zero_change_mask) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__5__KET____DOT__VX_Warp__in_thread_mask + [3U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__warp_zero_stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__valid + [3U])); + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__6__KET____DOT__VX_Warp__out_valid[0U] + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__warp_zero_change_mask) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__6__KET____DOT__VX_Warp__in_thread_mask + [0U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__warp_zero_stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__valid + [0U])); + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__6__KET____DOT__VX_Warp__out_valid[1U] + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__warp_zero_change_mask) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__6__KET____DOT__VX_Warp__in_thread_mask + [1U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__warp_zero_stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__valid + [1U])); + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__6__KET____DOT__VX_Warp__out_valid[2U] + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__warp_zero_change_mask) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__6__KET____DOT__VX_Warp__in_thread_mask + [2U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__warp_zero_stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__valid + [2U])); + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__6__KET____DOT__VX_Warp__out_valid[3U] + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__warp_zero_change_mask) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__6__KET____DOT__VX_Warp__in_thread_mask + [3U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__warp_zero_stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__valid + [3U])); + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__7__KET____DOT__VX_Warp__out_valid[0U] + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__warp_zero_change_mask) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__7__KET____DOT__VX_Warp__in_thread_mask + [0U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__warp_zero_stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__valid + [0U])); + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__7__KET____DOT__VX_Warp__out_valid[1U] + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__warp_zero_change_mask) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__7__KET____DOT__VX_Warp__in_thread_mask + [1U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__warp_zero_stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__valid + [1U])); + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__7__KET____DOT__VX_Warp__out_valid[2U] + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__warp_zero_change_mask) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__7__KET____DOT__VX_Warp__in_thread_mask + [2U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__warp_zero_stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__valid + [2U])); + vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__7__KET____DOT__VX_Warp__out_valid[3U] + = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__warp_zero_change_mask) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__7__KET____DOT__VX_Warp__in_thread_mask + [3U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__warp_zero_stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__valid + [3U])); + vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[0U][3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__0__KET____DOT__VX_Warp__out_valid [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0U][2U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_b_reg_data + vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[0U][2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__0__KET____DOT__VX_Warp__out_valid [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0U][1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_b_reg_data + vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[0U][1U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__0__KET____DOT__VX_Warp__out_valid [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__glob_b_reg_data[0U][0U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_b_reg_data + vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[0U][0U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__0__KET____DOT__VX_Warp__out_valid [0U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[1U][3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__1__KET____DOT__VX_Warp__out_valid + [3U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[1U][2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__1__KET____DOT__VX_Warp__out_valid + [2U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[1U][1U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__1__KET____DOT__VX_Warp__out_valid + [1U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[1U][0U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__1__KET____DOT__VX_Warp__out_valid + [0U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[2U][3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__2__KET____DOT__VX_Warp__out_valid + [3U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[2U][2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__2__KET____DOT__VX_Warp__out_valid + [2U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[2U][1U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__2__KET____DOT__VX_Warp__out_valid + [1U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[2U][0U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__2__KET____DOT__VX_Warp__out_valid + [0U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[3U][3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__3__KET____DOT__VX_Warp__out_valid + [3U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[3U][2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__3__KET____DOT__VX_Warp__out_valid + [2U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[3U][1U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__3__KET____DOT__VX_Warp__out_valid + [1U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[3U][0U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__3__KET____DOT__VX_Warp__out_valid + [0U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[4U][3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__4__KET____DOT__VX_Warp__out_valid + [3U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[4U][2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__4__KET____DOT__VX_Warp__out_valid + [2U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[4U][1U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__4__KET____DOT__VX_Warp__out_valid + [1U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[4U][0U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__4__KET____DOT__VX_Warp__out_valid + [0U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[5U][3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__5__KET____DOT__VX_Warp__out_valid + [3U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[5U][2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__5__KET____DOT__VX_Warp__out_valid + [2U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[5U][1U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__5__KET____DOT__VX_Warp__out_valid + [1U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[5U][0U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__5__KET____DOT__VX_Warp__out_valid + [0U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[6U][3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__6__KET____DOT__VX_Warp__out_valid + [3U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[6U][2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__6__KET____DOT__VX_Warp__out_valid + [2U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[6U][1U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__6__KET____DOT__VX_Warp__out_valid + [1U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[6U][0U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__6__KET____DOT__VX_Warp__out_valid + [0U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[7U][3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__7__KET____DOT__VX_Warp__out_valid + [3U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[7U][2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__7__KET____DOT__VX_Warp__out_valid + [2U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[7U][1U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__7__KET____DOT__VX_Warp__out_valid + [1U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[7U][0U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__7__KET____DOT__VX_Warp__out_valid + [0U]; + // ALWAYS at VX_fetch.v:177 + if ((0U == (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num))) { + vlTOPp->Vortex__DOT__vx_fetch__DOT__out_valid_var[0U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid + [0U][0U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__out_valid_var[1U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid + [0U][1U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__out_valid_var[2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid + [0U][2U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__out_valid_var[3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid + [0U][3U]; + } + if ((1U == (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num))) { + vlTOPp->Vortex__DOT__vx_fetch__DOT__out_valid_var[0U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid + [1U][0U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__out_valid_var[1U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid + [1U][1U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__out_valid_var[2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid + [1U][2U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__out_valid_var[3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid + [1U][3U]; + } + if ((2U == (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num))) { + vlTOPp->Vortex__DOT__vx_fetch__DOT__out_valid_var[0U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid + [2U][0U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__out_valid_var[1U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid + [2U][1U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__out_valid_var[2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid + [2U][2U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__out_valid_var[3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid + [2U][3U]; + } + if ((3U == (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num))) { + vlTOPp->Vortex__DOT__vx_fetch__DOT__out_valid_var[0U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid + [3U][0U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__out_valid_var[1U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid + [3U][1U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__out_valid_var[2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid + [3U][2U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__out_valid_var[3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid + [3U][3U]; + } + if ((4U == (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num))) { + vlTOPp->Vortex__DOT__vx_fetch__DOT__out_valid_var[0U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid + [4U][0U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__out_valid_var[1U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid + [4U][1U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__out_valid_var[2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid + [4U][2U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__out_valid_var[3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid + [4U][3U]; + } + if ((5U == (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num))) { + vlTOPp->Vortex__DOT__vx_fetch__DOT__out_valid_var[0U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid + [5U][0U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__out_valid_var[1U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid + [5U][1U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__out_valid_var[2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid + [5U][2U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__out_valid_var[3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid + [5U][3U]; + } + if ((6U == (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num))) { + vlTOPp->Vortex__DOT__vx_fetch__DOT__out_valid_var[0U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid + [6U][0U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__out_valid_var[1U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid + [6U][1U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__out_valid_var[2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid + [6U][2U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__out_valid_var[3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid + [6U][3U]; + } + if ((7U == (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num))) { + vlTOPp->Vortex__DOT__vx_fetch__DOT__out_valid_var[0U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid + [7U][0U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__out_valid_var[1U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid + [7U][1U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__out_valid_var[2U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid + [7U][2U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__out_valid_var[3U] + = vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid + [7U][3U]; + } + vlSymsp->TOP__Vortex__DOT__fe_inst_meta_fd.valid + = ((0xeU & (IData)(vlSymsp->TOP__Vortex__DOT__fe_inst_meta_fd.valid)) + | vlTOPp->Vortex__DOT__vx_fetch__DOT__out_valid_var + [0U]); + vlSymsp->TOP__Vortex__DOT__fe_inst_meta_fd.valid + = ((0xdU & (IData)(vlSymsp->TOP__Vortex__DOT__fe_inst_meta_fd.valid)) + | (vlTOPp->Vortex__DOT__vx_fetch__DOT__out_valid_var + [1U] << 1U)); + vlSymsp->TOP__Vortex__DOT__fe_inst_meta_fd.valid + = ((0xbU & (IData)(vlSymsp->TOP__Vortex__DOT__fe_inst_meta_fd.valid)) + | (vlTOPp->Vortex__DOT__vx_fetch__DOT__out_valid_var + [2U] << 2U)); + vlSymsp->TOP__Vortex__DOT__fe_inst_meta_fd.valid + = ((7U & (IData)(vlSymsp->TOP__Vortex__DOT__fe_inst_meta_fd.valid)) + | (vlTOPp->Vortex__DOT__vx_fetch__DOT__out_valid_var + [3U] << 3U)); } void VVortex::_eval(VVortex__Syms* __restrict vlSymsp) { VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex::_eval\n"); ); VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; // Body - if (((IData)(vlTOPp->clk) & (~ (IData)(vlTOPp->__Vclklast__TOP__clk)))) { - vlTOPp->_sequent__TOP__4(vlSymsp); - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one._sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one__15(vlSymsp); - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one._sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one__16(vlSymsp); - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one._sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one__17(vlSymsp); - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one._sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one__18(vlSymsp); - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one._sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one__19(vlSymsp); - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one._sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one__20(vlSymsp); - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one._sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one__21(vlSymsp); - vlTOPp->_sequent__TOP__5(vlSymsp); - } if ((((IData)(vlTOPp->clk) & (~ (IData)(vlTOPp->__Vclklast__TOP__clk))) | ((IData)(vlTOPp->reset) & (~ (IData)(vlTOPp->__Vclklast__TOP__reset))))) { + vlTOPp->_sequent__TOP__4(vlSymsp); + } + if (((IData)(vlTOPp->clk) & (~ (IData)(vlTOPp->__Vclklast__TOP__clk)))) { + vlTOPp->_sequent__TOP__5(vlSymsp); + vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one._sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__15(vlSymsp); + vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__VX_Context_one._sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__VX_Context_one__16(vlSymsp); + vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__VX_Context_one._sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__VX_Context_one__17(vlSymsp); + vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__VX_Context_one._sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__VX_Context_one__18(vlSymsp); + vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__VX_Context_one._sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__VX_Context_one__19(vlSymsp); + vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__VX_Context_one._sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__VX_Context_one__20(vlSymsp); + vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one._sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one__21(vlSymsp); vlTOPp->_sequent__TOP__6(vlSymsp); } + vlTOPp->_combo__TOP__7(vlSymsp); if (((~ (IData)(vlTOPp->clk)) & (IData)(vlTOPp->__Vclklast__TOP__clk))) { - vlTOPp->_sequent__TOP__7(vlSymsp); - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one._sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one__22(vlSymsp); - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one._sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one__22(vlSymsp); - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one._sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one__22(vlSymsp); - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one._sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one__22(vlSymsp); - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one._sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one__22(vlSymsp); - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one._sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one__22(vlSymsp); - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one._sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one__22(vlSymsp); + vlTOPp->_sequent__TOP__8(vlSymsp); + vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one._sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__22(vlSymsp); + vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__VX_Context_one._sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__22(vlSymsp); + vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__VX_Context_one._sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__22(vlSymsp); + vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__VX_Context_one._sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__22(vlSymsp); + vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__VX_Context_one._sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__22(vlSymsp); + vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__VX_Context_one._sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__22(vlSymsp); + vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one._sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__22(vlSymsp); } - vlTOPp->_combo__TOP__8(vlSymsp); - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one._combo__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one__29(vlSymsp); - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one._combo__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one__29(vlSymsp); - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one._combo__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one__29(vlSymsp); - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one._combo__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one__29(vlSymsp); - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one._combo__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one__29(vlSymsp); - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one._combo__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one__29(vlSymsp); - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one._combo__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one__29(vlSymsp); if ((((IData)(vlTOPp->clk) & (~ (IData)(vlTOPp->__Vclklast__TOP__clk))) | ((IData)(vlTOPp->reset) & (~ (IData)(vlTOPp->__Vclklast__TOP__reset))))) { vlTOPp->_sequent__TOP__9(vlSymsp); } vlTOPp->_combo__TOP__10(vlSymsp); - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one._combo__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one__36(vlSymsp); - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one._combo__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one__36(vlSymsp); - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one._combo__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one__36(vlSymsp); - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one._combo__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one__36(vlSymsp); - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one._combo__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one__36(vlSymsp); - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one._combo__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one__36(vlSymsp); - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one._combo__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one__36(vlSymsp); - vlTOPp->_settle__TOP__3(vlSymsp); + vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one._combo__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__29(vlSymsp); + vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__VX_Context_one._combo__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__29(vlSymsp); + vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__VX_Context_one._combo__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__29(vlSymsp); + vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__VX_Context_one._combo__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__29(vlSymsp); + vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__VX_Context_one._combo__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__29(vlSymsp); + vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__VX_Context_one._combo__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__29(vlSymsp); + vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one._combo__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__29(vlSymsp); + vlTOPp->_combo__TOP__11(vlSymsp); // Final vlTOPp->__Vclklast__TOP__clk = vlTOPp->clk; vlTOPp->__Vclklast__TOP__reset = vlTOPp->reset; @@ -13913,13 +9861,13 @@ void VVortex::_eval_initial(VVortex__Syms* __restrict vlSymsp) { VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; // Body vlTOPp->_initial__TOP__1(vlSymsp); - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one._initial__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one__1(vlSymsp); - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one._initial__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one__1(vlSymsp); - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one._initial__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one__1(vlSymsp); - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one._initial__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one__1(vlSymsp); - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one._initial__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one__1(vlSymsp); - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one._initial__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one__1(vlSymsp); - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one._initial__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one__1(vlSymsp); + vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one._initial__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__1(vlSymsp); + vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__VX_Context_one._initial__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__1(vlSymsp); + vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__VX_Context_one._initial__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__1(vlSymsp); + vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__VX_Context_one._initial__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__1(vlSymsp); + vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__VX_Context_one._initial__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__1(vlSymsp); + vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__VX_Context_one._initial__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__1(vlSymsp); + vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one._initial__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__1(vlSymsp); vlTOPp->__Vclklast__TOP__clk = vlTOPp->clk; vlTOPp->__Vclklast__TOP__reset = vlTOPp->reset; } @@ -13936,13 +9884,13 @@ void VVortex::_eval_settle(VVortex__Syms* __restrict vlSymsp) { VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; // Body vlTOPp->_settle__TOP__2(vlSymsp); - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one._settle__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one__8(vlSymsp); - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one._settle__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one__8(vlSymsp); - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one._settle__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one__8(vlSymsp); - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one._settle__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one__8(vlSymsp); - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one._settle__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one__8(vlSymsp); - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one._settle__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one__8(vlSymsp); - vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one._settle__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one__8(vlSymsp); + vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one._settle__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__8(vlSymsp); + vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__VX_Context_one._settle__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__8(vlSymsp); + vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__VX_Context_one._settle__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__8(vlSymsp); + vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__VX_Context_one._settle__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__8(vlSymsp); + vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__VX_Context_one._settle__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__8(vlSymsp); + vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__VX_Context_one._settle__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__8(vlSymsp); + vlSymsp->TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one._settle__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__8(vlSymsp); vlTOPp->_settle__TOP__3(vlSymsp); } @@ -13988,185 +9936,15 @@ void VVortex::_ctor_var_reset() { out_cache_driver_in_data[__Vi0] = VL_RAND_RESET_I(32); }} out_ebreak = VL_RAND_RESET_I(1); - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__fetch_valid[__Vi0] = VL_RAND_RESET_I(1); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__f_d_valid[__Vi0] = VL_RAND_RESET_I(1); - }} Vortex__DOT__decode_branch_stall = VL_RAND_RESET_I(1); - Vortex__DOT__decode_csr_address = VL_RAND_RESET_I(12); - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__decode_a_reg_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__decode_b_reg_data[__Vi0] = VL_RAND_RESET_I(32); - }} - Vortex__DOT__decode_itype_immed = VL_RAND_RESET_I(32); - Vortex__DOT__decode_branch_type = VL_RAND_RESET_I(3); - Vortex__DOT__decode_jal = VL_RAND_RESET_I(1); - Vortex__DOT__decode_jal_offset = VL_RAND_RESET_I(32); - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__decode_valid[__Vi0] = VL_RAND_RESET_I(1); - }} - Vortex__DOT__decode_change_mask = VL_RAND_RESET_I(1); - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__decode_thread_mask[__Vi0] = VL_RAND_RESET_I(1); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__d_e_a_reg_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__d_e_b_reg_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__d_e_valid[__Vi0] = VL_RAND_RESET_I(1); - }} Vortex__DOT__execute_branch_stall = VL_RAND_RESET_I(1); - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__execute_alu_result[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__execute_b_reg_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__execute_valid[__Vi0] = VL_RAND_RESET_I(1); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__e_m_alu_result[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__e_m_b_reg_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__e_m_valid[__Vi0] = VL_RAND_RESET_I(1); - }} - Vortex__DOT__memory_branch_dir = VL_RAND_RESET_I(1); Vortex__DOT__memory_branch_dest = VL_RAND_RESET_I(32); - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__memory_alu_result[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__memory_mem_result[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__memory_valid[__Vi0] = VL_RAND_RESET_I(1); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__m_w_alu_result[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__m_w_mem_result[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__m_w_valid[__Vi0] = VL_RAND_RESET_I(1); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__writeback_write_data[__Vi0] = VL_RAND_RESET_I(32); - }} Vortex__DOT__csr_decode_csr_data = VL_RAND_RESET_I(32); Vortex__DOT__forwarding_fwd_stall = VL_RAND_RESET_I(1); Vortex__DOT__forwarding_src1_fwd = VL_RAND_RESET_I(1); Vortex__DOT__forwarding_src2_fwd = VL_RAND_RESET_I(1); - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__forwarding_src1_fwd_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__forwarding_src2_fwd_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT____Vcellout__vx_fetch__out_valid[__Vi0] = VL_RAND_RESET_I(1); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask[__Vi0] = VL_RAND_RESET_I(1); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT____Vcellout__vx_f_d_reg__out_valid[__Vi0] = VL_RAND_RESET_I(1); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT____Vcellinp__vx_f_d_reg__in_valid[__Vi0] = VL_RAND_RESET_I(1); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT____Vcellout__vx_decode__out_thread_mask[__Vi0] = VL_RAND_RESET_I(1); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT____Vcellout__vx_decode__out_valid[__Vi0] = VL_RAND_RESET_I(1); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT____Vcellout__vx_decode__out_b_reg_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT____Vcellout__vx_decode__out_a_reg_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT____Vcellinp__vx_decode__in_wb_valid[__Vi0] = VL_RAND_RESET_I(1); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT____Vcellinp__vx_decode__in_write_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT____Vcellinp__vx_decode__in_valid[__Vi0] = VL_RAND_RESET_I(1); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT____Vcellout__vx_d_e_reg__out_valid[__Vi0] = VL_RAND_RESET_I(1); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT____Vcellout__vx_d_e_reg__out_b_reg_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT____Vcellinp__vx_d_e_reg__in_valid[__Vi0] = VL_RAND_RESET_I(1); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT____Vcellinp__vx_d_e_reg__in_b_reg_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT____Vcellinp__vx_d_e_reg__in_a_reg_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT____Vcellout__vx_execute__out_valid[__Vi0] = VL_RAND_RESET_I(1); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT____Vcellout__vx_execute__out_b_reg_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT____Vcellout__vx_execute__out_alu_result[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT____Vcellinp__vx_execute__in_valid[__Vi0] = VL_RAND_RESET_I(1); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT____Vcellout__vx_e_m_reg__out_valid[__Vi0] = VL_RAND_RESET_I(1); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT____Vcellout__vx_e_m_reg__out_b_reg_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT____Vcellout__vx_e_m_reg__out_alu_result[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT____Vcellinp__vx_e_m_reg__in_valid[__Vi0] = VL_RAND_RESET_I(1); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT____Vcellinp__vx_e_m_reg__in_b_reg_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT____Vcellinp__vx_e_m_reg__in_alu_result[__Vi0] = VL_RAND_RESET_I(32); - }} + VL_RAND_RESET_W(128,Vortex__DOT____Vcellout__vx_execute__out_b_reg_data); + VL_RAND_RESET_W(128,Vortex__DOT____Vcellout__vx_execute__out_a_reg_data); { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid[__Vi0] = VL_RAND_RESET_I(1); }} @@ -14176,74 +9954,13 @@ void VVortex::_ctor_var_reset() { { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address[__Vi0] = VL_RAND_RESET_I(32); }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT____Vcellout__vx_memory__out_valid[__Vi0] = VL_RAND_RESET_I(1); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT____Vcellout__vx_memory__out_mem_result[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT____Vcellout__vx_memory__out_alu_result[__Vi0] = VL_RAND_RESET_I(32); - }} { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data[__Vi0] = VL_RAND_RESET_I(32); }} + VL_RAND_RESET_W(128,Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data); + VL_RAND_RESET_W(128,Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data); { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT____Vcellinp__vx_memory__in_valid[__Vi0] = VL_RAND_RESET_I(1); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT____Vcellinp__vx_memory__in_rd2[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT____Vcellinp__vx_memory__in_alu_result[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT____Vcellout__vx_m_w_reg__out_valid[__Vi0] = VL_RAND_RESET_I(1); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT____Vcellout__vx_m_w_reg__out_mem_result[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT____Vcellout__vx_m_w_reg__out_alu_result[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT____Vcellinp__vx_m_w_reg__in_valid[__Vi0] = VL_RAND_RESET_I(1); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT____Vcellinp__vx_m_w_reg__in_mem_result[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT____Vcellinp__vx_m_w_reg__in_alu_result[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT____Vcellout__vx_writeback__out_write_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT____Vcellinp__vx_writeback__in_mem_result[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT____Vcellinp__vx_writeback__in_alu_result[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result[__Vi0] = VL_RAND_RESET_I(32); + Vortex__DOT__vx_fetch__DOT__in_thread_mask[__Vi0] = VL_RAND_RESET_I(1); }} Vortex__DOT__vx_fetch__DOT__stall = VL_RAND_RESET_I(1); Vortex__DOT__vx_fetch__DOT__warp_num = VL_RAND_RESET_I(4); @@ -14263,140 +9980,138 @@ void VVortex::_ctor_var_reset() { { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { Vortex__DOT__vx_fetch__DOT__out_valid_var[__Vi0] = VL_RAND_RESET_I(1); }} - Vortex__DOT__vx_fetch__DOT__genblk1__BRA__0__KET____DOT__warp_zero_change_mask = VL_RAND_RESET_I(1); - Vortex__DOT__vx_fetch__DOT__genblk1__BRA__0__KET____DOT__warp_zero_stall = VL_RAND_RESET_I(1); + Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__warp_zero_change_mask = VL_RAND_RESET_I(1); + Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__warp_zero_stall = VL_RAND_RESET_I(1); { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__0__KET____DOT__VX_Warp__out_valid[__Vi0] = VL_RAND_RESET_I(1); + Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__0__KET____DOT__VX_Warp__out_valid[__Vi0] = VL_RAND_RESET_I(1); }} { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__0__KET____DOT__VX_Warp__in_thread_mask[__Vi0] = VL_RAND_RESET_I(1); + Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__0__KET____DOT__VX_Warp__in_thread_mask[__Vi0] = VL_RAND_RESET_I(1); }} - Vortex__DOT__vx_fetch__DOT__genblk1__BRA__1__KET____DOT__warp_zero_change_mask = VL_RAND_RESET_I(1); - Vortex__DOT__vx_fetch__DOT__genblk1__BRA__1__KET____DOT__warp_zero_stall = VL_RAND_RESET_I(1); + Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__warp_zero_change_mask = VL_RAND_RESET_I(1); + Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__warp_zero_stall = VL_RAND_RESET_I(1); { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__1__KET____DOT__VX_Warp__out_valid[__Vi0] = VL_RAND_RESET_I(1); + Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__1__KET____DOT__VX_Warp__out_valid[__Vi0] = VL_RAND_RESET_I(1); }} { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Warp__in_thread_mask[__Vi0] = VL_RAND_RESET_I(1); + Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__1__KET____DOT__VX_Warp__in_thread_mask[__Vi0] = VL_RAND_RESET_I(1); }} - Vortex__DOT__vx_fetch__DOT__genblk1__BRA__2__KET____DOT__warp_zero_change_mask = VL_RAND_RESET_I(1); - Vortex__DOT__vx_fetch__DOT__genblk1__BRA__2__KET____DOT__warp_zero_stall = VL_RAND_RESET_I(1); + Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__warp_zero_change_mask = VL_RAND_RESET_I(1); + Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__warp_zero_stall = VL_RAND_RESET_I(1); { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__2__KET____DOT__VX_Warp__out_valid[__Vi0] = VL_RAND_RESET_I(1); + Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__2__KET____DOT__VX_Warp__out_valid[__Vi0] = VL_RAND_RESET_I(1); }} { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Warp__in_thread_mask[__Vi0] = VL_RAND_RESET_I(1); + Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__2__KET____DOT__VX_Warp__in_thread_mask[__Vi0] = VL_RAND_RESET_I(1); }} - Vortex__DOT__vx_fetch__DOT__genblk1__BRA__3__KET____DOT__warp_zero_change_mask = VL_RAND_RESET_I(1); - Vortex__DOT__vx_fetch__DOT__genblk1__BRA__3__KET____DOT__warp_zero_stall = VL_RAND_RESET_I(1); + Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__warp_zero_change_mask = VL_RAND_RESET_I(1); + Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__warp_zero_stall = VL_RAND_RESET_I(1); { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__3__KET____DOT__VX_Warp__out_valid[__Vi0] = VL_RAND_RESET_I(1); + Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__3__KET____DOT__VX_Warp__out_valid[__Vi0] = VL_RAND_RESET_I(1); }} { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Warp__in_thread_mask[__Vi0] = VL_RAND_RESET_I(1); + Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__3__KET____DOT__VX_Warp__in_thread_mask[__Vi0] = VL_RAND_RESET_I(1); }} - Vortex__DOT__vx_fetch__DOT__genblk1__BRA__4__KET____DOT__warp_zero_change_mask = VL_RAND_RESET_I(1); - Vortex__DOT__vx_fetch__DOT__genblk1__BRA__4__KET____DOT__warp_zero_stall = VL_RAND_RESET_I(1); + Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__warp_zero_change_mask = VL_RAND_RESET_I(1); + Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__warp_zero_stall = VL_RAND_RESET_I(1); { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__4__KET____DOT__VX_Warp__out_valid[__Vi0] = VL_RAND_RESET_I(1); + Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__4__KET____DOT__VX_Warp__out_valid[__Vi0] = VL_RAND_RESET_I(1); }} { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Warp__in_thread_mask[__Vi0] = VL_RAND_RESET_I(1); + Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__4__KET____DOT__VX_Warp__in_thread_mask[__Vi0] = VL_RAND_RESET_I(1); }} - Vortex__DOT__vx_fetch__DOT__genblk1__BRA__5__KET____DOT__warp_zero_change_mask = VL_RAND_RESET_I(1); - Vortex__DOT__vx_fetch__DOT__genblk1__BRA__5__KET____DOT__warp_zero_stall = VL_RAND_RESET_I(1); + Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__warp_zero_change_mask = VL_RAND_RESET_I(1); + Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__warp_zero_stall = VL_RAND_RESET_I(1); { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__5__KET____DOT__VX_Warp__out_valid[__Vi0] = VL_RAND_RESET_I(1); + Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__5__KET____DOT__VX_Warp__out_valid[__Vi0] = VL_RAND_RESET_I(1); }} { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Warp__in_thread_mask[__Vi0] = VL_RAND_RESET_I(1); + Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__5__KET____DOT__VX_Warp__in_thread_mask[__Vi0] = VL_RAND_RESET_I(1); }} - Vortex__DOT__vx_fetch__DOT__genblk1__BRA__6__KET____DOT__warp_zero_change_mask = VL_RAND_RESET_I(1); - Vortex__DOT__vx_fetch__DOT__genblk1__BRA__6__KET____DOT__warp_zero_stall = VL_RAND_RESET_I(1); + Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__warp_zero_change_mask = VL_RAND_RESET_I(1); + Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__warp_zero_stall = VL_RAND_RESET_I(1); { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__6__KET____DOT__VX_Warp__out_valid[__Vi0] = VL_RAND_RESET_I(1); + Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__6__KET____DOT__VX_Warp__out_valid[__Vi0] = VL_RAND_RESET_I(1); }} { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Warp__in_thread_mask[__Vi0] = VL_RAND_RESET_I(1); + Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__6__KET____DOT__VX_Warp__in_thread_mask[__Vi0] = VL_RAND_RESET_I(1); }} - Vortex__DOT__vx_fetch__DOT__genblk1__BRA__7__KET____DOT__warp_zero_change_mask = VL_RAND_RESET_I(1); - Vortex__DOT__vx_fetch__DOT__genblk1__BRA__7__KET____DOT__warp_zero_stall = VL_RAND_RESET_I(1); + Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__warp_zero_change_mask = VL_RAND_RESET_I(1); + Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__warp_zero_stall = VL_RAND_RESET_I(1); { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__7__KET____DOT__VX_Warp__out_valid[__Vi0] = VL_RAND_RESET_I(1); + Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__7__KET____DOT__VX_Warp__out_valid[__Vi0] = VL_RAND_RESET_I(1); }} { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Warp__in_thread_mask[__Vi0] = VL_RAND_RESET_I(1); + Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__7__KET____DOT__VX_Warp__in_thread_mask[__Vi0] = VL_RAND_RESET_I(1); }} - Vortex__DOT__vx_fetch__DOT__genblk1__BRA__0__KET____DOT__VX_Warp__DOT__real_PC = VL_RAND_RESET_I(32); - Vortex__DOT__vx_fetch__DOT__genblk1__BRA__0__KET____DOT__VX_Warp__DOT__temp_PC = VL_RAND_RESET_I(32); + Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__VX_Warp__DOT__real_PC = VL_RAND_RESET_I(32); + Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__VX_Warp__DOT__temp_PC = VL_RAND_RESET_I(32); { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_fetch__DOT__genblk1__BRA__0__KET____DOT__VX_Warp__DOT__valid[__Vi0] = VL_RAND_RESET_I(1); + Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__VX_Warp__DOT__valid[__Vi0] = VL_RAND_RESET_I(1); }} { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_fetch__DOT__genblk1__BRA__0__KET____DOT__VX_Warp__DOT__valid_zero[__Vi0] = VL_RAND_RESET_I(1); + Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__VX_Warp__DOT__valid_zero[__Vi0] = VL_RAND_RESET_I(1); }} - Vortex__DOT__vx_fetch__DOT__genblk1__BRA__1__KET____DOT__VX_Warp__DOT__real_PC = VL_RAND_RESET_I(32); - Vortex__DOT__vx_fetch__DOT__genblk1__BRA__1__KET____DOT__VX_Warp__DOT__temp_PC = VL_RAND_RESET_I(32); + Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__real_PC = VL_RAND_RESET_I(32); + Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__temp_PC = VL_RAND_RESET_I(32); { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_fetch__DOT__genblk1__BRA__1__KET____DOT__VX_Warp__DOT__valid[__Vi0] = VL_RAND_RESET_I(1); + Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__valid[__Vi0] = VL_RAND_RESET_I(1); }} { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_fetch__DOT__genblk1__BRA__1__KET____DOT__VX_Warp__DOT__valid_zero[__Vi0] = VL_RAND_RESET_I(1); + Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__valid_zero[__Vi0] = VL_RAND_RESET_I(1); }} - Vortex__DOT__vx_fetch__DOT__genblk1__BRA__2__KET____DOT__VX_Warp__DOT__real_PC = VL_RAND_RESET_I(32); - Vortex__DOT__vx_fetch__DOT__genblk1__BRA__2__KET____DOT__VX_Warp__DOT__temp_PC = VL_RAND_RESET_I(32); + Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__real_PC = VL_RAND_RESET_I(32); + Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__temp_PC = VL_RAND_RESET_I(32); { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_fetch__DOT__genblk1__BRA__2__KET____DOT__VX_Warp__DOT__valid[__Vi0] = VL_RAND_RESET_I(1); + Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__valid[__Vi0] = VL_RAND_RESET_I(1); }} { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_fetch__DOT__genblk1__BRA__2__KET____DOT__VX_Warp__DOT__valid_zero[__Vi0] = VL_RAND_RESET_I(1); + Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__valid_zero[__Vi0] = VL_RAND_RESET_I(1); }} - Vortex__DOT__vx_fetch__DOT__genblk1__BRA__3__KET____DOT__VX_Warp__DOT__real_PC = VL_RAND_RESET_I(32); - Vortex__DOT__vx_fetch__DOT__genblk1__BRA__3__KET____DOT__VX_Warp__DOT__temp_PC = VL_RAND_RESET_I(32); + Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__real_PC = VL_RAND_RESET_I(32); + Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__temp_PC = VL_RAND_RESET_I(32); { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_fetch__DOT__genblk1__BRA__3__KET____DOT__VX_Warp__DOT__valid[__Vi0] = VL_RAND_RESET_I(1); + Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__valid[__Vi0] = VL_RAND_RESET_I(1); }} { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_fetch__DOT__genblk1__BRA__3__KET____DOT__VX_Warp__DOT__valid_zero[__Vi0] = VL_RAND_RESET_I(1); + Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__valid_zero[__Vi0] = VL_RAND_RESET_I(1); }} - Vortex__DOT__vx_fetch__DOT__genblk1__BRA__4__KET____DOT__VX_Warp__DOT__real_PC = VL_RAND_RESET_I(32); - Vortex__DOT__vx_fetch__DOT__genblk1__BRA__4__KET____DOT__VX_Warp__DOT__temp_PC = VL_RAND_RESET_I(32); + Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__real_PC = VL_RAND_RESET_I(32); + Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__temp_PC = VL_RAND_RESET_I(32); { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_fetch__DOT__genblk1__BRA__4__KET____DOT__VX_Warp__DOT__valid[__Vi0] = VL_RAND_RESET_I(1); + Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__valid[__Vi0] = VL_RAND_RESET_I(1); }} { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_fetch__DOT__genblk1__BRA__4__KET____DOT__VX_Warp__DOT__valid_zero[__Vi0] = VL_RAND_RESET_I(1); + Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__valid_zero[__Vi0] = VL_RAND_RESET_I(1); }} - Vortex__DOT__vx_fetch__DOT__genblk1__BRA__5__KET____DOT__VX_Warp__DOT__real_PC = VL_RAND_RESET_I(32); - Vortex__DOT__vx_fetch__DOT__genblk1__BRA__5__KET____DOT__VX_Warp__DOT__temp_PC = VL_RAND_RESET_I(32); + Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__real_PC = VL_RAND_RESET_I(32); + Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__temp_PC = VL_RAND_RESET_I(32); { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_fetch__DOT__genblk1__BRA__5__KET____DOT__VX_Warp__DOT__valid[__Vi0] = VL_RAND_RESET_I(1); + Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__valid[__Vi0] = VL_RAND_RESET_I(1); }} { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_fetch__DOT__genblk1__BRA__5__KET____DOT__VX_Warp__DOT__valid_zero[__Vi0] = VL_RAND_RESET_I(1); + Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__valid_zero[__Vi0] = VL_RAND_RESET_I(1); }} - Vortex__DOT__vx_fetch__DOT__genblk1__BRA__6__KET____DOT__VX_Warp__DOT__real_PC = VL_RAND_RESET_I(32); - Vortex__DOT__vx_fetch__DOT__genblk1__BRA__6__KET____DOT__VX_Warp__DOT__temp_PC = VL_RAND_RESET_I(32); + Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__real_PC = VL_RAND_RESET_I(32); + Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__temp_PC = VL_RAND_RESET_I(32); { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_fetch__DOT__genblk1__BRA__6__KET____DOT__VX_Warp__DOT__valid[__Vi0] = VL_RAND_RESET_I(1); + Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__valid[__Vi0] = VL_RAND_RESET_I(1); }} { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_fetch__DOT__genblk1__BRA__6__KET____DOT__VX_Warp__DOT__valid_zero[__Vi0] = VL_RAND_RESET_I(1); + Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__valid_zero[__Vi0] = VL_RAND_RESET_I(1); }} - Vortex__DOT__vx_fetch__DOT__genblk1__BRA__7__KET____DOT__VX_Warp__DOT__real_PC = VL_RAND_RESET_I(32); - Vortex__DOT__vx_fetch__DOT__genblk1__BRA__7__KET____DOT__VX_Warp__DOT__temp_PC = VL_RAND_RESET_I(32); + Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__real_PC = VL_RAND_RESET_I(32); + Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__temp_PC = VL_RAND_RESET_I(32); { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_fetch__DOT__genblk1__BRA__7__KET____DOT__VX_Warp__DOT__valid[__Vi0] = VL_RAND_RESET_I(1); + Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__valid[__Vi0] = VL_RAND_RESET_I(1); }} { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_fetch__DOT__genblk1__BRA__7__KET____DOT__VX_Warp__DOT__valid_zero[__Vi0] = VL_RAND_RESET_I(1); + Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__valid_zero[__Vi0] = VL_RAND_RESET_I(1); }} - Vortex__DOT__vx_f_d_reg__DOT__instruction = VL_RAND_RESET_I(32); - Vortex__DOT__vx_f_d_reg__DOT__curr_PC = VL_RAND_RESET_I(32); + VL_RAND_RESET_W(72,Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value); { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_f_d_reg__DOT__valid[__Vi0] = VL_RAND_RESET_I(1); + Vortex__DOT__vx_decode__DOT__in_valid[__Vi0] = VL_RAND_RESET_I(1); }} - Vortex__DOT__vx_f_d_reg__DOT__warp_num = VL_RAND_RESET_I(4); Vortex__DOT__vx_decode__DOT__is_itype = VL_RAND_RESET_I(1); Vortex__DOT__vx_decode__DOT__is_csr = VL_RAND_RESET_I(1); Vortex__DOT__vx_decode__DOT__is_clone = VL_RAND_RESET_I(1); @@ -14406,295 +10121,50 @@ void VVortex::_ctor_var_reset() { Vortex__DOT__vx_decode__DOT__jal_sys_jal = VL_RAND_RESET_I(1); Vortex__DOT__vx_decode__DOT__alu_tempp = VL_RAND_RESET_I(12); Vortex__DOT__vx_decode__DOT__mul_alu = VL_RAND_RESET_I(5); - { int __Vi0=0; for (; __Vi0<32; ++__Vi0) { - Vortex__DOT__vx_decode__DOT__w0_t0_registers[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { - { int __Vi1=0; for (; __Vi1<4; ++__Vi1) { - Vortex__DOT__vx_decode__DOT__glob_a_reg_data[__Vi0][__Vi1] = VL_RAND_RESET_I(32); - }} - }} - { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { - { int __Vi1=0; for (; __Vi1<4; ++__Vi1) { - Vortex__DOT__vx_decode__DOT__glob_b_reg_data[__Vi0][__Vi1] = VL_RAND_RESET_I(32); - }} - }} - { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { - Vortex__DOT__vx_decode__DOT__glob_clone_stall[__Vi0] = VL_RAND_RESET_I(1); - }} + VL_RAND_RESET_W(1024,Vortex__DOT__vx_decode__DOT__glob_a_reg_data); + VL_RAND_RESET_W(1024,Vortex__DOT__vx_decode__DOT__glob_b_reg_data); + Vortex__DOT__vx_decode__DOT__glob_clone_stall = VL_RAND_RESET_I(8); Vortex__DOT__vx_decode__DOT__real_zero_isclone = VL_RAND_RESET_I(1); - { int __Vi0=0; for (; __Vi0<32; ++__Vi0) { - Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_b_reg_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_a_reg_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_write_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_src2_fwd_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_src1_fwd_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_valid[__Vi0] = VL_RAND_RESET_I(1); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[__Vi0] = VL_RAND_RESET_I(32); - }} + VL_RAND_RESET_W(128,Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_b_reg_data); + VL_RAND_RESET_W(128,Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_a_reg_data); + VL_RAND_RESET_W(128,Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data); + VL_RAND_RESET_W(128,Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data); Vortex__DOT__vx_decode__DOT__temp_out_clone_stall = VL_RAND_RESET_I(1); - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_decode__DOT__jalrs_thread_mask[__Vi0] = VL_RAND_RESET_I(1); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_decode__DOT__jmprt_thread_mask[__Vi0] = VL_RAND_RESET_I(1); - }} + Vortex__DOT__vx_decode__DOT__jalrs_thread_mask = VL_RAND_RESET_I(4); + Vortex__DOT__vx_decode__DOT__jmprt_thread_mask = VL_RAND_RESET_I(4); Vortex__DOT__vx_decode__DOT__is_ebreak = VL_RAND_RESET_I(1); Vortex__DOT__vx_decode__DOT__temp_final_alu = VL_RAND_RESET_I(5); - Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__real_wspawn = VL_RAND_RESET_I(1); - Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__real_isclone = VL_RAND_RESET_I(1); - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__1__KET____DOT__VX_Context_one__out_b_reg_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__1__KET____DOT__VX_Context_one__out_a_reg_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<32; ++__Vi0) { - Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_write_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_src2_fwd_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_src1_fwd_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_valid[__Vi0] = VL_RAND_RESET_I(1); - }} - Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__real_wspawn = VL_RAND_RESET_I(1); - Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__real_isclone = VL_RAND_RESET_I(1); - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__2__KET____DOT__VX_Context_one__out_b_reg_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__2__KET____DOT__VX_Context_one__out_a_reg_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<32; ++__Vi0) { - Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_write_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_src2_fwd_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_src1_fwd_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_valid[__Vi0] = VL_RAND_RESET_I(1); - }} - Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__real_wspawn = VL_RAND_RESET_I(1); - Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__real_isclone = VL_RAND_RESET_I(1); - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__3__KET____DOT__VX_Context_one__out_b_reg_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__3__KET____DOT__VX_Context_one__out_a_reg_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<32; ++__Vi0) { - Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_write_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_src2_fwd_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_src1_fwd_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_valid[__Vi0] = VL_RAND_RESET_I(1); - }} - Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__real_wspawn = VL_RAND_RESET_I(1); - Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__real_isclone = VL_RAND_RESET_I(1); - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__4__KET____DOT__VX_Context_one__out_b_reg_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__4__KET____DOT__VX_Context_one__out_a_reg_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<32; ++__Vi0) { - Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_write_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_src2_fwd_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_src1_fwd_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_valid[__Vi0] = VL_RAND_RESET_I(1); - }} - Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__real_wspawn = VL_RAND_RESET_I(1); - Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__real_isclone = VL_RAND_RESET_I(1); - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__5__KET____DOT__VX_Context_one__out_b_reg_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__5__KET____DOT__VX_Context_one__out_a_reg_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<32; ++__Vi0) { - Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_write_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_src2_fwd_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_src1_fwd_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_valid[__Vi0] = VL_RAND_RESET_I(1); - }} - Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__real_wspawn = VL_RAND_RESET_I(1); - Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__real_isclone = VL_RAND_RESET_I(1); - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__6__KET____DOT__VX_Context_one__out_b_reg_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__6__KET____DOT__VX_Context_one__out_a_reg_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<32; ++__Vi0) { - Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_write_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_src2_fwd_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_src1_fwd_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_valid[__Vi0] = VL_RAND_RESET_I(1); - }} - Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__real_wspawn = VL_RAND_RESET_I(1); - Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__real_isclone = VL_RAND_RESET_I(1); - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__7__KET____DOT__VX_Context_one__out_b_reg_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__7__KET____DOT__VX_Context_one__out_a_reg_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<32; ++__Vi0) { - Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_write_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_src2_fwd_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_src1_fwd_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_valid[__Vi0] = VL_RAND_RESET_I(1); - }} + Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__real_wspawn = VL_RAND_RESET_I(1); + Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__real_isclone = VL_RAND_RESET_I(1); + Vortex__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__real_wspawn = VL_RAND_RESET_I(1); + Vortex__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__real_isclone = VL_RAND_RESET_I(1); + Vortex__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__real_wspawn = VL_RAND_RESET_I(1); + Vortex__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__real_isclone = VL_RAND_RESET_I(1); + Vortex__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__real_wspawn = VL_RAND_RESET_I(1); + Vortex__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__real_isclone = VL_RAND_RESET_I(1); + Vortex__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__real_wspawn = VL_RAND_RESET_I(1); + Vortex__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__real_isclone = VL_RAND_RESET_I(1); + Vortex__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__real_wspawn = VL_RAND_RESET_I(1); + Vortex__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__real_isclone = VL_RAND_RESET_I(1); + Vortex__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__real_wspawn = VL_RAND_RESET_I(1); + Vortex__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__real_isclone = VL_RAND_RESET_I(1); Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__state_stall = VL_RAND_RESET_I(6); - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd1_register[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd2_register[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<32; ++__Vi0) { - Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[__Vi0] = VL_RAND_RESET_I(32); - }} + VL_RAND_RESET_W(128,Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd1_register); + VL_RAND_RESET_W(128,Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd2_register); Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_src2_data = VL_RAND_RESET_I(32); Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_src1_data = VL_RAND_RESET_I(32); - { int __Vi0=0; for (; __Vi0<32; ++__Vi0) { - Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[__Vi0] = VL_RAND_RESET_I(32); - }} Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src2_data = VL_RAND_RESET_I(32); Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src1_data = VL_RAND_RESET_I(32); - { int __Vi0=0; for (; __Vi0<32; ++__Vi0) { - Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[__Vi0] = VL_RAND_RESET_I(32); - }} Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__out_src2_data = VL_RAND_RESET_I(32); Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__out_src1_data = VL_RAND_RESET_I(32); - { int __Vi0=0; for (; __Vi0<32; ++__Vi0) { - Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[__Vi0] = VL_RAND_RESET_I(32); - }} Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__out_src2_data = VL_RAND_RESET_I(32); Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__out_src1_data = VL_RAND_RESET_I(32); - { int __Vi0=0; for (; __Vi0<32; ++__Vi0) { - Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<32; ++__Vi0) { - Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<32; ++__Vi0) { - Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<32; ++__Vi0) { - Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<32; ++__Vi0) { - Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[__Vi0] = VL_RAND_RESET_I(32); - }} - Vortex__DOT__vx_d_e_reg__DOT__rd = VL_RAND_RESET_I(5); - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_d_e_reg__DOT__a_reg_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_d_e_reg__DOT__b_reg_data[__Vi0] = VL_RAND_RESET_I(32); - }} - Vortex__DOT__vx_d_e_reg__DOT__alu_op = VL_RAND_RESET_I(5); - Vortex__DOT__vx_d_e_reg__DOT__wb = VL_RAND_RESET_I(2); - Vortex__DOT__vx_d_e_reg__DOT__PC_next_out = VL_RAND_RESET_I(32); - Vortex__DOT__vx_d_e_reg__DOT__rs2_src = VL_RAND_RESET_I(1); - Vortex__DOT__vx_d_e_reg__DOT__itype_immed = VL_RAND_RESET_I(32); - Vortex__DOT__vx_d_e_reg__DOT__mem_read = VL_RAND_RESET_I(3); - Vortex__DOT__vx_d_e_reg__DOT__mem_write = VL_RAND_RESET_I(3); - Vortex__DOT__vx_d_e_reg__DOT__branch_type = VL_RAND_RESET_I(3); - Vortex__DOT__vx_d_e_reg__DOT__upper_immed = VL_RAND_RESET_I(20); - Vortex__DOT__vx_d_e_reg__DOT__csr_address = VL_RAND_RESET_I(12); - Vortex__DOT__vx_d_e_reg__DOT__is_csr = VL_RAND_RESET_I(1); - Vortex__DOT__vx_d_e_reg__DOT__csr_mask = VL_RAND_RESET_I(32); - Vortex__DOT__vx_d_e_reg__DOT__curr_PC = VL_RAND_RESET_I(32); - Vortex__DOT__vx_d_e_reg__DOT__jal = VL_RAND_RESET_I(1); - Vortex__DOT__vx_d_e_reg__DOT__jal_offset = VL_RAND_RESET_I(32); - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_d_e_reg__DOT__valid[__Vi0] = VL_RAND_RESET_I(1); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_d_e_reg__DOT__reg_data_z[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_d_e_reg__DOT__valid_z[__Vi0] = VL_RAND_RESET_I(1); - }} - Vortex__DOT__vx_d_e_reg__DOT__warp_num = VL_RAND_RESET_I(4); - Vortex__DOT__vx_d_e_reg__DOT__stalling = VL_RAND_RESET_I(1); + VL_RAND_RESET_W(1024,Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers); + VL_RAND_RESET_W(1024,Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers); + VL_RAND_RESET_W(1024,Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers); + VL_RAND_RESET_W(1024,Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers); + VL_RAND_RESET_W(490,Vortex__DOT__vx_d_e_reg__DOT____Vcellinp__d_e_reg__in); + VL_RAND_RESET_W(490,Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value); Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__0__KET____DOT__vx_alu__out_alu_result = VL_RAND_RESET_I(32); Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__1__KET____DOT__vx_alu__out_alu_result = VL_RAND_RESET_I(32); Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__2__KET____DOT__vx_alu__out_alu_result = VL_RAND_RESET_I(32); @@ -14707,63 +10177,20 @@ void VVortex::_ctor_var_reset() { Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__mult_signed_result = VL_RAND_RESET_Q(64); Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2 = VL_RAND_RESET_I(32); Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__mult_signed_result = VL_RAND_RESET_Q(64); - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_e_m_reg__DOT__alu_result[__Vi0] = VL_RAND_RESET_I(32); - }} - Vortex__DOT__vx_e_m_reg__DOT__rd = VL_RAND_RESET_I(5); - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_e_m_reg__DOT__a_reg_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_e_m_reg__DOT__b_reg_data[__Vi0] = VL_RAND_RESET_I(32); - }} - Vortex__DOT__vx_e_m_reg__DOT__wb = VL_RAND_RESET_I(2); - Vortex__DOT__vx_e_m_reg__DOT__PC_next = VL_RAND_RESET_I(32); - Vortex__DOT__vx_e_m_reg__DOT__mem_read = VL_RAND_RESET_I(3); - Vortex__DOT__vx_e_m_reg__DOT__mem_write = VL_RAND_RESET_I(3); - Vortex__DOT__vx_e_m_reg__DOT__csr_address = VL_RAND_RESET_I(12); - Vortex__DOT__vx_e_m_reg__DOT__is_csr = VL_RAND_RESET_I(1); - Vortex__DOT__vx_e_m_reg__DOT__csr_result = VL_RAND_RESET_I(32); - Vortex__DOT__vx_e_m_reg__DOT__curr_PC = VL_RAND_RESET_I(32); - Vortex__DOT__vx_e_m_reg__DOT__branch_offset = VL_RAND_RESET_I(32); - Vortex__DOT__vx_e_m_reg__DOT__branch_type = VL_RAND_RESET_I(3); - Vortex__DOT__vx_e_m_reg__DOT__jal = VL_RAND_RESET_I(1); - Vortex__DOT__vx_e_m_reg__DOT__jal_dest = VL_RAND_RESET_I(32); - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_e_m_reg__DOT__valid[__Vi0] = VL_RAND_RESET_I(1); - }} - Vortex__DOT__vx_e_m_reg__DOT__warp_num = VL_RAND_RESET_I(4); - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_m_w_reg__DOT__alu_result[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_m_w_reg__DOT__mem_result[__Vi0] = VL_RAND_RESET_I(32); - }} - Vortex__DOT__vx_m_w_reg__DOT__rd = VL_RAND_RESET_I(5); - Vortex__DOT__vx_m_w_reg__DOT__wb = VL_RAND_RESET_I(2); - Vortex__DOT__vx_m_w_reg__DOT__PC_next = VL_RAND_RESET_I(32); - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_m_w_reg__DOT__valid[__Vi0] = VL_RAND_RESET_I(1); - }} - Vortex__DOT__vx_m_w_reg__DOT__warp_num = VL_RAND_RESET_I(4); - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_writeback__DOT__out_pc_data[__Vi0] = VL_RAND_RESET_I(32); - }} + VL_RAND_RESET_W(720,Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in); + VL_RAND_RESET_W(720,Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value); + Vortex__DOT__vx_memory__DOT__temp_branch_dir = VL_RAND_RESET_I(1); + VL_RAND_RESET_W(313,Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value); + VL_RAND_RESET_W(128,Vortex__DOT__vx_writeback__DOT__out_pc_data); Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd = VL_RAND_RESET_I(1); Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd = VL_RAND_RESET_I(1); Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd = VL_RAND_RESET_I(1); Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd = VL_RAND_RESET_I(1); Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd = VL_RAND_RESET_I(1); Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd = VL_RAND_RESET_I(1); - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[__Vi0] = VL_RAND_RESET_I(32); - }} + VL_RAND_RESET_W(128,Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next); + VL_RAND_RESET_W(128,Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next); + VL_RAND_RESET_W(128,Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next); { int __Vi0=0; for (; __Vi0<1025; ++__Vi0) { Vortex__DOT__vx_csr_handler__DOT__csr[__Vi0] = VL_RAND_RESET_I(12); }} @@ -14780,4 +10207,5 @@ void VVortex::_ctor_var_reset() { __Vtable1_Vortex__DOT__vx_decode__DOT__mul_alu[5] = 0x15U; __Vtable1_Vortex__DOT__vx_decode__DOT__mul_alu[6] = 0x16U; __Vtable1_Vortex__DOT__vx_decode__DOT__mul_alu[7] = 0x17U; + __Vdly__Vortex__DOT__vx_fetch__DOT__warp_num = VL_RAND_RESET_I(4); } diff --git a/rtl/obj_dir/VVortex.h b/rtl/obj_dir/VVortex.h index e26cf049..e6b8c8e3 100644 --- a/rtl/obj_dir/VVortex.h +++ b/rtl/obj_dir/VVortex.h @@ -11,6 +11,12 @@ #include "verilated.h" class VVortex__Syms; +class VVortex_VX_inst_meta_inter; +class VVortex_VX_frE_to_bckE_req_inter; +class VVortex_VX_mem_req_inter; +class VVortex_VX_inst_mem_wb_inter; +class VVortex_VX_warp_ctl_inter; +class VVortex_VX_wb_inter; class VVortex_VX_context_slave; //---------- @@ -20,13 +26,22 @@ VL_MODULE(VVortex) { // CELLS // Public to allow access to /*verilator_public*/ items; // otherwise the application code can consider these internals. - VVortex_VX_context_slave* __PVT__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one; - VVortex_VX_context_slave* __PVT__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one; - VVortex_VX_context_slave* __PVT__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one; - VVortex_VX_context_slave* __PVT__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one; - VVortex_VX_context_slave* __PVT__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one; - VVortex_VX_context_slave* __PVT__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one; - VVortex_VX_context_slave* __PVT__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one; + VVortex_VX_inst_meta_inter* __PVT__Vortex__DOT__fe_inst_meta_fd; + VVortex_VX_inst_meta_inter* __PVT__Vortex__DOT__fd_inst_meta_de; + VVortex_VX_frE_to_bckE_req_inter* __PVT__Vortex__DOT__VX_frE_to_bckE_req; + VVortex_VX_frE_to_bckE_req_inter* __PVT__Vortex__DOT__VX_bckE_req; + VVortex_VX_mem_req_inter* __PVT__Vortex__DOT__VX_exe_mem_req; + VVortex_VX_mem_req_inter* __PVT__Vortex__DOT__VX_mem_req; + VVortex_VX_inst_mem_wb_inter* __PVT__Vortex__DOT__VX_mem_wb; + VVortex_VX_warp_ctl_inter* __PVT__Vortex__DOT__VX_warp_ctl; + VVortex_VX_wb_inter* __PVT__Vortex__DOT__VX_writeback_inter; + VVortex_VX_context_slave* __PVT__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one; + VVortex_VX_context_slave* __PVT__Vortex__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__VX_Context_one; + VVortex_VX_context_slave* __PVT__Vortex__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__VX_Context_one; + VVortex_VX_context_slave* __PVT__Vortex__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__VX_Context_one; + VVortex_VX_context_slave* __PVT__Vortex__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__VX_Context_one; + VVortex_VX_context_slave* __PVT__Vortex__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__VX_Context_one; + VVortex_VX_context_slave* __PVT__Vortex__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one; // PORTS // The application code writes and reads these signals to @@ -50,11 +65,7 @@ VL_MODULE(VVortex) { struct { // Begin mtask footprint all: VL_SIG8(Vortex__DOT__decode_branch_stall,0,0); - VL_SIG8(Vortex__DOT__decode_branch_type,2,0); - VL_SIG8(Vortex__DOT__decode_jal,0,0); - VL_SIG8(Vortex__DOT__decode_change_mask,0,0); VL_SIG8(Vortex__DOT__execute_branch_stall,0,0); - VL_SIG8(Vortex__DOT__memory_branch_dir,0,0); VL_SIG8(Vortex__DOT__forwarding_fwd_stall,0,0); VL_SIG8(Vortex__DOT__forwarding_src1_fwd,0,0); VL_SIG8(Vortex__DOT__forwarding_src2_fwd,0,0); @@ -64,23 +75,22 @@ VL_MODULE(VVortex) { VL_SIG8(Vortex__DOT__vx_fetch__DOT__warp_count,3,0); VL_SIG8(Vortex__DOT__vx_fetch__DOT__add_warp,0,0); VL_SIG8(Vortex__DOT__vx_fetch__DOT__remove_warp,0,0); - VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk1__BRA__0__KET____DOT__warp_zero_change_mask,0,0); - VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk1__BRA__0__KET____DOT__warp_zero_stall,0,0); - VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk1__BRA__1__KET____DOT__warp_zero_change_mask,0,0); - VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk1__BRA__1__KET____DOT__warp_zero_stall,0,0); - VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk1__BRA__2__KET____DOT__warp_zero_change_mask,0,0); - VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk1__BRA__2__KET____DOT__warp_zero_stall,0,0); - VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk1__BRA__3__KET____DOT__warp_zero_change_mask,0,0); - VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk1__BRA__3__KET____DOT__warp_zero_stall,0,0); - VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk1__BRA__4__KET____DOT__warp_zero_change_mask,0,0); - VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk1__BRA__4__KET____DOT__warp_zero_stall,0,0); - VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk1__BRA__5__KET____DOT__warp_zero_change_mask,0,0); - VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk1__BRA__5__KET____DOT__warp_zero_stall,0,0); - VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk1__BRA__6__KET____DOT__warp_zero_change_mask,0,0); - VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk1__BRA__6__KET____DOT__warp_zero_stall,0,0); - VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk1__BRA__7__KET____DOT__warp_zero_change_mask,0,0); - VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk1__BRA__7__KET____DOT__warp_zero_stall,0,0); - VL_SIG8(Vortex__DOT__vx_f_d_reg__DOT__warp_num,3,0); + VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__warp_zero_change_mask,0,0); + VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__warp_zero_stall,0,0); + VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__warp_zero_change_mask,0,0); + VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__warp_zero_stall,0,0); + VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__warp_zero_change_mask,0,0); + VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__warp_zero_stall,0,0); + VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__warp_zero_change_mask,0,0); + VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__warp_zero_stall,0,0); + VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__warp_zero_change_mask,0,0); + VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__warp_zero_stall,0,0); + VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__warp_zero_change_mask,0,0); + VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__warp_zero_stall,0,0); + VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__warp_zero_change_mask,0,0); + VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__warp_zero_stall,0,0); + VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__warp_zero_change_mask,0,0); + VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__warp_zero_stall,0,0); VL_SIG8(Vortex__DOT__vx_decode__DOT__is_itype,0,0); VL_SIG8(Vortex__DOT__vx_decode__DOT__is_csr,0,0); VL_SIG8(Vortex__DOT__vx_decode__DOT__is_clone,0,0); @@ -89,346 +99,160 @@ VL_MODULE(VVortex) { VL_SIG8(Vortex__DOT__vx_decode__DOT__is_wspawn,0,0); VL_SIG8(Vortex__DOT__vx_decode__DOT__jal_sys_jal,0,0); VL_SIG8(Vortex__DOT__vx_decode__DOT__mul_alu,4,0); + VL_SIG8(Vortex__DOT__vx_decode__DOT__glob_clone_stall,7,0); VL_SIG8(Vortex__DOT__vx_decode__DOT__real_zero_isclone,0,0); VL_SIG8(Vortex__DOT__vx_decode__DOT__temp_out_clone_stall,0,0); + VL_SIG8(Vortex__DOT__vx_decode__DOT__jalrs_thread_mask,3,0); + VL_SIG8(Vortex__DOT__vx_decode__DOT__jmprt_thread_mask,3,0); VL_SIG8(Vortex__DOT__vx_decode__DOT__is_ebreak,0,0); VL_SIG8(Vortex__DOT__vx_decode__DOT__temp_final_alu,4,0); - VL_SIG8(Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__real_wspawn,0,0); - VL_SIG8(Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__real_isclone,0,0); - VL_SIG8(Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__real_wspawn,0,0); - VL_SIG8(Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__real_isclone,0,0); - VL_SIG8(Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__real_wspawn,0,0); - VL_SIG8(Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__real_isclone,0,0); - VL_SIG8(Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__real_wspawn,0,0); - VL_SIG8(Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__real_isclone,0,0); - VL_SIG8(Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__real_wspawn,0,0); - VL_SIG8(Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__real_isclone,0,0); - VL_SIG8(Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__real_wspawn,0,0); - VL_SIG8(Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__real_isclone,0,0); - VL_SIG8(Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__real_wspawn,0,0); - VL_SIG8(Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__real_isclone,0,0); + VL_SIG8(Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__real_wspawn,0,0); + VL_SIG8(Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__real_isclone,0,0); + VL_SIG8(Vortex__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__real_wspawn,0,0); + VL_SIG8(Vortex__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__real_isclone,0,0); + VL_SIG8(Vortex__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__real_wspawn,0,0); + VL_SIG8(Vortex__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__real_isclone,0,0); + VL_SIG8(Vortex__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__real_wspawn,0,0); + VL_SIG8(Vortex__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__real_isclone,0,0); + VL_SIG8(Vortex__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__real_wspawn,0,0); + VL_SIG8(Vortex__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__real_isclone,0,0); + VL_SIG8(Vortex__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__real_wspawn,0,0); + VL_SIG8(Vortex__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__real_isclone,0,0); + VL_SIG8(Vortex__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__real_wspawn,0,0); + VL_SIG8(Vortex__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__real_isclone,0,0); VL_SIG8(Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__state_stall,5,0); - VL_SIG8(Vortex__DOT__vx_d_e_reg__DOT__rd,4,0); - VL_SIG8(Vortex__DOT__vx_d_e_reg__DOT__alu_op,4,0); - VL_SIG8(Vortex__DOT__vx_d_e_reg__DOT__wb,1,0); - VL_SIG8(Vortex__DOT__vx_d_e_reg__DOT__rs2_src,0,0); - VL_SIG8(Vortex__DOT__vx_d_e_reg__DOT__mem_read,2,0); - }; - struct { - VL_SIG8(Vortex__DOT__vx_d_e_reg__DOT__mem_write,2,0); - VL_SIG8(Vortex__DOT__vx_d_e_reg__DOT__branch_type,2,0); - VL_SIG8(Vortex__DOT__vx_d_e_reg__DOT__is_csr,0,0); - VL_SIG8(Vortex__DOT__vx_d_e_reg__DOT__jal,0,0); - VL_SIG8(Vortex__DOT__vx_d_e_reg__DOT__warp_num,3,0); - VL_SIG8(Vortex__DOT__vx_d_e_reg__DOT__stalling,0,0); - VL_SIG8(Vortex__DOT__vx_e_m_reg__DOT__rd,4,0); - VL_SIG8(Vortex__DOT__vx_e_m_reg__DOT__wb,1,0); - VL_SIG8(Vortex__DOT__vx_e_m_reg__DOT__mem_read,2,0); - VL_SIG8(Vortex__DOT__vx_e_m_reg__DOT__mem_write,2,0); - VL_SIG8(Vortex__DOT__vx_e_m_reg__DOT__is_csr,0,0); - VL_SIG8(Vortex__DOT__vx_e_m_reg__DOT__branch_type,2,0); - VL_SIG8(Vortex__DOT__vx_e_m_reg__DOT__jal,0,0); - VL_SIG8(Vortex__DOT__vx_e_m_reg__DOT__warp_num,3,0); - VL_SIG8(Vortex__DOT__vx_m_w_reg__DOT__rd,4,0); - VL_SIG8(Vortex__DOT__vx_m_w_reg__DOT__wb,1,0); - VL_SIG8(Vortex__DOT__vx_m_w_reg__DOT__warp_num,3,0); + VL_SIG8(Vortex__DOT__vx_memory__DOT__temp_branch_dir,0,0); VL_SIG8(Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd,0,0); VL_SIG8(Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd,0,0); VL_SIG8(Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd,0,0); VL_SIG8(Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd,0,0); VL_SIG8(Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd,0,0); VL_SIG8(Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd,0,0); - VL_SIG16(Vortex__DOT__decode_csr_address,11,0); + }; + struct { VL_SIG16(Vortex__DOT__vx_decode__DOT__alu_tempp,11,0); - VL_SIG16(Vortex__DOT__vx_d_e_reg__DOT__csr_address,11,0); - VL_SIG16(Vortex__DOT__vx_e_m_reg__DOT__csr_address,11,0); VL_SIG16(Vortex__DOT__vx_csr_handler__DOT__decode_csr_address,11,0); - VL_SIG(Vortex__DOT__decode_itype_immed,31,0); - VL_SIG(Vortex__DOT__decode_jal_offset,31,0); VL_SIG(Vortex__DOT__memory_branch_dest,31,0); VL_SIG(Vortex__DOT__csr_decode_csr_data,31,0); VL_SIG(Vortex__DOT__vx_fetch__DOT__out_PC_var,31,0); - VL_SIG(Vortex__DOT__vx_fetch__DOT__genblk1__BRA__0__KET____DOT__VX_Warp__DOT__real_PC,31,0); - VL_SIG(Vortex__DOT__vx_fetch__DOT__genblk1__BRA__0__KET____DOT__VX_Warp__DOT__temp_PC,31,0); - VL_SIG(Vortex__DOT__vx_fetch__DOT__genblk1__BRA__1__KET____DOT__VX_Warp__DOT__real_PC,31,0); - VL_SIG(Vortex__DOT__vx_fetch__DOT__genblk1__BRA__1__KET____DOT__VX_Warp__DOT__temp_PC,31,0); - VL_SIG(Vortex__DOT__vx_fetch__DOT__genblk1__BRA__2__KET____DOT__VX_Warp__DOT__real_PC,31,0); - VL_SIG(Vortex__DOT__vx_fetch__DOT__genblk1__BRA__2__KET____DOT__VX_Warp__DOT__temp_PC,31,0); - VL_SIG(Vortex__DOT__vx_fetch__DOT__genblk1__BRA__3__KET____DOT__VX_Warp__DOT__real_PC,31,0); - VL_SIG(Vortex__DOT__vx_fetch__DOT__genblk1__BRA__3__KET____DOT__VX_Warp__DOT__temp_PC,31,0); - VL_SIG(Vortex__DOT__vx_fetch__DOT__genblk1__BRA__4__KET____DOT__VX_Warp__DOT__real_PC,31,0); - VL_SIG(Vortex__DOT__vx_fetch__DOT__genblk1__BRA__4__KET____DOT__VX_Warp__DOT__temp_PC,31,0); - VL_SIG(Vortex__DOT__vx_fetch__DOT__genblk1__BRA__5__KET____DOT__VX_Warp__DOT__real_PC,31,0); - VL_SIG(Vortex__DOT__vx_fetch__DOT__genblk1__BRA__5__KET____DOT__VX_Warp__DOT__temp_PC,31,0); - VL_SIG(Vortex__DOT__vx_fetch__DOT__genblk1__BRA__6__KET____DOT__VX_Warp__DOT__real_PC,31,0); - VL_SIG(Vortex__DOT__vx_fetch__DOT__genblk1__BRA__6__KET____DOT__VX_Warp__DOT__temp_PC,31,0); - VL_SIG(Vortex__DOT__vx_fetch__DOT__genblk1__BRA__7__KET____DOT__VX_Warp__DOT__real_PC,31,0); - VL_SIG(Vortex__DOT__vx_fetch__DOT__genblk1__BRA__7__KET____DOT__VX_Warp__DOT__temp_PC,31,0); - VL_SIG(Vortex__DOT__vx_f_d_reg__DOT__instruction,31,0); - VL_SIG(Vortex__DOT__vx_f_d_reg__DOT__curr_PC,31,0); - VL_SIG(Vortex__DOT__vx_d_e_reg__DOT__PC_next_out,31,0); - VL_SIG(Vortex__DOT__vx_d_e_reg__DOT__itype_immed,31,0); - VL_SIG(Vortex__DOT__vx_d_e_reg__DOT__upper_immed,19,0); - VL_SIG(Vortex__DOT__vx_d_e_reg__DOT__csr_mask,31,0); - VL_SIG(Vortex__DOT__vx_d_e_reg__DOT__curr_PC,31,0); - VL_SIG(Vortex__DOT__vx_d_e_reg__DOT__jal_offset,31,0); + VL_SIG(Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__VX_Warp__DOT__real_PC,31,0); + VL_SIG(Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__VX_Warp__DOT__temp_PC,31,0); + VL_SIG(Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__real_PC,31,0); + VL_SIG(Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__temp_PC,31,0); + VL_SIG(Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__real_PC,31,0); + VL_SIG(Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__temp_PC,31,0); + VL_SIG(Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__real_PC,31,0); + VL_SIG(Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__temp_PC,31,0); + VL_SIG(Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__real_PC,31,0); + VL_SIG(Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__temp_PC,31,0); + VL_SIG(Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__real_PC,31,0); + VL_SIG(Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__temp_PC,31,0); + VL_SIG(Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__real_PC,31,0); + VL_SIG(Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__temp_PC,31,0); + VL_SIG(Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__real_PC,31,0); + VL_SIG(Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__temp_PC,31,0); + VL_SIGW(Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value,71,0,3); + VL_SIGW(Vortex__DOT__vx_decode__DOT__glob_a_reg_data,1023,0,32); + VL_SIGW(Vortex__DOT__vx_decode__DOT__glob_b_reg_data,1023,0,32); + VL_SIGW(Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data,127,0,4); + VL_SIGW(Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data,127,0,4); + VL_SIGW(Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd1_register,127,0,4); + VL_SIGW(Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd2_register,127,0,4); + VL_SIGW(Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers,1023,0,32); + VL_SIGW(Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers,1023,0,32); + VL_SIGW(Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers,1023,0,32); + VL_SIGW(Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers,1023,0,32); + VL_SIGW(Vortex__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value,489,0,16); VL_SIG(Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2,31,0); VL_SIG(Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2,31,0); VL_SIG(Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2,31,0); VL_SIG(Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2,31,0); - VL_SIG(Vortex__DOT__vx_e_m_reg__DOT__PC_next,31,0); - VL_SIG(Vortex__DOT__vx_e_m_reg__DOT__csr_result,31,0); - VL_SIG(Vortex__DOT__vx_e_m_reg__DOT__curr_PC,31,0); - }; - struct { - VL_SIG(Vortex__DOT__vx_e_m_reg__DOT__branch_offset,31,0); - VL_SIG(Vortex__DOT__vx_e_m_reg__DOT__jal_dest,31,0); - VL_SIG(Vortex__DOT__vx_m_w_reg__DOT__PC_next,31,0); + VL_SIGW(Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value,719,0,23); + VL_SIGW(Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value,312,0,10); + VL_SIGW(Vortex__DOT__vx_writeback__DOT__out_pc_data,127,0,4); + VL_SIGW(Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next,127,0,4); + VL_SIGW(Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next,127,0,4); + VL_SIGW(Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next,127,0,4); VL_SIG64(Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__mult_signed_result,63,0); VL_SIG64(Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__mult_signed_result,63,0); VL_SIG64(Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__mult_signed_result,63,0); VL_SIG64(Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__mult_signed_result,63,0); VL_SIG64(Vortex__DOT__vx_csr_handler__DOT__cycle,63,0); VL_SIG64(Vortex__DOT__vx_csr_handler__DOT__instret,63,0); - VL_SIG8(Vortex__DOT__fetch_valid[4],0,0); - VL_SIG8(Vortex__DOT__f_d_valid[4],0,0); - VL_SIG(Vortex__DOT__decode_a_reg_data[4],31,0); - VL_SIG(Vortex__DOT__decode_b_reg_data[4],31,0); - VL_SIG8(Vortex__DOT__decode_valid[4],0,0); - VL_SIG8(Vortex__DOT__decode_thread_mask[4],0,0); - VL_SIG(Vortex__DOT__d_e_a_reg_data[4],31,0); - VL_SIG(Vortex__DOT__d_e_b_reg_data[4],31,0); - VL_SIG8(Vortex__DOT__d_e_valid[4],0,0); - VL_SIG(Vortex__DOT__execute_alu_result[4],31,0); - VL_SIG(Vortex__DOT__execute_b_reg_data[4],31,0); - VL_SIG8(Vortex__DOT__execute_valid[4],0,0); - VL_SIG(Vortex__DOT__e_m_alu_result[4],31,0); - VL_SIG(Vortex__DOT__e_m_b_reg_data[4],31,0); - VL_SIG8(Vortex__DOT__e_m_valid[4],0,0); - VL_SIG(Vortex__DOT__memory_alu_result[4],31,0); - VL_SIG(Vortex__DOT__memory_mem_result[4],31,0); - VL_SIG8(Vortex__DOT__memory_valid[4],0,0); - VL_SIG(Vortex__DOT__m_w_alu_result[4],31,0); - VL_SIG(Vortex__DOT__m_w_mem_result[4],31,0); - VL_SIG8(Vortex__DOT__m_w_valid[4],0,0); - VL_SIG(Vortex__DOT__writeback_write_data[4],31,0); - VL_SIG(Vortex__DOT__forwarding_src1_fwd_data[4],31,0); - VL_SIG(Vortex__DOT__forwarding_src2_fwd_data[4],31,0); + VL_SIG8(Vortex__DOT__vx_fetch__DOT__in_thread_mask[4],0,0); VL_SIG(Vortex__DOT__vx_fetch__DOT__warp_glob_pc[8],31,0); VL_SIG8(Vortex__DOT__vx_fetch__DOT__warp_glob_valid[8][4],0,0); VL_SIG8(Vortex__DOT__vx_fetch__DOT__out_valid_var[4],0,0); - VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk1__BRA__0__KET____DOT__VX_Warp__DOT__valid[4],0,0); - VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk1__BRA__0__KET____DOT__VX_Warp__DOT__valid_zero[4],0,0); - VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk1__BRA__1__KET____DOT__VX_Warp__DOT__valid[4],0,0); - VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk1__BRA__1__KET____DOT__VX_Warp__DOT__valid_zero[4],0,0); - VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk1__BRA__2__KET____DOT__VX_Warp__DOT__valid[4],0,0); - VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk1__BRA__2__KET____DOT__VX_Warp__DOT__valid_zero[4],0,0); - VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk1__BRA__3__KET____DOT__VX_Warp__DOT__valid[4],0,0); - VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk1__BRA__3__KET____DOT__VX_Warp__DOT__valid_zero[4],0,0); - VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk1__BRA__4__KET____DOT__VX_Warp__DOT__valid[4],0,0); - VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk1__BRA__4__KET____DOT__VX_Warp__DOT__valid_zero[4],0,0); - VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk1__BRA__5__KET____DOT__VX_Warp__DOT__valid[4],0,0); - VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk1__BRA__5__KET____DOT__VX_Warp__DOT__valid_zero[4],0,0); - VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk1__BRA__6__KET____DOT__VX_Warp__DOT__valid[4],0,0); - VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk1__BRA__6__KET____DOT__VX_Warp__DOT__valid_zero[4],0,0); - VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk1__BRA__7__KET____DOT__VX_Warp__DOT__valid[4],0,0); - VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk1__BRA__7__KET____DOT__VX_Warp__DOT__valid_zero[4],0,0); - VL_SIG8(Vortex__DOT__vx_f_d_reg__DOT__valid[4],0,0); - VL_SIG(Vortex__DOT__vx_decode__DOT__w0_t0_registers[32],31,0); - VL_SIG(Vortex__DOT__vx_decode__DOT__glob_a_reg_data[8][4],31,0); - VL_SIG(Vortex__DOT__vx_decode__DOT__glob_b_reg_data[8][4],31,0); - VL_SIG8(Vortex__DOT__vx_decode__DOT__glob_clone_stall[8],0,0); - VL_SIG(Vortex__DOT__vx_decode__DOT__temp_out_a_reg_data[4],31,0); - VL_SIG(Vortex__DOT__vx_decode__DOT__temp_out_b_reg_data[4],31,0); - VL_SIG8(Vortex__DOT__vx_decode__DOT__jalrs_thread_mask[4],0,0); - VL_SIG8(Vortex__DOT__vx_decode__DOT__jmprt_thread_mask[4],0,0); - VL_SIG(Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd1_register[4],31,0); - VL_SIG(Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd2_register[4],31,0); - VL_SIG(Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__clone_regsiters[32],31,0); + VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__VX_Warp__DOT__valid[4],0,0); + VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__VX_Warp__DOT__valid_zero[4],0,0); + VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__valid[4],0,0); + VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__valid_zero[4],0,0); + VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__valid[4],0,0); + VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__valid_zero[4],0,0); + VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__valid[4],0,0); + VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__valid_zero[4],0,0); + VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__valid[4],0,0); + VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__valid_zero[4],0,0); + VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__valid[4],0,0); }; struct { - VL_SIG(Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[32],31,0); - VL_SIG(Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[32],31,0); - VL_SIG(Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[32],31,0); - VL_SIG(Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[32],31,0); - VL_SIG(Vortex__DOT__vx_d_e_reg__DOT__a_reg_data[4],31,0); - VL_SIG(Vortex__DOT__vx_d_e_reg__DOT__b_reg_data[4],31,0); - VL_SIG8(Vortex__DOT__vx_d_e_reg__DOT__valid[4],0,0); - VL_SIG(Vortex__DOT__vx_d_e_reg__DOT__reg_data_z[4],31,0); - VL_SIG8(Vortex__DOT__vx_d_e_reg__DOT__valid_z[4],0,0); - VL_SIG(Vortex__DOT__vx_e_m_reg__DOT__alu_result[4],31,0); - VL_SIG(Vortex__DOT__vx_e_m_reg__DOT__a_reg_data[4],31,0); - VL_SIG(Vortex__DOT__vx_e_m_reg__DOT__b_reg_data[4],31,0); - VL_SIG8(Vortex__DOT__vx_e_m_reg__DOT__valid[4],0,0); - VL_SIG(Vortex__DOT__vx_m_w_reg__DOT__alu_result[4],31,0); - VL_SIG(Vortex__DOT__vx_m_w_reg__DOT__mem_result[4],31,0); - VL_SIG8(Vortex__DOT__vx_m_w_reg__DOT__valid[4],0,0); - VL_SIG(Vortex__DOT__vx_writeback__DOT__out_pc_data[4],31,0); - VL_SIG(Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[4],31,0); - VL_SIG(Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[4],31,0); - VL_SIG(Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[4],31,0); + VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__valid_zero[4],0,0); + VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__valid[4],0,0); + VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__valid_zero[4],0,0); + VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__valid[4],0,0); + VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__valid_zero[4],0,0); + VL_SIG8(Vortex__DOT__vx_decode__DOT__in_valid[4],0,0); VL_SIG16(Vortex__DOT__vx_csr_handler__DOT__csr[1025],11,0); }; // LOCAL VARIABLES // Internals; generally not touched by application code - // Anonymous structures to workaround compiler member-count bugs - struct { - // Begin mtask footprint all: - VL_SIG8(__Vtableidx1,2,0); - VL_SIG8(__Vclklast__TOP__clk,0,0); - VL_SIG8(__Vclklast__TOP__reset,0,0); - VL_SIG16(Vortex__DOT__vx_csr_handler__DOT____Vlvbound1,11,0); - VL_SIG(Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_src2_data,31,0); - VL_SIG(Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_src1_data,31,0); - VL_SIG(Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src2_data,31,0); - VL_SIG(Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src1_data,31,0); - VL_SIG(Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__out_src2_data,31,0); - VL_SIG(Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__out_src1_data,31,0); - VL_SIG(Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__out_src2_data,31,0); - VL_SIG(Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__out_src1_data,31,0); - VL_SIG(Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__0__KET____DOT__vx_alu__out_alu_result,31,0); - VL_SIG(Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__1__KET____DOT__vx_alu__out_alu_result,31,0); - VL_SIG(Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__2__KET____DOT__vx_alu__out_alu_result,31,0); - VL_SIG(Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__3__KET____DOT__vx_alu__out_alu_result,31,0); - VL_SIG8(Vortex__DOT____Vcellout__vx_fetch__out_valid[4],0,0); - VL_SIG8(Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask[4],0,0); - VL_SIG8(Vortex__DOT____Vcellout__vx_f_d_reg__out_valid[4],0,0); - VL_SIG8(Vortex__DOT____Vcellinp__vx_f_d_reg__in_valid[4],0,0); - VL_SIG8(Vortex__DOT____Vcellout__vx_decode__out_thread_mask[4],0,0); - VL_SIG8(Vortex__DOT____Vcellout__vx_decode__out_valid[4],0,0); - VL_SIG(Vortex__DOT____Vcellout__vx_decode__out_b_reg_data[4],31,0); - VL_SIG(Vortex__DOT____Vcellout__vx_decode__out_a_reg_data[4],31,0); - VL_SIG(Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data[4],31,0); - VL_SIG(Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data[4],31,0); - VL_SIG8(Vortex__DOT____Vcellinp__vx_decode__in_wb_valid[4],0,0); - VL_SIG(Vortex__DOT____Vcellinp__vx_decode__in_write_data[4],31,0); - VL_SIG8(Vortex__DOT____Vcellinp__vx_decode__in_valid[4],0,0); - VL_SIG8(Vortex__DOT____Vcellout__vx_d_e_reg__out_valid[4],0,0); - VL_SIG(Vortex__DOT____Vcellout__vx_d_e_reg__out_b_reg_data[4],31,0); - VL_SIG(Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data[4],31,0); - VL_SIG8(Vortex__DOT____Vcellinp__vx_d_e_reg__in_valid[4],0,0); - VL_SIG(Vortex__DOT____Vcellinp__vx_d_e_reg__in_b_reg_data[4],31,0); - VL_SIG(Vortex__DOT____Vcellinp__vx_d_e_reg__in_a_reg_data[4],31,0); - VL_SIG8(Vortex__DOT____Vcellout__vx_execute__out_valid[4],0,0); - VL_SIG(Vortex__DOT____Vcellout__vx_execute__out_b_reg_data[4],31,0); - VL_SIG(Vortex__DOT____Vcellout__vx_execute__out_alu_result[4],31,0); - VL_SIG8(Vortex__DOT____Vcellinp__vx_execute__in_valid[4],0,0); - VL_SIG(Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data[4],31,0); - VL_SIG(Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data[4],31,0); - VL_SIG8(Vortex__DOT____Vcellout__vx_e_m_reg__out_valid[4],0,0); - VL_SIG(Vortex__DOT____Vcellout__vx_e_m_reg__out_b_reg_data[4],31,0); - VL_SIG(Vortex__DOT____Vcellout__vx_e_m_reg__out_alu_result[4],31,0); - VL_SIG8(Vortex__DOT____Vcellinp__vx_e_m_reg__in_valid[4],0,0); - VL_SIG(Vortex__DOT____Vcellinp__vx_e_m_reg__in_b_reg_data[4],31,0); - VL_SIG(Vortex__DOT____Vcellinp__vx_e_m_reg__in_alu_result[4],31,0); - VL_SIG8(Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid[4],0,0); - VL_SIG(Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data[4],31,0); - VL_SIG(Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address[4],31,0); - VL_SIG8(Vortex__DOT____Vcellout__vx_memory__out_valid[4],0,0); - VL_SIG(Vortex__DOT____Vcellout__vx_memory__out_mem_result[4],31,0); - VL_SIG(Vortex__DOT____Vcellout__vx_memory__out_alu_result[4],31,0); - VL_SIG(Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data[4],31,0); - VL_SIG8(Vortex__DOT____Vcellinp__vx_memory__in_valid[4],0,0); - VL_SIG(Vortex__DOT____Vcellinp__vx_memory__in_rd2[4],31,0); - VL_SIG(Vortex__DOT____Vcellinp__vx_memory__in_alu_result[4],31,0); - VL_SIG8(Vortex__DOT____Vcellout__vx_m_w_reg__out_valid[4],0,0); - VL_SIG(Vortex__DOT____Vcellout__vx_m_w_reg__out_mem_result[4],31,0); - VL_SIG(Vortex__DOT____Vcellout__vx_m_w_reg__out_alu_result[4],31,0); - VL_SIG8(Vortex__DOT____Vcellinp__vx_m_w_reg__in_valid[4],0,0); - VL_SIG(Vortex__DOT____Vcellinp__vx_m_w_reg__in_mem_result[4],31,0); - VL_SIG(Vortex__DOT____Vcellinp__vx_m_w_reg__in_alu_result[4],31,0); - VL_SIG(Vortex__DOT____Vcellout__vx_writeback__out_write_data[4],31,0); - }; - struct { - VL_SIG(Vortex__DOT____Vcellinp__vx_writeback__in_mem_result[4],31,0); - VL_SIG(Vortex__DOT____Vcellinp__vx_writeback__in_alu_result[4],31,0); - VL_SIG(Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data[4],31,0); - VL_SIG(Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data[4],31,0); - VL_SIG(Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data[4],31,0); - VL_SIG(Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result[4],31,0); - VL_SIG(Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data[4],31,0); - VL_SIG(Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result[4],31,0); - VL_SIG(Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result[4],31,0); - VL_SIG8(Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__0__KET____DOT__VX_Warp__out_valid[4],0,0); - VL_SIG8(Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__0__KET____DOT__VX_Warp__in_thread_mask[4],0,0); - VL_SIG8(Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__1__KET____DOT__VX_Warp__out_valid[4],0,0); - VL_SIG8(Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Warp__in_thread_mask[4],0,0); - VL_SIG8(Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__2__KET____DOT__VX_Warp__out_valid[4],0,0); - VL_SIG8(Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Warp__in_thread_mask[4],0,0); - VL_SIG8(Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__3__KET____DOT__VX_Warp__out_valid[4],0,0); - VL_SIG8(Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Warp__in_thread_mask[4],0,0); - VL_SIG8(Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__4__KET____DOT__VX_Warp__out_valid[4],0,0); - VL_SIG8(Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Warp__in_thread_mask[4],0,0); - VL_SIG8(Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__5__KET____DOT__VX_Warp__out_valid[4],0,0); - VL_SIG8(Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Warp__in_thread_mask[4],0,0); - VL_SIG8(Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__6__KET____DOT__VX_Warp__out_valid[4],0,0); - VL_SIG8(Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Warp__in_thread_mask[4],0,0); - VL_SIG8(Vortex__DOT__vx_fetch__DOT____Vcellout__genblk1__BRA__7__KET____DOT__VX_Warp__out_valid[4],0,0); - VL_SIG8(Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Warp__in_thread_mask[4],0,0); - VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__w0_t0_registers[32],31,0); - VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_b_reg_data[4],31,0); - VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_a_reg_data[4],31,0); - VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_write_data[4],31,0); - VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_src2_fwd_data[4],31,0); - VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_src1_fwd_data[4],31,0); - VL_SIG8(Vortex__DOT__vx_decode__DOT____Vcellinp__VX_Context_zero__in_valid[4],0,0); - VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__1__KET____DOT__VX_Context_one__out_b_reg_data[4],31,0); - VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__1__KET____DOT__VX_Context_one__out_a_reg_data[4],31,0); - VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_wspawn_regs[32],31,0); - VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_write_data[4],31,0); - VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_src2_fwd_data[4],31,0); - VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_src1_fwd_data[4],31,0); - VL_SIG8(Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__1__KET____DOT__VX_Context_one__in_valid[4],0,0); - VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__2__KET____DOT__VX_Context_one__out_b_reg_data[4],31,0); - VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__2__KET____DOT__VX_Context_one__out_a_reg_data[4],31,0); - VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_wspawn_regs[32],31,0); - VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_write_data[4],31,0); - VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_src2_fwd_data[4],31,0); - VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_src1_fwd_data[4],31,0); - VL_SIG8(Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__2__KET____DOT__VX_Context_one__in_valid[4],0,0); - VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__3__KET____DOT__VX_Context_one__out_b_reg_data[4],31,0); - VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__3__KET____DOT__VX_Context_one__out_a_reg_data[4],31,0); - VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_wspawn_regs[32],31,0); - VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_write_data[4],31,0); - VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_src2_fwd_data[4],31,0); - VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_src1_fwd_data[4],31,0); - VL_SIG8(Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__3__KET____DOT__VX_Context_one__in_valid[4],0,0); - VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__4__KET____DOT__VX_Context_one__out_b_reg_data[4],31,0); - VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__4__KET____DOT__VX_Context_one__out_a_reg_data[4],31,0); - VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_wspawn_regs[32],31,0); - VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_write_data[4],31,0); - VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_src2_fwd_data[4],31,0); - VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_src1_fwd_data[4],31,0); - VL_SIG8(Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__4__KET____DOT__VX_Context_one__in_valid[4],0,0); - VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__5__KET____DOT__VX_Context_one__out_b_reg_data[4],31,0); - VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__5__KET____DOT__VX_Context_one__out_a_reg_data[4],31,0); - VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_wspawn_regs[32],31,0); - VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_write_data[4],31,0); - }; - struct { - VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_src2_fwd_data[4],31,0); - VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_src1_fwd_data[4],31,0); - VL_SIG8(Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__5__KET____DOT__VX_Context_one__in_valid[4],0,0); - VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__6__KET____DOT__VX_Context_one__out_b_reg_data[4],31,0); - VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__6__KET____DOT__VX_Context_one__out_a_reg_data[4],31,0); - VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_wspawn_regs[32],31,0); - VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_write_data[4],31,0); - VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_src2_fwd_data[4],31,0); - VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_src1_fwd_data[4],31,0); - VL_SIG8(Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__6__KET____DOT__VX_Context_one__in_valid[4],0,0); - VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__7__KET____DOT__VX_Context_one__out_b_reg_data[4],31,0); - VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellout__genblk1__BRA__7__KET____DOT__VX_Context_one__out_a_reg_data[4],31,0); - VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_wspawn_regs[32],31,0); - VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_write_data[4],31,0); - VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_src2_fwd_data[4],31,0); - VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_src1_fwd_data[4],31,0); - VL_SIG8(Vortex__DOT__vx_decode__DOT____Vcellinp__genblk1__BRA__7__KET____DOT__VX_Context_one__in_valid[4],0,0); - VL_SIG(Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_regs[32],31,0); - VL_SIG(Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[32],31,0); - VL_SIG(Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[32],31,0); - VL_SIG(Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[32],31,0); - }; + // Begin mtask footprint all: + VL_SIG8(__Vtableidx1,2,0); + VL_SIG8(__Vdly__Vortex__DOT__vx_fetch__DOT__warp_num,3,0); + VL_SIG8(__Vclklast__TOP__clk,0,0); + VL_SIG8(__Vclklast__TOP__reset,0,0); + VL_SIG16(Vortex__DOT__vx_csr_handler__DOT____Vlvbound1,11,0); + VL_SIGW(Vortex__DOT____Vcellout__vx_execute__out_b_reg_data,127,0,4); + VL_SIGW(Vortex__DOT____Vcellout__vx_execute__out_a_reg_data,127,0,4); + VL_SIGW(Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data,127,0,4); + VL_SIGW(Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data,127,0,4); + VL_SIGW(Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_b_reg_data,127,0,4); + VL_SIGW(Vortex__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_a_reg_data,127,0,4); + VL_SIG(Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_src2_data,31,0); + VL_SIG(Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_src1_data,31,0); + VL_SIG(Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src2_data,31,0); + VL_SIG(Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src1_data,31,0); + VL_SIG(Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__out_src2_data,31,0); + VL_SIG(Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__out_src1_data,31,0); + VL_SIG(Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__out_src2_data,31,0); + VL_SIG(Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__out_src1_data,31,0); + VL_SIGW(Vortex__DOT__vx_d_e_reg__DOT____Vcellinp__d_e_reg__in,489,0,16); + VL_SIG(Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__0__KET____DOT__vx_alu__out_alu_result,31,0); + VL_SIG(Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__1__KET____DOT__vx_alu__out_alu_result,31,0); + VL_SIG(Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__2__KET____DOT__vx_alu__out_alu_result,31,0); + VL_SIG(Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__3__KET____DOT__vx_alu__out_alu_result,31,0); + VL_SIGW(Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in,719,0,23); + VL_SIG8(Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid[4],0,0); + VL_SIG(Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data[4],31,0); + VL_SIG(Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address[4],31,0); + VL_SIG(Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data[4],31,0); + VL_SIG8(Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__0__KET____DOT__VX_Warp__out_valid[4],0,0); + VL_SIG8(Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__0__KET____DOT__VX_Warp__in_thread_mask[4],0,0); + VL_SIG8(Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__1__KET____DOT__VX_Warp__out_valid[4],0,0); + VL_SIG8(Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__1__KET____DOT__VX_Warp__in_thread_mask[4],0,0); + VL_SIG8(Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__2__KET____DOT__VX_Warp__out_valid[4],0,0); + VL_SIG8(Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__2__KET____DOT__VX_Warp__in_thread_mask[4],0,0); + VL_SIG8(Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__3__KET____DOT__VX_Warp__out_valid[4],0,0); + VL_SIG8(Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__3__KET____DOT__VX_Warp__in_thread_mask[4],0,0); + VL_SIG8(Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__4__KET____DOT__VX_Warp__out_valid[4],0,0); + VL_SIG8(Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__4__KET____DOT__VX_Warp__in_thread_mask[4],0,0); + VL_SIG8(Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__5__KET____DOT__VX_Warp__out_valid[4],0,0); + VL_SIG8(Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__5__KET____DOT__VX_Warp__in_thread_mask[4],0,0); + VL_SIG8(Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__6__KET____DOT__VX_Warp__out_valid[4],0,0); + VL_SIG8(Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__6__KET____DOT__VX_Warp__in_thread_mask[4],0,0); + VL_SIG8(Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__7__KET____DOT__VX_Warp__out_valid[4],0,0); + VL_SIG8(Vortex__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__7__KET____DOT__VX_Warp__in_thread_mask[4],0,0); static VL_ST_SIG8(__Vtable1_Vortex__DOT__vx_decode__DOT__mul_alu[8],4,0); // INTERNAL VARIABLES @@ -464,9 +288,10 @@ VL_MODULE(VVortex) { static QData _change_request(VVortex__Syms* __restrict vlSymsp); public: static void _combo__TOP__10(VVortex__Syms* __restrict vlSymsp); - static void _combo__TOP__8(VVortex__Syms* __restrict vlSymsp); + static void _combo__TOP__11(VVortex__Syms* __restrict vlSymsp); + static void _combo__TOP__7(VVortex__Syms* __restrict vlSymsp); private: - void _ctor_var_reset(); + void _ctor_var_reset() VL_ATTR_COLD; public: static void _eval(VVortex__Syms* __restrict vlSymsp); private: @@ -474,16 +299,16 @@ VL_MODULE(VVortex) { void _eval_debug_assertions(); #endif // VL_DEBUG public: - static void _eval_initial(VVortex__Syms* __restrict vlSymsp); - static void _eval_settle(VVortex__Syms* __restrict vlSymsp); - static void _initial__TOP__1(VVortex__Syms* __restrict vlSymsp); + static void _eval_initial(VVortex__Syms* __restrict vlSymsp) VL_ATTR_COLD; + static void _eval_settle(VVortex__Syms* __restrict vlSymsp) VL_ATTR_COLD; + static void _initial__TOP__1(VVortex__Syms* __restrict vlSymsp) VL_ATTR_COLD; static void _sequent__TOP__4(VVortex__Syms* __restrict vlSymsp); static void _sequent__TOP__5(VVortex__Syms* __restrict vlSymsp); static void _sequent__TOP__6(VVortex__Syms* __restrict vlSymsp); - static void _sequent__TOP__7(VVortex__Syms* __restrict vlSymsp); + static void _sequent__TOP__8(VVortex__Syms* __restrict vlSymsp); static void _sequent__TOP__9(VVortex__Syms* __restrict vlSymsp); - static void _settle__TOP__2(VVortex__Syms* __restrict vlSymsp); - static void _settle__TOP__3(VVortex__Syms* __restrict vlSymsp); + static void _settle__TOP__2(VVortex__Syms* __restrict vlSymsp) VL_ATTR_COLD; + static void _settle__TOP__3(VVortex__Syms* __restrict vlSymsp) VL_ATTR_COLD; } VL_ATTR_ALIGNED(128); #endif // guard diff --git a/rtl/obj_dir/VVortex.mk b/rtl/obj_dir/VVortex.mk index b75631b6..34dda91a 100644 --- a/rtl/obj_dir/VVortex.mk +++ b/rtl/obj_dir/VVortex.mk @@ -10,7 +10,7 @@ default: VVortex # Perl executable (from $PERL) PERL = perl # Path to Verilator kit (from $VERILATOR_ROOT) -VERILATOR_ROOT = /usr/local/Cellar/verilator/4.010/share/verilator +VERILATOR_ROOT = /usr/local/share/verilator # SystemC include directory with systemc.h (from $SYSTEMC_INCLUDE) SYSTEMC_INCLUDE ?= # SystemC library directory with libsystemc.a (from $SYSTEMC_LIBDIR) diff --git a/rtl/obj_dir/VVortex_VX_context_slave.cpp b/rtl/obj_dir/VVortex_VX_context_slave.cpp index e8e9c3e2..2555c0cc 100644 --- a/rtl/obj_dir/VVortex_VX_context_slave.cpp +++ b/rtl/obj_dir/VVortex_VX_context_slave.cpp @@ -29,8 +29,8 @@ VVortex_VX_context_slave::~VVortex_VX_context_slave() { //-------------------- // Internal Methods -void VVortex_VX_context_slave::_initial__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one__1(VVortex__Syms* __restrict vlSymsp) { - VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex_VX_context_slave::_initial__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one__1\n"); ); +void VVortex_VX_context_slave::_initial__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__1(VVortex__Syms* __restrict vlSymsp) { + VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex_VX_context_slave::_initial__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__1\n"); ); VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; // Body // INITIAL at VX_context_slave.v:38 @@ -40,492 +40,84 @@ void VVortex_VX_context_slave::_initial__TOP__Vortex__DOT__vx_decode__DOT__genbl this->__PVT__wspawn_state_stall = 0U; } -void VVortex_VX_context_slave::_settle__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one__8(VVortex__Syms* __restrict vlSymsp) { - VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex_VX_context_slave::_settle__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one__8\n"); ); +void VVortex_VX_context_slave::_settle__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__8(VVortex__Syms* __restrict vlSymsp) { + VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex_VX_context_slave::_settle__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__8\n"); ); VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; // Body - this->__Vcellout__vx_register_file_master__out_regs[0x1fU] - = this->__PVT__vx_register_file_master__DOT__registers - [0x1fU]; - this->__Vcellout__vx_register_file_master__out_regs[0x1eU] - = this->__PVT__vx_register_file_master__DOT__registers - [0x1eU]; - this->__Vcellout__vx_register_file_master__out_regs[0x1dU] - = this->__PVT__vx_register_file_master__DOT__registers - [0x1dU]; - this->__Vcellout__vx_register_file_master__out_regs[0x1cU] - = this->__PVT__vx_register_file_master__DOT__registers - [0x1cU]; - this->__Vcellout__vx_register_file_master__out_regs[0x1bU] - = this->__PVT__vx_register_file_master__DOT__registers - [0x1bU]; - this->__Vcellout__vx_register_file_master__out_regs[0x1aU] - = this->__PVT__vx_register_file_master__DOT__registers - [0x1aU]; - this->__Vcellout__vx_register_file_master__out_regs[0x19U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x19U]; - this->__Vcellout__vx_register_file_master__out_regs[0x18U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x18U]; - this->__Vcellout__vx_register_file_master__out_regs[0x17U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x17U]; - this->__Vcellout__vx_register_file_master__out_regs[0x16U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x16U]; - this->__Vcellout__vx_register_file_master__out_regs[0x15U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x15U]; - this->__Vcellout__vx_register_file_master__out_regs[0x14U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x14U]; - this->__Vcellout__vx_register_file_master__out_regs[0x13U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x13U]; - this->__Vcellout__vx_register_file_master__out_regs[0x12U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x12U]; - this->__Vcellout__vx_register_file_master__out_regs[0x11U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x11U]; - this->__Vcellout__vx_register_file_master__out_regs[0x10U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x10U]; - this->__Vcellout__vx_register_file_master__out_regs[0xfU] - = this->__PVT__vx_register_file_master__DOT__registers - [0xfU]; - this->__Vcellout__vx_register_file_master__out_regs[0xeU] - = this->__PVT__vx_register_file_master__DOT__registers - [0xeU]; - this->__Vcellout__vx_register_file_master__out_regs[0xdU] - = this->__PVT__vx_register_file_master__DOT__registers - [0xdU]; - this->__Vcellout__vx_register_file_master__out_regs[0xcU] - = this->__PVT__vx_register_file_master__DOT__registers - [0xcU]; - this->__Vcellout__vx_register_file_master__out_regs[0xbU] - = this->__PVT__vx_register_file_master__DOT__registers - [0xbU]; - this->__Vcellout__vx_register_file_master__out_regs[0xaU] - = this->__PVT__vx_register_file_master__DOT__registers - [0xaU]; - this->__Vcellout__vx_register_file_master__out_regs[9U] - = this->__PVT__vx_register_file_master__DOT__registers - [9U]; - this->__Vcellout__vx_register_file_master__out_regs[8U] - = this->__PVT__vx_register_file_master__DOT__registers - [8U]; - this->__Vcellout__vx_register_file_master__out_regs[7U] - = this->__PVT__vx_register_file_master__DOT__registers - [7U]; - this->__Vcellout__vx_register_file_master__out_regs[6U] - = this->__PVT__vx_register_file_master__DOT__registers - [6U]; - this->__Vcellout__vx_register_file_master__out_regs[5U] - = this->__PVT__vx_register_file_master__DOT__registers - [5U]; - this->__Vcellout__vx_register_file_master__out_regs[4U] - = this->__PVT__vx_register_file_master__DOT__registers - [4U]; - this->__Vcellout__vx_register_file_master__out_regs[3U] - = this->__PVT__vx_register_file_master__DOT__registers - [3U]; - this->__Vcellout__vx_register_file_master__out_regs[2U] - = this->__PVT__vx_register_file_master__DOT__registers - [2U]; - this->__Vcellout__vx_register_file_master__out_regs[1U] - = this->__PVT__vx_register_file_master__DOT__registers - [1U]; - this->__Vcellout__vx_register_file_master__out_regs[0U] - = this->__PVT__vx_register_file_master__DOT__registers - [0U]; - this->__PVT__rd1_register[0U] = this->__Vcellout__vx_register_file_master__out_src1_data; - this->__PVT__rd1_register[1U] = this->__Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src1_data; - this->__PVT__rd1_register[2U] = this->__Vcellout__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__out_src1_data; - this->__PVT__rd1_register[3U] = this->__Vcellout__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__out_src1_data; this->__PVT__rd2_register[0U] = this->__Vcellout__vx_register_file_master__out_src2_data; this->__PVT__rd2_register[1U] = this->__Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src2_data; this->__PVT__rd2_register[2U] = this->__Vcellout__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__out_src2_data; this->__PVT__rd2_register[3U] = this->__Vcellout__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__out_src2_data; - this->__Vcellinp__vx_register_file_master__in_wspawn_regs[0x1fU] - = this->in_wspawn_regs[0x1fU]; - this->__Vcellinp__vx_register_file_master__in_wspawn_regs[0x1eU] - = this->in_wspawn_regs[0x1eU]; - this->__Vcellinp__vx_register_file_master__in_wspawn_regs[0x1dU] - = this->in_wspawn_regs[0x1dU]; - this->__Vcellinp__vx_register_file_master__in_wspawn_regs[0x1cU] - = this->in_wspawn_regs[0x1cU]; - this->__Vcellinp__vx_register_file_master__in_wspawn_regs[0x1bU] - = this->in_wspawn_regs[0x1bU]; - this->__Vcellinp__vx_register_file_master__in_wspawn_regs[0x1aU] - = this->in_wspawn_regs[0x1aU]; - this->__Vcellinp__vx_register_file_master__in_wspawn_regs[0x19U] - = this->in_wspawn_regs[0x19U]; - this->__Vcellinp__vx_register_file_master__in_wspawn_regs[0x18U] - = this->in_wspawn_regs[0x18U]; - this->__Vcellinp__vx_register_file_master__in_wspawn_regs[0x17U] - = this->in_wspawn_regs[0x17U]; - this->__Vcellinp__vx_register_file_master__in_wspawn_regs[0x16U] - = this->in_wspawn_regs[0x16U]; - this->__Vcellinp__vx_register_file_master__in_wspawn_regs[0x15U] - = this->in_wspawn_regs[0x15U]; - this->__Vcellinp__vx_register_file_master__in_wspawn_regs[0x14U] - = this->in_wspawn_regs[0x14U]; - this->__Vcellinp__vx_register_file_master__in_wspawn_regs[0x13U] - = this->in_wspawn_regs[0x13U]; - this->__Vcellinp__vx_register_file_master__in_wspawn_regs[0x12U] - = this->in_wspawn_regs[0x12U]; - this->__Vcellinp__vx_register_file_master__in_wspawn_regs[0x11U] - = this->in_wspawn_regs[0x11U]; - this->__Vcellinp__vx_register_file_master__in_wspawn_regs[0x10U] - = this->in_wspawn_regs[0x10U]; - this->__Vcellinp__vx_register_file_master__in_wspawn_regs[0xfU] - = this->in_wspawn_regs[0xfU]; - this->__Vcellinp__vx_register_file_master__in_wspawn_regs[0xeU] - = this->in_wspawn_regs[0xeU]; - this->__Vcellinp__vx_register_file_master__in_wspawn_regs[0xdU] - = this->in_wspawn_regs[0xdU]; - this->__Vcellinp__vx_register_file_master__in_wspawn_regs[0xcU] - = this->in_wspawn_regs[0xcU]; - this->__Vcellinp__vx_register_file_master__in_wspawn_regs[0xbU] - = this->in_wspawn_regs[0xbU]; - this->__Vcellinp__vx_register_file_master__in_wspawn_regs[0xaU] - = this->in_wspawn_regs[0xaU]; - this->__Vcellinp__vx_register_file_master__in_wspawn_regs[9U] - = this->in_wspawn_regs[9U]; - this->__Vcellinp__vx_register_file_master__in_wspawn_regs[8U] - = this->in_wspawn_regs[8U]; - this->__Vcellinp__vx_register_file_master__in_wspawn_regs[7U] - = this->in_wspawn_regs[7U]; - this->__Vcellinp__vx_register_file_master__in_wspawn_regs[6U] - = this->in_wspawn_regs[6U]; - this->__Vcellinp__vx_register_file_master__in_wspawn_regs[5U] - = this->in_wspawn_regs[5U]; - this->__Vcellinp__vx_register_file_master__in_wspawn_regs[4U] - = this->in_wspawn_regs[4U]; - this->__Vcellinp__vx_register_file_master__in_wspawn_regs[3U] - = this->in_wspawn_regs[3U]; - this->__Vcellinp__vx_register_file_master__in_wspawn_regs[2U] - = this->in_wspawn_regs[2U]; - this->__Vcellinp__vx_register_file_master__in_wspawn_regs[1U] - = this->in_wspawn_regs[1U]; - this->__Vcellinp__vx_register_file_master__in_wspawn_regs[0U] - = this->in_wspawn_regs[0U]; - this->__PVT__clone_regsiters[0x1fU] = this->__Vcellout__vx_register_file_master__out_regs - [0x1fU]; - this->__PVT__clone_regsiters[0x1eU] = this->__Vcellout__vx_register_file_master__out_regs - [0x1eU]; - this->__PVT__clone_regsiters[0x1dU] = this->__Vcellout__vx_register_file_master__out_regs - [0x1dU]; - this->__PVT__clone_regsiters[0x1cU] = this->__Vcellout__vx_register_file_master__out_regs - [0x1cU]; - this->__PVT__clone_regsiters[0x1bU] = this->__Vcellout__vx_register_file_master__out_regs - [0x1bU]; - this->__PVT__clone_regsiters[0x1aU] = this->__Vcellout__vx_register_file_master__out_regs - [0x1aU]; - this->__PVT__clone_regsiters[0x19U] = this->__Vcellout__vx_register_file_master__out_regs - [0x19U]; - this->__PVT__clone_regsiters[0x18U] = this->__Vcellout__vx_register_file_master__out_regs - [0x18U]; - this->__PVT__clone_regsiters[0x17U] = this->__Vcellout__vx_register_file_master__out_regs - [0x17U]; - this->__PVT__clone_regsiters[0x16U] = this->__Vcellout__vx_register_file_master__out_regs - [0x16U]; - this->__PVT__clone_regsiters[0x15U] = this->__Vcellout__vx_register_file_master__out_regs - [0x15U]; - this->__PVT__clone_regsiters[0x14U] = this->__Vcellout__vx_register_file_master__out_regs - [0x14U]; - this->__PVT__clone_regsiters[0x13U] = this->__Vcellout__vx_register_file_master__out_regs - [0x13U]; - this->__PVT__clone_regsiters[0x12U] = this->__Vcellout__vx_register_file_master__out_regs - [0x12U]; - this->__PVT__clone_regsiters[0x11U] = this->__Vcellout__vx_register_file_master__out_regs - [0x11U]; - this->__PVT__clone_regsiters[0x10U] = this->__Vcellout__vx_register_file_master__out_regs - [0x10U]; - this->__PVT__clone_regsiters[0xfU] = this->__Vcellout__vx_register_file_master__out_regs - [0xfU]; - this->__PVT__clone_regsiters[0xeU] = this->__Vcellout__vx_register_file_master__out_regs - [0xeU]; - this->__PVT__clone_regsiters[0xdU] = this->__Vcellout__vx_register_file_master__out_regs - [0xdU]; - this->__PVT__clone_regsiters[0xcU] = this->__Vcellout__vx_register_file_master__out_regs - [0xcU]; - this->__PVT__clone_regsiters[0xbU] = this->__Vcellout__vx_register_file_master__out_regs - [0xbU]; - this->__PVT__clone_regsiters[0xaU] = this->__Vcellout__vx_register_file_master__out_regs - [0xaU]; - this->__PVT__clone_regsiters[9U] = this->__Vcellout__vx_register_file_master__out_regs - [9U]; - this->__PVT__clone_regsiters[8U] = this->__Vcellout__vx_register_file_master__out_regs - [8U]; - this->__PVT__clone_regsiters[7U] = this->__Vcellout__vx_register_file_master__out_regs - [7U]; - this->__PVT__clone_regsiters[6U] = this->__Vcellout__vx_register_file_master__out_regs - [6U]; - this->__PVT__clone_regsiters[5U] = this->__Vcellout__vx_register_file_master__out_regs - [5U]; - this->__PVT__clone_regsiters[4U] = this->__Vcellout__vx_register_file_master__out_regs - [4U]; - this->__PVT__clone_regsiters[3U] = this->__Vcellout__vx_register_file_master__out_regs - [3U]; - this->__PVT__clone_regsiters[2U] = this->__Vcellout__vx_register_file_master__out_regs - [2U]; - this->__PVT__clone_regsiters[1U] = this->__Vcellout__vx_register_file_master__out_regs - [1U]; - this->__PVT__clone_regsiters[0U] = this->__Vcellout__vx_register_file_master__out_regs - [0U]; - this->out_a_reg_data[0U] = ((0x6fU == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) - ? vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__curr_PC - : ((IData)(vlTOPp->Vortex__DOT__forwarding_src1_fwd) - ? this->in_src1_fwd_data - [0U] : this->__PVT__rd1_register - [0U])); - this->out_a_reg_data[1U] = ((0x6fU == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) - ? vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__curr_PC - : ((IData)(vlTOPp->Vortex__DOT__forwarding_src1_fwd) - ? this->in_src1_fwd_data - [1U] : this->__PVT__rd1_register - [1U])); - this->out_a_reg_data[2U] = ((0x6fU == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) - ? vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__curr_PC - : ((IData)(vlTOPp->Vortex__DOT__forwarding_src1_fwd) - ? this->in_src1_fwd_data - [2U] : this->__PVT__rd1_register - [2U])); - this->out_a_reg_data[3U] = ((0x6fU == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) - ? vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__curr_PC - : ((IData)(vlTOPp->Vortex__DOT__forwarding_src1_fwd) - ? this->in_src1_fwd_data - [3U] : this->__PVT__rd1_register - [3U])); + this->__PVT__rd1_register[0U] = this->__Vcellout__vx_register_file_master__out_src1_data; + this->__PVT__rd1_register[1U] = this->__Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src1_data; + this->__PVT__rd1_register[2U] = this->__Vcellout__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__out_src1_data; + this->__PVT__rd1_register[3U] = this->__Vcellout__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__out_src1_data; this->out_b_reg_data[0U] = ((IData)(vlTOPp->Vortex__DOT__forwarding_src2_fwd) - ? this->in_src2_fwd_data - [0U] : this->__PVT__rd2_register - [0U]); + ? vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data[0U] + : this->__PVT__rd2_register[0U]); this->out_b_reg_data[1U] = ((IData)(vlTOPp->Vortex__DOT__forwarding_src2_fwd) - ? this->in_src2_fwd_data - [1U] : this->__PVT__rd2_register - [1U]); + ? vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data[1U] + : this->__PVT__rd2_register[1U]); this->out_b_reg_data[2U] = ((IData)(vlTOPp->Vortex__DOT__forwarding_src2_fwd) - ? this->in_src2_fwd_data - [2U] : this->__PVT__rd2_register - [2U]); + ? vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data[2U] + : this->__PVT__rd2_register[2U]); this->out_b_reg_data[3U] = ((IData)(vlTOPp->Vortex__DOT__forwarding_src2_fwd) - ? this->in_src2_fwd_data - [3U] : this->__PVT__rd2_register - [3U]); - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1fU] - = this->__PVT__clone_regsiters[0x1fU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1eU] - = this->__PVT__clone_regsiters[0x1eU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1dU] - = this->__PVT__clone_regsiters[0x1dU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1cU] - = this->__PVT__clone_regsiters[0x1cU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1bU] - = this->__PVT__clone_regsiters[0x1bU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1aU] - = this->__PVT__clone_regsiters[0x1aU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x19U] - = this->__PVT__clone_regsiters[0x19U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x18U] - = this->__PVT__clone_regsiters[0x18U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x17U] - = this->__PVT__clone_regsiters[0x17U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x16U] - = this->__PVT__clone_regsiters[0x16U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x15U] - = this->__PVT__clone_regsiters[0x15U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x14U] - = this->__PVT__clone_regsiters[0x14U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x13U] - = this->__PVT__clone_regsiters[0x13U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x12U] - = this->__PVT__clone_regsiters[0x12U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x11U] - = this->__PVT__clone_regsiters[0x11U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x10U] - = this->__PVT__clone_regsiters[0x10U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xfU] - = this->__PVT__clone_regsiters[0xfU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xeU] - = this->__PVT__clone_regsiters[0xeU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xdU] - = this->__PVT__clone_regsiters[0xdU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xcU] - = this->__PVT__clone_regsiters[0xcU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xbU] - = this->__PVT__clone_regsiters[0xbU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xaU] - = this->__PVT__clone_regsiters[0xaU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[9U] - = this->__PVT__clone_regsiters[9U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[8U] - = this->__PVT__clone_regsiters[8U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[7U] - = this->__PVT__clone_regsiters[7U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[6U] - = this->__PVT__clone_regsiters[6U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[5U] - = this->__PVT__clone_regsiters[5U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[4U] - = this->__PVT__clone_regsiters[4U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[3U] - = this->__PVT__clone_regsiters[3U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[2U] - = this->__PVT__clone_regsiters[2U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[1U] - = this->__PVT__clone_regsiters[1U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0U] - = this->__PVT__clone_regsiters[0U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1fU] - = this->__PVT__clone_regsiters[0x1fU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1eU] - = this->__PVT__clone_regsiters[0x1eU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1dU] - = this->__PVT__clone_regsiters[0x1dU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1cU] - = this->__PVT__clone_regsiters[0x1cU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1bU] - = this->__PVT__clone_regsiters[0x1bU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1aU] - = this->__PVT__clone_regsiters[0x1aU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x19U] - = this->__PVT__clone_regsiters[0x19U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x18U] - = this->__PVT__clone_regsiters[0x18U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x17U] - = this->__PVT__clone_regsiters[0x17U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x16U] - = this->__PVT__clone_regsiters[0x16U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x15U] - = this->__PVT__clone_regsiters[0x15U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x14U] - = this->__PVT__clone_regsiters[0x14U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x13U] - = this->__PVT__clone_regsiters[0x13U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x12U] - = this->__PVT__clone_regsiters[0x12U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x11U] - = this->__PVT__clone_regsiters[0x11U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x10U] - = this->__PVT__clone_regsiters[0x10U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xfU] - = this->__PVT__clone_regsiters[0xfU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xeU] - = this->__PVT__clone_regsiters[0xeU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xdU] - = this->__PVT__clone_regsiters[0xdU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xcU] - = this->__PVT__clone_regsiters[0xcU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xbU] - = this->__PVT__clone_regsiters[0xbU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xaU] - = this->__PVT__clone_regsiters[0xaU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[9U] - = this->__PVT__clone_regsiters[9U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[8U] - = this->__PVT__clone_regsiters[8U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[7U] - = this->__PVT__clone_regsiters[7U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[6U] - = this->__PVT__clone_regsiters[6U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[5U] - = this->__PVT__clone_regsiters[5U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[4U] - = this->__PVT__clone_regsiters[4U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[3U] - = this->__PVT__clone_regsiters[3U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[2U] - = this->__PVT__clone_regsiters[2U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[1U] - = this->__PVT__clone_regsiters[1U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0U] - = this->__PVT__clone_regsiters[0U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1fU] - = this->__PVT__clone_regsiters[0x1fU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1eU] - = this->__PVT__clone_regsiters[0x1eU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1dU] - = this->__PVT__clone_regsiters[0x1dU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1cU] - = this->__PVT__clone_regsiters[0x1cU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1bU] - = this->__PVT__clone_regsiters[0x1bU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1aU] - = this->__PVT__clone_regsiters[0x1aU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x19U] - = this->__PVT__clone_regsiters[0x19U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x18U] - = this->__PVT__clone_regsiters[0x18U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x17U] - = this->__PVT__clone_regsiters[0x17U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x16U] - = this->__PVT__clone_regsiters[0x16U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x15U] - = this->__PVT__clone_regsiters[0x15U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x14U] - = this->__PVT__clone_regsiters[0x14U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x13U] - = this->__PVT__clone_regsiters[0x13U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x12U] - = this->__PVT__clone_regsiters[0x12U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x11U] - = this->__PVT__clone_regsiters[0x11U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x10U] - = this->__PVT__clone_regsiters[0x10U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xfU] - = this->__PVT__clone_regsiters[0xfU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xeU] - = this->__PVT__clone_regsiters[0xeU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xdU] - = this->__PVT__clone_regsiters[0xdU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xcU] - = this->__PVT__clone_regsiters[0xcU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xbU] - = this->__PVT__clone_regsiters[0xbU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xaU] - = this->__PVT__clone_regsiters[0xaU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[9U] - = this->__PVT__clone_regsiters[9U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[8U] - = this->__PVT__clone_regsiters[8U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[7U] - = this->__PVT__clone_regsiters[7U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[6U] - = this->__PVT__clone_regsiters[6U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[5U] - = this->__PVT__clone_regsiters[5U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[4U] - = this->__PVT__clone_regsiters[4U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[3U] - = this->__PVT__clone_regsiters[3U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[2U] - = this->__PVT__clone_regsiters[2U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[1U] - = this->__PVT__clone_regsiters[1U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0U] - = this->__PVT__clone_regsiters[0U]; + ? vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data[3U] + : this->__PVT__rd2_register[3U]); + this->out_a_reg_data[0U] = ((0x6fU == (0x7fU & + ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) + ? ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x18U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 8U)) + : ((IData)(vlTOPp->Vortex__DOT__forwarding_src1_fwd) + ? vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data[0U] + : this->__PVT__rd1_register[0U])); + this->out_a_reg_data[1U] = ((0x6fU == (0x7fU & + ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) + ? ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x18U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 8U)) + : ((IData)(vlTOPp->Vortex__DOT__forwarding_src1_fwd) + ? vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data[1U] + : this->__PVT__rd1_register[1U])); + this->out_a_reg_data[2U] = ((0x6fU == (0x7fU & + ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) + ? ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x18U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 8U)) + : ((IData)(vlTOPp->Vortex__DOT__forwarding_src1_fwd) + ? vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data[2U] + : this->__PVT__rd1_register[2U])); + this->out_a_reg_data[3U] = ((0x6fU == (0x7fU & + ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) + ? ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x18U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 8U)) + : ((IData)(vlTOPp->Vortex__DOT__forwarding_src1_fwd) + ? vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data[3U] + : this->__PVT__rd1_register[3U])); } -VL_INLINE_OPT void VVortex_VX_context_slave::_sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one__15(VVortex__Syms* __restrict vlSymsp) { - VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex_VX_context_slave::_sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one__15\n"); ); +VL_INLINE_OPT void VVortex_VX_context_slave::_sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__15(VVortex__Syms* __restrict vlSymsp) { + VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex_VX_context_slave::_sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__15\n"); ); VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; // Body this->__Vdly__wspawn_state_stall = this->__PVT__wspawn_state_stall; this->__Vdly__clone_state_stall = this->__PVT__clone_state_stall; - this->__Vdlyvset__vx_register_file_master__DOT__registers__v0 = 0U; - this->__Vdlyvset__vx_register_file_master__DOT__registers__v1 = 0U; - this->__Vdlyvset__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 0U; - this->__Vdlyvset__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 0U; - this->__Vdlyvset__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 0U; - this->__Vdlyvset__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 0U; - this->__Vdlyvset__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 0U; - this->__Vdlyvset__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 0U; // ALWAYS at VX_context_slave.v:119 - if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__real_wspawn) + if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__real_wspawn) & (0U == (IData)(this->__PVT__wspawn_state_stall)))) { this->__Vdly__wspawn_state_stall = 0xaU; } else { @@ -540,7 +132,7 @@ VL_INLINE_OPT void VVortex_VX_context_slave::_sequent__TOP__Vortex__DOT__vx_deco } } // ALWAYS at VX_context_slave.v:104 - if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__real_isclone) + if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__real_isclone) & (0U == (IData)(this->__PVT__clone_state_stall)))) { this->__Vdly__clone_state_stall = 0xaU; } else { @@ -554,1286 +146,502 @@ VL_INLINE_OPT void VVortex_VX_context_slave::_sequent__TOP__Vortex__DOT__vx_deco } } } - // ALWAYS at VX_register_file_master_slave.v:50 - if ((((((0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - & (0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd))) - & this->in_valid[0U]) & (1U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__warp_num))) - & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__real_wspawn)))) { - this->__Vdlyvval__vx_register_file_master__DOT__registers__v0 - = this->in_write_data[0U]; - this->__Vdlyvset__vx_register_file_master__DOT__registers__v0 = 1U; - this->__Vdlyvdim0__vx_register_file_master__DOT__registers__v0 - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd; - } else { - if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__real_wspawn) - & (2U == (IData)(this->__PVT__wspawn_state_stall)))) { - this->__Vdlyvval__vx_register_file_master__DOT__registers__v1 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x1fU]; - this->__Vdlyvset__vx_register_file_master__DOT__registers__v1 = 1U; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v2 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x1eU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v3 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x1dU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v4 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x1cU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v5 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x1bU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v6 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x1aU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v7 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x19U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v8 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x18U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v9 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x17U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v10 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x16U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v11 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x15U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v12 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x14U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v13 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x13U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v14 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x12U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v15 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x11U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v16 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x10U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v17 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0xfU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v18 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0xeU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v19 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0xdU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v20 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0xcU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v21 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0xbU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v22 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0xaU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v23 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [9U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v24 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [8U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v25 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [7U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v26 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [6U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v27 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [5U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v28 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [4U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v29 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [3U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v30 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [2U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v31 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [1U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v32 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0U]; - } - } // ALWAYS at VX_register_file_slave.v:53 - if ((((((0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - & (0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd))) - & this->in_valid[3U]) & (1U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__warp_num))) - & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__real_isclone)))) { - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0 - = this->in_write_data[3U]; - this->__Vdlyvset__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 1U; - this->__Vdlyvdim0__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0 - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd; + if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + & (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xcU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x14U))))) + & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] + >> 7U)) & (1U == (0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__real_isclone)))) { + VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0x11U) + | (0x1ffe0U + & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0xfU)))), this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers, + vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[3U]); } else { - if ((((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__real_isclone) + if ((((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__real_isclone) & ((3U == this->__PVT__rd1_register[0U]) & (1U == (IData)(this->__PVT__clone_state_stall)))) - & (1U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num)))) { - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v1 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x1fU]; - this->__Vdlyvset__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 1U; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v2 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x1eU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v3 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x1dU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v4 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x1cU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v5 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x1bU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v6 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x1aU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v7 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x19U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v8 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x18U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v9 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x17U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v10 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x16U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v11 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x15U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v12 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x14U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v13 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x13U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v14 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x12U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v15 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x11U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v16 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x10U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v17 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0xfU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v18 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0xeU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v19 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0xdU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v20 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0xcU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v21 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0xbU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v22 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0xaU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v23 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [9U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v24 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [8U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v25 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [7U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v26 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [6U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v27 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [5U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v28 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [4U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v29 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [3U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v30 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [2U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v31 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [1U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v32 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0U]; + & (1U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U)))))) { + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0U] + = this->__PVT__vx_register_file_master__DOT__registers[0U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[1U] + = this->__PVT__vx_register_file_master__DOT__registers[1U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[2U] + = this->__PVT__vx_register_file_master__DOT__registers[2U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[3U] + = this->__PVT__vx_register_file_master__DOT__registers[3U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[4U] + = this->__PVT__vx_register_file_master__DOT__registers[4U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[5U] + = this->__PVT__vx_register_file_master__DOT__registers[5U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[6U] + = this->__PVT__vx_register_file_master__DOT__registers[6U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[7U] + = this->__PVT__vx_register_file_master__DOT__registers[7U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[8U] + = this->__PVT__vx_register_file_master__DOT__registers[8U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[9U] + = this->__PVT__vx_register_file_master__DOT__registers[9U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xaU] + = this->__PVT__vx_register_file_master__DOT__registers[0xaU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xbU] + = this->__PVT__vx_register_file_master__DOT__registers[0xbU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xcU] + = this->__PVT__vx_register_file_master__DOT__registers[0xcU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xdU] + = this->__PVT__vx_register_file_master__DOT__registers[0xdU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xeU] + = this->__PVT__vx_register_file_master__DOT__registers[0xeU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xfU] + = this->__PVT__vx_register_file_master__DOT__registers[0xfU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x10U] + = this->__PVT__vx_register_file_master__DOT__registers[0x10U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x11U] + = this->__PVT__vx_register_file_master__DOT__registers[0x11U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x12U] + = this->__PVT__vx_register_file_master__DOT__registers[0x12U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x13U] + = this->__PVT__vx_register_file_master__DOT__registers[0x13U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x14U] + = this->__PVT__vx_register_file_master__DOT__registers[0x14U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x15U] + = this->__PVT__vx_register_file_master__DOT__registers[0x15U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x16U] + = this->__PVT__vx_register_file_master__DOT__registers[0x16U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x17U] + = this->__PVT__vx_register_file_master__DOT__registers[0x17U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x18U] + = this->__PVT__vx_register_file_master__DOT__registers[0x18U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x19U] + = this->__PVT__vx_register_file_master__DOT__registers[0x19U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1aU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1aU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1bU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1bU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1cU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1cU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1dU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1dU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1eU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1eU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1fU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1fU]; } } // ALWAYS at VX_register_file_slave.v:53 - if ((((((0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - & (0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd))) - & this->in_valid[2U]) & (1U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__warp_num))) - & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__real_isclone)))) { - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0 - = this->in_write_data[2U]; - this->__Vdlyvset__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 1U; - this->__Vdlyvdim0__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0 - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd; + if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + & (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xcU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x14U))))) + & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] + >> 6U)) & (1U == (0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__real_isclone)))) { + VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0x11U) + | (0x1ffe0U + & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0xfU)))), this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers, + vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[2U]); } else { - if ((((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__real_isclone) + if ((((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__real_isclone) & ((2U == this->__PVT__rd1_register[0U]) & (1U == (IData)(this->__PVT__clone_state_stall)))) - & (1U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num)))) { - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v1 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x1fU]; - this->__Vdlyvset__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 1U; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v2 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x1eU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v3 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x1dU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v4 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x1cU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v5 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x1bU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v6 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x1aU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v7 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x19U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v8 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x18U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v9 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x17U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v10 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x16U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v11 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x15U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v12 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x14U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v13 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x13U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v14 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x12U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v15 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x11U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v16 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x10U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v17 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0xfU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v18 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0xeU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v19 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0xdU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v20 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0xcU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v21 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0xbU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v22 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0xaU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v23 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [9U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v24 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [8U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v25 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [7U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v26 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [6U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v27 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [5U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v28 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [4U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v29 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [3U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v30 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [2U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v31 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [1U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v32 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0U]; + & (1U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U)))))) { + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0U] + = this->__PVT__vx_register_file_master__DOT__registers[0U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[1U] + = this->__PVT__vx_register_file_master__DOT__registers[1U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[2U] + = this->__PVT__vx_register_file_master__DOT__registers[2U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[3U] + = this->__PVT__vx_register_file_master__DOT__registers[3U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[4U] + = this->__PVT__vx_register_file_master__DOT__registers[4U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[5U] + = this->__PVT__vx_register_file_master__DOT__registers[5U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[6U] + = this->__PVT__vx_register_file_master__DOT__registers[6U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[7U] + = this->__PVT__vx_register_file_master__DOT__registers[7U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[8U] + = this->__PVT__vx_register_file_master__DOT__registers[8U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[9U] + = this->__PVT__vx_register_file_master__DOT__registers[9U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xaU] + = this->__PVT__vx_register_file_master__DOT__registers[0xaU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xbU] + = this->__PVT__vx_register_file_master__DOT__registers[0xbU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xcU] + = this->__PVT__vx_register_file_master__DOT__registers[0xcU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xdU] + = this->__PVT__vx_register_file_master__DOT__registers[0xdU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xeU] + = this->__PVT__vx_register_file_master__DOT__registers[0xeU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xfU] + = this->__PVT__vx_register_file_master__DOT__registers[0xfU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x10U] + = this->__PVT__vx_register_file_master__DOT__registers[0x10U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x11U] + = this->__PVT__vx_register_file_master__DOT__registers[0x11U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x12U] + = this->__PVT__vx_register_file_master__DOT__registers[0x12U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x13U] + = this->__PVT__vx_register_file_master__DOT__registers[0x13U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x14U] + = this->__PVT__vx_register_file_master__DOT__registers[0x14U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x15U] + = this->__PVT__vx_register_file_master__DOT__registers[0x15U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x16U] + = this->__PVT__vx_register_file_master__DOT__registers[0x16U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x17U] + = this->__PVT__vx_register_file_master__DOT__registers[0x17U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x18U] + = this->__PVT__vx_register_file_master__DOT__registers[0x18U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x19U] + = this->__PVT__vx_register_file_master__DOT__registers[0x19U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1aU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1aU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1bU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1bU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1cU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1cU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1dU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1dU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1eU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1eU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1fU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1fU]; } } // ALWAYS at VX_register_file_slave.v:53 - if ((((((0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - & (0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd))) - & this->in_valid[1U]) & (1U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__warp_num))) - & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__real_isclone)))) { - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0 - = this->in_write_data[1U]; - this->__Vdlyvset__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 1U; - this->__Vdlyvdim0__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0 - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd; + if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + & (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xcU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x14U))))) + & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] + >> 5U)) & (1U == (0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__real_isclone)))) { + VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0x11U) + | (0x1ffe0U + & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0xfU)))), this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers, + vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[1U]); } else { - if ((((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__real_isclone) + if ((((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__real_isclone) & ((1U == this->__PVT__rd1_register[0U]) & (1U == (IData)(this->__PVT__clone_state_stall)))) - & (1U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num)))) { - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x1fU]; - this->__Vdlyvset__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 1U; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v2 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x1eU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v3 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x1dU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v4 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x1cU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v5 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x1bU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v6 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x1aU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v7 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x19U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v8 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x18U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v9 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x17U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v10 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x16U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v11 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x15U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v12 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x14U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v13 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x13U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v14 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x12U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v15 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x11U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v16 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x10U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v17 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0xfU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v18 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0xeU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v19 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0xdU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v20 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0xcU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v21 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0xbU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v22 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0xaU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v23 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [9U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v24 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [8U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v25 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [7U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v26 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [6U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v27 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [5U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v28 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [4U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v29 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [3U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v30 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [2U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v31 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [1U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v32 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0U]; + & (1U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U)))))) { + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0U] + = this->__PVT__vx_register_file_master__DOT__registers[0U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[1U] + = this->__PVT__vx_register_file_master__DOT__registers[1U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[2U] + = this->__PVT__vx_register_file_master__DOT__registers[2U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[3U] + = this->__PVT__vx_register_file_master__DOT__registers[3U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[4U] + = this->__PVT__vx_register_file_master__DOT__registers[4U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[5U] + = this->__PVT__vx_register_file_master__DOT__registers[5U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[6U] + = this->__PVT__vx_register_file_master__DOT__registers[6U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[7U] + = this->__PVT__vx_register_file_master__DOT__registers[7U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[8U] + = this->__PVT__vx_register_file_master__DOT__registers[8U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[9U] + = this->__PVT__vx_register_file_master__DOT__registers[9U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xaU] + = this->__PVT__vx_register_file_master__DOT__registers[0xaU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xbU] + = this->__PVT__vx_register_file_master__DOT__registers[0xbU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xcU] + = this->__PVT__vx_register_file_master__DOT__registers[0xcU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xdU] + = this->__PVT__vx_register_file_master__DOT__registers[0xdU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xeU] + = this->__PVT__vx_register_file_master__DOT__registers[0xeU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xfU] + = this->__PVT__vx_register_file_master__DOT__registers[0xfU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x10U] + = this->__PVT__vx_register_file_master__DOT__registers[0x10U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x11U] + = this->__PVT__vx_register_file_master__DOT__registers[0x11U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x12U] + = this->__PVT__vx_register_file_master__DOT__registers[0x12U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x13U] + = this->__PVT__vx_register_file_master__DOT__registers[0x13U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x14U] + = this->__PVT__vx_register_file_master__DOT__registers[0x14U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x15U] + = this->__PVT__vx_register_file_master__DOT__registers[0x15U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x16U] + = this->__PVT__vx_register_file_master__DOT__registers[0x16U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x17U] + = this->__PVT__vx_register_file_master__DOT__registers[0x17U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x18U] + = this->__PVT__vx_register_file_master__DOT__registers[0x18U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x19U] + = this->__PVT__vx_register_file_master__DOT__registers[0x19U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1aU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1aU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1bU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1bU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1cU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1cU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1dU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1dU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1eU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1eU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1fU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1fU]; } } - // ALWAYSPOST at VX_register_file_master_slave.v:53 - if (this->__Vdlyvset__vx_register_file_master__DOT__registers__v0) { - this->__PVT__vx_register_file_master__DOT__registers[this->__Vdlyvdim0__vx_register_file_master__DOT__registers__v0] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v0; - } - if (this->__Vdlyvset__vx_register_file_master__DOT__registers__v1) { - this->__PVT__vx_register_file_master__DOT__registers[0x1fU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v1; - this->__PVT__vx_register_file_master__DOT__registers[0x1eU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v2; - this->__PVT__vx_register_file_master__DOT__registers[0x1dU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v3; - this->__PVT__vx_register_file_master__DOT__registers[0x1cU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v4; - this->__PVT__vx_register_file_master__DOT__registers[0x1bU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v5; - this->__PVT__vx_register_file_master__DOT__registers[0x1aU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v6; - this->__PVT__vx_register_file_master__DOT__registers[0x19U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v7; - this->__PVT__vx_register_file_master__DOT__registers[0x18U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v8; - this->__PVT__vx_register_file_master__DOT__registers[0x17U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v9; - this->__PVT__vx_register_file_master__DOT__registers[0x16U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v10; - this->__PVT__vx_register_file_master__DOT__registers[0x15U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v11; - this->__PVT__vx_register_file_master__DOT__registers[0x14U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v12; - this->__PVT__vx_register_file_master__DOT__registers[0x13U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v13; - this->__PVT__vx_register_file_master__DOT__registers[0x12U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v14; - this->__PVT__vx_register_file_master__DOT__registers[0x11U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v15; - this->__PVT__vx_register_file_master__DOT__registers[0x10U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v16; - this->__PVT__vx_register_file_master__DOT__registers[0xfU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v17; - this->__PVT__vx_register_file_master__DOT__registers[0xeU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v18; - this->__PVT__vx_register_file_master__DOT__registers[0xdU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v19; - this->__PVT__vx_register_file_master__DOT__registers[0xcU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v20; - this->__PVT__vx_register_file_master__DOT__registers[0xbU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v21; - this->__PVT__vx_register_file_master__DOT__registers[0xaU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v22; - this->__PVT__vx_register_file_master__DOT__registers[9U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v23; - this->__PVT__vx_register_file_master__DOT__registers[8U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v24; - this->__PVT__vx_register_file_master__DOT__registers[7U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v25; - this->__PVT__vx_register_file_master__DOT__registers[6U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v26; - this->__PVT__vx_register_file_master__DOT__registers[5U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v27; - this->__PVT__vx_register_file_master__DOT__registers[4U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v28; - this->__PVT__vx_register_file_master__DOT__registers[3U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v29; - this->__PVT__vx_register_file_master__DOT__registers[2U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v30; - this->__PVT__vx_register_file_master__DOT__registers[1U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v31; - this->__PVT__vx_register_file_master__DOT__registers[0U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v32; + this->__PVT__clone_state_stall = this->__Vdly__clone_state_stall; + // ALWAYS at VX_register_file_master_slave.v:50 + if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + & (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xcU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x14U))))) + & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] + >> 4U)) & (1U == (0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__real_wspawn)))) { + VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0x11U) + | (0x1ffe0U + & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0xfU)))), this->__PVT__vx_register_file_master__DOT__registers, + vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[0U]); + } else { + if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__real_wspawn) + & (2U == (IData)(this->__PVT__wspawn_state_stall)))) { + this->__PVT__vx_register_file_master__DOT__registers[0U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0U]; + this->__PVT__vx_register_file_master__DOT__registers[1U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[1U]; + this->__PVT__vx_register_file_master__DOT__registers[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[2U]; + this->__PVT__vx_register_file_master__DOT__registers[3U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[3U]; + this->__PVT__vx_register_file_master__DOT__registers[4U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[4U]; + this->__PVT__vx_register_file_master__DOT__registers[5U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[5U]; + this->__PVT__vx_register_file_master__DOT__registers[6U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[6U]; + this->__PVT__vx_register_file_master__DOT__registers[7U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[7U]; + this->__PVT__vx_register_file_master__DOT__registers[8U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[8U]; + this->__PVT__vx_register_file_master__DOT__registers[9U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[9U]; + this->__PVT__vx_register_file_master__DOT__registers[0xaU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0xaU]; + this->__PVT__vx_register_file_master__DOT__registers[0xbU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0xbU]; + this->__PVT__vx_register_file_master__DOT__registers[0xcU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0xcU]; + this->__PVT__vx_register_file_master__DOT__registers[0xdU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0xdU]; + this->__PVT__vx_register_file_master__DOT__registers[0xeU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0xeU]; + this->__PVT__vx_register_file_master__DOT__registers[0xfU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0xfU]; + this->__PVT__vx_register_file_master__DOT__registers[0x10U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x10U]; + this->__PVT__vx_register_file_master__DOT__registers[0x11U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x11U]; + this->__PVT__vx_register_file_master__DOT__registers[0x12U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x12U]; + this->__PVT__vx_register_file_master__DOT__registers[0x13U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x13U]; + this->__PVT__vx_register_file_master__DOT__registers[0x14U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x14U]; + this->__PVT__vx_register_file_master__DOT__registers[0x15U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x15U]; + this->__PVT__vx_register_file_master__DOT__registers[0x16U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x16U]; + this->__PVT__vx_register_file_master__DOT__registers[0x17U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x17U]; + this->__PVT__vx_register_file_master__DOT__registers[0x18U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x18U]; + this->__PVT__vx_register_file_master__DOT__registers[0x19U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x19U]; + this->__PVT__vx_register_file_master__DOT__registers[0x1aU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x1aU]; + this->__PVT__vx_register_file_master__DOT__registers[0x1bU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x1bU]; + this->__PVT__vx_register_file_master__DOT__registers[0x1cU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x1cU]; + this->__PVT__vx_register_file_master__DOT__registers[0x1dU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x1dU]; + this->__PVT__vx_register_file_master__DOT__registers[0x1eU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x1eU]; + this->__PVT__vx_register_file_master__DOT__registers[0x1fU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x1fU]; + } } this->__PVT__wspawn_state_stall = this->__Vdly__wspawn_state_stall; - // ALWAYSPOST at VX_register_file_slave.v:56 - if (this->__Vdlyvset__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0) { - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[this->__Vdlyvdim0__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0; - } - if (this->__Vdlyvset__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v1) { - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1fU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v1; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1eU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v2; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1dU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v3; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1cU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v4; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1bU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v5; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1aU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v6; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x19U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v7; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x18U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v8; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x17U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v9; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x16U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v10; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x15U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v11; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x14U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v12; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x13U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v13; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x12U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v14; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x11U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v15; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x10U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v16; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xfU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v17; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xeU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v18; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xdU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v19; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xcU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v20; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xbU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v21; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xaU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v22; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[9U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v23; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[8U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v24; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[7U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v25; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[6U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v26; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[5U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v27; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[4U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v28; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[3U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v29; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[2U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v30; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[1U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v31; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v32; - } - // ALWAYSPOST at VX_register_file_slave.v:56 - if (this->__Vdlyvset__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0) { - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[this->__Vdlyvdim0__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0; - } - if (this->__Vdlyvset__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v1) { - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1fU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v1; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1eU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v2; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1dU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v3; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1cU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v4; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1bU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v5; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1aU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v6; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x19U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v7; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x18U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v8; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x17U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v9; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x16U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v10; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x15U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v11; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x14U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v12; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x13U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v13; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x12U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v14; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x11U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v15; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x10U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v16; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xfU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v17; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xeU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v18; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xdU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v19; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xcU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v20; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xbU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v21; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xaU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v22; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[9U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v23; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[8U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v24; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[7U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v25; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[6U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v26; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[5U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v27; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[4U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v28; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[3U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v29; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[2U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v30; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[1U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v31; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v32; - } - // ALWAYSPOST at VX_register_file_slave.v:56 - if (this->__Vdlyvset__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0) { - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[this->__Vdlyvdim0__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0; - } - if (this->__Vdlyvset__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1) { - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1fU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1eU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v2; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1dU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v3; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1cU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v4; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1bU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v5; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1aU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v6; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x19U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v7; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x18U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v8; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x17U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v9; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x16U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v10; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x15U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v11; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x14U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v12; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x13U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v13; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x12U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v14; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x11U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v15; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x10U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v16; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xfU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v17; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xeU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v18; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xdU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v19; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xcU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v20; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xbU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v21; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xaU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v22; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[9U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v23; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[8U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v24; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[7U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v25; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[6U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v26; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[5U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v27; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[4U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v28; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[3U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v29; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[2U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v30; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[1U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v31; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v32; - } - this->__PVT__clone_state_stall = this->__Vdly__clone_state_stall; - this->__Vcellout__vx_register_file_master__out_regs[0x1fU] - = this->__PVT__vx_register_file_master__DOT__registers - [0x1fU]; - this->__Vcellout__vx_register_file_master__out_regs[0x1eU] - = this->__PVT__vx_register_file_master__DOT__registers - [0x1eU]; - this->__Vcellout__vx_register_file_master__out_regs[0x1dU] - = this->__PVT__vx_register_file_master__DOT__registers - [0x1dU]; - this->__Vcellout__vx_register_file_master__out_regs[0x1cU] - = this->__PVT__vx_register_file_master__DOT__registers - [0x1cU]; - this->__Vcellout__vx_register_file_master__out_regs[0x1bU] - = this->__PVT__vx_register_file_master__DOT__registers - [0x1bU]; - this->__Vcellout__vx_register_file_master__out_regs[0x1aU] - = this->__PVT__vx_register_file_master__DOT__registers - [0x1aU]; - this->__Vcellout__vx_register_file_master__out_regs[0x19U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x19U]; - this->__Vcellout__vx_register_file_master__out_regs[0x18U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x18U]; - this->__Vcellout__vx_register_file_master__out_regs[0x17U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x17U]; - this->__Vcellout__vx_register_file_master__out_regs[0x16U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x16U]; - this->__Vcellout__vx_register_file_master__out_regs[0x15U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x15U]; - this->__Vcellout__vx_register_file_master__out_regs[0x14U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x14U]; - this->__Vcellout__vx_register_file_master__out_regs[0x13U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x13U]; - this->__Vcellout__vx_register_file_master__out_regs[0x12U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x12U]; - this->__Vcellout__vx_register_file_master__out_regs[0x11U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x11U]; - this->__Vcellout__vx_register_file_master__out_regs[0x10U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x10U]; - this->__Vcellout__vx_register_file_master__out_regs[0xfU] - = this->__PVT__vx_register_file_master__DOT__registers - [0xfU]; - this->__Vcellout__vx_register_file_master__out_regs[0xeU] - = this->__PVT__vx_register_file_master__DOT__registers - [0xeU]; - this->__Vcellout__vx_register_file_master__out_regs[0xdU] - = this->__PVT__vx_register_file_master__DOT__registers - [0xdU]; - this->__Vcellout__vx_register_file_master__out_regs[0xcU] - = this->__PVT__vx_register_file_master__DOT__registers - [0xcU]; - this->__Vcellout__vx_register_file_master__out_regs[0xbU] - = this->__PVT__vx_register_file_master__DOT__registers - [0xbU]; - this->__Vcellout__vx_register_file_master__out_regs[0xaU] - = this->__PVT__vx_register_file_master__DOT__registers - [0xaU]; - this->__Vcellout__vx_register_file_master__out_regs[9U] - = this->__PVT__vx_register_file_master__DOT__registers - [9U]; - this->__Vcellout__vx_register_file_master__out_regs[8U] - = this->__PVT__vx_register_file_master__DOT__registers - [8U]; - this->__Vcellout__vx_register_file_master__out_regs[7U] - = this->__PVT__vx_register_file_master__DOT__registers - [7U]; - this->__Vcellout__vx_register_file_master__out_regs[6U] - = this->__PVT__vx_register_file_master__DOT__registers - [6U]; - this->__Vcellout__vx_register_file_master__out_regs[5U] - = this->__PVT__vx_register_file_master__DOT__registers - [5U]; - this->__Vcellout__vx_register_file_master__out_regs[4U] - = this->__PVT__vx_register_file_master__DOT__registers - [4U]; - this->__Vcellout__vx_register_file_master__out_regs[3U] - = this->__PVT__vx_register_file_master__DOT__registers - [3U]; - this->__Vcellout__vx_register_file_master__out_regs[2U] - = this->__PVT__vx_register_file_master__DOT__registers - [2U]; - this->__Vcellout__vx_register_file_master__out_regs[1U] - = this->__PVT__vx_register_file_master__DOT__registers - [1U]; - this->__Vcellout__vx_register_file_master__out_regs[0U] - = this->__PVT__vx_register_file_master__DOT__registers - [0U]; - this->__PVT__clone_regsiters[0x1fU] = this->__Vcellout__vx_register_file_master__out_regs - [0x1fU]; - this->__PVT__clone_regsiters[0x1eU] = this->__Vcellout__vx_register_file_master__out_regs - [0x1eU]; - this->__PVT__clone_regsiters[0x1dU] = this->__Vcellout__vx_register_file_master__out_regs - [0x1dU]; - this->__PVT__clone_regsiters[0x1cU] = this->__Vcellout__vx_register_file_master__out_regs - [0x1cU]; - this->__PVT__clone_regsiters[0x1bU] = this->__Vcellout__vx_register_file_master__out_regs - [0x1bU]; - this->__PVT__clone_regsiters[0x1aU] = this->__Vcellout__vx_register_file_master__out_regs - [0x1aU]; - this->__PVT__clone_regsiters[0x19U] = this->__Vcellout__vx_register_file_master__out_regs - [0x19U]; - this->__PVT__clone_regsiters[0x18U] = this->__Vcellout__vx_register_file_master__out_regs - [0x18U]; - this->__PVT__clone_regsiters[0x17U] = this->__Vcellout__vx_register_file_master__out_regs - [0x17U]; - this->__PVT__clone_regsiters[0x16U] = this->__Vcellout__vx_register_file_master__out_regs - [0x16U]; - this->__PVT__clone_regsiters[0x15U] = this->__Vcellout__vx_register_file_master__out_regs - [0x15U]; - this->__PVT__clone_regsiters[0x14U] = this->__Vcellout__vx_register_file_master__out_regs - [0x14U]; - this->__PVT__clone_regsiters[0x13U] = this->__Vcellout__vx_register_file_master__out_regs - [0x13U]; - this->__PVT__clone_regsiters[0x12U] = this->__Vcellout__vx_register_file_master__out_regs - [0x12U]; - this->__PVT__clone_regsiters[0x11U] = this->__Vcellout__vx_register_file_master__out_regs - [0x11U]; - this->__PVT__clone_regsiters[0x10U] = this->__Vcellout__vx_register_file_master__out_regs - [0x10U]; - this->__PVT__clone_regsiters[0xfU] = this->__Vcellout__vx_register_file_master__out_regs - [0xfU]; - this->__PVT__clone_regsiters[0xeU] = this->__Vcellout__vx_register_file_master__out_regs - [0xeU]; - this->__PVT__clone_regsiters[0xdU] = this->__Vcellout__vx_register_file_master__out_regs - [0xdU]; - this->__PVT__clone_regsiters[0xcU] = this->__Vcellout__vx_register_file_master__out_regs - [0xcU]; - this->__PVT__clone_regsiters[0xbU] = this->__Vcellout__vx_register_file_master__out_regs - [0xbU]; - this->__PVT__clone_regsiters[0xaU] = this->__Vcellout__vx_register_file_master__out_regs - [0xaU]; - this->__PVT__clone_regsiters[9U] = this->__Vcellout__vx_register_file_master__out_regs - [9U]; - this->__PVT__clone_regsiters[8U] = this->__Vcellout__vx_register_file_master__out_regs - [8U]; - this->__PVT__clone_regsiters[7U] = this->__Vcellout__vx_register_file_master__out_regs - [7U]; - this->__PVT__clone_regsiters[6U] = this->__Vcellout__vx_register_file_master__out_regs - [6U]; - this->__PVT__clone_regsiters[5U] = this->__Vcellout__vx_register_file_master__out_regs - [5U]; - this->__PVT__clone_regsiters[4U] = this->__Vcellout__vx_register_file_master__out_regs - [4U]; - this->__PVT__clone_regsiters[3U] = this->__Vcellout__vx_register_file_master__out_regs - [3U]; - this->__PVT__clone_regsiters[2U] = this->__Vcellout__vx_register_file_master__out_regs - [2U]; - this->__PVT__clone_regsiters[1U] = this->__Vcellout__vx_register_file_master__out_regs - [1U]; - this->__PVT__clone_regsiters[0U] = this->__Vcellout__vx_register_file_master__out_regs - [0U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1fU] - = this->__PVT__clone_regsiters[0x1fU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1eU] - = this->__PVT__clone_regsiters[0x1eU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1dU] - = this->__PVT__clone_regsiters[0x1dU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1cU] - = this->__PVT__clone_regsiters[0x1cU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1bU] - = this->__PVT__clone_regsiters[0x1bU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1aU] - = this->__PVT__clone_regsiters[0x1aU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x19U] - = this->__PVT__clone_regsiters[0x19U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x18U] - = this->__PVT__clone_regsiters[0x18U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x17U] - = this->__PVT__clone_regsiters[0x17U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x16U] - = this->__PVT__clone_regsiters[0x16U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x15U] - = this->__PVT__clone_regsiters[0x15U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x14U] - = this->__PVT__clone_regsiters[0x14U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x13U] - = this->__PVT__clone_regsiters[0x13U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x12U] - = this->__PVT__clone_regsiters[0x12U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x11U] - = this->__PVT__clone_regsiters[0x11U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x10U] - = this->__PVT__clone_regsiters[0x10U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xfU] - = this->__PVT__clone_regsiters[0xfU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xeU] - = this->__PVT__clone_regsiters[0xeU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xdU] - = this->__PVT__clone_regsiters[0xdU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xcU] - = this->__PVT__clone_regsiters[0xcU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xbU] - = this->__PVT__clone_regsiters[0xbU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xaU] - = this->__PVT__clone_regsiters[0xaU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[9U] - = this->__PVT__clone_regsiters[9U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[8U] - = this->__PVT__clone_regsiters[8U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[7U] - = this->__PVT__clone_regsiters[7U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[6U] - = this->__PVT__clone_regsiters[6U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[5U] - = this->__PVT__clone_regsiters[5U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[4U] - = this->__PVT__clone_regsiters[4U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[3U] - = this->__PVT__clone_regsiters[3U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[2U] - = this->__PVT__clone_regsiters[2U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[1U] - = this->__PVT__clone_regsiters[1U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0U] - = this->__PVT__clone_regsiters[0U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1fU] - = this->__PVT__clone_regsiters[0x1fU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1eU] - = this->__PVT__clone_regsiters[0x1eU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1dU] - = this->__PVT__clone_regsiters[0x1dU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1cU] - = this->__PVT__clone_regsiters[0x1cU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1bU] - = this->__PVT__clone_regsiters[0x1bU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1aU] - = this->__PVT__clone_regsiters[0x1aU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x19U] - = this->__PVT__clone_regsiters[0x19U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x18U] - = this->__PVT__clone_regsiters[0x18U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x17U] - = this->__PVT__clone_regsiters[0x17U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x16U] - = this->__PVT__clone_regsiters[0x16U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x15U] - = this->__PVT__clone_regsiters[0x15U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x14U] - = this->__PVT__clone_regsiters[0x14U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x13U] - = this->__PVT__clone_regsiters[0x13U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x12U] - = this->__PVT__clone_regsiters[0x12U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x11U] - = this->__PVT__clone_regsiters[0x11U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x10U] - = this->__PVT__clone_regsiters[0x10U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xfU] - = this->__PVT__clone_regsiters[0xfU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xeU] - = this->__PVT__clone_regsiters[0xeU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xdU] - = this->__PVT__clone_regsiters[0xdU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xcU] - = this->__PVT__clone_regsiters[0xcU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xbU] - = this->__PVT__clone_regsiters[0xbU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xaU] - = this->__PVT__clone_regsiters[0xaU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[9U] - = this->__PVT__clone_regsiters[9U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[8U] - = this->__PVT__clone_regsiters[8U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[7U] - = this->__PVT__clone_regsiters[7U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[6U] - = this->__PVT__clone_regsiters[6U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[5U] - = this->__PVT__clone_regsiters[5U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[4U] - = this->__PVT__clone_regsiters[4U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[3U] - = this->__PVT__clone_regsiters[3U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[2U] - = this->__PVT__clone_regsiters[2U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[1U] - = this->__PVT__clone_regsiters[1U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0U] - = this->__PVT__clone_regsiters[0U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1fU] - = this->__PVT__clone_regsiters[0x1fU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1eU] - = this->__PVT__clone_regsiters[0x1eU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1dU] - = this->__PVT__clone_regsiters[0x1dU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1cU] - = this->__PVT__clone_regsiters[0x1cU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1bU] - = this->__PVT__clone_regsiters[0x1bU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1aU] - = this->__PVT__clone_regsiters[0x1aU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x19U] - = this->__PVT__clone_regsiters[0x19U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x18U] - = this->__PVT__clone_regsiters[0x18U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x17U] - = this->__PVT__clone_regsiters[0x17U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x16U] - = this->__PVT__clone_regsiters[0x16U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x15U] - = this->__PVT__clone_regsiters[0x15U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x14U] - = this->__PVT__clone_regsiters[0x14U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x13U] - = this->__PVT__clone_regsiters[0x13U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x12U] - = this->__PVT__clone_regsiters[0x12U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x11U] - = this->__PVT__clone_regsiters[0x11U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x10U] - = this->__PVT__clone_regsiters[0x10U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xfU] - = this->__PVT__clone_regsiters[0xfU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xeU] - = this->__PVT__clone_regsiters[0xeU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xdU] - = this->__PVT__clone_regsiters[0xdU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xcU] - = this->__PVT__clone_regsiters[0xcU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xbU] - = this->__PVT__clone_regsiters[0xbU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xaU] - = this->__PVT__clone_regsiters[0xaU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[9U] - = this->__PVT__clone_regsiters[9U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[8U] - = this->__PVT__clone_regsiters[8U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[7U] - = this->__PVT__clone_regsiters[7U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[6U] - = this->__PVT__clone_regsiters[6U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[5U] - = this->__PVT__clone_regsiters[5U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[4U] - = this->__PVT__clone_regsiters[4U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[3U] - = this->__PVT__clone_regsiters[3U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[2U] - = this->__PVT__clone_regsiters[2U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[1U] - = this->__PVT__clone_regsiters[1U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0U] - = this->__PVT__clone_regsiters[0U]; } -VL_INLINE_OPT void VVortex_VX_context_slave::_sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one__22(VVortex__Syms* __restrict vlSymsp) { - VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex_VX_context_slave::_sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one__22\n"); ); +VL_INLINE_OPT void VVortex_VX_context_slave::_sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__22(VVortex__Syms* __restrict vlSymsp) { + VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex_VX_context_slave::_sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__22\n"); ); VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; // Body - // ALWAYS at VX_register_file_slave.v:68 - this->__Vcellout__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__out_src1_data - = this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers - [(0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0xfU))]; - // ALWAYS at VX_register_file_slave.v:68 - this->__Vcellout__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__out_src1_data - = this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers - [(0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0xfU))]; - // ALWAYS at VX_register_file_slave.v:68 - this->__Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src1_data - = this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers - [(0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0xfU))]; // ALWAYS at VX_register_file_master_slave.v:66 this->__Vcellout__vx_register_file_master__out_src1_data - = this->__PVT__vx_register_file_master__DOT__registers - [(0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0xfU))]; - // ALWAYS at VX_register_file_slave.v:68 - this->__Vcellout__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__out_src2_data - = this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers - [(0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0x14U))]; - // ALWAYS at VX_register_file_slave.v:68 - this->__Vcellout__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__out_src2_data - = this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers - [(0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0x14U))]; - // ALWAYS at VX_register_file_slave.v:68 - this->__Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src2_data - = this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers - [(0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0x14U))]; + = this->__PVT__vx_register_file_master__DOT__registers[ + (0x1fU & ((0x7fffe00U & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 9U)) | (0x1ffU + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x17U))))]; // ALWAYS at VX_register_file_master_slave.v:66 this->__Vcellout__vx_register_file_master__out_src2_data - = this->__PVT__vx_register_file_master__DOT__registers - [(0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0x14U))]; + = this->__PVT__vx_register_file_master__DOT__registers[ + (0x1fU & ((0x7fffff0U & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 4U)) | (0xfU & + (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x1cU))))]; + // ALWAYS at VX_register_file_slave.v:68 + this->__Vcellout__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__out_src1_data + = this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[ + (0x1fU & ((0x7fffe00U & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 9U)) | (0x1ffU + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x17U))))]; + // ALWAYS at VX_register_file_slave.v:68 + this->__Vcellout__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__out_src1_data + = this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[ + (0x1fU & ((0x7fffe00U & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 9U)) | (0x1ffU + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x17U))))]; + // ALWAYS at VX_register_file_slave.v:68 + this->__Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src1_data + = this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[ + (0x1fU & ((0x7fffe00U & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 9U)) | (0x1ffU + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x17U))))]; + // ALWAYS at VX_register_file_slave.v:68 + this->__Vcellout__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__out_src2_data + = this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[ + (0x1fU & ((0x7fffff0U & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 4U)) | (0xfU & + (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x1cU))))]; + // ALWAYS at VX_register_file_slave.v:68 + this->__Vcellout__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__out_src2_data + = this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[ + (0x1fU & ((0x7fffff0U & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 4U)) | (0xfU & + (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x1cU))))]; + // ALWAYS at VX_register_file_slave.v:68 + this->__Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src2_data + = this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[ + (0x1fU & ((0x7fffff0U & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 4U)) | (0xfU & + (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 0x1cU))))]; + this->__PVT__rd1_register[0U] = this->__Vcellout__vx_register_file_master__out_src1_data; + this->__PVT__rd2_register[0U] = this->__Vcellout__vx_register_file_master__out_src2_data; this->__PVT__rd1_register[3U] = this->__Vcellout__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__out_src1_data; this->__PVT__rd1_register[2U] = this->__Vcellout__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__out_src1_data; this->__PVT__rd1_register[1U] = this->__Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src1_data; - this->__PVT__rd1_register[0U] = this->__Vcellout__vx_register_file_master__out_src1_data; this->__PVT__rd2_register[3U] = this->__Vcellout__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__out_src2_data; this->__PVT__rd2_register[2U] = this->__Vcellout__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__out_src2_data; this->__PVT__rd2_register[1U] = this->__Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src2_data; - this->__PVT__rd2_register[0U] = this->__Vcellout__vx_register_file_master__out_src2_data; } -VL_INLINE_OPT void VVortex_VX_context_slave::_combo__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one__29(VVortex__Syms* __restrict vlSymsp) { - VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex_VX_context_slave::_combo__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one__29\n"); ); +VL_INLINE_OPT void VVortex_VX_context_slave::_combo__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__29(VVortex__Syms* __restrict vlSymsp) { + VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex_VX_context_slave::_combo__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__29\n"); ); VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; // Body - this->__Vcellinp__vx_register_file_master__in_wspawn_regs[0x1fU] - = this->in_wspawn_regs[0x1fU]; - this->__Vcellinp__vx_register_file_master__in_wspawn_regs[0x1eU] - = this->in_wspawn_regs[0x1eU]; - this->__Vcellinp__vx_register_file_master__in_wspawn_regs[0x1dU] - = this->in_wspawn_regs[0x1dU]; - this->__Vcellinp__vx_register_file_master__in_wspawn_regs[0x1cU] - = this->in_wspawn_regs[0x1cU]; - this->__Vcellinp__vx_register_file_master__in_wspawn_regs[0x1bU] - = this->in_wspawn_regs[0x1bU]; - this->__Vcellinp__vx_register_file_master__in_wspawn_regs[0x1aU] - = this->in_wspawn_regs[0x1aU]; - this->__Vcellinp__vx_register_file_master__in_wspawn_regs[0x19U] - = this->in_wspawn_regs[0x19U]; - this->__Vcellinp__vx_register_file_master__in_wspawn_regs[0x18U] - = this->in_wspawn_regs[0x18U]; - this->__Vcellinp__vx_register_file_master__in_wspawn_regs[0x17U] - = this->in_wspawn_regs[0x17U]; - this->__Vcellinp__vx_register_file_master__in_wspawn_regs[0x16U] - = this->in_wspawn_regs[0x16U]; - this->__Vcellinp__vx_register_file_master__in_wspawn_regs[0x15U] - = this->in_wspawn_regs[0x15U]; - this->__Vcellinp__vx_register_file_master__in_wspawn_regs[0x14U] - = this->in_wspawn_regs[0x14U]; - this->__Vcellinp__vx_register_file_master__in_wspawn_regs[0x13U] - = this->in_wspawn_regs[0x13U]; - this->__Vcellinp__vx_register_file_master__in_wspawn_regs[0x12U] - = this->in_wspawn_regs[0x12U]; - this->__Vcellinp__vx_register_file_master__in_wspawn_regs[0x11U] - = this->in_wspawn_regs[0x11U]; - this->__Vcellinp__vx_register_file_master__in_wspawn_regs[0x10U] - = this->in_wspawn_regs[0x10U]; - this->__Vcellinp__vx_register_file_master__in_wspawn_regs[0xfU] - = this->in_wspawn_regs[0xfU]; - this->__Vcellinp__vx_register_file_master__in_wspawn_regs[0xeU] - = this->in_wspawn_regs[0xeU]; - this->__Vcellinp__vx_register_file_master__in_wspawn_regs[0xdU] - = this->in_wspawn_regs[0xdU]; - this->__Vcellinp__vx_register_file_master__in_wspawn_regs[0xcU] - = this->in_wspawn_regs[0xcU]; - this->__Vcellinp__vx_register_file_master__in_wspawn_regs[0xbU] - = this->in_wspawn_regs[0xbU]; - this->__Vcellinp__vx_register_file_master__in_wspawn_regs[0xaU] - = this->in_wspawn_regs[0xaU]; - this->__Vcellinp__vx_register_file_master__in_wspawn_regs[9U] - = this->in_wspawn_regs[9U]; - this->__Vcellinp__vx_register_file_master__in_wspawn_regs[8U] - = this->in_wspawn_regs[8U]; - this->__Vcellinp__vx_register_file_master__in_wspawn_regs[7U] - = this->in_wspawn_regs[7U]; - this->__Vcellinp__vx_register_file_master__in_wspawn_regs[6U] - = this->in_wspawn_regs[6U]; - this->__Vcellinp__vx_register_file_master__in_wspawn_regs[5U] - = this->in_wspawn_regs[5U]; - this->__Vcellinp__vx_register_file_master__in_wspawn_regs[4U] - = this->in_wspawn_regs[4U]; - this->__Vcellinp__vx_register_file_master__in_wspawn_regs[3U] - = this->in_wspawn_regs[3U]; - this->__Vcellinp__vx_register_file_master__in_wspawn_regs[2U] - = this->in_wspawn_regs[2U]; - this->__Vcellinp__vx_register_file_master__in_wspawn_regs[1U] - = this->in_wspawn_regs[1U]; - this->__Vcellinp__vx_register_file_master__in_wspawn_regs[0U] - = this->in_wspawn_regs[0U]; -} - -VL_INLINE_OPT void VVortex_VX_context_slave::_combo__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one__36(VVortex__Syms* __restrict vlSymsp) { - VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex_VX_context_slave::_combo__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one__36\n"); ); - VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; - // Body - this->out_a_reg_data[0U] = ((0x6fU == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) - ? vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__curr_PC + this->out_a_reg_data[0U] = ((0x6fU == (0x7fU & + ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) + ? ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x18U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 8U)) : ((IData)(vlTOPp->Vortex__DOT__forwarding_src1_fwd) - ? this->in_src1_fwd_data - [0U] : this->__PVT__rd1_register - [0U])); - this->out_a_reg_data[1U] = ((0x6fU == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) - ? vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__curr_PC + ? vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data[0U] + : this->__PVT__rd1_register[0U])); + this->out_a_reg_data[1U] = ((0x6fU == (0x7fU & + ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) + ? ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x18U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 8U)) : ((IData)(vlTOPp->Vortex__DOT__forwarding_src1_fwd) - ? this->in_src1_fwd_data - [1U] : this->__PVT__rd1_register - [1U])); - this->out_a_reg_data[2U] = ((0x6fU == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) - ? vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__curr_PC + ? vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data[1U] + : this->__PVT__rd1_register[1U])); + this->out_a_reg_data[2U] = ((0x6fU == (0x7fU & + ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) + ? ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x18U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 8U)) : ((IData)(vlTOPp->Vortex__DOT__forwarding_src1_fwd) - ? this->in_src1_fwd_data - [2U] : this->__PVT__rd1_register - [2U])); - this->out_a_reg_data[3U] = ((0x6fU == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) - ? vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__curr_PC + ? vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data[2U] + : this->__PVT__rd1_register[2U])); + this->out_a_reg_data[3U] = ((0x6fU == (0x7fU & + ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] + << 0x18U) + | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + >> 8U)))) + ? ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x18U) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 8U)) : ((IData)(vlTOPp->Vortex__DOT__forwarding_src1_fwd) - ? this->in_src1_fwd_data - [3U] : this->__PVT__rd1_register - [3U])); + ? vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data[3U] + : this->__PVT__rd1_register[3U])); this->out_b_reg_data[0U] = ((IData)(vlTOPp->Vortex__DOT__forwarding_src2_fwd) - ? this->in_src2_fwd_data - [0U] : this->__PVT__rd2_register - [0U]); + ? vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data[0U] + : this->__PVT__rd2_register[0U]); this->out_b_reg_data[1U] = ((IData)(vlTOPp->Vortex__DOT__forwarding_src2_fwd) - ? this->in_src2_fwd_data - [1U] : this->__PVT__rd2_register - [1U]); + ? vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data[1U] + : this->__PVT__rd2_register[1U]); this->out_b_reg_data[2U] = ((IData)(vlTOPp->Vortex__DOT__forwarding_src2_fwd) - ? this->in_src2_fwd_data - [2U] : this->__PVT__rd2_register - [2U]); + ? vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data[2U] + : this->__PVT__rd2_register[2U]); this->out_b_reg_data[3U] = ((IData)(vlTOPp->Vortex__DOT__forwarding_src2_fwd) - ? this->in_src2_fwd_data - [3U] : this->__PVT__rd2_register - [3U]); + ? vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data[3U] + : this->__PVT__rd2_register[3U]); } -VL_INLINE_OPT void VVortex_VX_context_slave::_sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one__16(VVortex__Syms* __restrict vlSymsp) { - VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex_VX_context_slave::_sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one__16\n"); ); +VL_INLINE_OPT void VVortex_VX_context_slave::_sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__VX_Context_one__16(VVortex__Syms* __restrict vlSymsp) { + VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex_VX_context_slave::_sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__VX_Context_one__16\n"); ); VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; // Body this->__Vdly__wspawn_state_stall = this->__PVT__wspawn_state_stall; this->__Vdly__clone_state_stall = this->__PVT__clone_state_stall; - this->__Vdlyvset__vx_register_file_master__DOT__registers__v0 = 0U; - this->__Vdlyvset__vx_register_file_master__DOT__registers__v1 = 0U; - this->__Vdlyvset__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 0U; - this->__Vdlyvset__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 0U; - this->__Vdlyvset__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 0U; - this->__Vdlyvset__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 0U; - this->__Vdlyvset__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 0U; - this->__Vdlyvset__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 0U; // ALWAYS at VX_context_slave.v:119 - if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__real_wspawn) + if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__real_wspawn) & (0U == (IData)(this->__PVT__wspawn_state_stall)))) { this->__Vdly__wspawn_state_stall = 0xaU; } else { @@ -1848,7 +656,7 @@ VL_INLINE_OPT void VVortex_VX_context_slave::_sequent__TOP__Vortex__DOT__vx_deco } } // ALWAYS at VX_context_slave.v:104 - if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__real_isclone) + if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__real_isclone) & (0U == (IData)(this->__PVT__clone_state_stall)))) { this->__Vdly__clone_state_stall = 0xaU; } else { @@ -1862,1116 +670,370 @@ VL_INLINE_OPT void VVortex_VX_context_slave::_sequent__TOP__Vortex__DOT__vx_deco } } } - // ALWAYS at VX_register_file_master_slave.v:50 - if ((((((0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - & (0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd))) - & this->in_valid[0U]) & (2U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__warp_num))) - & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__real_wspawn)))) { - this->__Vdlyvval__vx_register_file_master__DOT__registers__v0 - = this->in_write_data[0U]; - this->__Vdlyvset__vx_register_file_master__DOT__registers__v0 = 1U; - this->__Vdlyvdim0__vx_register_file_master__DOT__registers__v0 - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd; - } else { - if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__real_wspawn) - & (2U == (IData)(this->__PVT__wspawn_state_stall)))) { - this->__Vdlyvval__vx_register_file_master__DOT__registers__v1 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x1fU]; - this->__Vdlyvset__vx_register_file_master__DOT__registers__v1 = 1U; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v2 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x1eU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v3 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x1dU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v4 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x1cU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v5 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x1bU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v6 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x1aU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v7 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x19U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v8 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x18U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v9 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x17U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v10 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x16U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v11 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x15U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v12 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x14U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v13 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x13U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v14 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x12U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v15 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x11U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v16 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x10U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v17 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0xfU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v18 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0xeU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v19 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0xdU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v20 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0xcU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v21 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0xbU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v22 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0xaU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v23 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [9U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v24 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [8U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v25 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [7U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v26 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [6U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v27 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [5U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v28 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [4U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v29 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [3U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v30 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [2U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v31 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [1U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v32 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0U]; - } - } // ALWAYS at VX_register_file_slave.v:53 - if ((((((0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - & (0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd))) - & this->in_valid[3U]) & (2U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__warp_num))) - & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__real_isclone)))) { - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0 - = this->in_write_data[3U]; - this->__Vdlyvset__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 1U; - this->__Vdlyvdim0__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0 - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd; + if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + & (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xcU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x14U))))) + & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] + >> 7U)) & (2U == (0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__real_isclone)))) { + VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0x11U) + | (0x1ffe0U + & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0xfU)))), this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers, + vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[3U]); } else { - if ((((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__real_isclone) + if ((((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__real_isclone) & ((3U == this->__PVT__rd1_register[0U]) & (1U == (IData)(this->__PVT__clone_state_stall)))) - & (2U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num)))) { - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v1 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x1fU]; - this->__Vdlyvset__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 1U; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v2 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x1eU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v3 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x1dU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v4 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x1cU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v5 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x1bU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v6 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x1aU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v7 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x19U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v8 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x18U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v9 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x17U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v10 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x16U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v11 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x15U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v12 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x14U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v13 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x13U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v14 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x12U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v15 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x11U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v16 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x10U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v17 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0xfU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v18 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0xeU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v19 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0xdU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v20 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0xcU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v21 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0xbU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v22 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0xaU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v23 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [9U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v24 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [8U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v25 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [7U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v26 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [6U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v27 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [5U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v28 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [4U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v29 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [3U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v30 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [2U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v31 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [1U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v32 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0U]; + & (2U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U)))))) { + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0U] + = this->__PVT__vx_register_file_master__DOT__registers[0U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[1U] + = this->__PVT__vx_register_file_master__DOT__registers[1U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[2U] + = this->__PVT__vx_register_file_master__DOT__registers[2U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[3U] + = this->__PVT__vx_register_file_master__DOT__registers[3U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[4U] + = this->__PVT__vx_register_file_master__DOT__registers[4U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[5U] + = this->__PVT__vx_register_file_master__DOT__registers[5U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[6U] + = this->__PVT__vx_register_file_master__DOT__registers[6U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[7U] + = this->__PVT__vx_register_file_master__DOT__registers[7U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[8U] + = this->__PVT__vx_register_file_master__DOT__registers[8U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[9U] + = this->__PVT__vx_register_file_master__DOT__registers[9U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xaU] + = this->__PVT__vx_register_file_master__DOT__registers[0xaU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xbU] + = this->__PVT__vx_register_file_master__DOT__registers[0xbU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xcU] + = this->__PVT__vx_register_file_master__DOT__registers[0xcU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xdU] + = this->__PVT__vx_register_file_master__DOT__registers[0xdU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xeU] + = this->__PVT__vx_register_file_master__DOT__registers[0xeU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xfU] + = this->__PVT__vx_register_file_master__DOT__registers[0xfU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x10U] + = this->__PVT__vx_register_file_master__DOT__registers[0x10U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x11U] + = this->__PVT__vx_register_file_master__DOT__registers[0x11U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x12U] + = this->__PVT__vx_register_file_master__DOT__registers[0x12U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x13U] + = this->__PVT__vx_register_file_master__DOT__registers[0x13U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x14U] + = this->__PVT__vx_register_file_master__DOT__registers[0x14U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x15U] + = this->__PVT__vx_register_file_master__DOT__registers[0x15U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x16U] + = this->__PVT__vx_register_file_master__DOT__registers[0x16U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x17U] + = this->__PVT__vx_register_file_master__DOT__registers[0x17U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x18U] + = this->__PVT__vx_register_file_master__DOT__registers[0x18U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x19U] + = this->__PVT__vx_register_file_master__DOT__registers[0x19U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1aU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1aU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1bU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1bU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1cU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1cU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1dU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1dU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1eU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1eU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1fU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1fU]; } } // ALWAYS at VX_register_file_slave.v:53 - if ((((((0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - & (0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd))) - & this->in_valid[2U]) & (2U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__warp_num))) - & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__real_isclone)))) { - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0 - = this->in_write_data[2U]; - this->__Vdlyvset__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 1U; - this->__Vdlyvdim0__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0 - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd; + if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + & (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xcU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x14U))))) + & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] + >> 6U)) & (2U == (0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__real_isclone)))) { + VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0x11U) + | (0x1ffe0U + & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0xfU)))), this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers, + vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[2U]); } else { - if ((((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__real_isclone) + if ((((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__real_isclone) & ((2U == this->__PVT__rd1_register[0U]) & (1U == (IData)(this->__PVT__clone_state_stall)))) - & (2U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num)))) { - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v1 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x1fU]; - this->__Vdlyvset__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 1U; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v2 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x1eU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v3 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x1dU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v4 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x1cU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v5 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x1bU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v6 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x1aU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v7 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x19U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v8 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x18U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v9 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x17U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v10 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x16U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v11 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x15U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v12 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x14U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v13 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x13U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v14 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x12U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v15 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x11U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v16 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x10U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v17 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0xfU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v18 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0xeU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v19 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0xdU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v20 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0xcU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v21 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0xbU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v22 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0xaU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v23 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [9U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v24 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [8U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v25 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [7U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v26 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [6U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v27 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [5U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v28 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [4U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v29 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [3U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v30 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [2U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v31 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [1U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v32 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0U]; + & (2U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U)))))) { + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0U] + = this->__PVT__vx_register_file_master__DOT__registers[0U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[1U] + = this->__PVT__vx_register_file_master__DOT__registers[1U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[2U] + = this->__PVT__vx_register_file_master__DOT__registers[2U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[3U] + = this->__PVT__vx_register_file_master__DOT__registers[3U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[4U] + = this->__PVT__vx_register_file_master__DOT__registers[4U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[5U] + = this->__PVT__vx_register_file_master__DOT__registers[5U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[6U] + = this->__PVT__vx_register_file_master__DOT__registers[6U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[7U] + = this->__PVT__vx_register_file_master__DOT__registers[7U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[8U] + = this->__PVT__vx_register_file_master__DOT__registers[8U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[9U] + = this->__PVT__vx_register_file_master__DOT__registers[9U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xaU] + = this->__PVT__vx_register_file_master__DOT__registers[0xaU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xbU] + = this->__PVT__vx_register_file_master__DOT__registers[0xbU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xcU] + = this->__PVT__vx_register_file_master__DOT__registers[0xcU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xdU] + = this->__PVT__vx_register_file_master__DOT__registers[0xdU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xeU] + = this->__PVT__vx_register_file_master__DOT__registers[0xeU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xfU] + = this->__PVT__vx_register_file_master__DOT__registers[0xfU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x10U] + = this->__PVT__vx_register_file_master__DOT__registers[0x10U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x11U] + = this->__PVT__vx_register_file_master__DOT__registers[0x11U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x12U] + = this->__PVT__vx_register_file_master__DOT__registers[0x12U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x13U] + = this->__PVT__vx_register_file_master__DOT__registers[0x13U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x14U] + = this->__PVT__vx_register_file_master__DOT__registers[0x14U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x15U] + = this->__PVT__vx_register_file_master__DOT__registers[0x15U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x16U] + = this->__PVT__vx_register_file_master__DOT__registers[0x16U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x17U] + = this->__PVT__vx_register_file_master__DOT__registers[0x17U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x18U] + = this->__PVT__vx_register_file_master__DOT__registers[0x18U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x19U] + = this->__PVT__vx_register_file_master__DOT__registers[0x19U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1aU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1aU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1bU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1bU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1cU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1cU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1dU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1dU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1eU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1eU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1fU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1fU]; } } // ALWAYS at VX_register_file_slave.v:53 - if ((((((0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - & (0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd))) - & this->in_valid[1U]) & (2U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__warp_num))) - & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__real_isclone)))) { - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0 - = this->in_write_data[1U]; - this->__Vdlyvset__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 1U; - this->__Vdlyvdim0__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0 - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd; + if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + & (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xcU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x14U))))) + & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] + >> 5U)) & (2U == (0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__real_isclone)))) { + VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0x11U) + | (0x1ffe0U + & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0xfU)))), this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers, + vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[1U]); } else { - if ((((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__real_isclone) + if ((((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__real_isclone) & ((1U == this->__PVT__rd1_register[0U]) & (1U == (IData)(this->__PVT__clone_state_stall)))) - & (2U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num)))) { - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x1fU]; - this->__Vdlyvset__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 1U; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v2 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x1eU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v3 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x1dU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v4 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x1cU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v5 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x1bU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v6 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x1aU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v7 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x19U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v8 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x18U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v9 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x17U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v10 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x16U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v11 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x15U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v12 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x14U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v13 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x13U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v14 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x12U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v15 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x11U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v16 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x10U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v17 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0xfU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v18 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0xeU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v19 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0xdU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v20 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0xcU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v21 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0xbU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v22 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0xaU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v23 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [9U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v24 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [8U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v25 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [7U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v26 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [6U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v27 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [5U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v28 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [4U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v29 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [3U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v30 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [2U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v31 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [1U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v32 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0U]; + & (2U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U)))))) { + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0U] + = this->__PVT__vx_register_file_master__DOT__registers[0U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[1U] + = this->__PVT__vx_register_file_master__DOT__registers[1U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[2U] + = this->__PVT__vx_register_file_master__DOT__registers[2U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[3U] + = this->__PVT__vx_register_file_master__DOT__registers[3U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[4U] + = this->__PVT__vx_register_file_master__DOT__registers[4U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[5U] + = this->__PVT__vx_register_file_master__DOT__registers[5U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[6U] + = this->__PVT__vx_register_file_master__DOT__registers[6U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[7U] + = this->__PVT__vx_register_file_master__DOT__registers[7U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[8U] + = this->__PVT__vx_register_file_master__DOT__registers[8U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[9U] + = this->__PVT__vx_register_file_master__DOT__registers[9U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xaU] + = this->__PVT__vx_register_file_master__DOT__registers[0xaU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xbU] + = this->__PVT__vx_register_file_master__DOT__registers[0xbU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xcU] + = this->__PVT__vx_register_file_master__DOT__registers[0xcU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xdU] + = this->__PVT__vx_register_file_master__DOT__registers[0xdU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xeU] + = this->__PVT__vx_register_file_master__DOT__registers[0xeU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xfU] + = this->__PVT__vx_register_file_master__DOT__registers[0xfU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x10U] + = this->__PVT__vx_register_file_master__DOT__registers[0x10U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x11U] + = this->__PVT__vx_register_file_master__DOT__registers[0x11U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x12U] + = this->__PVT__vx_register_file_master__DOT__registers[0x12U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x13U] + = this->__PVT__vx_register_file_master__DOT__registers[0x13U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x14U] + = this->__PVT__vx_register_file_master__DOT__registers[0x14U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x15U] + = this->__PVT__vx_register_file_master__DOT__registers[0x15U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x16U] + = this->__PVT__vx_register_file_master__DOT__registers[0x16U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x17U] + = this->__PVT__vx_register_file_master__DOT__registers[0x17U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x18U] + = this->__PVT__vx_register_file_master__DOT__registers[0x18U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x19U] + = this->__PVT__vx_register_file_master__DOT__registers[0x19U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1aU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1aU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1bU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1bU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1cU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1cU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1dU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1dU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1eU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1eU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1fU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1fU]; } } - // ALWAYSPOST at VX_register_file_master_slave.v:53 - if (this->__Vdlyvset__vx_register_file_master__DOT__registers__v0) { - this->__PVT__vx_register_file_master__DOT__registers[this->__Vdlyvdim0__vx_register_file_master__DOT__registers__v0] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v0; - } - if (this->__Vdlyvset__vx_register_file_master__DOT__registers__v1) { - this->__PVT__vx_register_file_master__DOT__registers[0x1fU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v1; - this->__PVT__vx_register_file_master__DOT__registers[0x1eU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v2; - this->__PVT__vx_register_file_master__DOT__registers[0x1dU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v3; - this->__PVT__vx_register_file_master__DOT__registers[0x1cU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v4; - this->__PVT__vx_register_file_master__DOT__registers[0x1bU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v5; - this->__PVT__vx_register_file_master__DOT__registers[0x1aU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v6; - this->__PVT__vx_register_file_master__DOT__registers[0x19U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v7; - this->__PVT__vx_register_file_master__DOT__registers[0x18U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v8; - this->__PVT__vx_register_file_master__DOT__registers[0x17U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v9; - this->__PVT__vx_register_file_master__DOT__registers[0x16U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v10; - this->__PVT__vx_register_file_master__DOT__registers[0x15U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v11; - this->__PVT__vx_register_file_master__DOT__registers[0x14U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v12; - this->__PVT__vx_register_file_master__DOT__registers[0x13U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v13; - this->__PVT__vx_register_file_master__DOT__registers[0x12U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v14; - this->__PVT__vx_register_file_master__DOT__registers[0x11U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v15; - this->__PVT__vx_register_file_master__DOT__registers[0x10U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v16; - this->__PVT__vx_register_file_master__DOT__registers[0xfU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v17; - this->__PVT__vx_register_file_master__DOT__registers[0xeU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v18; - this->__PVT__vx_register_file_master__DOT__registers[0xdU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v19; - this->__PVT__vx_register_file_master__DOT__registers[0xcU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v20; - this->__PVT__vx_register_file_master__DOT__registers[0xbU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v21; - this->__PVT__vx_register_file_master__DOT__registers[0xaU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v22; - this->__PVT__vx_register_file_master__DOT__registers[9U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v23; - this->__PVT__vx_register_file_master__DOT__registers[8U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v24; - this->__PVT__vx_register_file_master__DOT__registers[7U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v25; - this->__PVT__vx_register_file_master__DOT__registers[6U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v26; - this->__PVT__vx_register_file_master__DOT__registers[5U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v27; - this->__PVT__vx_register_file_master__DOT__registers[4U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v28; - this->__PVT__vx_register_file_master__DOT__registers[3U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v29; - this->__PVT__vx_register_file_master__DOT__registers[2U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v30; - this->__PVT__vx_register_file_master__DOT__registers[1U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v31; - this->__PVT__vx_register_file_master__DOT__registers[0U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v32; + this->__PVT__clone_state_stall = this->__Vdly__clone_state_stall; + // ALWAYS at VX_register_file_master_slave.v:50 + if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + & (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xcU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x14U))))) + & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] + >> 4U)) & (2U == (0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__real_wspawn)))) { + VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0x11U) + | (0x1ffe0U + & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0xfU)))), this->__PVT__vx_register_file_master__DOT__registers, + vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[0U]); + } else { + if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__real_wspawn) + & (2U == (IData)(this->__PVT__wspawn_state_stall)))) { + this->__PVT__vx_register_file_master__DOT__registers[0U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0U]; + this->__PVT__vx_register_file_master__DOT__registers[1U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[1U]; + this->__PVT__vx_register_file_master__DOT__registers[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[2U]; + this->__PVT__vx_register_file_master__DOT__registers[3U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[3U]; + this->__PVT__vx_register_file_master__DOT__registers[4U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[4U]; + this->__PVT__vx_register_file_master__DOT__registers[5U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[5U]; + this->__PVT__vx_register_file_master__DOT__registers[6U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[6U]; + this->__PVT__vx_register_file_master__DOT__registers[7U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[7U]; + this->__PVT__vx_register_file_master__DOT__registers[8U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[8U]; + this->__PVT__vx_register_file_master__DOT__registers[9U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[9U]; + this->__PVT__vx_register_file_master__DOT__registers[0xaU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0xaU]; + this->__PVT__vx_register_file_master__DOT__registers[0xbU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0xbU]; + this->__PVT__vx_register_file_master__DOT__registers[0xcU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0xcU]; + this->__PVT__vx_register_file_master__DOT__registers[0xdU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0xdU]; + this->__PVT__vx_register_file_master__DOT__registers[0xeU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0xeU]; + this->__PVT__vx_register_file_master__DOT__registers[0xfU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0xfU]; + this->__PVT__vx_register_file_master__DOT__registers[0x10U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x10U]; + this->__PVT__vx_register_file_master__DOT__registers[0x11U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x11U]; + this->__PVT__vx_register_file_master__DOT__registers[0x12U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x12U]; + this->__PVT__vx_register_file_master__DOT__registers[0x13U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x13U]; + this->__PVT__vx_register_file_master__DOT__registers[0x14U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x14U]; + this->__PVT__vx_register_file_master__DOT__registers[0x15U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x15U]; + this->__PVT__vx_register_file_master__DOT__registers[0x16U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x16U]; + this->__PVT__vx_register_file_master__DOT__registers[0x17U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x17U]; + this->__PVT__vx_register_file_master__DOT__registers[0x18U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x18U]; + this->__PVT__vx_register_file_master__DOT__registers[0x19U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x19U]; + this->__PVT__vx_register_file_master__DOT__registers[0x1aU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x1aU]; + this->__PVT__vx_register_file_master__DOT__registers[0x1bU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x1bU]; + this->__PVT__vx_register_file_master__DOT__registers[0x1cU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x1cU]; + this->__PVT__vx_register_file_master__DOT__registers[0x1dU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x1dU]; + this->__PVT__vx_register_file_master__DOT__registers[0x1eU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x1eU]; + this->__PVT__vx_register_file_master__DOT__registers[0x1fU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x1fU]; + } } this->__PVT__wspawn_state_stall = this->__Vdly__wspawn_state_stall; - // ALWAYSPOST at VX_register_file_slave.v:56 - if (this->__Vdlyvset__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0) { - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[this->__Vdlyvdim0__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0; - } - if (this->__Vdlyvset__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v1) { - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1fU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v1; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1eU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v2; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1dU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v3; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1cU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v4; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1bU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v5; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1aU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v6; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x19U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v7; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x18U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v8; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x17U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v9; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x16U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v10; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x15U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v11; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x14U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v12; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x13U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v13; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x12U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v14; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x11U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v15; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x10U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v16; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xfU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v17; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xeU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v18; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xdU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v19; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xcU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v20; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xbU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v21; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xaU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v22; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[9U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v23; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[8U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v24; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[7U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v25; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[6U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v26; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[5U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v27; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[4U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v28; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[3U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v29; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[2U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v30; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[1U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v31; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v32; - } - // ALWAYSPOST at VX_register_file_slave.v:56 - if (this->__Vdlyvset__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0) { - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[this->__Vdlyvdim0__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0; - } - if (this->__Vdlyvset__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v1) { - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1fU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v1; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1eU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v2; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1dU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v3; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1cU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v4; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1bU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v5; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1aU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v6; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x19U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v7; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x18U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v8; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x17U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v9; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x16U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v10; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x15U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v11; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x14U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v12; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x13U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v13; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x12U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v14; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x11U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v15; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x10U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v16; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xfU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v17; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xeU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v18; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xdU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v19; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xcU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v20; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xbU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v21; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xaU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v22; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[9U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v23; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[8U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v24; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[7U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v25; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[6U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v26; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[5U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v27; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[4U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v28; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[3U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v29; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[2U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v30; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[1U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v31; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v32; - } - // ALWAYSPOST at VX_register_file_slave.v:56 - if (this->__Vdlyvset__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0) { - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[this->__Vdlyvdim0__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0; - } - if (this->__Vdlyvset__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1) { - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1fU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1eU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v2; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1dU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v3; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1cU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v4; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1bU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v5; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1aU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v6; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x19U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v7; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x18U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v8; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x17U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v9; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x16U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v10; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x15U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v11; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x14U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v12; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x13U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v13; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x12U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v14; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x11U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v15; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x10U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v16; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xfU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v17; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xeU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v18; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xdU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v19; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xcU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v20; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xbU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v21; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xaU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v22; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[9U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v23; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[8U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v24; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[7U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v25; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[6U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v26; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[5U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v27; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[4U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v28; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[3U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v29; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[2U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v30; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[1U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v31; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v32; - } - this->__PVT__clone_state_stall = this->__Vdly__clone_state_stall; - this->__Vcellout__vx_register_file_master__out_regs[0x1fU] - = this->__PVT__vx_register_file_master__DOT__registers - [0x1fU]; - this->__Vcellout__vx_register_file_master__out_regs[0x1eU] - = this->__PVT__vx_register_file_master__DOT__registers - [0x1eU]; - this->__Vcellout__vx_register_file_master__out_regs[0x1dU] - = this->__PVT__vx_register_file_master__DOT__registers - [0x1dU]; - this->__Vcellout__vx_register_file_master__out_regs[0x1cU] - = this->__PVT__vx_register_file_master__DOT__registers - [0x1cU]; - this->__Vcellout__vx_register_file_master__out_regs[0x1bU] - = this->__PVT__vx_register_file_master__DOT__registers - [0x1bU]; - this->__Vcellout__vx_register_file_master__out_regs[0x1aU] - = this->__PVT__vx_register_file_master__DOT__registers - [0x1aU]; - this->__Vcellout__vx_register_file_master__out_regs[0x19U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x19U]; - this->__Vcellout__vx_register_file_master__out_regs[0x18U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x18U]; - this->__Vcellout__vx_register_file_master__out_regs[0x17U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x17U]; - this->__Vcellout__vx_register_file_master__out_regs[0x16U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x16U]; - this->__Vcellout__vx_register_file_master__out_regs[0x15U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x15U]; - this->__Vcellout__vx_register_file_master__out_regs[0x14U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x14U]; - this->__Vcellout__vx_register_file_master__out_regs[0x13U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x13U]; - this->__Vcellout__vx_register_file_master__out_regs[0x12U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x12U]; - this->__Vcellout__vx_register_file_master__out_regs[0x11U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x11U]; - this->__Vcellout__vx_register_file_master__out_regs[0x10U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x10U]; - this->__Vcellout__vx_register_file_master__out_regs[0xfU] - = this->__PVT__vx_register_file_master__DOT__registers - [0xfU]; - this->__Vcellout__vx_register_file_master__out_regs[0xeU] - = this->__PVT__vx_register_file_master__DOT__registers - [0xeU]; - this->__Vcellout__vx_register_file_master__out_regs[0xdU] - = this->__PVT__vx_register_file_master__DOT__registers - [0xdU]; - this->__Vcellout__vx_register_file_master__out_regs[0xcU] - = this->__PVT__vx_register_file_master__DOT__registers - [0xcU]; - this->__Vcellout__vx_register_file_master__out_regs[0xbU] - = this->__PVT__vx_register_file_master__DOT__registers - [0xbU]; - this->__Vcellout__vx_register_file_master__out_regs[0xaU] - = this->__PVT__vx_register_file_master__DOT__registers - [0xaU]; - this->__Vcellout__vx_register_file_master__out_regs[9U] - = this->__PVT__vx_register_file_master__DOT__registers - [9U]; - this->__Vcellout__vx_register_file_master__out_regs[8U] - = this->__PVT__vx_register_file_master__DOT__registers - [8U]; - this->__Vcellout__vx_register_file_master__out_regs[7U] - = this->__PVT__vx_register_file_master__DOT__registers - [7U]; - this->__Vcellout__vx_register_file_master__out_regs[6U] - = this->__PVT__vx_register_file_master__DOT__registers - [6U]; - this->__Vcellout__vx_register_file_master__out_regs[5U] - = this->__PVT__vx_register_file_master__DOT__registers - [5U]; - this->__Vcellout__vx_register_file_master__out_regs[4U] - = this->__PVT__vx_register_file_master__DOT__registers - [4U]; - this->__Vcellout__vx_register_file_master__out_regs[3U] - = this->__PVT__vx_register_file_master__DOT__registers - [3U]; - this->__Vcellout__vx_register_file_master__out_regs[2U] - = this->__PVT__vx_register_file_master__DOT__registers - [2U]; - this->__Vcellout__vx_register_file_master__out_regs[1U] - = this->__PVT__vx_register_file_master__DOT__registers - [1U]; - this->__Vcellout__vx_register_file_master__out_regs[0U] - = this->__PVT__vx_register_file_master__DOT__registers - [0U]; - this->__PVT__clone_regsiters[0x1fU] = this->__Vcellout__vx_register_file_master__out_regs - [0x1fU]; - this->__PVT__clone_regsiters[0x1eU] = this->__Vcellout__vx_register_file_master__out_regs - [0x1eU]; - this->__PVT__clone_regsiters[0x1dU] = this->__Vcellout__vx_register_file_master__out_regs - [0x1dU]; - this->__PVT__clone_regsiters[0x1cU] = this->__Vcellout__vx_register_file_master__out_regs - [0x1cU]; - this->__PVT__clone_regsiters[0x1bU] = this->__Vcellout__vx_register_file_master__out_regs - [0x1bU]; - this->__PVT__clone_regsiters[0x1aU] = this->__Vcellout__vx_register_file_master__out_regs - [0x1aU]; - this->__PVT__clone_regsiters[0x19U] = this->__Vcellout__vx_register_file_master__out_regs - [0x19U]; - this->__PVT__clone_regsiters[0x18U] = this->__Vcellout__vx_register_file_master__out_regs - [0x18U]; - this->__PVT__clone_regsiters[0x17U] = this->__Vcellout__vx_register_file_master__out_regs - [0x17U]; - this->__PVT__clone_regsiters[0x16U] = this->__Vcellout__vx_register_file_master__out_regs - [0x16U]; - this->__PVT__clone_regsiters[0x15U] = this->__Vcellout__vx_register_file_master__out_regs - [0x15U]; - this->__PVT__clone_regsiters[0x14U] = this->__Vcellout__vx_register_file_master__out_regs - [0x14U]; - this->__PVT__clone_regsiters[0x13U] = this->__Vcellout__vx_register_file_master__out_regs - [0x13U]; - this->__PVT__clone_regsiters[0x12U] = this->__Vcellout__vx_register_file_master__out_regs - [0x12U]; - this->__PVT__clone_regsiters[0x11U] = this->__Vcellout__vx_register_file_master__out_regs - [0x11U]; - this->__PVT__clone_regsiters[0x10U] = this->__Vcellout__vx_register_file_master__out_regs - [0x10U]; - this->__PVT__clone_regsiters[0xfU] = this->__Vcellout__vx_register_file_master__out_regs - [0xfU]; - this->__PVT__clone_regsiters[0xeU] = this->__Vcellout__vx_register_file_master__out_regs - [0xeU]; - this->__PVT__clone_regsiters[0xdU] = this->__Vcellout__vx_register_file_master__out_regs - [0xdU]; - this->__PVT__clone_regsiters[0xcU] = this->__Vcellout__vx_register_file_master__out_regs - [0xcU]; - this->__PVT__clone_regsiters[0xbU] = this->__Vcellout__vx_register_file_master__out_regs - [0xbU]; - this->__PVT__clone_regsiters[0xaU] = this->__Vcellout__vx_register_file_master__out_regs - [0xaU]; - this->__PVT__clone_regsiters[9U] = this->__Vcellout__vx_register_file_master__out_regs - [9U]; - this->__PVT__clone_regsiters[8U] = this->__Vcellout__vx_register_file_master__out_regs - [8U]; - this->__PVT__clone_regsiters[7U] = this->__Vcellout__vx_register_file_master__out_regs - [7U]; - this->__PVT__clone_regsiters[6U] = this->__Vcellout__vx_register_file_master__out_regs - [6U]; - this->__PVT__clone_regsiters[5U] = this->__Vcellout__vx_register_file_master__out_regs - [5U]; - this->__PVT__clone_regsiters[4U] = this->__Vcellout__vx_register_file_master__out_regs - [4U]; - this->__PVT__clone_regsiters[3U] = this->__Vcellout__vx_register_file_master__out_regs - [3U]; - this->__PVT__clone_regsiters[2U] = this->__Vcellout__vx_register_file_master__out_regs - [2U]; - this->__PVT__clone_regsiters[1U] = this->__Vcellout__vx_register_file_master__out_regs - [1U]; - this->__PVT__clone_regsiters[0U] = this->__Vcellout__vx_register_file_master__out_regs - [0U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1fU] - = this->__PVT__clone_regsiters[0x1fU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1eU] - = this->__PVT__clone_regsiters[0x1eU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1dU] - = this->__PVT__clone_regsiters[0x1dU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1cU] - = this->__PVT__clone_regsiters[0x1cU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1bU] - = this->__PVT__clone_regsiters[0x1bU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1aU] - = this->__PVT__clone_regsiters[0x1aU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x19U] - = this->__PVT__clone_regsiters[0x19U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x18U] - = this->__PVT__clone_regsiters[0x18U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x17U] - = this->__PVT__clone_regsiters[0x17U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x16U] - = this->__PVT__clone_regsiters[0x16U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x15U] - = this->__PVT__clone_regsiters[0x15U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x14U] - = this->__PVT__clone_regsiters[0x14U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x13U] - = this->__PVT__clone_regsiters[0x13U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x12U] - = this->__PVT__clone_regsiters[0x12U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x11U] - = this->__PVT__clone_regsiters[0x11U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x10U] - = this->__PVT__clone_regsiters[0x10U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xfU] - = this->__PVT__clone_regsiters[0xfU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xeU] - = this->__PVT__clone_regsiters[0xeU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xdU] - = this->__PVT__clone_regsiters[0xdU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xcU] - = this->__PVT__clone_regsiters[0xcU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xbU] - = this->__PVT__clone_regsiters[0xbU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xaU] - = this->__PVT__clone_regsiters[0xaU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[9U] - = this->__PVT__clone_regsiters[9U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[8U] - = this->__PVT__clone_regsiters[8U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[7U] - = this->__PVT__clone_regsiters[7U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[6U] - = this->__PVT__clone_regsiters[6U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[5U] - = this->__PVT__clone_regsiters[5U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[4U] - = this->__PVT__clone_regsiters[4U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[3U] - = this->__PVT__clone_regsiters[3U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[2U] - = this->__PVT__clone_regsiters[2U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[1U] - = this->__PVT__clone_regsiters[1U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0U] - = this->__PVT__clone_regsiters[0U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1fU] - = this->__PVT__clone_regsiters[0x1fU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1eU] - = this->__PVT__clone_regsiters[0x1eU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1dU] - = this->__PVT__clone_regsiters[0x1dU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1cU] - = this->__PVT__clone_regsiters[0x1cU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1bU] - = this->__PVT__clone_regsiters[0x1bU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1aU] - = this->__PVT__clone_regsiters[0x1aU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x19U] - = this->__PVT__clone_regsiters[0x19U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x18U] - = this->__PVT__clone_regsiters[0x18U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x17U] - = this->__PVT__clone_regsiters[0x17U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x16U] - = this->__PVT__clone_regsiters[0x16U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x15U] - = this->__PVT__clone_regsiters[0x15U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x14U] - = this->__PVT__clone_regsiters[0x14U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x13U] - = this->__PVT__clone_regsiters[0x13U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x12U] - = this->__PVT__clone_regsiters[0x12U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x11U] - = this->__PVT__clone_regsiters[0x11U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x10U] - = this->__PVT__clone_regsiters[0x10U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xfU] - = this->__PVT__clone_regsiters[0xfU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xeU] - = this->__PVT__clone_regsiters[0xeU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xdU] - = this->__PVT__clone_regsiters[0xdU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xcU] - = this->__PVT__clone_regsiters[0xcU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xbU] - = this->__PVT__clone_regsiters[0xbU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xaU] - = this->__PVT__clone_regsiters[0xaU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[9U] - = this->__PVT__clone_regsiters[9U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[8U] - = this->__PVT__clone_regsiters[8U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[7U] - = this->__PVT__clone_regsiters[7U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[6U] - = this->__PVT__clone_regsiters[6U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[5U] - = this->__PVT__clone_regsiters[5U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[4U] - = this->__PVT__clone_regsiters[4U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[3U] - = this->__PVT__clone_regsiters[3U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[2U] - = this->__PVT__clone_regsiters[2U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[1U] - = this->__PVT__clone_regsiters[1U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0U] - = this->__PVT__clone_regsiters[0U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1fU] - = this->__PVT__clone_regsiters[0x1fU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1eU] - = this->__PVT__clone_regsiters[0x1eU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1dU] - = this->__PVT__clone_regsiters[0x1dU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1cU] - = this->__PVT__clone_regsiters[0x1cU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1bU] - = this->__PVT__clone_regsiters[0x1bU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1aU] - = this->__PVT__clone_regsiters[0x1aU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x19U] - = this->__PVT__clone_regsiters[0x19U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x18U] - = this->__PVT__clone_regsiters[0x18U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x17U] - = this->__PVT__clone_regsiters[0x17U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x16U] - = this->__PVT__clone_regsiters[0x16U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x15U] - = this->__PVT__clone_regsiters[0x15U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x14U] - = this->__PVT__clone_regsiters[0x14U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x13U] - = this->__PVT__clone_regsiters[0x13U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x12U] - = this->__PVT__clone_regsiters[0x12U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x11U] - = this->__PVT__clone_regsiters[0x11U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x10U] - = this->__PVT__clone_regsiters[0x10U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xfU] - = this->__PVT__clone_regsiters[0xfU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xeU] - = this->__PVT__clone_regsiters[0xeU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xdU] - = this->__PVT__clone_regsiters[0xdU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xcU] - = this->__PVT__clone_regsiters[0xcU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xbU] - = this->__PVT__clone_regsiters[0xbU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xaU] - = this->__PVT__clone_regsiters[0xaU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[9U] - = this->__PVT__clone_regsiters[9U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[8U] - = this->__PVT__clone_regsiters[8U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[7U] - = this->__PVT__clone_regsiters[7U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[6U] - = this->__PVT__clone_regsiters[6U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[5U] - = this->__PVT__clone_regsiters[5U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[4U] - = this->__PVT__clone_regsiters[4U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[3U] - = this->__PVT__clone_regsiters[3U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[2U] - = this->__PVT__clone_regsiters[2U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[1U] - = this->__PVT__clone_regsiters[1U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0U] - = this->__PVT__clone_regsiters[0U]; } -VL_INLINE_OPT void VVortex_VX_context_slave::_sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one__17(VVortex__Syms* __restrict vlSymsp) { - VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex_VX_context_slave::_sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one__17\n"); ); +VL_INLINE_OPT void VVortex_VX_context_slave::_sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__VX_Context_one__17(VVortex__Syms* __restrict vlSymsp) { + VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex_VX_context_slave::_sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__VX_Context_one__17\n"); ); VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; // Body this->__Vdly__wspawn_state_stall = this->__PVT__wspawn_state_stall; this->__Vdly__clone_state_stall = this->__PVT__clone_state_stall; - this->__Vdlyvset__vx_register_file_master__DOT__registers__v0 = 0U; - this->__Vdlyvset__vx_register_file_master__DOT__registers__v1 = 0U; - this->__Vdlyvset__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 0U; - this->__Vdlyvset__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 0U; - this->__Vdlyvset__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 0U; - this->__Vdlyvset__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 0U; - this->__Vdlyvset__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 0U; - this->__Vdlyvset__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 0U; // ALWAYS at VX_context_slave.v:119 - if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__real_wspawn) + if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__real_wspawn) & (0U == (IData)(this->__PVT__wspawn_state_stall)))) { this->__Vdly__wspawn_state_stall = 0xaU; } else { @@ -2986,7 +1048,7 @@ VL_INLINE_OPT void VVortex_VX_context_slave::_sequent__TOP__Vortex__DOT__vx_deco } } // ALWAYS at VX_context_slave.v:104 - if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__real_isclone) + if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__real_isclone) & (0U == (IData)(this->__PVT__clone_state_stall)))) { this->__Vdly__clone_state_stall = 0xaU; } else { @@ -3000,1116 +1062,370 @@ VL_INLINE_OPT void VVortex_VX_context_slave::_sequent__TOP__Vortex__DOT__vx_deco } } } - // ALWAYS at VX_register_file_master_slave.v:50 - if ((((((0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - & (0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd))) - & this->in_valid[0U]) & (3U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__warp_num))) - & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__real_wspawn)))) { - this->__Vdlyvval__vx_register_file_master__DOT__registers__v0 - = this->in_write_data[0U]; - this->__Vdlyvset__vx_register_file_master__DOT__registers__v0 = 1U; - this->__Vdlyvdim0__vx_register_file_master__DOT__registers__v0 - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd; - } else { - if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__real_wspawn) - & (2U == (IData)(this->__PVT__wspawn_state_stall)))) { - this->__Vdlyvval__vx_register_file_master__DOT__registers__v1 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x1fU]; - this->__Vdlyvset__vx_register_file_master__DOT__registers__v1 = 1U; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v2 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x1eU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v3 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x1dU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v4 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x1cU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v5 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x1bU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v6 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x1aU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v7 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x19U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v8 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x18U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v9 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x17U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v10 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x16U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v11 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x15U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v12 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x14U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v13 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x13U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v14 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x12U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v15 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x11U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v16 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x10U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v17 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0xfU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v18 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0xeU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v19 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0xdU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v20 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0xcU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v21 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0xbU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v22 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0xaU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v23 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [9U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v24 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [8U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v25 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [7U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v26 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [6U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v27 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [5U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v28 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [4U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v29 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [3U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v30 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [2U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v31 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [1U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v32 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0U]; - } - } // ALWAYS at VX_register_file_slave.v:53 - if ((((((0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - & (0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd))) - & this->in_valid[3U]) & (3U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__warp_num))) - & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__real_isclone)))) { - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0 - = this->in_write_data[3U]; - this->__Vdlyvset__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 1U; - this->__Vdlyvdim0__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0 - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd; + if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + & (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xcU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x14U))))) + & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] + >> 7U)) & (3U == (0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__real_isclone)))) { + VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0x11U) + | (0x1ffe0U + & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0xfU)))), this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers, + vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[3U]); } else { - if ((((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__real_isclone) + if ((((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__real_isclone) & ((3U == this->__PVT__rd1_register[0U]) & (1U == (IData)(this->__PVT__clone_state_stall)))) - & (3U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num)))) { - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v1 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x1fU]; - this->__Vdlyvset__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 1U; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v2 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x1eU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v3 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x1dU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v4 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x1cU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v5 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x1bU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v6 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x1aU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v7 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x19U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v8 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x18U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v9 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x17U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v10 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x16U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v11 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x15U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v12 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x14U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v13 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x13U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v14 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x12U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v15 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x11U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v16 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x10U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v17 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0xfU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v18 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0xeU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v19 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0xdU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v20 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0xcU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v21 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0xbU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v22 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0xaU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v23 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [9U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v24 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [8U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v25 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [7U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v26 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [6U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v27 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [5U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v28 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [4U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v29 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [3U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v30 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [2U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v31 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [1U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v32 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0U]; + & (3U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U)))))) { + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0U] + = this->__PVT__vx_register_file_master__DOT__registers[0U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[1U] + = this->__PVT__vx_register_file_master__DOT__registers[1U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[2U] + = this->__PVT__vx_register_file_master__DOT__registers[2U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[3U] + = this->__PVT__vx_register_file_master__DOT__registers[3U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[4U] + = this->__PVT__vx_register_file_master__DOT__registers[4U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[5U] + = this->__PVT__vx_register_file_master__DOT__registers[5U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[6U] + = this->__PVT__vx_register_file_master__DOT__registers[6U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[7U] + = this->__PVT__vx_register_file_master__DOT__registers[7U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[8U] + = this->__PVT__vx_register_file_master__DOT__registers[8U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[9U] + = this->__PVT__vx_register_file_master__DOT__registers[9U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xaU] + = this->__PVT__vx_register_file_master__DOT__registers[0xaU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xbU] + = this->__PVT__vx_register_file_master__DOT__registers[0xbU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xcU] + = this->__PVT__vx_register_file_master__DOT__registers[0xcU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xdU] + = this->__PVT__vx_register_file_master__DOT__registers[0xdU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xeU] + = this->__PVT__vx_register_file_master__DOT__registers[0xeU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xfU] + = this->__PVT__vx_register_file_master__DOT__registers[0xfU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x10U] + = this->__PVT__vx_register_file_master__DOT__registers[0x10U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x11U] + = this->__PVT__vx_register_file_master__DOT__registers[0x11U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x12U] + = this->__PVT__vx_register_file_master__DOT__registers[0x12U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x13U] + = this->__PVT__vx_register_file_master__DOT__registers[0x13U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x14U] + = this->__PVT__vx_register_file_master__DOT__registers[0x14U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x15U] + = this->__PVT__vx_register_file_master__DOT__registers[0x15U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x16U] + = this->__PVT__vx_register_file_master__DOT__registers[0x16U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x17U] + = this->__PVT__vx_register_file_master__DOT__registers[0x17U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x18U] + = this->__PVT__vx_register_file_master__DOT__registers[0x18U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x19U] + = this->__PVT__vx_register_file_master__DOT__registers[0x19U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1aU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1aU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1bU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1bU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1cU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1cU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1dU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1dU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1eU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1eU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1fU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1fU]; } } // ALWAYS at VX_register_file_slave.v:53 - if ((((((0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - & (0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd))) - & this->in_valid[2U]) & (3U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__warp_num))) - & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__real_isclone)))) { - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0 - = this->in_write_data[2U]; - this->__Vdlyvset__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 1U; - this->__Vdlyvdim0__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0 - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd; + if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + & (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xcU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x14U))))) + & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] + >> 6U)) & (3U == (0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__real_isclone)))) { + VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0x11U) + | (0x1ffe0U + & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0xfU)))), this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers, + vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[2U]); } else { - if ((((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__real_isclone) + if ((((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__real_isclone) & ((2U == this->__PVT__rd1_register[0U]) & (1U == (IData)(this->__PVT__clone_state_stall)))) - & (3U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num)))) { - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v1 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x1fU]; - this->__Vdlyvset__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 1U; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v2 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x1eU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v3 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x1dU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v4 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x1cU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v5 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x1bU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v6 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x1aU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v7 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x19U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v8 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x18U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v9 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x17U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v10 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x16U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v11 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x15U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v12 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x14U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v13 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x13U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v14 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x12U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v15 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x11U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v16 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x10U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v17 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0xfU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v18 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0xeU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v19 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0xdU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v20 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0xcU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v21 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0xbU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v22 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0xaU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v23 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [9U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v24 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [8U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v25 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [7U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v26 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [6U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v27 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [5U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v28 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [4U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v29 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [3U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v30 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [2U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v31 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [1U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v32 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0U]; + & (3U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U)))))) { + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0U] + = this->__PVT__vx_register_file_master__DOT__registers[0U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[1U] + = this->__PVT__vx_register_file_master__DOT__registers[1U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[2U] + = this->__PVT__vx_register_file_master__DOT__registers[2U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[3U] + = this->__PVT__vx_register_file_master__DOT__registers[3U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[4U] + = this->__PVT__vx_register_file_master__DOT__registers[4U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[5U] + = this->__PVT__vx_register_file_master__DOT__registers[5U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[6U] + = this->__PVT__vx_register_file_master__DOT__registers[6U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[7U] + = this->__PVT__vx_register_file_master__DOT__registers[7U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[8U] + = this->__PVT__vx_register_file_master__DOT__registers[8U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[9U] + = this->__PVT__vx_register_file_master__DOT__registers[9U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xaU] + = this->__PVT__vx_register_file_master__DOT__registers[0xaU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xbU] + = this->__PVT__vx_register_file_master__DOT__registers[0xbU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xcU] + = this->__PVT__vx_register_file_master__DOT__registers[0xcU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xdU] + = this->__PVT__vx_register_file_master__DOT__registers[0xdU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xeU] + = this->__PVT__vx_register_file_master__DOT__registers[0xeU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xfU] + = this->__PVT__vx_register_file_master__DOT__registers[0xfU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x10U] + = this->__PVT__vx_register_file_master__DOT__registers[0x10U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x11U] + = this->__PVT__vx_register_file_master__DOT__registers[0x11U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x12U] + = this->__PVT__vx_register_file_master__DOT__registers[0x12U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x13U] + = this->__PVT__vx_register_file_master__DOT__registers[0x13U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x14U] + = this->__PVT__vx_register_file_master__DOT__registers[0x14U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x15U] + = this->__PVT__vx_register_file_master__DOT__registers[0x15U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x16U] + = this->__PVT__vx_register_file_master__DOT__registers[0x16U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x17U] + = this->__PVT__vx_register_file_master__DOT__registers[0x17U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x18U] + = this->__PVT__vx_register_file_master__DOT__registers[0x18U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x19U] + = this->__PVT__vx_register_file_master__DOT__registers[0x19U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1aU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1aU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1bU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1bU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1cU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1cU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1dU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1dU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1eU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1eU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1fU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1fU]; } } // ALWAYS at VX_register_file_slave.v:53 - if ((((((0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - & (0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd))) - & this->in_valid[1U]) & (3U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__warp_num))) - & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__real_isclone)))) { - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0 - = this->in_write_data[1U]; - this->__Vdlyvset__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 1U; - this->__Vdlyvdim0__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0 - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd; + if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + & (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xcU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x14U))))) + & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] + >> 5U)) & (3U == (0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__real_isclone)))) { + VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0x11U) + | (0x1ffe0U + & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0xfU)))), this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers, + vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[1U]); } else { - if ((((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__real_isclone) + if ((((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__real_isclone) & ((1U == this->__PVT__rd1_register[0U]) & (1U == (IData)(this->__PVT__clone_state_stall)))) - & (3U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num)))) { - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x1fU]; - this->__Vdlyvset__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 1U; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v2 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x1eU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v3 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x1dU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v4 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x1cU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v5 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x1bU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v6 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x1aU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v7 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x19U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v8 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x18U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v9 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x17U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v10 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x16U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v11 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x15U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v12 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x14U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v13 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x13U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v14 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x12U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v15 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x11U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v16 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x10U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v17 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0xfU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v18 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0xeU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v19 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0xdU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v20 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0xcU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v21 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0xbU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v22 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0xaU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v23 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [9U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v24 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [8U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v25 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [7U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v26 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [6U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v27 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [5U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v28 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [4U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v29 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [3U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v30 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [2U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v31 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [1U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v32 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0U]; + & (3U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U)))))) { + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0U] + = this->__PVT__vx_register_file_master__DOT__registers[0U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[1U] + = this->__PVT__vx_register_file_master__DOT__registers[1U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[2U] + = this->__PVT__vx_register_file_master__DOT__registers[2U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[3U] + = this->__PVT__vx_register_file_master__DOT__registers[3U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[4U] + = this->__PVT__vx_register_file_master__DOT__registers[4U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[5U] + = this->__PVT__vx_register_file_master__DOT__registers[5U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[6U] + = this->__PVT__vx_register_file_master__DOT__registers[6U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[7U] + = this->__PVT__vx_register_file_master__DOT__registers[7U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[8U] + = this->__PVT__vx_register_file_master__DOT__registers[8U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[9U] + = this->__PVT__vx_register_file_master__DOT__registers[9U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xaU] + = this->__PVT__vx_register_file_master__DOT__registers[0xaU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xbU] + = this->__PVT__vx_register_file_master__DOT__registers[0xbU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xcU] + = this->__PVT__vx_register_file_master__DOT__registers[0xcU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xdU] + = this->__PVT__vx_register_file_master__DOT__registers[0xdU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xeU] + = this->__PVT__vx_register_file_master__DOT__registers[0xeU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xfU] + = this->__PVT__vx_register_file_master__DOT__registers[0xfU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x10U] + = this->__PVT__vx_register_file_master__DOT__registers[0x10U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x11U] + = this->__PVT__vx_register_file_master__DOT__registers[0x11U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x12U] + = this->__PVT__vx_register_file_master__DOT__registers[0x12U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x13U] + = this->__PVT__vx_register_file_master__DOT__registers[0x13U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x14U] + = this->__PVT__vx_register_file_master__DOT__registers[0x14U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x15U] + = this->__PVT__vx_register_file_master__DOT__registers[0x15U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x16U] + = this->__PVT__vx_register_file_master__DOT__registers[0x16U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x17U] + = this->__PVT__vx_register_file_master__DOT__registers[0x17U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x18U] + = this->__PVT__vx_register_file_master__DOT__registers[0x18U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x19U] + = this->__PVT__vx_register_file_master__DOT__registers[0x19U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1aU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1aU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1bU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1bU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1cU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1cU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1dU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1dU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1eU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1eU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1fU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1fU]; } } - // ALWAYSPOST at VX_register_file_master_slave.v:53 - if (this->__Vdlyvset__vx_register_file_master__DOT__registers__v0) { - this->__PVT__vx_register_file_master__DOT__registers[this->__Vdlyvdim0__vx_register_file_master__DOT__registers__v0] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v0; - } - if (this->__Vdlyvset__vx_register_file_master__DOT__registers__v1) { - this->__PVT__vx_register_file_master__DOT__registers[0x1fU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v1; - this->__PVT__vx_register_file_master__DOT__registers[0x1eU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v2; - this->__PVT__vx_register_file_master__DOT__registers[0x1dU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v3; - this->__PVT__vx_register_file_master__DOT__registers[0x1cU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v4; - this->__PVT__vx_register_file_master__DOT__registers[0x1bU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v5; - this->__PVT__vx_register_file_master__DOT__registers[0x1aU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v6; - this->__PVT__vx_register_file_master__DOT__registers[0x19U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v7; - this->__PVT__vx_register_file_master__DOT__registers[0x18U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v8; - this->__PVT__vx_register_file_master__DOT__registers[0x17U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v9; - this->__PVT__vx_register_file_master__DOT__registers[0x16U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v10; - this->__PVT__vx_register_file_master__DOT__registers[0x15U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v11; - this->__PVT__vx_register_file_master__DOT__registers[0x14U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v12; - this->__PVT__vx_register_file_master__DOT__registers[0x13U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v13; - this->__PVT__vx_register_file_master__DOT__registers[0x12U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v14; - this->__PVT__vx_register_file_master__DOT__registers[0x11U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v15; - this->__PVT__vx_register_file_master__DOT__registers[0x10U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v16; - this->__PVT__vx_register_file_master__DOT__registers[0xfU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v17; - this->__PVT__vx_register_file_master__DOT__registers[0xeU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v18; - this->__PVT__vx_register_file_master__DOT__registers[0xdU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v19; - this->__PVT__vx_register_file_master__DOT__registers[0xcU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v20; - this->__PVT__vx_register_file_master__DOT__registers[0xbU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v21; - this->__PVT__vx_register_file_master__DOT__registers[0xaU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v22; - this->__PVT__vx_register_file_master__DOT__registers[9U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v23; - this->__PVT__vx_register_file_master__DOT__registers[8U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v24; - this->__PVT__vx_register_file_master__DOT__registers[7U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v25; - this->__PVT__vx_register_file_master__DOT__registers[6U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v26; - this->__PVT__vx_register_file_master__DOT__registers[5U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v27; - this->__PVT__vx_register_file_master__DOT__registers[4U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v28; - this->__PVT__vx_register_file_master__DOT__registers[3U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v29; - this->__PVT__vx_register_file_master__DOT__registers[2U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v30; - this->__PVT__vx_register_file_master__DOT__registers[1U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v31; - this->__PVT__vx_register_file_master__DOT__registers[0U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v32; + this->__PVT__clone_state_stall = this->__Vdly__clone_state_stall; + // ALWAYS at VX_register_file_master_slave.v:50 + if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + & (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xcU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x14U))))) + & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] + >> 4U)) & (3U == (0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__real_wspawn)))) { + VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0x11U) + | (0x1ffe0U + & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0xfU)))), this->__PVT__vx_register_file_master__DOT__registers, + vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[0U]); + } else { + if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__real_wspawn) + & (2U == (IData)(this->__PVT__wspawn_state_stall)))) { + this->__PVT__vx_register_file_master__DOT__registers[0U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0U]; + this->__PVT__vx_register_file_master__DOT__registers[1U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[1U]; + this->__PVT__vx_register_file_master__DOT__registers[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[2U]; + this->__PVT__vx_register_file_master__DOT__registers[3U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[3U]; + this->__PVT__vx_register_file_master__DOT__registers[4U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[4U]; + this->__PVT__vx_register_file_master__DOT__registers[5U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[5U]; + this->__PVT__vx_register_file_master__DOT__registers[6U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[6U]; + this->__PVT__vx_register_file_master__DOT__registers[7U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[7U]; + this->__PVT__vx_register_file_master__DOT__registers[8U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[8U]; + this->__PVT__vx_register_file_master__DOT__registers[9U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[9U]; + this->__PVT__vx_register_file_master__DOT__registers[0xaU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0xaU]; + this->__PVT__vx_register_file_master__DOT__registers[0xbU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0xbU]; + this->__PVT__vx_register_file_master__DOT__registers[0xcU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0xcU]; + this->__PVT__vx_register_file_master__DOT__registers[0xdU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0xdU]; + this->__PVT__vx_register_file_master__DOT__registers[0xeU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0xeU]; + this->__PVT__vx_register_file_master__DOT__registers[0xfU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0xfU]; + this->__PVT__vx_register_file_master__DOT__registers[0x10U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x10U]; + this->__PVT__vx_register_file_master__DOT__registers[0x11U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x11U]; + this->__PVT__vx_register_file_master__DOT__registers[0x12U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x12U]; + this->__PVT__vx_register_file_master__DOT__registers[0x13U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x13U]; + this->__PVT__vx_register_file_master__DOT__registers[0x14U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x14U]; + this->__PVT__vx_register_file_master__DOT__registers[0x15U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x15U]; + this->__PVT__vx_register_file_master__DOT__registers[0x16U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x16U]; + this->__PVT__vx_register_file_master__DOT__registers[0x17U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x17U]; + this->__PVT__vx_register_file_master__DOT__registers[0x18U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x18U]; + this->__PVT__vx_register_file_master__DOT__registers[0x19U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x19U]; + this->__PVT__vx_register_file_master__DOT__registers[0x1aU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x1aU]; + this->__PVT__vx_register_file_master__DOT__registers[0x1bU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x1bU]; + this->__PVT__vx_register_file_master__DOT__registers[0x1cU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x1cU]; + this->__PVT__vx_register_file_master__DOT__registers[0x1dU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x1dU]; + this->__PVT__vx_register_file_master__DOT__registers[0x1eU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x1eU]; + this->__PVT__vx_register_file_master__DOT__registers[0x1fU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x1fU]; + } } this->__PVT__wspawn_state_stall = this->__Vdly__wspawn_state_stall; - // ALWAYSPOST at VX_register_file_slave.v:56 - if (this->__Vdlyvset__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0) { - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[this->__Vdlyvdim0__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0; - } - if (this->__Vdlyvset__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v1) { - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1fU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v1; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1eU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v2; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1dU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v3; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1cU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v4; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1bU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v5; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1aU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v6; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x19U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v7; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x18U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v8; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x17U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v9; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x16U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v10; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x15U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v11; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x14U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v12; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x13U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v13; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x12U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v14; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x11U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v15; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x10U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v16; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xfU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v17; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xeU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v18; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xdU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v19; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xcU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v20; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xbU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v21; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xaU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v22; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[9U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v23; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[8U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v24; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[7U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v25; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[6U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v26; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[5U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v27; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[4U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v28; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[3U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v29; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[2U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v30; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[1U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v31; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v32; - } - // ALWAYSPOST at VX_register_file_slave.v:56 - if (this->__Vdlyvset__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0) { - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[this->__Vdlyvdim0__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0; - } - if (this->__Vdlyvset__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v1) { - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1fU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v1; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1eU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v2; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1dU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v3; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1cU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v4; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1bU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v5; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1aU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v6; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x19U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v7; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x18U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v8; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x17U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v9; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x16U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v10; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x15U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v11; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x14U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v12; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x13U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v13; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x12U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v14; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x11U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v15; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x10U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v16; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xfU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v17; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xeU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v18; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xdU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v19; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xcU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v20; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xbU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v21; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xaU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v22; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[9U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v23; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[8U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v24; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[7U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v25; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[6U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v26; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[5U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v27; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[4U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v28; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[3U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v29; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[2U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v30; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[1U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v31; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v32; - } - // ALWAYSPOST at VX_register_file_slave.v:56 - if (this->__Vdlyvset__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0) { - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[this->__Vdlyvdim0__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0; - } - if (this->__Vdlyvset__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1) { - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1fU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1eU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v2; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1dU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v3; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1cU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v4; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1bU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v5; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1aU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v6; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x19U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v7; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x18U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v8; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x17U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v9; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x16U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v10; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x15U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v11; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x14U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v12; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x13U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v13; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x12U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v14; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x11U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v15; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x10U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v16; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xfU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v17; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xeU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v18; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xdU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v19; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xcU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v20; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xbU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v21; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xaU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v22; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[9U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v23; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[8U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v24; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[7U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v25; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[6U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v26; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[5U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v27; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[4U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v28; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[3U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v29; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[2U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v30; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[1U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v31; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v32; - } - this->__PVT__clone_state_stall = this->__Vdly__clone_state_stall; - this->__Vcellout__vx_register_file_master__out_regs[0x1fU] - = this->__PVT__vx_register_file_master__DOT__registers - [0x1fU]; - this->__Vcellout__vx_register_file_master__out_regs[0x1eU] - = this->__PVT__vx_register_file_master__DOT__registers - [0x1eU]; - this->__Vcellout__vx_register_file_master__out_regs[0x1dU] - = this->__PVT__vx_register_file_master__DOT__registers - [0x1dU]; - this->__Vcellout__vx_register_file_master__out_regs[0x1cU] - = this->__PVT__vx_register_file_master__DOT__registers - [0x1cU]; - this->__Vcellout__vx_register_file_master__out_regs[0x1bU] - = this->__PVT__vx_register_file_master__DOT__registers - [0x1bU]; - this->__Vcellout__vx_register_file_master__out_regs[0x1aU] - = this->__PVT__vx_register_file_master__DOT__registers - [0x1aU]; - this->__Vcellout__vx_register_file_master__out_regs[0x19U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x19U]; - this->__Vcellout__vx_register_file_master__out_regs[0x18U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x18U]; - this->__Vcellout__vx_register_file_master__out_regs[0x17U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x17U]; - this->__Vcellout__vx_register_file_master__out_regs[0x16U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x16U]; - this->__Vcellout__vx_register_file_master__out_regs[0x15U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x15U]; - this->__Vcellout__vx_register_file_master__out_regs[0x14U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x14U]; - this->__Vcellout__vx_register_file_master__out_regs[0x13U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x13U]; - this->__Vcellout__vx_register_file_master__out_regs[0x12U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x12U]; - this->__Vcellout__vx_register_file_master__out_regs[0x11U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x11U]; - this->__Vcellout__vx_register_file_master__out_regs[0x10U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x10U]; - this->__Vcellout__vx_register_file_master__out_regs[0xfU] - = this->__PVT__vx_register_file_master__DOT__registers - [0xfU]; - this->__Vcellout__vx_register_file_master__out_regs[0xeU] - = this->__PVT__vx_register_file_master__DOT__registers - [0xeU]; - this->__Vcellout__vx_register_file_master__out_regs[0xdU] - = this->__PVT__vx_register_file_master__DOT__registers - [0xdU]; - this->__Vcellout__vx_register_file_master__out_regs[0xcU] - = this->__PVT__vx_register_file_master__DOT__registers - [0xcU]; - this->__Vcellout__vx_register_file_master__out_regs[0xbU] - = this->__PVT__vx_register_file_master__DOT__registers - [0xbU]; - this->__Vcellout__vx_register_file_master__out_regs[0xaU] - = this->__PVT__vx_register_file_master__DOT__registers - [0xaU]; - this->__Vcellout__vx_register_file_master__out_regs[9U] - = this->__PVT__vx_register_file_master__DOT__registers - [9U]; - this->__Vcellout__vx_register_file_master__out_regs[8U] - = this->__PVT__vx_register_file_master__DOT__registers - [8U]; - this->__Vcellout__vx_register_file_master__out_regs[7U] - = this->__PVT__vx_register_file_master__DOT__registers - [7U]; - this->__Vcellout__vx_register_file_master__out_regs[6U] - = this->__PVT__vx_register_file_master__DOT__registers - [6U]; - this->__Vcellout__vx_register_file_master__out_regs[5U] - = this->__PVT__vx_register_file_master__DOT__registers - [5U]; - this->__Vcellout__vx_register_file_master__out_regs[4U] - = this->__PVT__vx_register_file_master__DOT__registers - [4U]; - this->__Vcellout__vx_register_file_master__out_regs[3U] - = this->__PVT__vx_register_file_master__DOT__registers - [3U]; - this->__Vcellout__vx_register_file_master__out_regs[2U] - = this->__PVT__vx_register_file_master__DOT__registers - [2U]; - this->__Vcellout__vx_register_file_master__out_regs[1U] - = this->__PVT__vx_register_file_master__DOT__registers - [1U]; - this->__Vcellout__vx_register_file_master__out_regs[0U] - = this->__PVT__vx_register_file_master__DOT__registers - [0U]; - this->__PVT__clone_regsiters[0x1fU] = this->__Vcellout__vx_register_file_master__out_regs - [0x1fU]; - this->__PVT__clone_regsiters[0x1eU] = this->__Vcellout__vx_register_file_master__out_regs - [0x1eU]; - this->__PVT__clone_regsiters[0x1dU] = this->__Vcellout__vx_register_file_master__out_regs - [0x1dU]; - this->__PVT__clone_regsiters[0x1cU] = this->__Vcellout__vx_register_file_master__out_regs - [0x1cU]; - this->__PVT__clone_regsiters[0x1bU] = this->__Vcellout__vx_register_file_master__out_regs - [0x1bU]; - this->__PVT__clone_regsiters[0x1aU] = this->__Vcellout__vx_register_file_master__out_regs - [0x1aU]; - this->__PVT__clone_regsiters[0x19U] = this->__Vcellout__vx_register_file_master__out_regs - [0x19U]; - this->__PVT__clone_regsiters[0x18U] = this->__Vcellout__vx_register_file_master__out_regs - [0x18U]; - this->__PVT__clone_regsiters[0x17U] = this->__Vcellout__vx_register_file_master__out_regs - [0x17U]; - this->__PVT__clone_regsiters[0x16U] = this->__Vcellout__vx_register_file_master__out_regs - [0x16U]; - this->__PVT__clone_regsiters[0x15U] = this->__Vcellout__vx_register_file_master__out_regs - [0x15U]; - this->__PVT__clone_regsiters[0x14U] = this->__Vcellout__vx_register_file_master__out_regs - [0x14U]; - this->__PVT__clone_regsiters[0x13U] = this->__Vcellout__vx_register_file_master__out_regs - [0x13U]; - this->__PVT__clone_regsiters[0x12U] = this->__Vcellout__vx_register_file_master__out_regs - [0x12U]; - this->__PVT__clone_regsiters[0x11U] = this->__Vcellout__vx_register_file_master__out_regs - [0x11U]; - this->__PVT__clone_regsiters[0x10U] = this->__Vcellout__vx_register_file_master__out_regs - [0x10U]; - this->__PVT__clone_regsiters[0xfU] = this->__Vcellout__vx_register_file_master__out_regs - [0xfU]; - this->__PVT__clone_regsiters[0xeU] = this->__Vcellout__vx_register_file_master__out_regs - [0xeU]; - this->__PVT__clone_regsiters[0xdU] = this->__Vcellout__vx_register_file_master__out_regs - [0xdU]; - this->__PVT__clone_regsiters[0xcU] = this->__Vcellout__vx_register_file_master__out_regs - [0xcU]; - this->__PVT__clone_regsiters[0xbU] = this->__Vcellout__vx_register_file_master__out_regs - [0xbU]; - this->__PVT__clone_regsiters[0xaU] = this->__Vcellout__vx_register_file_master__out_regs - [0xaU]; - this->__PVT__clone_regsiters[9U] = this->__Vcellout__vx_register_file_master__out_regs - [9U]; - this->__PVT__clone_regsiters[8U] = this->__Vcellout__vx_register_file_master__out_regs - [8U]; - this->__PVT__clone_regsiters[7U] = this->__Vcellout__vx_register_file_master__out_regs - [7U]; - this->__PVT__clone_regsiters[6U] = this->__Vcellout__vx_register_file_master__out_regs - [6U]; - this->__PVT__clone_regsiters[5U] = this->__Vcellout__vx_register_file_master__out_regs - [5U]; - this->__PVT__clone_regsiters[4U] = this->__Vcellout__vx_register_file_master__out_regs - [4U]; - this->__PVT__clone_regsiters[3U] = this->__Vcellout__vx_register_file_master__out_regs - [3U]; - this->__PVT__clone_regsiters[2U] = this->__Vcellout__vx_register_file_master__out_regs - [2U]; - this->__PVT__clone_regsiters[1U] = this->__Vcellout__vx_register_file_master__out_regs - [1U]; - this->__PVT__clone_regsiters[0U] = this->__Vcellout__vx_register_file_master__out_regs - [0U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1fU] - = this->__PVT__clone_regsiters[0x1fU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1eU] - = this->__PVT__clone_regsiters[0x1eU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1dU] - = this->__PVT__clone_regsiters[0x1dU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1cU] - = this->__PVT__clone_regsiters[0x1cU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1bU] - = this->__PVT__clone_regsiters[0x1bU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1aU] - = this->__PVT__clone_regsiters[0x1aU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x19U] - = this->__PVT__clone_regsiters[0x19U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x18U] - = this->__PVT__clone_regsiters[0x18U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x17U] - = this->__PVT__clone_regsiters[0x17U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x16U] - = this->__PVT__clone_regsiters[0x16U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x15U] - = this->__PVT__clone_regsiters[0x15U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x14U] - = this->__PVT__clone_regsiters[0x14U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x13U] - = this->__PVT__clone_regsiters[0x13U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x12U] - = this->__PVT__clone_regsiters[0x12U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x11U] - = this->__PVT__clone_regsiters[0x11U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x10U] - = this->__PVT__clone_regsiters[0x10U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xfU] - = this->__PVT__clone_regsiters[0xfU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xeU] - = this->__PVT__clone_regsiters[0xeU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xdU] - = this->__PVT__clone_regsiters[0xdU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xcU] - = this->__PVT__clone_regsiters[0xcU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xbU] - = this->__PVT__clone_regsiters[0xbU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xaU] - = this->__PVT__clone_regsiters[0xaU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[9U] - = this->__PVT__clone_regsiters[9U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[8U] - = this->__PVT__clone_regsiters[8U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[7U] - = this->__PVT__clone_regsiters[7U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[6U] - = this->__PVT__clone_regsiters[6U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[5U] - = this->__PVT__clone_regsiters[5U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[4U] - = this->__PVT__clone_regsiters[4U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[3U] - = this->__PVT__clone_regsiters[3U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[2U] - = this->__PVT__clone_regsiters[2U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[1U] - = this->__PVT__clone_regsiters[1U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0U] - = this->__PVT__clone_regsiters[0U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1fU] - = this->__PVT__clone_regsiters[0x1fU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1eU] - = this->__PVT__clone_regsiters[0x1eU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1dU] - = this->__PVT__clone_regsiters[0x1dU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1cU] - = this->__PVT__clone_regsiters[0x1cU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1bU] - = this->__PVT__clone_regsiters[0x1bU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1aU] - = this->__PVT__clone_regsiters[0x1aU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x19U] - = this->__PVT__clone_regsiters[0x19U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x18U] - = this->__PVT__clone_regsiters[0x18U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x17U] - = this->__PVT__clone_regsiters[0x17U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x16U] - = this->__PVT__clone_regsiters[0x16U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x15U] - = this->__PVT__clone_regsiters[0x15U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x14U] - = this->__PVT__clone_regsiters[0x14U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x13U] - = this->__PVT__clone_regsiters[0x13U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x12U] - = this->__PVT__clone_regsiters[0x12U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x11U] - = this->__PVT__clone_regsiters[0x11U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x10U] - = this->__PVT__clone_regsiters[0x10U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xfU] - = this->__PVT__clone_regsiters[0xfU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xeU] - = this->__PVT__clone_regsiters[0xeU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xdU] - = this->__PVT__clone_regsiters[0xdU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xcU] - = this->__PVT__clone_regsiters[0xcU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xbU] - = this->__PVT__clone_regsiters[0xbU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xaU] - = this->__PVT__clone_regsiters[0xaU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[9U] - = this->__PVT__clone_regsiters[9U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[8U] - = this->__PVT__clone_regsiters[8U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[7U] - = this->__PVT__clone_regsiters[7U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[6U] - = this->__PVT__clone_regsiters[6U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[5U] - = this->__PVT__clone_regsiters[5U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[4U] - = this->__PVT__clone_regsiters[4U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[3U] - = this->__PVT__clone_regsiters[3U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[2U] - = this->__PVT__clone_regsiters[2U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[1U] - = this->__PVT__clone_regsiters[1U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0U] - = this->__PVT__clone_regsiters[0U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1fU] - = this->__PVT__clone_regsiters[0x1fU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1eU] - = this->__PVT__clone_regsiters[0x1eU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1dU] - = this->__PVT__clone_regsiters[0x1dU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1cU] - = this->__PVT__clone_regsiters[0x1cU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1bU] - = this->__PVT__clone_regsiters[0x1bU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1aU] - = this->__PVT__clone_regsiters[0x1aU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x19U] - = this->__PVT__clone_regsiters[0x19U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x18U] - = this->__PVT__clone_regsiters[0x18U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x17U] - = this->__PVT__clone_regsiters[0x17U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x16U] - = this->__PVT__clone_regsiters[0x16U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x15U] - = this->__PVT__clone_regsiters[0x15U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x14U] - = this->__PVT__clone_regsiters[0x14U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x13U] - = this->__PVT__clone_regsiters[0x13U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x12U] - = this->__PVT__clone_regsiters[0x12U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x11U] - = this->__PVT__clone_regsiters[0x11U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x10U] - = this->__PVT__clone_regsiters[0x10U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xfU] - = this->__PVT__clone_regsiters[0xfU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xeU] - = this->__PVT__clone_regsiters[0xeU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xdU] - = this->__PVT__clone_regsiters[0xdU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xcU] - = this->__PVT__clone_regsiters[0xcU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xbU] - = this->__PVT__clone_regsiters[0xbU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xaU] - = this->__PVT__clone_regsiters[0xaU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[9U] - = this->__PVT__clone_regsiters[9U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[8U] - = this->__PVT__clone_regsiters[8U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[7U] - = this->__PVT__clone_regsiters[7U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[6U] - = this->__PVT__clone_regsiters[6U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[5U] - = this->__PVT__clone_regsiters[5U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[4U] - = this->__PVT__clone_regsiters[4U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[3U] - = this->__PVT__clone_regsiters[3U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[2U] - = this->__PVT__clone_regsiters[2U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[1U] - = this->__PVT__clone_regsiters[1U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0U] - = this->__PVT__clone_regsiters[0U]; } -VL_INLINE_OPT void VVortex_VX_context_slave::_sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one__18(VVortex__Syms* __restrict vlSymsp) { - VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex_VX_context_slave::_sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one__18\n"); ); +VL_INLINE_OPT void VVortex_VX_context_slave::_sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__VX_Context_one__18(VVortex__Syms* __restrict vlSymsp) { + VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex_VX_context_slave::_sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__VX_Context_one__18\n"); ); VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; // Body this->__Vdly__wspawn_state_stall = this->__PVT__wspawn_state_stall; this->__Vdly__clone_state_stall = this->__PVT__clone_state_stall; - this->__Vdlyvset__vx_register_file_master__DOT__registers__v0 = 0U; - this->__Vdlyvset__vx_register_file_master__DOT__registers__v1 = 0U; - this->__Vdlyvset__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 0U; - this->__Vdlyvset__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 0U; - this->__Vdlyvset__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 0U; - this->__Vdlyvset__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 0U; - this->__Vdlyvset__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 0U; - this->__Vdlyvset__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 0U; // ALWAYS at VX_context_slave.v:119 - if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__real_wspawn) + if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__real_wspawn) & (0U == (IData)(this->__PVT__wspawn_state_stall)))) { this->__Vdly__wspawn_state_stall = 0xaU; } else { @@ -4124,7 +1440,7 @@ VL_INLINE_OPT void VVortex_VX_context_slave::_sequent__TOP__Vortex__DOT__vx_deco } } // ALWAYS at VX_context_slave.v:104 - if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__real_isclone) + if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__real_isclone) & (0U == (IData)(this->__PVT__clone_state_stall)))) { this->__Vdly__clone_state_stall = 0xaU; } else { @@ -4138,1116 +1454,370 @@ VL_INLINE_OPT void VVortex_VX_context_slave::_sequent__TOP__Vortex__DOT__vx_deco } } } - // ALWAYS at VX_register_file_master_slave.v:50 - if ((((((0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - & (0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd))) - & this->in_valid[0U]) & (4U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__warp_num))) - & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__real_wspawn)))) { - this->__Vdlyvval__vx_register_file_master__DOT__registers__v0 - = this->in_write_data[0U]; - this->__Vdlyvset__vx_register_file_master__DOT__registers__v0 = 1U; - this->__Vdlyvdim0__vx_register_file_master__DOT__registers__v0 - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd; - } else { - if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__real_wspawn) - & (2U == (IData)(this->__PVT__wspawn_state_stall)))) { - this->__Vdlyvval__vx_register_file_master__DOT__registers__v1 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x1fU]; - this->__Vdlyvset__vx_register_file_master__DOT__registers__v1 = 1U; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v2 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x1eU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v3 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x1dU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v4 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x1cU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v5 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x1bU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v6 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x1aU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v7 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x19U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v8 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x18U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v9 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x17U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v10 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x16U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v11 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x15U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v12 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x14U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v13 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x13U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v14 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x12U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v15 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x11U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v16 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x10U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v17 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0xfU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v18 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0xeU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v19 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0xdU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v20 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0xcU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v21 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0xbU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v22 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0xaU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v23 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [9U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v24 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [8U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v25 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [7U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v26 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [6U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v27 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [5U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v28 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [4U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v29 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [3U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v30 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [2U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v31 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [1U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v32 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0U]; - } - } // ALWAYS at VX_register_file_slave.v:53 - if ((((((0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - & (0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd))) - & this->in_valid[3U]) & (4U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__warp_num))) - & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__real_isclone)))) { - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0 - = this->in_write_data[3U]; - this->__Vdlyvset__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 1U; - this->__Vdlyvdim0__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0 - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd; + if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + & (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xcU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x14U))))) + & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] + >> 7U)) & (4U == (0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__real_isclone)))) { + VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0x11U) + | (0x1ffe0U + & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0xfU)))), this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers, + vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[3U]); } else { - if ((((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__real_isclone) + if ((((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__real_isclone) & ((3U == this->__PVT__rd1_register[0U]) & (1U == (IData)(this->__PVT__clone_state_stall)))) - & (4U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num)))) { - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v1 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x1fU]; - this->__Vdlyvset__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 1U; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v2 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x1eU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v3 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x1dU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v4 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x1cU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v5 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x1bU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v6 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x1aU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v7 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x19U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v8 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x18U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v9 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x17U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v10 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x16U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v11 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x15U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v12 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x14U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v13 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x13U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v14 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x12U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v15 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x11U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v16 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x10U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v17 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0xfU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v18 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0xeU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v19 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0xdU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v20 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0xcU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v21 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0xbU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v22 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0xaU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v23 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [9U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v24 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [8U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v25 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [7U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v26 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [6U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v27 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [5U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v28 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [4U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v29 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [3U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v30 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [2U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v31 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [1U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v32 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0U]; + & (4U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U)))))) { + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0U] + = this->__PVT__vx_register_file_master__DOT__registers[0U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[1U] + = this->__PVT__vx_register_file_master__DOT__registers[1U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[2U] + = this->__PVT__vx_register_file_master__DOT__registers[2U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[3U] + = this->__PVT__vx_register_file_master__DOT__registers[3U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[4U] + = this->__PVT__vx_register_file_master__DOT__registers[4U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[5U] + = this->__PVT__vx_register_file_master__DOT__registers[5U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[6U] + = this->__PVT__vx_register_file_master__DOT__registers[6U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[7U] + = this->__PVT__vx_register_file_master__DOT__registers[7U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[8U] + = this->__PVT__vx_register_file_master__DOT__registers[8U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[9U] + = this->__PVT__vx_register_file_master__DOT__registers[9U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xaU] + = this->__PVT__vx_register_file_master__DOT__registers[0xaU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xbU] + = this->__PVT__vx_register_file_master__DOT__registers[0xbU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xcU] + = this->__PVT__vx_register_file_master__DOT__registers[0xcU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xdU] + = this->__PVT__vx_register_file_master__DOT__registers[0xdU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xeU] + = this->__PVT__vx_register_file_master__DOT__registers[0xeU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xfU] + = this->__PVT__vx_register_file_master__DOT__registers[0xfU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x10U] + = this->__PVT__vx_register_file_master__DOT__registers[0x10U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x11U] + = this->__PVT__vx_register_file_master__DOT__registers[0x11U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x12U] + = this->__PVT__vx_register_file_master__DOT__registers[0x12U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x13U] + = this->__PVT__vx_register_file_master__DOT__registers[0x13U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x14U] + = this->__PVT__vx_register_file_master__DOT__registers[0x14U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x15U] + = this->__PVT__vx_register_file_master__DOT__registers[0x15U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x16U] + = this->__PVT__vx_register_file_master__DOT__registers[0x16U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x17U] + = this->__PVT__vx_register_file_master__DOT__registers[0x17U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x18U] + = this->__PVT__vx_register_file_master__DOT__registers[0x18U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x19U] + = this->__PVT__vx_register_file_master__DOT__registers[0x19U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1aU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1aU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1bU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1bU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1cU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1cU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1dU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1dU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1eU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1eU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1fU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1fU]; } } // ALWAYS at VX_register_file_slave.v:53 - if ((((((0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - & (0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd))) - & this->in_valid[2U]) & (4U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__warp_num))) - & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__real_isclone)))) { - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0 - = this->in_write_data[2U]; - this->__Vdlyvset__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 1U; - this->__Vdlyvdim0__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0 - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd; + if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + & (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xcU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x14U))))) + & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] + >> 6U)) & (4U == (0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__real_isclone)))) { + VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0x11U) + | (0x1ffe0U + & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0xfU)))), this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers, + vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[2U]); } else { - if ((((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__real_isclone) + if ((((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__real_isclone) & ((2U == this->__PVT__rd1_register[0U]) & (1U == (IData)(this->__PVT__clone_state_stall)))) - & (4U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num)))) { - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v1 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x1fU]; - this->__Vdlyvset__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 1U; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v2 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x1eU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v3 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x1dU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v4 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x1cU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v5 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x1bU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v6 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x1aU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v7 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x19U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v8 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x18U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v9 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x17U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v10 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x16U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v11 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x15U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v12 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x14U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v13 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x13U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v14 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x12U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v15 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x11U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v16 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x10U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v17 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0xfU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v18 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0xeU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v19 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0xdU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v20 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0xcU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v21 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0xbU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v22 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0xaU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v23 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [9U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v24 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [8U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v25 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [7U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v26 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [6U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v27 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [5U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v28 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [4U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v29 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [3U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v30 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [2U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v31 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [1U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v32 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0U]; + & (4U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U)))))) { + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0U] + = this->__PVT__vx_register_file_master__DOT__registers[0U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[1U] + = this->__PVT__vx_register_file_master__DOT__registers[1U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[2U] + = this->__PVT__vx_register_file_master__DOT__registers[2U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[3U] + = this->__PVT__vx_register_file_master__DOT__registers[3U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[4U] + = this->__PVT__vx_register_file_master__DOT__registers[4U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[5U] + = this->__PVT__vx_register_file_master__DOT__registers[5U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[6U] + = this->__PVT__vx_register_file_master__DOT__registers[6U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[7U] + = this->__PVT__vx_register_file_master__DOT__registers[7U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[8U] + = this->__PVT__vx_register_file_master__DOT__registers[8U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[9U] + = this->__PVT__vx_register_file_master__DOT__registers[9U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xaU] + = this->__PVT__vx_register_file_master__DOT__registers[0xaU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xbU] + = this->__PVT__vx_register_file_master__DOT__registers[0xbU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xcU] + = this->__PVT__vx_register_file_master__DOT__registers[0xcU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xdU] + = this->__PVT__vx_register_file_master__DOT__registers[0xdU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xeU] + = this->__PVT__vx_register_file_master__DOT__registers[0xeU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xfU] + = this->__PVT__vx_register_file_master__DOT__registers[0xfU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x10U] + = this->__PVT__vx_register_file_master__DOT__registers[0x10U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x11U] + = this->__PVT__vx_register_file_master__DOT__registers[0x11U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x12U] + = this->__PVT__vx_register_file_master__DOT__registers[0x12U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x13U] + = this->__PVT__vx_register_file_master__DOT__registers[0x13U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x14U] + = this->__PVT__vx_register_file_master__DOT__registers[0x14U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x15U] + = this->__PVT__vx_register_file_master__DOT__registers[0x15U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x16U] + = this->__PVT__vx_register_file_master__DOT__registers[0x16U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x17U] + = this->__PVT__vx_register_file_master__DOT__registers[0x17U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x18U] + = this->__PVT__vx_register_file_master__DOT__registers[0x18U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x19U] + = this->__PVT__vx_register_file_master__DOT__registers[0x19U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1aU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1aU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1bU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1bU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1cU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1cU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1dU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1dU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1eU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1eU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1fU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1fU]; } } // ALWAYS at VX_register_file_slave.v:53 - if ((((((0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - & (0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd))) - & this->in_valid[1U]) & (4U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__warp_num))) - & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__real_isclone)))) { - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0 - = this->in_write_data[1U]; - this->__Vdlyvset__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 1U; - this->__Vdlyvdim0__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0 - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd; + if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + & (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xcU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x14U))))) + & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] + >> 5U)) & (4U == (0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__real_isclone)))) { + VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0x11U) + | (0x1ffe0U + & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0xfU)))), this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers, + vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[1U]); } else { - if ((((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__real_isclone) + if ((((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__real_isclone) & ((1U == this->__PVT__rd1_register[0U]) & (1U == (IData)(this->__PVT__clone_state_stall)))) - & (4U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num)))) { - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x1fU]; - this->__Vdlyvset__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 1U; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v2 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x1eU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v3 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x1dU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v4 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x1cU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v5 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x1bU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v6 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x1aU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v7 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x19U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v8 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x18U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v9 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x17U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v10 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x16U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v11 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x15U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v12 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x14U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v13 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x13U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v14 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x12U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v15 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x11U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v16 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x10U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v17 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0xfU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v18 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0xeU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v19 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0xdU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v20 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0xcU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v21 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0xbU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v22 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0xaU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v23 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [9U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v24 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [8U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v25 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [7U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v26 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [6U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v27 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [5U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v28 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [4U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v29 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [3U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v30 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [2U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v31 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [1U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v32 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0U]; + & (4U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U)))))) { + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0U] + = this->__PVT__vx_register_file_master__DOT__registers[0U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[1U] + = this->__PVT__vx_register_file_master__DOT__registers[1U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[2U] + = this->__PVT__vx_register_file_master__DOT__registers[2U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[3U] + = this->__PVT__vx_register_file_master__DOT__registers[3U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[4U] + = this->__PVT__vx_register_file_master__DOT__registers[4U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[5U] + = this->__PVT__vx_register_file_master__DOT__registers[5U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[6U] + = this->__PVT__vx_register_file_master__DOT__registers[6U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[7U] + = this->__PVT__vx_register_file_master__DOT__registers[7U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[8U] + = this->__PVT__vx_register_file_master__DOT__registers[8U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[9U] + = this->__PVT__vx_register_file_master__DOT__registers[9U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xaU] + = this->__PVT__vx_register_file_master__DOT__registers[0xaU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xbU] + = this->__PVT__vx_register_file_master__DOT__registers[0xbU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xcU] + = this->__PVT__vx_register_file_master__DOT__registers[0xcU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xdU] + = this->__PVT__vx_register_file_master__DOT__registers[0xdU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xeU] + = this->__PVT__vx_register_file_master__DOT__registers[0xeU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xfU] + = this->__PVT__vx_register_file_master__DOT__registers[0xfU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x10U] + = this->__PVT__vx_register_file_master__DOT__registers[0x10U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x11U] + = this->__PVT__vx_register_file_master__DOT__registers[0x11U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x12U] + = this->__PVT__vx_register_file_master__DOT__registers[0x12U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x13U] + = this->__PVT__vx_register_file_master__DOT__registers[0x13U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x14U] + = this->__PVT__vx_register_file_master__DOT__registers[0x14U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x15U] + = this->__PVT__vx_register_file_master__DOT__registers[0x15U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x16U] + = this->__PVT__vx_register_file_master__DOT__registers[0x16U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x17U] + = this->__PVT__vx_register_file_master__DOT__registers[0x17U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x18U] + = this->__PVT__vx_register_file_master__DOT__registers[0x18U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x19U] + = this->__PVT__vx_register_file_master__DOT__registers[0x19U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1aU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1aU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1bU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1bU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1cU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1cU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1dU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1dU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1eU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1eU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1fU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1fU]; } } - // ALWAYSPOST at VX_register_file_master_slave.v:53 - if (this->__Vdlyvset__vx_register_file_master__DOT__registers__v0) { - this->__PVT__vx_register_file_master__DOT__registers[this->__Vdlyvdim0__vx_register_file_master__DOT__registers__v0] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v0; - } - if (this->__Vdlyvset__vx_register_file_master__DOT__registers__v1) { - this->__PVT__vx_register_file_master__DOT__registers[0x1fU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v1; - this->__PVT__vx_register_file_master__DOT__registers[0x1eU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v2; - this->__PVT__vx_register_file_master__DOT__registers[0x1dU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v3; - this->__PVT__vx_register_file_master__DOT__registers[0x1cU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v4; - this->__PVT__vx_register_file_master__DOT__registers[0x1bU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v5; - this->__PVT__vx_register_file_master__DOT__registers[0x1aU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v6; - this->__PVT__vx_register_file_master__DOT__registers[0x19U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v7; - this->__PVT__vx_register_file_master__DOT__registers[0x18U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v8; - this->__PVT__vx_register_file_master__DOT__registers[0x17U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v9; - this->__PVT__vx_register_file_master__DOT__registers[0x16U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v10; - this->__PVT__vx_register_file_master__DOT__registers[0x15U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v11; - this->__PVT__vx_register_file_master__DOT__registers[0x14U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v12; - this->__PVT__vx_register_file_master__DOT__registers[0x13U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v13; - this->__PVT__vx_register_file_master__DOT__registers[0x12U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v14; - this->__PVT__vx_register_file_master__DOT__registers[0x11U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v15; - this->__PVT__vx_register_file_master__DOT__registers[0x10U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v16; - this->__PVT__vx_register_file_master__DOT__registers[0xfU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v17; - this->__PVT__vx_register_file_master__DOT__registers[0xeU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v18; - this->__PVT__vx_register_file_master__DOT__registers[0xdU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v19; - this->__PVT__vx_register_file_master__DOT__registers[0xcU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v20; - this->__PVT__vx_register_file_master__DOT__registers[0xbU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v21; - this->__PVT__vx_register_file_master__DOT__registers[0xaU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v22; - this->__PVT__vx_register_file_master__DOT__registers[9U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v23; - this->__PVT__vx_register_file_master__DOT__registers[8U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v24; - this->__PVT__vx_register_file_master__DOT__registers[7U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v25; - this->__PVT__vx_register_file_master__DOT__registers[6U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v26; - this->__PVT__vx_register_file_master__DOT__registers[5U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v27; - this->__PVT__vx_register_file_master__DOT__registers[4U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v28; - this->__PVT__vx_register_file_master__DOT__registers[3U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v29; - this->__PVT__vx_register_file_master__DOT__registers[2U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v30; - this->__PVT__vx_register_file_master__DOT__registers[1U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v31; - this->__PVT__vx_register_file_master__DOT__registers[0U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v32; + this->__PVT__clone_state_stall = this->__Vdly__clone_state_stall; + // ALWAYS at VX_register_file_master_slave.v:50 + if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + & (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xcU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x14U))))) + & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] + >> 4U)) & (4U == (0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__real_wspawn)))) { + VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0x11U) + | (0x1ffe0U + & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0xfU)))), this->__PVT__vx_register_file_master__DOT__registers, + vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[0U]); + } else { + if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__real_wspawn) + & (2U == (IData)(this->__PVT__wspawn_state_stall)))) { + this->__PVT__vx_register_file_master__DOT__registers[0U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0U]; + this->__PVT__vx_register_file_master__DOT__registers[1U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[1U]; + this->__PVT__vx_register_file_master__DOT__registers[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[2U]; + this->__PVT__vx_register_file_master__DOT__registers[3U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[3U]; + this->__PVT__vx_register_file_master__DOT__registers[4U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[4U]; + this->__PVT__vx_register_file_master__DOT__registers[5U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[5U]; + this->__PVT__vx_register_file_master__DOT__registers[6U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[6U]; + this->__PVT__vx_register_file_master__DOT__registers[7U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[7U]; + this->__PVT__vx_register_file_master__DOT__registers[8U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[8U]; + this->__PVT__vx_register_file_master__DOT__registers[9U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[9U]; + this->__PVT__vx_register_file_master__DOT__registers[0xaU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0xaU]; + this->__PVT__vx_register_file_master__DOT__registers[0xbU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0xbU]; + this->__PVT__vx_register_file_master__DOT__registers[0xcU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0xcU]; + this->__PVT__vx_register_file_master__DOT__registers[0xdU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0xdU]; + this->__PVT__vx_register_file_master__DOT__registers[0xeU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0xeU]; + this->__PVT__vx_register_file_master__DOT__registers[0xfU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0xfU]; + this->__PVT__vx_register_file_master__DOT__registers[0x10U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x10U]; + this->__PVT__vx_register_file_master__DOT__registers[0x11U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x11U]; + this->__PVT__vx_register_file_master__DOT__registers[0x12U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x12U]; + this->__PVT__vx_register_file_master__DOT__registers[0x13U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x13U]; + this->__PVT__vx_register_file_master__DOT__registers[0x14U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x14U]; + this->__PVT__vx_register_file_master__DOT__registers[0x15U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x15U]; + this->__PVT__vx_register_file_master__DOT__registers[0x16U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x16U]; + this->__PVT__vx_register_file_master__DOT__registers[0x17U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x17U]; + this->__PVT__vx_register_file_master__DOT__registers[0x18U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x18U]; + this->__PVT__vx_register_file_master__DOT__registers[0x19U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x19U]; + this->__PVT__vx_register_file_master__DOT__registers[0x1aU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x1aU]; + this->__PVT__vx_register_file_master__DOT__registers[0x1bU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x1bU]; + this->__PVT__vx_register_file_master__DOT__registers[0x1cU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x1cU]; + this->__PVT__vx_register_file_master__DOT__registers[0x1dU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x1dU]; + this->__PVT__vx_register_file_master__DOT__registers[0x1eU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x1eU]; + this->__PVT__vx_register_file_master__DOT__registers[0x1fU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x1fU]; + } } this->__PVT__wspawn_state_stall = this->__Vdly__wspawn_state_stall; - // ALWAYSPOST at VX_register_file_slave.v:56 - if (this->__Vdlyvset__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0) { - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[this->__Vdlyvdim0__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0; - } - if (this->__Vdlyvset__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v1) { - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1fU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v1; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1eU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v2; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1dU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v3; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1cU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v4; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1bU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v5; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1aU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v6; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x19U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v7; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x18U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v8; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x17U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v9; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x16U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v10; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x15U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v11; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x14U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v12; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x13U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v13; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x12U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v14; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x11U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v15; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x10U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v16; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xfU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v17; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xeU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v18; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xdU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v19; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xcU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v20; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xbU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v21; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xaU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v22; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[9U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v23; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[8U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v24; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[7U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v25; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[6U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v26; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[5U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v27; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[4U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v28; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[3U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v29; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[2U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v30; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[1U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v31; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v32; - } - // ALWAYSPOST at VX_register_file_slave.v:56 - if (this->__Vdlyvset__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0) { - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[this->__Vdlyvdim0__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0; - } - if (this->__Vdlyvset__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v1) { - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1fU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v1; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1eU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v2; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1dU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v3; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1cU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v4; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1bU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v5; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1aU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v6; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x19U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v7; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x18U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v8; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x17U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v9; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x16U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v10; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x15U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v11; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x14U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v12; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x13U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v13; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x12U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v14; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x11U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v15; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x10U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v16; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xfU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v17; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xeU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v18; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xdU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v19; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xcU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v20; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xbU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v21; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xaU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v22; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[9U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v23; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[8U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v24; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[7U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v25; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[6U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v26; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[5U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v27; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[4U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v28; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[3U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v29; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[2U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v30; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[1U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v31; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v32; - } - // ALWAYSPOST at VX_register_file_slave.v:56 - if (this->__Vdlyvset__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0) { - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[this->__Vdlyvdim0__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0; - } - if (this->__Vdlyvset__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1) { - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1fU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1eU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v2; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1dU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v3; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1cU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v4; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1bU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v5; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1aU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v6; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x19U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v7; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x18U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v8; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x17U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v9; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x16U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v10; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x15U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v11; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x14U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v12; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x13U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v13; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x12U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v14; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x11U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v15; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x10U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v16; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xfU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v17; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xeU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v18; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xdU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v19; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xcU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v20; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xbU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v21; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xaU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v22; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[9U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v23; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[8U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v24; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[7U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v25; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[6U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v26; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[5U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v27; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[4U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v28; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[3U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v29; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[2U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v30; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[1U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v31; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v32; - } - this->__PVT__clone_state_stall = this->__Vdly__clone_state_stall; - this->__Vcellout__vx_register_file_master__out_regs[0x1fU] - = this->__PVT__vx_register_file_master__DOT__registers - [0x1fU]; - this->__Vcellout__vx_register_file_master__out_regs[0x1eU] - = this->__PVT__vx_register_file_master__DOT__registers - [0x1eU]; - this->__Vcellout__vx_register_file_master__out_regs[0x1dU] - = this->__PVT__vx_register_file_master__DOT__registers - [0x1dU]; - this->__Vcellout__vx_register_file_master__out_regs[0x1cU] - = this->__PVT__vx_register_file_master__DOT__registers - [0x1cU]; - this->__Vcellout__vx_register_file_master__out_regs[0x1bU] - = this->__PVT__vx_register_file_master__DOT__registers - [0x1bU]; - this->__Vcellout__vx_register_file_master__out_regs[0x1aU] - = this->__PVT__vx_register_file_master__DOT__registers - [0x1aU]; - this->__Vcellout__vx_register_file_master__out_regs[0x19U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x19U]; - this->__Vcellout__vx_register_file_master__out_regs[0x18U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x18U]; - this->__Vcellout__vx_register_file_master__out_regs[0x17U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x17U]; - this->__Vcellout__vx_register_file_master__out_regs[0x16U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x16U]; - this->__Vcellout__vx_register_file_master__out_regs[0x15U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x15U]; - this->__Vcellout__vx_register_file_master__out_regs[0x14U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x14U]; - this->__Vcellout__vx_register_file_master__out_regs[0x13U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x13U]; - this->__Vcellout__vx_register_file_master__out_regs[0x12U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x12U]; - this->__Vcellout__vx_register_file_master__out_regs[0x11U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x11U]; - this->__Vcellout__vx_register_file_master__out_regs[0x10U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x10U]; - this->__Vcellout__vx_register_file_master__out_regs[0xfU] - = this->__PVT__vx_register_file_master__DOT__registers - [0xfU]; - this->__Vcellout__vx_register_file_master__out_regs[0xeU] - = this->__PVT__vx_register_file_master__DOT__registers - [0xeU]; - this->__Vcellout__vx_register_file_master__out_regs[0xdU] - = this->__PVT__vx_register_file_master__DOT__registers - [0xdU]; - this->__Vcellout__vx_register_file_master__out_regs[0xcU] - = this->__PVT__vx_register_file_master__DOT__registers - [0xcU]; - this->__Vcellout__vx_register_file_master__out_regs[0xbU] - = this->__PVT__vx_register_file_master__DOT__registers - [0xbU]; - this->__Vcellout__vx_register_file_master__out_regs[0xaU] - = this->__PVT__vx_register_file_master__DOT__registers - [0xaU]; - this->__Vcellout__vx_register_file_master__out_regs[9U] - = this->__PVT__vx_register_file_master__DOT__registers - [9U]; - this->__Vcellout__vx_register_file_master__out_regs[8U] - = this->__PVT__vx_register_file_master__DOT__registers - [8U]; - this->__Vcellout__vx_register_file_master__out_regs[7U] - = this->__PVT__vx_register_file_master__DOT__registers - [7U]; - this->__Vcellout__vx_register_file_master__out_regs[6U] - = this->__PVT__vx_register_file_master__DOT__registers - [6U]; - this->__Vcellout__vx_register_file_master__out_regs[5U] - = this->__PVT__vx_register_file_master__DOT__registers - [5U]; - this->__Vcellout__vx_register_file_master__out_regs[4U] - = this->__PVT__vx_register_file_master__DOT__registers - [4U]; - this->__Vcellout__vx_register_file_master__out_regs[3U] - = this->__PVT__vx_register_file_master__DOT__registers - [3U]; - this->__Vcellout__vx_register_file_master__out_regs[2U] - = this->__PVT__vx_register_file_master__DOT__registers - [2U]; - this->__Vcellout__vx_register_file_master__out_regs[1U] - = this->__PVT__vx_register_file_master__DOT__registers - [1U]; - this->__Vcellout__vx_register_file_master__out_regs[0U] - = this->__PVT__vx_register_file_master__DOT__registers - [0U]; - this->__PVT__clone_regsiters[0x1fU] = this->__Vcellout__vx_register_file_master__out_regs - [0x1fU]; - this->__PVT__clone_regsiters[0x1eU] = this->__Vcellout__vx_register_file_master__out_regs - [0x1eU]; - this->__PVT__clone_regsiters[0x1dU] = this->__Vcellout__vx_register_file_master__out_regs - [0x1dU]; - this->__PVT__clone_regsiters[0x1cU] = this->__Vcellout__vx_register_file_master__out_regs - [0x1cU]; - this->__PVT__clone_regsiters[0x1bU] = this->__Vcellout__vx_register_file_master__out_regs - [0x1bU]; - this->__PVT__clone_regsiters[0x1aU] = this->__Vcellout__vx_register_file_master__out_regs - [0x1aU]; - this->__PVT__clone_regsiters[0x19U] = this->__Vcellout__vx_register_file_master__out_regs - [0x19U]; - this->__PVT__clone_regsiters[0x18U] = this->__Vcellout__vx_register_file_master__out_regs - [0x18U]; - this->__PVT__clone_regsiters[0x17U] = this->__Vcellout__vx_register_file_master__out_regs - [0x17U]; - this->__PVT__clone_regsiters[0x16U] = this->__Vcellout__vx_register_file_master__out_regs - [0x16U]; - this->__PVT__clone_regsiters[0x15U] = this->__Vcellout__vx_register_file_master__out_regs - [0x15U]; - this->__PVT__clone_regsiters[0x14U] = this->__Vcellout__vx_register_file_master__out_regs - [0x14U]; - this->__PVT__clone_regsiters[0x13U] = this->__Vcellout__vx_register_file_master__out_regs - [0x13U]; - this->__PVT__clone_regsiters[0x12U] = this->__Vcellout__vx_register_file_master__out_regs - [0x12U]; - this->__PVT__clone_regsiters[0x11U] = this->__Vcellout__vx_register_file_master__out_regs - [0x11U]; - this->__PVT__clone_regsiters[0x10U] = this->__Vcellout__vx_register_file_master__out_regs - [0x10U]; - this->__PVT__clone_regsiters[0xfU] = this->__Vcellout__vx_register_file_master__out_regs - [0xfU]; - this->__PVT__clone_regsiters[0xeU] = this->__Vcellout__vx_register_file_master__out_regs - [0xeU]; - this->__PVT__clone_regsiters[0xdU] = this->__Vcellout__vx_register_file_master__out_regs - [0xdU]; - this->__PVT__clone_regsiters[0xcU] = this->__Vcellout__vx_register_file_master__out_regs - [0xcU]; - this->__PVT__clone_regsiters[0xbU] = this->__Vcellout__vx_register_file_master__out_regs - [0xbU]; - this->__PVT__clone_regsiters[0xaU] = this->__Vcellout__vx_register_file_master__out_regs - [0xaU]; - this->__PVT__clone_regsiters[9U] = this->__Vcellout__vx_register_file_master__out_regs - [9U]; - this->__PVT__clone_regsiters[8U] = this->__Vcellout__vx_register_file_master__out_regs - [8U]; - this->__PVT__clone_regsiters[7U] = this->__Vcellout__vx_register_file_master__out_regs - [7U]; - this->__PVT__clone_regsiters[6U] = this->__Vcellout__vx_register_file_master__out_regs - [6U]; - this->__PVT__clone_regsiters[5U] = this->__Vcellout__vx_register_file_master__out_regs - [5U]; - this->__PVT__clone_regsiters[4U] = this->__Vcellout__vx_register_file_master__out_regs - [4U]; - this->__PVT__clone_regsiters[3U] = this->__Vcellout__vx_register_file_master__out_regs - [3U]; - this->__PVT__clone_regsiters[2U] = this->__Vcellout__vx_register_file_master__out_regs - [2U]; - this->__PVT__clone_regsiters[1U] = this->__Vcellout__vx_register_file_master__out_regs - [1U]; - this->__PVT__clone_regsiters[0U] = this->__Vcellout__vx_register_file_master__out_regs - [0U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1fU] - = this->__PVT__clone_regsiters[0x1fU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1eU] - = this->__PVT__clone_regsiters[0x1eU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1dU] - = this->__PVT__clone_regsiters[0x1dU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1cU] - = this->__PVT__clone_regsiters[0x1cU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1bU] - = this->__PVT__clone_regsiters[0x1bU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1aU] - = this->__PVT__clone_regsiters[0x1aU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x19U] - = this->__PVT__clone_regsiters[0x19U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x18U] - = this->__PVT__clone_regsiters[0x18U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x17U] - = this->__PVT__clone_regsiters[0x17U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x16U] - = this->__PVT__clone_regsiters[0x16U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x15U] - = this->__PVT__clone_regsiters[0x15U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x14U] - = this->__PVT__clone_regsiters[0x14U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x13U] - = this->__PVT__clone_regsiters[0x13U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x12U] - = this->__PVT__clone_regsiters[0x12U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x11U] - = this->__PVT__clone_regsiters[0x11U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x10U] - = this->__PVT__clone_regsiters[0x10U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xfU] - = this->__PVT__clone_regsiters[0xfU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xeU] - = this->__PVT__clone_regsiters[0xeU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xdU] - = this->__PVT__clone_regsiters[0xdU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xcU] - = this->__PVT__clone_regsiters[0xcU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xbU] - = this->__PVT__clone_regsiters[0xbU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xaU] - = this->__PVT__clone_regsiters[0xaU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[9U] - = this->__PVT__clone_regsiters[9U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[8U] - = this->__PVT__clone_regsiters[8U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[7U] - = this->__PVT__clone_regsiters[7U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[6U] - = this->__PVT__clone_regsiters[6U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[5U] - = this->__PVT__clone_regsiters[5U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[4U] - = this->__PVT__clone_regsiters[4U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[3U] - = this->__PVT__clone_regsiters[3U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[2U] - = this->__PVT__clone_regsiters[2U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[1U] - = this->__PVT__clone_regsiters[1U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0U] - = this->__PVT__clone_regsiters[0U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1fU] - = this->__PVT__clone_regsiters[0x1fU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1eU] - = this->__PVT__clone_regsiters[0x1eU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1dU] - = this->__PVT__clone_regsiters[0x1dU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1cU] - = this->__PVT__clone_regsiters[0x1cU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1bU] - = this->__PVT__clone_regsiters[0x1bU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1aU] - = this->__PVT__clone_regsiters[0x1aU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x19U] - = this->__PVT__clone_regsiters[0x19U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x18U] - = this->__PVT__clone_regsiters[0x18U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x17U] - = this->__PVT__clone_regsiters[0x17U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x16U] - = this->__PVT__clone_regsiters[0x16U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x15U] - = this->__PVT__clone_regsiters[0x15U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x14U] - = this->__PVT__clone_regsiters[0x14U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x13U] - = this->__PVT__clone_regsiters[0x13U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x12U] - = this->__PVT__clone_regsiters[0x12U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x11U] - = this->__PVT__clone_regsiters[0x11U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x10U] - = this->__PVT__clone_regsiters[0x10U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xfU] - = this->__PVT__clone_regsiters[0xfU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xeU] - = this->__PVT__clone_regsiters[0xeU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xdU] - = this->__PVT__clone_regsiters[0xdU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xcU] - = this->__PVT__clone_regsiters[0xcU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xbU] - = this->__PVT__clone_regsiters[0xbU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xaU] - = this->__PVT__clone_regsiters[0xaU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[9U] - = this->__PVT__clone_regsiters[9U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[8U] - = this->__PVT__clone_regsiters[8U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[7U] - = this->__PVT__clone_regsiters[7U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[6U] - = this->__PVT__clone_regsiters[6U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[5U] - = this->__PVT__clone_regsiters[5U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[4U] - = this->__PVT__clone_regsiters[4U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[3U] - = this->__PVT__clone_regsiters[3U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[2U] - = this->__PVT__clone_regsiters[2U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[1U] - = this->__PVT__clone_regsiters[1U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0U] - = this->__PVT__clone_regsiters[0U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1fU] - = this->__PVT__clone_regsiters[0x1fU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1eU] - = this->__PVT__clone_regsiters[0x1eU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1dU] - = this->__PVT__clone_regsiters[0x1dU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1cU] - = this->__PVT__clone_regsiters[0x1cU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1bU] - = this->__PVT__clone_regsiters[0x1bU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1aU] - = this->__PVT__clone_regsiters[0x1aU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x19U] - = this->__PVT__clone_regsiters[0x19U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x18U] - = this->__PVT__clone_regsiters[0x18U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x17U] - = this->__PVT__clone_regsiters[0x17U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x16U] - = this->__PVT__clone_regsiters[0x16U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x15U] - = this->__PVT__clone_regsiters[0x15U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x14U] - = this->__PVT__clone_regsiters[0x14U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x13U] - = this->__PVT__clone_regsiters[0x13U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x12U] - = this->__PVT__clone_regsiters[0x12U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x11U] - = this->__PVT__clone_regsiters[0x11U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x10U] - = this->__PVT__clone_regsiters[0x10U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xfU] - = this->__PVT__clone_regsiters[0xfU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xeU] - = this->__PVT__clone_regsiters[0xeU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xdU] - = this->__PVT__clone_regsiters[0xdU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xcU] - = this->__PVT__clone_regsiters[0xcU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xbU] - = this->__PVT__clone_regsiters[0xbU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xaU] - = this->__PVT__clone_regsiters[0xaU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[9U] - = this->__PVT__clone_regsiters[9U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[8U] - = this->__PVT__clone_regsiters[8U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[7U] - = this->__PVT__clone_regsiters[7U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[6U] - = this->__PVT__clone_regsiters[6U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[5U] - = this->__PVT__clone_regsiters[5U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[4U] - = this->__PVT__clone_regsiters[4U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[3U] - = this->__PVT__clone_regsiters[3U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[2U] - = this->__PVT__clone_regsiters[2U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[1U] - = this->__PVT__clone_regsiters[1U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0U] - = this->__PVT__clone_regsiters[0U]; } -VL_INLINE_OPT void VVortex_VX_context_slave::_sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one__19(VVortex__Syms* __restrict vlSymsp) { - VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex_VX_context_slave::_sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one__19\n"); ); +VL_INLINE_OPT void VVortex_VX_context_slave::_sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__VX_Context_one__19(VVortex__Syms* __restrict vlSymsp) { + VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex_VX_context_slave::_sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__VX_Context_one__19\n"); ); VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; // Body this->__Vdly__wspawn_state_stall = this->__PVT__wspawn_state_stall; this->__Vdly__clone_state_stall = this->__PVT__clone_state_stall; - this->__Vdlyvset__vx_register_file_master__DOT__registers__v0 = 0U; - this->__Vdlyvset__vx_register_file_master__DOT__registers__v1 = 0U; - this->__Vdlyvset__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 0U; - this->__Vdlyvset__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 0U; - this->__Vdlyvset__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 0U; - this->__Vdlyvset__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 0U; - this->__Vdlyvset__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 0U; - this->__Vdlyvset__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 0U; // ALWAYS at VX_context_slave.v:119 - if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__real_wspawn) + if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__real_wspawn) & (0U == (IData)(this->__PVT__wspawn_state_stall)))) { this->__Vdly__wspawn_state_stall = 0xaU; } else { @@ -5262,7 +1832,7 @@ VL_INLINE_OPT void VVortex_VX_context_slave::_sequent__TOP__Vortex__DOT__vx_deco } } // ALWAYS at VX_context_slave.v:104 - if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__real_isclone) + if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__real_isclone) & (0U == (IData)(this->__PVT__clone_state_stall)))) { this->__Vdly__clone_state_stall = 0xaU; } else { @@ -5276,1116 +1846,370 @@ VL_INLINE_OPT void VVortex_VX_context_slave::_sequent__TOP__Vortex__DOT__vx_deco } } } - // ALWAYS at VX_register_file_master_slave.v:50 - if ((((((0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - & (0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd))) - & this->in_valid[0U]) & (5U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__warp_num))) - & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__real_wspawn)))) { - this->__Vdlyvval__vx_register_file_master__DOT__registers__v0 - = this->in_write_data[0U]; - this->__Vdlyvset__vx_register_file_master__DOT__registers__v0 = 1U; - this->__Vdlyvdim0__vx_register_file_master__DOT__registers__v0 - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd; - } else { - if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__real_wspawn) - & (2U == (IData)(this->__PVT__wspawn_state_stall)))) { - this->__Vdlyvval__vx_register_file_master__DOT__registers__v1 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x1fU]; - this->__Vdlyvset__vx_register_file_master__DOT__registers__v1 = 1U; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v2 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x1eU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v3 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x1dU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v4 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x1cU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v5 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x1bU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v6 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x1aU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v7 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x19U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v8 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x18U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v9 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x17U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v10 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x16U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v11 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x15U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v12 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x14U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v13 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x13U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v14 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x12U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v15 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x11U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v16 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x10U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v17 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0xfU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v18 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0xeU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v19 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0xdU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v20 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0xcU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v21 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0xbU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v22 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0xaU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v23 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [9U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v24 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [8U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v25 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [7U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v26 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [6U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v27 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [5U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v28 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [4U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v29 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [3U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v30 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [2U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v31 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [1U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v32 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0U]; - } - } // ALWAYS at VX_register_file_slave.v:53 - if ((((((0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - & (0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd))) - & this->in_valid[3U]) & (5U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__warp_num))) - & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__real_isclone)))) { - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0 - = this->in_write_data[3U]; - this->__Vdlyvset__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 1U; - this->__Vdlyvdim0__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0 - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd; + if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + & (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xcU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x14U))))) + & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] + >> 7U)) & (5U == (0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__real_isclone)))) { + VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0x11U) + | (0x1ffe0U + & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0xfU)))), this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers, + vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[3U]); } else { - if ((((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__real_isclone) + if ((((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__real_isclone) & ((3U == this->__PVT__rd1_register[0U]) & (1U == (IData)(this->__PVT__clone_state_stall)))) - & (5U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num)))) { - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v1 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x1fU]; - this->__Vdlyvset__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 1U; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v2 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x1eU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v3 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x1dU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v4 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x1cU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v5 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x1bU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v6 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x1aU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v7 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x19U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v8 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x18U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v9 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x17U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v10 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x16U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v11 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x15U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v12 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x14U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v13 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x13U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v14 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x12U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v15 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x11U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v16 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x10U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v17 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0xfU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v18 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0xeU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v19 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0xdU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v20 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0xcU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v21 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0xbU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v22 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0xaU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v23 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [9U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v24 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [8U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v25 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [7U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v26 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [6U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v27 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [5U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v28 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [4U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v29 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [3U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v30 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [2U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v31 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [1U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v32 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0U]; + & (5U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U)))))) { + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0U] + = this->__PVT__vx_register_file_master__DOT__registers[0U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[1U] + = this->__PVT__vx_register_file_master__DOT__registers[1U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[2U] + = this->__PVT__vx_register_file_master__DOT__registers[2U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[3U] + = this->__PVT__vx_register_file_master__DOT__registers[3U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[4U] + = this->__PVT__vx_register_file_master__DOT__registers[4U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[5U] + = this->__PVT__vx_register_file_master__DOT__registers[5U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[6U] + = this->__PVT__vx_register_file_master__DOT__registers[6U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[7U] + = this->__PVT__vx_register_file_master__DOT__registers[7U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[8U] + = this->__PVT__vx_register_file_master__DOT__registers[8U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[9U] + = this->__PVT__vx_register_file_master__DOT__registers[9U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xaU] + = this->__PVT__vx_register_file_master__DOT__registers[0xaU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xbU] + = this->__PVT__vx_register_file_master__DOT__registers[0xbU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xcU] + = this->__PVT__vx_register_file_master__DOT__registers[0xcU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xdU] + = this->__PVT__vx_register_file_master__DOT__registers[0xdU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xeU] + = this->__PVT__vx_register_file_master__DOT__registers[0xeU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xfU] + = this->__PVT__vx_register_file_master__DOT__registers[0xfU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x10U] + = this->__PVT__vx_register_file_master__DOT__registers[0x10U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x11U] + = this->__PVT__vx_register_file_master__DOT__registers[0x11U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x12U] + = this->__PVT__vx_register_file_master__DOT__registers[0x12U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x13U] + = this->__PVT__vx_register_file_master__DOT__registers[0x13U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x14U] + = this->__PVT__vx_register_file_master__DOT__registers[0x14U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x15U] + = this->__PVT__vx_register_file_master__DOT__registers[0x15U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x16U] + = this->__PVT__vx_register_file_master__DOT__registers[0x16U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x17U] + = this->__PVT__vx_register_file_master__DOT__registers[0x17U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x18U] + = this->__PVT__vx_register_file_master__DOT__registers[0x18U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x19U] + = this->__PVT__vx_register_file_master__DOT__registers[0x19U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1aU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1aU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1bU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1bU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1cU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1cU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1dU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1dU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1eU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1eU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1fU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1fU]; } } // ALWAYS at VX_register_file_slave.v:53 - if ((((((0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - & (0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd))) - & this->in_valid[2U]) & (5U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__warp_num))) - & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__real_isclone)))) { - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0 - = this->in_write_data[2U]; - this->__Vdlyvset__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 1U; - this->__Vdlyvdim0__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0 - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd; + if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + & (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xcU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x14U))))) + & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] + >> 6U)) & (5U == (0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__real_isclone)))) { + VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0x11U) + | (0x1ffe0U + & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0xfU)))), this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers, + vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[2U]); } else { - if ((((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__real_isclone) + if ((((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__real_isclone) & ((2U == this->__PVT__rd1_register[0U]) & (1U == (IData)(this->__PVT__clone_state_stall)))) - & (5U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num)))) { - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v1 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x1fU]; - this->__Vdlyvset__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 1U; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v2 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x1eU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v3 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x1dU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v4 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x1cU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v5 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x1bU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v6 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x1aU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v7 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x19U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v8 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x18U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v9 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x17U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v10 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x16U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v11 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x15U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v12 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x14U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v13 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x13U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v14 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x12U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v15 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x11U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v16 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x10U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v17 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0xfU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v18 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0xeU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v19 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0xdU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v20 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0xcU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v21 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0xbU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v22 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0xaU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v23 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [9U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v24 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [8U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v25 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [7U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v26 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [6U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v27 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [5U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v28 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [4U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v29 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [3U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v30 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [2U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v31 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [1U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v32 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0U]; + & (5U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U)))))) { + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0U] + = this->__PVT__vx_register_file_master__DOT__registers[0U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[1U] + = this->__PVT__vx_register_file_master__DOT__registers[1U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[2U] + = this->__PVT__vx_register_file_master__DOT__registers[2U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[3U] + = this->__PVT__vx_register_file_master__DOT__registers[3U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[4U] + = this->__PVT__vx_register_file_master__DOT__registers[4U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[5U] + = this->__PVT__vx_register_file_master__DOT__registers[5U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[6U] + = this->__PVT__vx_register_file_master__DOT__registers[6U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[7U] + = this->__PVT__vx_register_file_master__DOT__registers[7U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[8U] + = this->__PVT__vx_register_file_master__DOT__registers[8U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[9U] + = this->__PVT__vx_register_file_master__DOT__registers[9U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xaU] + = this->__PVT__vx_register_file_master__DOT__registers[0xaU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xbU] + = this->__PVT__vx_register_file_master__DOT__registers[0xbU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xcU] + = this->__PVT__vx_register_file_master__DOT__registers[0xcU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xdU] + = this->__PVT__vx_register_file_master__DOT__registers[0xdU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xeU] + = this->__PVT__vx_register_file_master__DOT__registers[0xeU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xfU] + = this->__PVT__vx_register_file_master__DOT__registers[0xfU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x10U] + = this->__PVT__vx_register_file_master__DOT__registers[0x10U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x11U] + = this->__PVT__vx_register_file_master__DOT__registers[0x11U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x12U] + = this->__PVT__vx_register_file_master__DOT__registers[0x12U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x13U] + = this->__PVT__vx_register_file_master__DOT__registers[0x13U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x14U] + = this->__PVT__vx_register_file_master__DOT__registers[0x14U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x15U] + = this->__PVT__vx_register_file_master__DOT__registers[0x15U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x16U] + = this->__PVT__vx_register_file_master__DOT__registers[0x16U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x17U] + = this->__PVT__vx_register_file_master__DOT__registers[0x17U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x18U] + = this->__PVT__vx_register_file_master__DOT__registers[0x18U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x19U] + = this->__PVT__vx_register_file_master__DOT__registers[0x19U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1aU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1aU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1bU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1bU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1cU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1cU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1dU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1dU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1eU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1eU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1fU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1fU]; } } // ALWAYS at VX_register_file_slave.v:53 - if ((((((0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - & (0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd))) - & this->in_valid[1U]) & (5U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__warp_num))) - & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__real_isclone)))) { - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0 - = this->in_write_data[1U]; - this->__Vdlyvset__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 1U; - this->__Vdlyvdim0__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0 - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd; + if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + & (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xcU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x14U))))) + & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] + >> 5U)) & (5U == (0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__real_isclone)))) { + VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0x11U) + | (0x1ffe0U + & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0xfU)))), this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers, + vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[1U]); } else { - if ((((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__real_isclone) + if ((((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__real_isclone) & ((1U == this->__PVT__rd1_register[0U]) & (1U == (IData)(this->__PVT__clone_state_stall)))) - & (5U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num)))) { - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x1fU]; - this->__Vdlyvset__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 1U; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v2 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x1eU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v3 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x1dU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v4 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x1cU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v5 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x1bU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v6 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x1aU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v7 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x19U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v8 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x18U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v9 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x17U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v10 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x16U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v11 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x15U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v12 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x14U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v13 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x13U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v14 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x12U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v15 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x11U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v16 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x10U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v17 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0xfU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v18 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0xeU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v19 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0xdU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v20 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0xcU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v21 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0xbU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v22 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0xaU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v23 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [9U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v24 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [8U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v25 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [7U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v26 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [6U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v27 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [5U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v28 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [4U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v29 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [3U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v30 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [2U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v31 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [1U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v32 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0U]; + & (5U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U)))))) { + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0U] + = this->__PVT__vx_register_file_master__DOT__registers[0U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[1U] + = this->__PVT__vx_register_file_master__DOT__registers[1U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[2U] + = this->__PVT__vx_register_file_master__DOT__registers[2U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[3U] + = this->__PVT__vx_register_file_master__DOT__registers[3U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[4U] + = this->__PVT__vx_register_file_master__DOT__registers[4U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[5U] + = this->__PVT__vx_register_file_master__DOT__registers[5U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[6U] + = this->__PVT__vx_register_file_master__DOT__registers[6U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[7U] + = this->__PVT__vx_register_file_master__DOT__registers[7U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[8U] + = this->__PVT__vx_register_file_master__DOT__registers[8U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[9U] + = this->__PVT__vx_register_file_master__DOT__registers[9U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xaU] + = this->__PVT__vx_register_file_master__DOT__registers[0xaU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xbU] + = this->__PVT__vx_register_file_master__DOT__registers[0xbU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xcU] + = this->__PVT__vx_register_file_master__DOT__registers[0xcU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xdU] + = this->__PVT__vx_register_file_master__DOT__registers[0xdU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xeU] + = this->__PVT__vx_register_file_master__DOT__registers[0xeU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xfU] + = this->__PVT__vx_register_file_master__DOT__registers[0xfU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x10U] + = this->__PVT__vx_register_file_master__DOT__registers[0x10U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x11U] + = this->__PVT__vx_register_file_master__DOT__registers[0x11U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x12U] + = this->__PVT__vx_register_file_master__DOT__registers[0x12U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x13U] + = this->__PVT__vx_register_file_master__DOT__registers[0x13U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x14U] + = this->__PVT__vx_register_file_master__DOT__registers[0x14U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x15U] + = this->__PVT__vx_register_file_master__DOT__registers[0x15U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x16U] + = this->__PVT__vx_register_file_master__DOT__registers[0x16U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x17U] + = this->__PVT__vx_register_file_master__DOT__registers[0x17U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x18U] + = this->__PVT__vx_register_file_master__DOT__registers[0x18U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x19U] + = this->__PVT__vx_register_file_master__DOT__registers[0x19U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1aU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1aU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1bU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1bU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1cU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1cU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1dU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1dU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1eU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1eU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1fU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1fU]; } } - // ALWAYSPOST at VX_register_file_master_slave.v:53 - if (this->__Vdlyvset__vx_register_file_master__DOT__registers__v0) { - this->__PVT__vx_register_file_master__DOT__registers[this->__Vdlyvdim0__vx_register_file_master__DOT__registers__v0] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v0; - } - if (this->__Vdlyvset__vx_register_file_master__DOT__registers__v1) { - this->__PVT__vx_register_file_master__DOT__registers[0x1fU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v1; - this->__PVT__vx_register_file_master__DOT__registers[0x1eU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v2; - this->__PVT__vx_register_file_master__DOT__registers[0x1dU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v3; - this->__PVT__vx_register_file_master__DOT__registers[0x1cU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v4; - this->__PVT__vx_register_file_master__DOT__registers[0x1bU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v5; - this->__PVT__vx_register_file_master__DOT__registers[0x1aU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v6; - this->__PVT__vx_register_file_master__DOT__registers[0x19U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v7; - this->__PVT__vx_register_file_master__DOT__registers[0x18U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v8; - this->__PVT__vx_register_file_master__DOT__registers[0x17U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v9; - this->__PVT__vx_register_file_master__DOT__registers[0x16U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v10; - this->__PVT__vx_register_file_master__DOT__registers[0x15U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v11; - this->__PVT__vx_register_file_master__DOT__registers[0x14U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v12; - this->__PVT__vx_register_file_master__DOT__registers[0x13U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v13; - this->__PVT__vx_register_file_master__DOT__registers[0x12U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v14; - this->__PVT__vx_register_file_master__DOT__registers[0x11U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v15; - this->__PVT__vx_register_file_master__DOT__registers[0x10U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v16; - this->__PVT__vx_register_file_master__DOT__registers[0xfU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v17; - this->__PVT__vx_register_file_master__DOT__registers[0xeU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v18; - this->__PVT__vx_register_file_master__DOT__registers[0xdU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v19; - this->__PVT__vx_register_file_master__DOT__registers[0xcU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v20; - this->__PVT__vx_register_file_master__DOT__registers[0xbU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v21; - this->__PVT__vx_register_file_master__DOT__registers[0xaU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v22; - this->__PVT__vx_register_file_master__DOT__registers[9U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v23; - this->__PVT__vx_register_file_master__DOT__registers[8U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v24; - this->__PVT__vx_register_file_master__DOT__registers[7U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v25; - this->__PVT__vx_register_file_master__DOT__registers[6U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v26; - this->__PVT__vx_register_file_master__DOT__registers[5U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v27; - this->__PVT__vx_register_file_master__DOT__registers[4U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v28; - this->__PVT__vx_register_file_master__DOT__registers[3U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v29; - this->__PVT__vx_register_file_master__DOT__registers[2U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v30; - this->__PVT__vx_register_file_master__DOT__registers[1U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v31; - this->__PVT__vx_register_file_master__DOT__registers[0U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v32; + this->__PVT__clone_state_stall = this->__Vdly__clone_state_stall; + // ALWAYS at VX_register_file_master_slave.v:50 + if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + & (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xcU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x14U))))) + & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] + >> 4U)) & (5U == (0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__real_wspawn)))) { + VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0x11U) + | (0x1ffe0U + & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0xfU)))), this->__PVT__vx_register_file_master__DOT__registers, + vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[0U]); + } else { + if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__real_wspawn) + & (2U == (IData)(this->__PVT__wspawn_state_stall)))) { + this->__PVT__vx_register_file_master__DOT__registers[0U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0U]; + this->__PVT__vx_register_file_master__DOT__registers[1U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[1U]; + this->__PVT__vx_register_file_master__DOT__registers[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[2U]; + this->__PVT__vx_register_file_master__DOT__registers[3U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[3U]; + this->__PVT__vx_register_file_master__DOT__registers[4U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[4U]; + this->__PVT__vx_register_file_master__DOT__registers[5U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[5U]; + this->__PVT__vx_register_file_master__DOT__registers[6U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[6U]; + this->__PVT__vx_register_file_master__DOT__registers[7U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[7U]; + this->__PVT__vx_register_file_master__DOT__registers[8U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[8U]; + this->__PVT__vx_register_file_master__DOT__registers[9U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[9U]; + this->__PVT__vx_register_file_master__DOT__registers[0xaU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0xaU]; + this->__PVT__vx_register_file_master__DOT__registers[0xbU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0xbU]; + this->__PVT__vx_register_file_master__DOT__registers[0xcU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0xcU]; + this->__PVT__vx_register_file_master__DOT__registers[0xdU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0xdU]; + this->__PVT__vx_register_file_master__DOT__registers[0xeU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0xeU]; + this->__PVT__vx_register_file_master__DOT__registers[0xfU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0xfU]; + this->__PVT__vx_register_file_master__DOT__registers[0x10U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x10U]; + this->__PVT__vx_register_file_master__DOT__registers[0x11U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x11U]; + this->__PVT__vx_register_file_master__DOT__registers[0x12U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x12U]; + this->__PVT__vx_register_file_master__DOT__registers[0x13U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x13U]; + this->__PVT__vx_register_file_master__DOT__registers[0x14U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x14U]; + this->__PVT__vx_register_file_master__DOT__registers[0x15U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x15U]; + this->__PVT__vx_register_file_master__DOT__registers[0x16U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x16U]; + this->__PVT__vx_register_file_master__DOT__registers[0x17U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x17U]; + this->__PVT__vx_register_file_master__DOT__registers[0x18U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x18U]; + this->__PVT__vx_register_file_master__DOT__registers[0x19U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x19U]; + this->__PVT__vx_register_file_master__DOT__registers[0x1aU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x1aU]; + this->__PVT__vx_register_file_master__DOT__registers[0x1bU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x1bU]; + this->__PVT__vx_register_file_master__DOT__registers[0x1cU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x1cU]; + this->__PVT__vx_register_file_master__DOT__registers[0x1dU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x1dU]; + this->__PVT__vx_register_file_master__DOT__registers[0x1eU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x1eU]; + this->__PVT__vx_register_file_master__DOT__registers[0x1fU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x1fU]; + } } this->__PVT__wspawn_state_stall = this->__Vdly__wspawn_state_stall; - // ALWAYSPOST at VX_register_file_slave.v:56 - if (this->__Vdlyvset__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0) { - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[this->__Vdlyvdim0__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0; - } - if (this->__Vdlyvset__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v1) { - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1fU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v1; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1eU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v2; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1dU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v3; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1cU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v4; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1bU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v5; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1aU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v6; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x19U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v7; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x18U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v8; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x17U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v9; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x16U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v10; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x15U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v11; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x14U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v12; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x13U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v13; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x12U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v14; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x11U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v15; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x10U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v16; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xfU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v17; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xeU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v18; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xdU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v19; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xcU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v20; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xbU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v21; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xaU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v22; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[9U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v23; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[8U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v24; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[7U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v25; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[6U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v26; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[5U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v27; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[4U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v28; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[3U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v29; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[2U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v30; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[1U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v31; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v32; - } - // ALWAYSPOST at VX_register_file_slave.v:56 - if (this->__Vdlyvset__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0) { - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[this->__Vdlyvdim0__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0; - } - if (this->__Vdlyvset__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v1) { - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1fU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v1; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1eU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v2; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1dU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v3; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1cU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v4; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1bU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v5; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1aU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v6; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x19U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v7; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x18U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v8; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x17U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v9; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x16U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v10; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x15U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v11; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x14U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v12; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x13U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v13; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x12U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v14; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x11U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v15; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x10U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v16; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xfU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v17; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xeU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v18; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xdU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v19; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xcU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v20; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xbU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v21; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xaU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v22; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[9U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v23; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[8U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v24; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[7U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v25; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[6U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v26; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[5U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v27; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[4U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v28; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[3U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v29; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[2U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v30; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[1U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v31; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v32; - } - // ALWAYSPOST at VX_register_file_slave.v:56 - if (this->__Vdlyvset__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0) { - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[this->__Vdlyvdim0__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0; - } - if (this->__Vdlyvset__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1) { - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1fU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1eU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v2; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1dU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v3; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1cU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v4; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1bU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v5; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1aU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v6; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x19U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v7; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x18U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v8; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x17U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v9; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x16U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v10; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x15U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v11; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x14U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v12; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x13U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v13; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x12U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v14; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x11U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v15; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x10U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v16; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xfU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v17; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xeU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v18; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xdU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v19; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xcU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v20; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xbU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v21; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xaU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v22; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[9U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v23; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[8U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v24; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[7U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v25; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[6U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v26; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[5U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v27; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[4U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v28; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[3U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v29; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[2U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v30; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[1U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v31; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v32; - } - this->__PVT__clone_state_stall = this->__Vdly__clone_state_stall; - this->__Vcellout__vx_register_file_master__out_regs[0x1fU] - = this->__PVT__vx_register_file_master__DOT__registers - [0x1fU]; - this->__Vcellout__vx_register_file_master__out_regs[0x1eU] - = this->__PVT__vx_register_file_master__DOT__registers - [0x1eU]; - this->__Vcellout__vx_register_file_master__out_regs[0x1dU] - = this->__PVT__vx_register_file_master__DOT__registers - [0x1dU]; - this->__Vcellout__vx_register_file_master__out_regs[0x1cU] - = this->__PVT__vx_register_file_master__DOT__registers - [0x1cU]; - this->__Vcellout__vx_register_file_master__out_regs[0x1bU] - = this->__PVT__vx_register_file_master__DOT__registers - [0x1bU]; - this->__Vcellout__vx_register_file_master__out_regs[0x1aU] - = this->__PVT__vx_register_file_master__DOT__registers - [0x1aU]; - this->__Vcellout__vx_register_file_master__out_regs[0x19U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x19U]; - this->__Vcellout__vx_register_file_master__out_regs[0x18U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x18U]; - this->__Vcellout__vx_register_file_master__out_regs[0x17U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x17U]; - this->__Vcellout__vx_register_file_master__out_regs[0x16U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x16U]; - this->__Vcellout__vx_register_file_master__out_regs[0x15U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x15U]; - this->__Vcellout__vx_register_file_master__out_regs[0x14U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x14U]; - this->__Vcellout__vx_register_file_master__out_regs[0x13U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x13U]; - this->__Vcellout__vx_register_file_master__out_regs[0x12U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x12U]; - this->__Vcellout__vx_register_file_master__out_regs[0x11U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x11U]; - this->__Vcellout__vx_register_file_master__out_regs[0x10U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x10U]; - this->__Vcellout__vx_register_file_master__out_regs[0xfU] - = this->__PVT__vx_register_file_master__DOT__registers - [0xfU]; - this->__Vcellout__vx_register_file_master__out_regs[0xeU] - = this->__PVT__vx_register_file_master__DOT__registers - [0xeU]; - this->__Vcellout__vx_register_file_master__out_regs[0xdU] - = this->__PVT__vx_register_file_master__DOT__registers - [0xdU]; - this->__Vcellout__vx_register_file_master__out_regs[0xcU] - = this->__PVT__vx_register_file_master__DOT__registers - [0xcU]; - this->__Vcellout__vx_register_file_master__out_regs[0xbU] - = this->__PVT__vx_register_file_master__DOT__registers - [0xbU]; - this->__Vcellout__vx_register_file_master__out_regs[0xaU] - = this->__PVT__vx_register_file_master__DOT__registers - [0xaU]; - this->__Vcellout__vx_register_file_master__out_regs[9U] - = this->__PVT__vx_register_file_master__DOT__registers - [9U]; - this->__Vcellout__vx_register_file_master__out_regs[8U] - = this->__PVT__vx_register_file_master__DOT__registers - [8U]; - this->__Vcellout__vx_register_file_master__out_regs[7U] - = this->__PVT__vx_register_file_master__DOT__registers - [7U]; - this->__Vcellout__vx_register_file_master__out_regs[6U] - = this->__PVT__vx_register_file_master__DOT__registers - [6U]; - this->__Vcellout__vx_register_file_master__out_regs[5U] - = this->__PVT__vx_register_file_master__DOT__registers - [5U]; - this->__Vcellout__vx_register_file_master__out_regs[4U] - = this->__PVT__vx_register_file_master__DOT__registers - [4U]; - this->__Vcellout__vx_register_file_master__out_regs[3U] - = this->__PVT__vx_register_file_master__DOT__registers - [3U]; - this->__Vcellout__vx_register_file_master__out_regs[2U] - = this->__PVT__vx_register_file_master__DOT__registers - [2U]; - this->__Vcellout__vx_register_file_master__out_regs[1U] - = this->__PVT__vx_register_file_master__DOT__registers - [1U]; - this->__Vcellout__vx_register_file_master__out_regs[0U] - = this->__PVT__vx_register_file_master__DOT__registers - [0U]; - this->__PVT__clone_regsiters[0x1fU] = this->__Vcellout__vx_register_file_master__out_regs - [0x1fU]; - this->__PVT__clone_regsiters[0x1eU] = this->__Vcellout__vx_register_file_master__out_regs - [0x1eU]; - this->__PVT__clone_regsiters[0x1dU] = this->__Vcellout__vx_register_file_master__out_regs - [0x1dU]; - this->__PVT__clone_regsiters[0x1cU] = this->__Vcellout__vx_register_file_master__out_regs - [0x1cU]; - this->__PVT__clone_regsiters[0x1bU] = this->__Vcellout__vx_register_file_master__out_regs - [0x1bU]; - this->__PVT__clone_regsiters[0x1aU] = this->__Vcellout__vx_register_file_master__out_regs - [0x1aU]; - this->__PVT__clone_regsiters[0x19U] = this->__Vcellout__vx_register_file_master__out_regs - [0x19U]; - this->__PVT__clone_regsiters[0x18U] = this->__Vcellout__vx_register_file_master__out_regs - [0x18U]; - this->__PVT__clone_regsiters[0x17U] = this->__Vcellout__vx_register_file_master__out_regs - [0x17U]; - this->__PVT__clone_regsiters[0x16U] = this->__Vcellout__vx_register_file_master__out_regs - [0x16U]; - this->__PVT__clone_regsiters[0x15U] = this->__Vcellout__vx_register_file_master__out_regs - [0x15U]; - this->__PVT__clone_regsiters[0x14U] = this->__Vcellout__vx_register_file_master__out_regs - [0x14U]; - this->__PVT__clone_regsiters[0x13U] = this->__Vcellout__vx_register_file_master__out_regs - [0x13U]; - this->__PVT__clone_regsiters[0x12U] = this->__Vcellout__vx_register_file_master__out_regs - [0x12U]; - this->__PVT__clone_regsiters[0x11U] = this->__Vcellout__vx_register_file_master__out_regs - [0x11U]; - this->__PVT__clone_regsiters[0x10U] = this->__Vcellout__vx_register_file_master__out_regs - [0x10U]; - this->__PVT__clone_regsiters[0xfU] = this->__Vcellout__vx_register_file_master__out_regs - [0xfU]; - this->__PVT__clone_regsiters[0xeU] = this->__Vcellout__vx_register_file_master__out_regs - [0xeU]; - this->__PVT__clone_regsiters[0xdU] = this->__Vcellout__vx_register_file_master__out_regs - [0xdU]; - this->__PVT__clone_regsiters[0xcU] = this->__Vcellout__vx_register_file_master__out_regs - [0xcU]; - this->__PVT__clone_regsiters[0xbU] = this->__Vcellout__vx_register_file_master__out_regs - [0xbU]; - this->__PVT__clone_regsiters[0xaU] = this->__Vcellout__vx_register_file_master__out_regs - [0xaU]; - this->__PVT__clone_regsiters[9U] = this->__Vcellout__vx_register_file_master__out_regs - [9U]; - this->__PVT__clone_regsiters[8U] = this->__Vcellout__vx_register_file_master__out_regs - [8U]; - this->__PVT__clone_regsiters[7U] = this->__Vcellout__vx_register_file_master__out_regs - [7U]; - this->__PVT__clone_regsiters[6U] = this->__Vcellout__vx_register_file_master__out_regs - [6U]; - this->__PVT__clone_regsiters[5U] = this->__Vcellout__vx_register_file_master__out_regs - [5U]; - this->__PVT__clone_regsiters[4U] = this->__Vcellout__vx_register_file_master__out_regs - [4U]; - this->__PVT__clone_regsiters[3U] = this->__Vcellout__vx_register_file_master__out_regs - [3U]; - this->__PVT__clone_regsiters[2U] = this->__Vcellout__vx_register_file_master__out_regs - [2U]; - this->__PVT__clone_regsiters[1U] = this->__Vcellout__vx_register_file_master__out_regs - [1U]; - this->__PVT__clone_regsiters[0U] = this->__Vcellout__vx_register_file_master__out_regs - [0U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1fU] - = this->__PVT__clone_regsiters[0x1fU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1eU] - = this->__PVT__clone_regsiters[0x1eU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1dU] - = this->__PVT__clone_regsiters[0x1dU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1cU] - = this->__PVT__clone_regsiters[0x1cU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1bU] - = this->__PVT__clone_regsiters[0x1bU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1aU] - = this->__PVT__clone_regsiters[0x1aU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x19U] - = this->__PVT__clone_regsiters[0x19U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x18U] - = this->__PVT__clone_regsiters[0x18U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x17U] - = this->__PVT__clone_regsiters[0x17U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x16U] - = this->__PVT__clone_regsiters[0x16U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x15U] - = this->__PVT__clone_regsiters[0x15U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x14U] - = this->__PVT__clone_regsiters[0x14U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x13U] - = this->__PVT__clone_regsiters[0x13U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x12U] - = this->__PVT__clone_regsiters[0x12U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x11U] - = this->__PVT__clone_regsiters[0x11U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x10U] - = this->__PVT__clone_regsiters[0x10U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xfU] - = this->__PVT__clone_regsiters[0xfU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xeU] - = this->__PVT__clone_regsiters[0xeU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xdU] - = this->__PVT__clone_regsiters[0xdU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xcU] - = this->__PVT__clone_regsiters[0xcU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xbU] - = this->__PVT__clone_regsiters[0xbU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xaU] - = this->__PVT__clone_regsiters[0xaU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[9U] - = this->__PVT__clone_regsiters[9U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[8U] - = this->__PVT__clone_regsiters[8U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[7U] - = this->__PVT__clone_regsiters[7U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[6U] - = this->__PVT__clone_regsiters[6U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[5U] - = this->__PVT__clone_regsiters[5U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[4U] - = this->__PVT__clone_regsiters[4U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[3U] - = this->__PVT__clone_regsiters[3U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[2U] - = this->__PVT__clone_regsiters[2U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[1U] - = this->__PVT__clone_regsiters[1U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0U] - = this->__PVT__clone_regsiters[0U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1fU] - = this->__PVT__clone_regsiters[0x1fU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1eU] - = this->__PVT__clone_regsiters[0x1eU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1dU] - = this->__PVT__clone_regsiters[0x1dU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1cU] - = this->__PVT__clone_regsiters[0x1cU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1bU] - = this->__PVT__clone_regsiters[0x1bU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1aU] - = this->__PVT__clone_regsiters[0x1aU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x19U] - = this->__PVT__clone_regsiters[0x19U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x18U] - = this->__PVT__clone_regsiters[0x18U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x17U] - = this->__PVT__clone_regsiters[0x17U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x16U] - = this->__PVT__clone_regsiters[0x16U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x15U] - = this->__PVT__clone_regsiters[0x15U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x14U] - = this->__PVT__clone_regsiters[0x14U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x13U] - = this->__PVT__clone_regsiters[0x13U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x12U] - = this->__PVT__clone_regsiters[0x12U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x11U] - = this->__PVT__clone_regsiters[0x11U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x10U] - = this->__PVT__clone_regsiters[0x10U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xfU] - = this->__PVT__clone_regsiters[0xfU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xeU] - = this->__PVT__clone_regsiters[0xeU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xdU] - = this->__PVT__clone_regsiters[0xdU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xcU] - = this->__PVT__clone_regsiters[0xcU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xbU] - = this->__PVT__clone_regsiters[0xbU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xaU] - = this->__PVT__clone_regsiters[0xaU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[9U] - = this->__PVT__clone_regsiters[9U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[8U] - = this->__PVT__clone_regsiters[8U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[7U] - = this->__PVT__clone_regsiters[7U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[6U] - = this->__PVT__clone_regsiters[6U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[5U] - = this->__PVT__clone_regsiters[5U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[4U] - = this->__PVT__clone_regsiters[4U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[3U] - = this->__PVT__clone_regsiters[3U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[2U] - = this->__PVT__clone_regsiters[2U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[1U] - = this->__PVT__clone_regsiters[1U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0U] - = this->__PVT__clone_regsiters[0U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1fU] - = this->__PVT__clone_regsiters[0x1fU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1eU] - = this->__PVT__clone_regsiters[0x1eU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1dU] - = this->__PVT__clone_regsiters[0x1dU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1cU] - = this->__PVT__clone_regsiters[0x1cU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1bU] - = this->__PVT__clone_regsiters[0x1bU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1aU] - = this->__PVT__clone_regsiters[0x1aU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x19U] - = this->__PVT__clone_regsiters[0x19U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x18U] - = this->__PVT__clone_regsiters[0x18U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x17U] - = this->__PVT__clone_regsiters[0x17U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x16U] - = this->__PVT__clone_regsiters[0x16U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x15U] - = this->__PVT__clone_regsiters[0x15U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x14U] - = this->__PVT__clone_regsiters[0x14U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x13U] - = this->__PVT__clone_regsiters[0x13U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x12U] - = this->__PVT__clone_regsiters[0x12U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x11U] - = this->__PVT__clone_regsiters[0x11U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x10U] - = this->__PVT__clone_regsiters[0x10U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xfU] - = this->__PVT__clone_regsiters[0xfU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xeU] - = this->__PVT__clone_regsiters[0xeU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xdU] - = this->__PVT__clone_regsiters[0xdU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xcU] - = this->__PVT__clone_regsiters[0xcU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xbU] - = this->__PVT__clone_regsiters[0xbU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xaU] - = this->__PVT__clone_regsiters[0xaU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[9U] - = this->__PVT__clone_regsiters[9U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[8U] - = this->__PVT__clone_regsiters[8U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[7U] - = this->__PVT__clone_regsiters[7U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[6U] - = this->__PVT__clone_regsiters[6U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[5U] - = this->__PVT__clone_regsiters[5U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[4U] - = this->__PVT__clone_regsiters[4U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[3U] - = this->__PVT__clone_regsiters[3U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[2U] - = this->__PVT__clone_regsiters[2U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[1U] - = this->__PVT__clone_regsiters[1U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0U] - = this->__PVT__clone_regsiters[0U]; } -VL_INLINE_OPT void VVortex_VX_context_slave::_sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one__20(VVortex__Syms* __restrict vlSymsp) { - VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex_VX_context_slave::_sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one__20\n"); ); +VL_INLINE_OPT void VVortex_VX_context_slave::_sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__VX_Context_one__20(VVortex__Syms* __restrict vlSymsp) { + VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex_VX_context_slave::_sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__VX_Context_one__20\n"); ); VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; // Body this->__Vdly__wspawn_state_stall = this->__PVT__wspawn_state_stall; this->__Vdly__clone_state_stall = this->__PVT__clone_state_stall; - this->__Vdlyvset__vx_register_file_master__DOT__registers__v0 = 0U; - this->__Vdlyvset__vx_register_file_master__DOT__registers__v1 = 0U; - this->__Vdlyvset__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 0U; - this->__Vdlyvset__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 0U; - this->__Vdlyvset__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 0U; - this->__Vdlyvset__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 0U; - this->__Vdlyvset__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 0U; - this->__Vdlyvset__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 0U; // ALWAYS at VX_context_slave.v:119 - if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__real_wspawn) + if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__real_wspawn) & (0U == (IData)(this->__PVT__wspawn_state_stall)))) { this->__Vdly__wspawn_state_stall = 0xaU; } else { @@ -6400,7 +2224,7 @@ VL_INLINE_OPT void VVortex_VX_context_slave::_sequent__TOP__Vortex__DOT__vx_deco } } // ALWAYS at VX_context_slave.v:104 - if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__real_isclone) + if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__real_isclone) & (0U == (IData)(this->__PVT__clone_state_stall)))) { this->__Vdly__clone_state_stall = 0xaU; } else { @@ -6414,1116 +2238,370 @@ VL_INLINE_OPT void VVortex_VX_context_slave::_sequent__TOP__Vortex__DOT__vx_deco } } } - // ALWAYS at VX_register_file_master_slave.v:50 - if ((((((0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - & (0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd))) - & this->in_valid[0U]) & (6U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__warp_num))) - & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__real_wspawn)))) { - this->__Vdlyvval__vx_register_file_master__DOT__registers__v0 - = this->in_write_data[0U]; - this->__Vdlyvset__vx_register_file_master__DOT__registers__v0 = 1U; - this->__Vdlyvdim0__vx_register_file_master__DOT__registers__v0 - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd; - } else { - if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__real_wspawn) - & (2U == (IData)(this->__PVT__wspawn_state_stall)))) { - this->__Vdlyvval__vx_register_file_master__DOT__registers__v1 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x1fU]; - this->__Vdlyvset__vx_register_file_master__DOT__registers__v1 = 1U; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v2 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x1eU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v3 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x1dU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v4 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x1cU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v5 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x1bU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v6 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x1aU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v7 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x19U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v8 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x18U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v9 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x17U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v10 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x16U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v11 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x15U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v12 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x14U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v13 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x13U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v14 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x12U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v15 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x11U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v16 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x10U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v17 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0xfU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v18 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0xeU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v19 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0xdU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v20 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0xcU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v21 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0xbU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v22 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0xaU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v23 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [9U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v24 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [8U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v25 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [7U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v26 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [6U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v27 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [5U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v28 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [4U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v29 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [3U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v30 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [2U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v31 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [1U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v32 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0U]; - } - } // ALWAYS at VX_register_file_slave.v:53 - if ((((((0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - & (0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd))) - & this->in_valid[3U]) & (6U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__warp_num))) - & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__real_isclone)))) { - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0 - = this->in_write_data[3U]; - this->__Vdlyvset__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 1U; - this->__Vdlyvdim0__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0 - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd; + if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + & (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xcU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x14U))))) + & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] + >> 7U)) & (6U == (0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__real_isclone)))) { + VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0x11U) + | (0x1ffe0U + & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0xfU)))), this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers, + vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[3U]); } else { - if ((((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__real_isclone) + if ((((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__real_isclone) & ((3U == this->__PVT__rd1_register[0U]) & (1U == (IData)(this->__PVT__clone_state_stall)))) - & (6U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num)))) { - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v1 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x1fU]; - this->__Vdlyvset__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 1U; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v2 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x1eU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v3 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x1dU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v4 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x1cU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v5 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x1bU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v6 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x1aU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v7 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x19U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v8 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x18U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v9 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x17U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v10 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x16U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v11 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x15U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v12 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x14U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v13 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x13U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v14 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x12U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v15 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x11U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v16 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x10U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v17 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0xfU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v18 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0xeU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v19 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0xdU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v20 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0xcU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v21 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0xbU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v22 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0xaU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v23 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [9U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v24 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [8U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v25 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [7U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v26 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [6U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v27 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [5U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v28 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [4U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v29 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [3U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v30 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [2U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v31 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [1U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v32 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0U]; + & (6U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U)))))) { + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0U] + = this->__PVT__vx_register_file_master__DOT__registers[0U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[1U] + = this->__PVT__vx_register_file_master__DOT__registers[1U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[2U] + = this->__PVT__vx_register_file_master__DOT__registers[2U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[3U] + = this->__PVT__vx_register_file_master__DOT__registers[3U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[4U] + = this->__PVT__vx_register_file_master__DOT__registers[4U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[5U] + = this->__PVT__vx_register_file_master__DOT__registers[5U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[6U] + = this->__PVT__vx_register_file_master__DOT__registers[6U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[7U] + = this->__PVT__vx_register_file_master__DOT__registers[7U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[8U] + = this->__PVT__vx_register_file_master__DOT__registers[8U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[9U] + = this->__PVT__vx_register_file_master__DOT__registers[9U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xaU] + = this->__PVT__vx_register_file_master__DOT__registers[0xaU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xbU] + = this->__PVT__vx_register_file_master__DOT__registers[0xbU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xcU] + = this->__PVT__vx_register_file_master__DOT__registers[0xcU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xdU] + = this->__PVT__vx_register_file_master__DOT__registers[0xdU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xeU] + = this->__PVT__vx_register_file_master__DOT__registers[0xeU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xfU] + = this->__PVT__vx_register_file_master__DOT__registers[0xfU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x10U] + = this->__PVT__vx_register_file_master__DOT__registers[0x10U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x11U] + = this->__PVT__vx_register_file_master__DOT__registers[0x11U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x12U] + = this->__PVT__vx_register_file_master__DOT__registers[0x12U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x13U] + = this->__PVT__vx_register_file_master__DOT__registers[0x13U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x14U] + = this->__PVT__vx_register_file_master__DOT__registers[0x14U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x15U] + = this->__PVT__vx_register_file_master__DOT__registers[0x15U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x16U] + = this->__PVT__vx_register_file_master__DOT__registers[0x16U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x17U] + = this->__PVT__vx_register_file_master__DOT__registers[0x17U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x18U] + = this->__PVT__vx_register_file_master__DOT__registers[0x18U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x19U] + = this->__PVT__vx_register_file_master__DOT__registers[0x19U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1aU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1aU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1bU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1bU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1cU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1cU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1dU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1dU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1eU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1eU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1fU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1fU]; } } // ALWAYS at VX_register_file_slave.v:53 - if ((((((0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - & (0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd))) - & this->in_valid[2U]) & (6U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__warp_num))) - & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__real_isclone)))) { - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0 - = this->in_write_data[2U]; - this->__Vdlyvset__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 1U; - this->__Vdlyvdim0__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0 - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd; + if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + & (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xcU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x14U))))) + & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] + >> 6U)) & (6U == (0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__real_isclone)))) { + VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0x11U) + | (0x1ffe0U + & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0xfU)))), this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers, + vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[2U]); } else { - if ((((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__real_isclone) + if ((((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__real_isclone) & ((2U == this->__PVT__rd1_register[0U]) & (1U == (IData)(this->__PVT__clone_state_stall)))) - & (6U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num)))) { - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v1 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x1fU]; - this->__Vdlyvset__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 1U; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v2 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x1eU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v3 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x1dU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v4 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x1cU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v5 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x1bU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v6 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x1aU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v7 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x19U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v8 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x18U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v9 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x17U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v10 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x16U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v11 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x15U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v12 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x14U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v13 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x13U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v14 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x12U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v15 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x11U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v16 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x10U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v17 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0xfU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v18 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0xeU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v19 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0xdU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v20 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0xcU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v21 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0xbU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v22 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0xaU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v23 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [9U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v24 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [8U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v25 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [7U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v26 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [6U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v27 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [5U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v28 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [4U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v29 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [3U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v30 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [2U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v31 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [1U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v32 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0U]; + & (6U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U)))))) { + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0U] + = this->__PVT__vx_register_file_master__DOT__registers[0U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[1U] + = this->__PVT__vx_register_file_master__DOT__registers[1U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[2U] + = this->__PVT__vx_register_file_master__DOT__registers[2U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[3U] + = this->__PVT__vx_register_file_master__DOT__registers[3U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[4U] + = this->__PVT__vx_register_file_master__DOT__registers[4U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[5U] + = this->__PVT__vx_register_file_master__DOT__registers[5U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[6U] + = this->__PVT__vx_register_file_master__DOT__registers[6U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[7U] + = this->__PVT__vx_register_file_master__DOT__registers[7U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[8U] + = this->__PVT__vx_register_file_master__DOT__registers[8U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[9U] + = this->__PVT__vx_register_file_master__DOT__registers[9U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xaU] + = this->__PVT__vx_register_file_master__DOT__registers[0xaU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xbU] + = this->__PVT__vx_register_file_master__DOT__registers[0xbU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xcU] + = this->__PVT__vx_register_file_master__DOT__registers[0xcU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xdU] + = this->__PVT__vx_register_file_master__DOT__registers[0xdU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xeU] + = this->__PVT__vx_register_file_master__DOT__registers[0xeU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xfU] + = this->__PVT__vx_register_file_master__DOT__registers[0xfU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x10U] + = this->__PVT__vx_register_file_master__DOT__registers[0x10U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x11U] + = this->__PVT__vx_register_file_master__DOT__registers[0x11U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x12U] + = this->__PVT__vx_register_file_master__DOT__registers[0x12U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x13U] + = this->__PVT__vx_register_file_master__DOT__registers[0x13U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x14U] + = this->__PVT__vx_register_file_master__DOT__registers[0x14U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x15U] + = this->__PVT__vx_register_file_master__DOT__registers[0x15U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x16U] + = this->__PVT__vx_register_file_master__DOT__registers[0x16U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x17U] + = this->__PVT__vx_register_file_master__DOT__registers[0x17U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x18U] + = this->__PVT__vx_register_file_master__DOT__registers[0x18U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x19U] + = this->__PVT__vx_register_file_master__DOT__registers[0x19U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1aU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1aU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1bU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1bU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1cU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1cU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1dU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1dU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1eU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1eU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1fU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1fU]; } } // ALWAYS at VX_register_file_slave.v:53 - if ((((((0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - & (0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd))) - & this->in_valid[1U]) & (6U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__warp_num))) - & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__real_isclone)))) { - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0 - = this->in_write_data[1U]; - this->__Vdlyvset__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 1U; - this->__Vdlyvdim0__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0 - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd; + if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + & (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xcU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x14U))))) + & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] + >> 5U)) & (6U == (0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__real_isclone)))) { + VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0x11U) + | (0x1ffe0U + & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0xfU)))), this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers, + vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[1U]); } else { - if ((((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__real_isclone) + if ((((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__real_isclone) & ((1U == this->__PVT__rd1_register[0U]) & (1U == (IData)(this->__PVT__clone_state_stall)))) - & (6U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num)))) { - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x1fU]; - this->__Vdlyvset__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 1U; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v2 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x1eU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v3 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x1dU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v4 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x1cU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v5 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x1bU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v6 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x1aU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v7 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x19U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v8 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x18U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v9 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x17U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v10 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x16U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v11 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x15U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v12 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x14U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v13 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x13U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v14 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x12U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v15 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x11U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v16 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x10U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v17 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0xfU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v18 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0xeU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v19 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0xdU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v20 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0xcU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v21 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0xbU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v22 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0xaU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v23 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [9U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v24 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [8U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v25 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [7U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v26 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [6U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v27 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [5U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v28 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [4U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v29 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [3U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v30 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [2U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v31 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [1U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v32 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0U]; + & (6U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U)))))) { + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0U] + = this->__PVT__vx_register_file_master__DOT__registers[0U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[1U] + = this->__PVT__vx_register_file_master__DOT__registers[1U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[2U] + = this->__PVT__vx_register_file_master__DOT__registers[2U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[3U] + = this->__PVT__vx_register_file_master__DOT__registers[3U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[4U] + = this->__PVT__vx_register_file_master__DOT__registers[4U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[5U] + = this->__PVT__vx_register_file_master__DOT__registers[5U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[6U] + = this->__PVT__vx_register_file_master__DOT__registers[6U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[7U] + = this->__PVT__vx_register_file_master__DOT__registers[7U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[8U] + = this->__PVT__vx_register_file_master__DOT__registers[8U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[9U] + = this->__PVT__vx_register_file_master__DOT__registers[9U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xaU] + = this->__PVT__vx_register_file_master__DOT__registers[0xaU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xbU] + = this->__PVT__vx_register_file_master__DOT__registers[0xbU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xcU] + = this->__PVT__vx_register_file_master__DOT__registers[0xcU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xdU] + = this->__PVT__vx_register_file_master__DOT__registers[0xdU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xeU] + = this->__PVT__vx_register_file_master__DOT__registers[0xeU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xfU] + = this->__PVT__vx_register_file_master__DOT__registers[0xfU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x10U] + = this->__PVT__vx_register_file_master__DOT__registers[0x10U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x11U] + = this->__PVT__vx_register_file_master__DOT__registers[0x11U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x12U] + = this->__PVT__vx_register_file_master__DOT__registers[0x12U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x13U] + = this->__PVT__vx_register_file_master__DOT__registers[0x13U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x14U] + = this->__PVT__vx_register_file_master__DOT__registers[0x14U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x15U] + = this->__PVT__vx_register_file_master__DOT__registers[0x15U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x16U] + = this->__PVT__vx_register_file_master__DOT__registers[0x16U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x17U] + = this->__PVT__vx_register_file_master__DOT__registers[0x17U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x18U] + = this->__PVT__vx_register_file_master__DOT__registers[0x18U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x19U] + = this->__PVT__vx_register_file_master__DOT__registers[0x19U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1aU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1aU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1bU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1bU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1cU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1cU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1dU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1dU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1eU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1eU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1fU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1fU]; } } - // ALWAYSPOST at VX_register_file_master_slave.v:53 - if (this->__Vdlyvset__vx_register_file_master__DOT__registers__v0) { - this->__PVT__vx_register_file_master__DOT__registers[this->__Vdlyvdim0__vx_register_file_master__DOT__registers__v0] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v0; - } - if (this->__Vdlyvset__vx_register_file_master__DOT__registers__v1) { - this->__PVT__vx_register_file_master__DOT__registers[0x1fU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v1; - this->__PVT__vx_register_file_master__DOT__registers[0x1eU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v2; - this->__PVT__vx_register_file_master__DOT__registers[0x1dU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v3; - this->__PVT__vx_register_file_master__DOT__registers[0x1cU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v4; - this->__PVT__vx_register_file_master__DOT__registers[0x1bU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v5; - this->__PVT__vx_register_file_master__DOT__registers[0x1aU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v6; - this->__PVT__vx_register_file_master__DOT__registers[0x19U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v7; - this->__PVT__vx_register_file_master__DOT__registers[0x18U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v8; - this->__PVT__vx_register_file_master__DOT__registers[0x17U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v9; - this->__PVT__vx_register_file_master__DOT__registers[0x16U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v10; - this->__PVT__vx_register_file_master__DOT__registers[0x15U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v11; - this->__PVT__vx_register_file_master__DOT__registers[0x14U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v12; - this->__PVT__vx_register_file_master__DOT__registers[0x13U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v13; - this->__PVT__vx_register_file_master__DOT__registers[0x12U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v14; - this->__PVT__vx_register_file_master__DOT__registers[0x11U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v15; - this->__PVT__vx_register_file_master__DOT__registers[0x10U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v16; - this->__PVT__vx_register_file_master__DOT__registers[0xfU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v17; - this->__PVT__vx_register_file_master__DOT__registers[0xeU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v18; - this->__PVT__vx_register_file_master__DOT__registers[0xdU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v19; - this->__PVT__vx_register_file_master__DOT__registers[0xcU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v20; - this->__PVT__vx_register_file_master__DOT__registers[0xbU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v21; - this->__PVT__vx_register_file_master__DOT__registers[0xaU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v22; - this->__PVT__vx_register_file_master__DOT__registers[9U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v23; - this->__PVT__vx_register_file_master__DOT__registers[8U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v24; - this->__PVT__vx_register_file_master__DOT__registers[7U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v25; - this->__PVT__vx_register_file_master__DOT__registers[6U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v26; - this->__PVT__vx_register_file_master__DOT__registers[5U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v27; - this->__PVT__vx_register_file_master__DOT__registers[4U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v28; - this->__PVT__vx_register_file_master__DOT__registers[3U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v29; - this->__PVT__vx_register_file_master__DOT__registers[2U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v30; - this->__PVT__vx_register_file_master__DOT__registers[1U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v31; - this->__PVT__vx_register_file_master__DOT__registers[0U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v32; + this->__PVT__clone_state_stall = this->__Vdly__clone_state_stall; + // ALWAYS at VX_register_file_master_slave.v:50 + if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + & (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xcU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x14U))))) + & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] + >> 4U)) & (6U == (0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__real_wspawn)))) { + VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0x11U) + | (0x1ffe0U + & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0xfU)))), this->__PVT__vx_register_file_master__DOT__registers, + vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[0U]); + } else { + if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__real_wspawn) + & (2U == (IData)(this->__PVT__wspawn_state_stall)))) { + this->__PVT__vx_register_file_master__DOT__registers[0U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0U]; + this->__PVT__vx_register_file_master__DOT__registers[1U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[1U]; + this->__PVT__vx_register_file_master__DOT__registers[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[2U]; + this->__PVT__vx_register_file_master__DOT__registers[3U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[3U]; + this->__PVT__vx_register_file_master__DOT__registers[4U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[4U]; + this->__PVT__vx_register_file_master__DOT__registers[5U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[5U]; + this->__PVT__vx_register_file_master__DOT__registers[6U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[6U]; + this->__PVT__vx_register_file_master__DOT__registers[7U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[7U]; + this->__PVT__vx_register_file_master__DOT__registers[8U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[8U]; + this->__PVT__vx_register_file_master__DOT__registers[9U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[9U]; + this->__PVT__vx_register_file_master__DOT__registers[0xaU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0xaU]; + this->__PVT__vx_register_file_master__DOT__registers[0xbU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0xbU]; + this->__PVT__vx_register_file_master__DOT__registers[0xcU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0xcU]; + this->__PVT__vx_register_file_master__DOT__registers[0xdU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0xdU]; + this->__PVT__vx_register_file_master__DOT__registers[0xeU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0xeU]; + this->__PVT__vx_register_file_master__DOT__registers[0xfU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0xfU]; + this->__PVT__vx_register_file_master__DOT__registers[0x10U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x10U]; + this->__PVT__vx_register_file_master__DOT__registers[0x11U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x11U]; + this->__PVT__vx_register_file_master__DOT__registers[0x12U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x12U]; + this->__PVT__vx_register_file_master__DOT__registers[0x13U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x13U]; + this->__PVT__vx_register_file_master__DOT__registers[0x14U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x14U]; + this->__PVT__vx_register_file_master__DOT__registers[0x15U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x15U]; + this->__PVT__vx_register_file_master__DOT__registers[0x16U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x16U]; + this->__PVT__vx_register_file_master__DOT__registers[0x17U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x17U]; + this->__PVT__vx_register_file_master__DOT__registers[0x18U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x18U]; + this->__PVT__vx_register_file_master__DOT__registers[0x19U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x19U]; + this->__PVT__vx_register_file_master__DOT__registers[0x1aU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x1aU]; + this->__PVT__vx_register_file_master__DOT__registers[0x1bU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x1bU]; + this->__PVT__vx_register_file_master__DOT__registers[0x1cU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x1cU]; + this->__PVT__vx_register_file_master__DOT__registers[0x1dU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x1dU]; + this->__PVT__vx_register_file_master__DOT__registers[0x1eU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x1eU]; + this->__PVT__vx_register_file_master__DOT__registers[0x1fU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x1fU]; + } } this->__PVT__wspawn_state_stall = this->__Vdly__wspawn_state_stall; - // ALWAYSPOST at VX_register_file_slave.v:56 - if (this->__Vdlyvset__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0) { - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[this->__Vdlyvdim0__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0; - } - if (this->__Vdlyvset__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v1) { - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1fU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v1; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1eU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v2; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1dU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v3; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1cU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v4; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1bU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v5; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1aU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v6; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x19U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v7; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x18U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v8; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x17U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v9; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x16U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v10; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x15U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v11; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x14U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v12; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x13U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v13; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x12U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v14; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x11U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v15; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x10U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v16; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xfU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v17; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xeU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v18; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xdU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v19; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xcU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v20; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xbU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v21; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xaU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v22; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[9U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v23; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[8U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v24; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[7U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v25; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[6U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v26; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[5U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v27; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[4U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v28; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[3U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v29; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[2U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v30; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[1U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v31; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v32; - } - // ALWAYSPOST at VX_register_file_slave.v:56 - if (this->__Vdlyvset__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0) { - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[this->__Vdlyvdim0__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0; - } - if (this->__Vdlyvset__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v1) { - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1fU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v1; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1eU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v2; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1dU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v3; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1cU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v4; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1bU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v5; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1aU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v6; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x19U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v7; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x18U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v8; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x17U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v9; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x16U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v10; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x15U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v11; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x14U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v12; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x13U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v13; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x12U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v14; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x11U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v15; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x10U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v16; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xfU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v17; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xeU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v18; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xdU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v19; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xcU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v20; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xbU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v21; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xaU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v22; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[9U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v23; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[8U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v24; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[7U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v25; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[6U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v26; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[5U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v27; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[4U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v28; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[3U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v29; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[2U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v30; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[1U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v31; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v32; - } - // ALWAYSPOST at VX_register_file_slave.v:56 - if (this->__Vdlyvset__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0) { - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[this->__Vdlyvdim0__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0; - } - if (this->__Vdlyvset__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1) { - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1fU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1eU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v2; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1dU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v3; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1cU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v4; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1bU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v5; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1aU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v6; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x19U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v7; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x18U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v8; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x17U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v9; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x16U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v10; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x15U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v11; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x14U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v12; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x13U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v13; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x12U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v14; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x11U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v15; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x10U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v16; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xfU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v17; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xeU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v18; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xdU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v19; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xcU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v20; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xbU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v21; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xaU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v22; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[9U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v23; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[8U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v24; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[7U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v25; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[6U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v26; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[5U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v27; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[4U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v28; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[3U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v29; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[2U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v30; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[1U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v31; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v32; - } - this->__PVT__clone_state_stall = this->__Vdly__clone_state_stall; - this->__Vcellout__vx_register_file_master__out_regs[0x1fU] - = this->__PVT__vx_register_file_master__DOT__registers - [0x1fU]; - this->__Vcellout__vx_register_file_master__out_regs[0x1eU] - = this->__PVT__vx_register_file_master__DOT__registers - [0x1eU]; - this->__Vcellout__vx_register_file_master__out_regs[0x1dU] - = this->__PVT__vx_register_file_master__DOT__registers - [0x1dU]; - this->__Vcellout__vx_register_file_master__out_regs[0x1cU] - = this->__PVT__vx_register_file_master__DOT__registers - [0x1cU]; - this->__Vcellout__vx_register_file_master__out_regs[0x1bU] - = this->__PVT__vx_register_file_master__DOT__registers - [0x1bU]; - this->__Vcellout__vx_register_file_master__out_regs[0x1aU] - = this->__PVT__vx_register_file_master__DOT__registers - [0x1aU]; - this->__Vcellout__vx_register_file_master__out_regs[0x19U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x19U]; - this->__Vcellout__vx_register_file_master__out_regs[0x18U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x18U]; - this->__Vcellout__vx_register_file_master__out_regs[0x17U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x17U]; - this->__Vcellout__vx_register_file_master__out_regs[0x16U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x16U]; - this->__Vcellout__vx_register_file_master__out_regs[0x15U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x15U]; - this->__Vcellout__vx_register_file_master__out_regs[0x14U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x14U]; - this->__Vcellout__vx_register_file_master__out_regs[0x13U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x13U]; - this->__Vcellout__vx_register_file_master__out_regs[0x12U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x12U]; - this->__Vcellout__vx_register_file_master__out_regs[0x11U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x11U]; - this->__Vcellout__vx_register_file_master__out_regs[0x10U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x10U]; - this->__Vcellout__vx_register_file_master__out_regs[0xfU] - = this->__PVT__vx_register_file_master__DOT__registers - [0xfU]; - this->__Vcellout__vx_register_file_master__out_regs[0xeU] - = this->__PVT__vx_register_file_master__DOT__registers - [0xeU]; - this->__Vcellout__vx_register_file_master__out_regs[0xdU] - = this->__PVT__vx_register_file_master__DOT__registers - [0xdU]; - this->__Vcellout__vx_register_file_master__out_regs[0xcU] - = this->__PVT__vx_register_file_master__DOT__registers - [0xcU]; - this->__Vcellout__vx_register_file_master__out_regs[0xbU] - = this->__PVT__vx_register_file_master__DOT__registers - [0xbU]; - this->__Vcellout__vx_register_file_master__out_regs[0xaU] - = this->__PVT__vx_register_file_master__DOT__registers - [0xaU]; - this->__Vcellout__vx_register_file_master__out_regs[9U] - = this->__PVT__vx_register_file_master__DOT__registers - [9U]; - this->__Vcellout__vx_register_file_master__out_regs[8U] - = this->__PVT__vx_register_file_master__DOT__registers - [8U]; - this->__Vcellout__vx_register_file_master__out_regs[7U] - = this->__PVT__vx_register_file_master__DOT__registers - [7U]; - this->__Vcellout__vx_register_file_master__out_regs[6U] - = this->__PVT__vx_register_file_master__DOT__registers - [6U]; - this->__Vcellout__vx_register_file_master__out_regs[5U] - = this->__PVT__vx_register_file_master__DOT__registers - [5U]; - this->__Vcellout__vx_register_file_master__out_regs[4U] - = this->__PVT__vx_register_file_master__DOT__registers - [4U]; - this->__Vcellout__vx_register_file_master__out_regs[3U] - = this->__PVT__vx_register_file_master__DOT__registers - [3U]; - this->__Vcellout__vx_register_file_master__out_regs[2U] - = this->__PVT__vx_register_file_master__DOT__registers - [2U]; - this->__Vcellout__vx_register_file_master__out_regs[1U] - = this->__PVT__vx_register_file_master__DOT__registers - [1U]; - this->__Vcellout__vx_register_file_master__out_regs[0U] - = this->__PVT__vx_register_file_master__DOT__registers - [0U]; - this->__PVT__clone_regsiters[0x1fU] = this->__Vcellout__vx_register_file_master__out_regs - [0x1fU]; - this->__PVT__clone_regsiters[0x1eU] = this->__Vcellout__vx_register_file_master__out_regs - [0x1eU]; - this->__PVT__clone_regsiters[0x1dU] = this->__Vcellout__vx_register_file_master__out_regs - [0x1dU]; - this->__PVT__clone_regsiters[0x1cU] = this->__Vcellout__vx_register_file_master__out_regs - [0x1cU]; - this->__PVT__clone_regsiters[0x1bU] = this->__Vcellout__vx_register_file_master__out_regs - [0x1bU]; - this->__PVT__clone_regsiters[0x1aU] = this->__Vcellout__vx_register_file_master__out_regs - [0x1aU]; - this->__PVT__clone_regsiters[0x19U] = this->__Vcellout__vx_register_file_master__out_regs - [0x19U]; - this->__PVT__clone_regsiters[0x18U] = this->__Vcellout__vx_register_file_master__out_regs - [0x18U]; - this->__PVT__clone_regsiters[0x17U] = this->__Vcellout__vx_register_file_master__out_regs - [0x17U]; - this->__PVT__clone_regsiters[0x16U] = this->__Vcellout__vx_register_file_master__out_regs - [0x16U]; - this->__PVT__clone_regsiters[0x15U] = this->__Vcellout__vx_register_file_master__out_regs - [0x15U]; - this->__PVT__clone_regsiters[0x14U] = this->__Vcellout__vx_register_file_master__out_regs - [0x14U]; - this->__PVT__clone_regsiters[0x13U] = this->__Vcellout__vx_register_file_master__out_regs - [0x13U]; - this->__PVT__clone_regsiters[0x12U] = this->__Vcellout__vx_register_file_master__out_regs - [0x12U]; - this->__PVT__clone_regsiters[0x11U] = this->__Vcellout__vx_register_file_master__out_regs - [0x11U]; - this->__PVT__clone_regsiters[0x10U] = this->__Vcellout__vx_register_file_master__out_regs - [0x10U]; - this->__PVT__clone_regsiters[0xfU] = this->__Vcellout__vx_register_file_master__out_regs - [0xfU]; - this->__PVT__clone_regsiters[0xeU] = this->__Vcellout__vx_register_file_master__out_regs - [0xeU]; - this->__PVT__clone_regsiters[0xdU] = this->__Vcellout__vx_register_file_master__out_regs - [0xdU]; - this->__PVT__clone_regsiters[0xcU] = this->__Vcellout__vx_register_file_master__out_regs - [0xcU]; - this->__PVT__clone_regsiters[0xbU] = this->__Vcellout__vx_register_file_master__out_regs - [0xbU]; - this->__PVT__clone_regsiters[0xaU] = this->__Vcellout__vx_register_file_master__out_regs - [0xaU]; - this->__PVT__clone_regsiters[9U] = this->__Vcellout__vx_register_file_master__out_regs - [9U]; - this->__PVT__clone_regsiters[8U] = this->__Vcellout__vx_register_file_master__out_regs - [8U]; - this->__PVT__clone_regsiters[7U] = this->__Vcellout__vx_register_file_master__out_regs - [7U]; - this->__PVT__clone_regsiters[6U] = this->__Vcellout__vx_register_file_master__out_regs - [6U]; - this->__PVT__clone_regsiters[5U] = this->__Vcellout__vx_register_file_master__out_regs - [5U]; - this->__PVT__clone_regsiters[4U] = this->__Vcellout__vx_register_file_master__out_regs - [4U]; - this->__PVT__clone_regsiters[3U] = this->__Vcellout__vx_register_file_master__out_regs - [3U]; - this->__PVT__clone_regsiters[2U] = this->__Vcellout__vx_register_file_master__out_regs - [2U]; - this->__PVT__clone_regsiters[1U] = this->__Vcellout__vx_register_file_master__out_regs - [1U]; - this->__PVT__clone_regsiters[0U] = this->__Vcellout__vx_register_file_master__out_regs - [0U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1fU] - = this->__PVT__clone_regsiters[0x1fU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1eU] - = this->__PVT__clone_regsiters[0x1eU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1dU] - = this->__PVT__clone_regsiters[0x1dU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1cU] - = this->__PVT__clone_regsiters[0x1cU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1bU] - = this->__PVT__clone_regsiters[0x1bU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1aU] - = this->__PVT__clone_regsiters[0x1aU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x19U] - = this->__PVT__clone_regsiters[0x19U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x18U] - = this->__PVT__clone_regsiters[0x18U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x17U] - = this->__PVT__clone_regsiters[0x17U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x16U] - = this->__PVT__clone_regsiters[0x16U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x15U] - = this->__PVT__clone_regsiters[0x15U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x14U] - = this->__PVT__clone_regsiters[0x14U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x13U] - = this->__PVT__clone_regsiters[0x13U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x12U] - = this->__PVT__clone_regsiters[0x12U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x11U] - = this->__PVT__clone_regsiters[0x11U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x10U] - = this->__PVT__clone_regsiters[0x10U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xfU] - = this->__PVT__clone_regsiters[0xfU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xeU] - = this->__PVT__clone_regsiters[0xeU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xdU] - = this->__PVT__clone_regsiters[0xdU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xcU] - = this->__PVT__clone_regsiters[0xcU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xbU] - = this->__PVT__clone_regsiters[0xbU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xaU] - = this->__PVT__clone_regsiters[0xaU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[9U] - = this->__PVT__clone_regsiters[9U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[8U] - = this->__PVT__clone_regsiters[8U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[7U] - = this->__PVT__clone_regsiters[7U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[6U] - = this->__PVT__clone_regsiters[6U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[5U] - = this->__PVT__clone_regsiters[5U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[4U] - = this->__PVT__clone_regsiters[4U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[3U] - = this->__PVT__clone_regsiters[3U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[2U] - = this->__PVT__clone_regsiters[2U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[1U] - = this->__PVT__clone_regsiters[1U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0U] - = this->__PVT__clone_regsiters[0U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1fU] - = this->__PVT__clone_regsiters[0x1fU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1eU] - = this->__PVT__clone_regsiters[0x1eU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1dU] - = this->__PVT__clone_regsiters[0x1dU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1cU] - = this->__PVT__clone_regsiters[0x1cU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1bU] - = this->__PVT__clone_regsiters[0x1bU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1aU] - = this->__PVT__clone_regsiters[0x1aU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x19U] - = this->__PVT__clone_regsiters[0x19U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x18U] - = this->__PVT__clone_regsiters[0x18U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x17U] - = this->__PVT__clone_regsiters[0x17U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x16U] - = this->__PVT__clone_regsiters[0x16U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x15U] - = this->__PVT__clone_regsiters[0x15U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x14U] - = this->__PVT__clone_regsiters[0x14U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x13U] - = this->__PVT__clone_regsiters[0x13U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x12U] - = this->__PVT__clone_regsiters[0x12U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x11U] - = this->__PVT__clone_regsiters[0x11U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x10U] - = this->__PVT__clone_regsiters[0x10U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xfU] - = this->__PVT__clone_regsiters[0xfU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xeU] - = this->__PVT__clone_regsiters[0xeU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xdU] - = this->__PVT__clone_regsiters[0xdU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xcU] - = this->__PVT__clone_regsiters[0xcU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xbU] - = this->__PVT__clone_regsiters[0xbU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xaU] - = this->__PVT__clone_regsiters[0xaU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[9U] - = this->__PVT__clone_regsiters[9U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[8U] - = this->__PVT__clone_regsiters[8U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[7U] - = this->__PVT__clone_regsiters[7U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[6U] - = this->__PVT__clone_regsiters[6U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[5U] - = this->__PVT__clone_regsiters[5U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[4U] - = this->__PVT__clone_regsiters[4U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[3U] - = this->__PVT__clone_regsiters[3U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[2U] - = this->__PVT__clone_regsiters[2U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[1U] - = this->__PVT__clone_regsiters[1U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0U] - = this->__PVT__clone_regsiters[0U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1fU] - = this->__PVT__clone_regsiters[0x1fU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1eU] - = this->__PVT__clone_regsiters[0x1eU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1dU] - = this->__PVT__clone_regsiters[0x1dU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1cU] - = this->__PVT__clone_regsiters[0x1cU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1bU] - = this->__PVT__clone_regsiters[0x1bU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1aU] - = this->__PVT__clone_regsiters[0x1aU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x19U] - = this->__PVT__clone_regsiters[0x19U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x18U] - = this->__PVT__clone_regsiters[0x18U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x17U] - = this->__PVT__clone_regsiters[0x17U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x16U] - = this->__PVT__clone_regsiters[0x16U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x15U] - = this->__PVT__clone_regsiters[0x15U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x14U] - = this->__PVT__clone_regsiters[0x14U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x13U] - = this->__PVT__clone_regsiters[0x13U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x12U] - = this->__PVT__clone_regsiters[0x12U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x11U] - = this->__PVT__clone_regsiters[0x11U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x10U] - = this->__PVT__clone_regsiters[0x10U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xfU] - = this->__PVT__clone_regsiters[0xfU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xeU] - = this->__PVT__clone_regsiters[0xeU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xdU] - = this->__PVT__clone_regsiters[0xdU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xcU] - = this->__PVT__clone_regsiters[0xcU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xbU] - = this->__PVT__clone_regsiters[0xbU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xaU] - = this->__PVT__clone_regsiters[0xaU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[9U] - = this->__PVT__clone_regsiters[9U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[8U] - = this->__PVT__clone_regsiters[8U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[7U] - = this->__PVT__clone_regsiters[7U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[6U] - = this->__PVT__clone_regsiters[6U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[5U] - = this->__PVT__clone_regsiters[5U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[4U] - = this->__PVT__clone_regsiters[4U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[3U] - = this->__PVT__clone_regsiters[3U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[2U] - = this->__PVT__clone_regsiters[2U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[1U] - = this->__PVT__clone_regsiters[1U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0U] - = this->__PVT__clone_regsiters[0U]; } -VL_INLINE_OPT void VVortex_VX_context_slave::_sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one__21(VVortex__Syms* __restrict vlSymsp) { - VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex_VX_context_slave::_sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one__21\n"); ); +VL_INLINE_OPT void VVortex_VX_context_slave::_sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one__21(VVortex__Syms* __restrict vlSymsp) { + VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex_VX_context_slave::_sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one__21\n"); ); VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; // Body this->__Vdly__wspawn_state_stall = this->__PVT__wspawn_state_stall; this->__Vdly__clone_state_stall = this->__PVT__clone_state_stall; - this->__Vdlyvset__vx_register_file_master__DOT__registers__v0 = 0U; - this->__Vdlyvset__vx_register_file_master__DOT__registers__v1 = 0U; - this->__Vdlyvset__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 0U; - this->__Vdlyvset__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 0U; - this->__Vdlyvset__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 0U; - this->__Vdlyvset__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 0U; - this->__Vdlyvset__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 0U; - this->__Vdlyvset__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 0U; // ALWAYS at VX_context_slave.v:119 - if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__real_wspawn) + if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__real_wspawn) & (0U == (IData)(this->__PVT__wspawn_state_stall)))) { this->__Vdly__wspawn_state_stall = 0xaU; } else { @@ -7538,7 +2616,7 @@ VL_INLINE_OPT void VVortex_VX_context_slave::_sequent__TOP__Vortex__DOT__vx_deco } } // ALWAYS at VX_context_slave.v:104 - if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__real_isclone) + if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__real_isclone) & (0U == (IData)(this->__PVT__clone_state_stall)))) { this->__Vdly__clone_state_stall = 0xaU; } else { @@ -7552,1098 +2630,360 @@ VL_INLINE_OPT void VVortex_VX_context_slave::_sequent__TOP__Vortex__DOT__vx_deco } } } - // ALWAYS at VX_register_file_master_slave.v:50 - if ((((((0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - & (0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd))) - & this->in_valid[0U]) & (7U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__warp_num))) - & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__real_wspawn)))) { - this->__Vdlyvval__vx_register_file_master__DOT__registers__v0 - = this->in_write_data[0U]; - this->__Vdlyvset__vx_register_file_master__DOT__registers__v0 = 1U; - this->__Vdlyvdim0__vx_register_file_master__DOT__registers__v0 - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd; - } else { - if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__real_wspawn) - & (2U == (IData)(this->__PVT__wspawn_state_stall)))) { - this->__Vdlyvval__vx_register_file_master__DOT__registers__v1 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x1fU]; - this->__Vdlyvset__vx_register_file_master__DOT__registers__v1 = 1U; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v2 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x1eU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v3 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x1dU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v4 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x1cU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v5 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x1bU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v6 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x1aU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v7 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x19U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v8 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x18U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v9 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x17U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v10 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x16U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v11 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x15U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v12 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x14U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v13 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x13U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v14 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x12U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v15 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x11U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v16 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0x10U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v17 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0xfU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v18 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0xeU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v19 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0xdU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v20 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0xcU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v21 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0xbU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v22 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0xaU]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v23 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [9U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v24 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [8U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v25 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [7U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v26 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [6U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v27 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [5U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v28 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [4U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v29 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [3U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v30 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [2U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v31 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [1U]; - this->__Vdlyvval__vx_register_file_master__DOT__registers__v32 - = this->__Vcellinp__vx_register_file_master__in_wspawn_regs - [0U]; - } - } // ALWAYS at VX_register_file_slave.v:53 - if ((((((0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - & (0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd))) - & this->in_valid[3U]) & (7U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__warp_num))) - & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__real_isclone)))) { - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0 - = this->in_write_data[3U]; - this->__Vdlyvset__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 1U; - this->__Vdlyvdim0__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0 - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd; + if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + & (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xcU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x14U))))) + & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] + >> 7U)) & (7U == (0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__real_isclone)))) { + VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0x11U) + | (0x1ffe0U + & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0xfU)))), this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers, + vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[3U]); } else { - if ((((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__real_isclone) + if ((((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__real_isclone) & ((3U == this->__PVT__rd1_register[0U]) & (1U == (IData)(this->__PVT__clone_state_stall)))) - & (7U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num)))) { - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v1 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x1fU]; - this->__Vdlyvset__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 1U; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v2 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x1eU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v3 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x1dU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v4 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x1cU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v5 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x1bU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v6 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x1aU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v7 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x19U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v8 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x18U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v9 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x17U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v10 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x16U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v11 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x15U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v12 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x14U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v13 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x13U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v14 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x12U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v15 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x11U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v16 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0x10U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v17 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0xfU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v18 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0xeU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v19 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0xdU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v20 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0xcU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v21 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0xbU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v22 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0xaU]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v23 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [9U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v24 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [8U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v25 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [7U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v26 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [6U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v27 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [5U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v28 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [4U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v29 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [3U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v30 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [2U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v31 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [1U]; - this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v32 - = this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs - [0U]; + & (7U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U)))))) { + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0U] + = this->__PVT__vx_register_file_master__DOT__registers[0U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[1U] + = this->__PVT__vx_register_file_master__DOT__registers[1U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[2U] + = this->__PVT__vx_register_file_master__DOT__registers[2U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[3U] + = this->__PVT__vx_register_file_master__DOT__registers[3U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[4U] + = this->__PVT__vx_register_file_master__DOT__registers[4U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[5U] + = this->__PVT__vx_register_file_master__DOT__registers[5U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[6U] + = this->__PVT__vx_register_file_master__DOT__registers[6U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[7U] + = this->__PVT__vx_register_file_master__DOT__registers[7U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[8U] + = this->__PVT__vx_register_file_master__DOT__registers[8U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[9U] + = this->__PVT__vx_register_file_master__DOT__registers[9U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xaU] + = this->__PVT__vx_register_file_master__DOT__registers[0xaU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xbU] + = this->__PVT__vx_register_file_master__DOT__registers[0xbU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xcU] + = this->__PVT__vx_register_file_master__DOT__registers[0xcU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xdU] + = this->__PVT__vx_register_file_master__DOT__registers[0xdU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xeU] + = this->__PVT__vx_register_file_master__DOT__registers[0xeU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xfU] + = this->__PVT__vx_register_file_master__DOT__registers[0xfU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x10U] + = this->__PVT__vx_register_file_master__DOT__registers[0x10U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x11U] + = this->__PVT__vx_register_file_master__DOT__registers[0x11U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x12U] + = this->__PVT__vx_register_file_master__DOT__registers[0x12U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x13U] + = this->__PVT__vx_register_file_master__DOT__registers[0x13U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x14U] + = this->__PVT__vx_register_file_master__DOT__registers[0x14U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x15U] + = this->__PVT__vx_register_file_master__DOT__registers[0x15U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x16U] + = this->__PVT__vx_register_file_master__DOT__registers[0x16U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x17U] + = this->__PVT__vx_register_file_master__DOT__registers[0x17U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x18U] + = this->__PVT__vx_register_file_master__DOT__registers[0x18U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x19U] + = this->__PVT__vx_register_file_master__DOT__registers[0x19U]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1aU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1aU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1bU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1bU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1cU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1cU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1dU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1dU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1eU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1eU]; + this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1fU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1fU]; } } // ALWAYS at VX_register_file_slave.v:53 - if ((((((0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - & (0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd))) - & this->in_valid[2U]) & (7U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__warp_num))) - & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__real_isclone)))) { - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0 - = this->in_write_data[2U]; - this->__Vdlyvset__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 1U; - this->__Vdlyvdim0__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0 - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd; + if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + & (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xcU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x14U))))) + & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] + >> 6U)) & (7U == (0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__real_isclone)))) { + VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0x11U) + | (0x1ffe0U + & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0xfU)))), this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers, + vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[2U]); } else { - if ((((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__real_isclone) + if ((((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__real_isclone) & ((2U == this->__PVT__rd1_register[0U]) & (1U == (IData)(this->__PVT__clone_state_stall)))) - & (7U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num)))) { - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v1 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x1fU]; - this->__Vdlyvset__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 1U; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v2 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x1eU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v3 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x1dU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v4 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x1cU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v5 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x1bU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v6 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x1aU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v7 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x19U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v8 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x18U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v9 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x17U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v10 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x16U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v11 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x15U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v12 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x14U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v13 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x13U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v14 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x12U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v15 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x11U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v16 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0x10U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v17 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0xfU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v18 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0xeU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v19 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0xdU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v20 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0xcU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v21 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0xbU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v22 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0xaU]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v23 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [9U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v24 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [8U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v25 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [7U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v26 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [6U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v27 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [5U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v28 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [4U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v29 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [3U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v30 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [2U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v31 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [1U]; - this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v32 - = this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs - [0U]; + & (7U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U)))))) { + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0U] + = this->__PVT__vx_register_file_master__DOT__registers[0U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[1U] + = this->__PVT__vx_register_file_master__DOT__registers[1U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[2U] + = this->__PVT__vx_register_file_master__DOT__registers[2U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[3U] + = this->__PVT__vx_register_file_master__DOT__registers[3U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[4U] + = this->__PVT__vx_register_file_master__DOT__registers[4U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[5U] + = this->__PVT__vx_register_file_master__DOT__registers[5U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[6U] + = this->__PVT__vx_register_file_master__DOT__registers[6U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[7U] + = this->__PVT__vx_register_file_master__DOT__registers[7U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[8U] + = this->__PVT__vx_register_file_master__DOT__registers[8U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[9U] + = this->__PVT__vx_register_file_master__DOT__registers[9U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xaU] + = this->__PVT__vx_register_file_master__DOT__registers[0xaU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xbU] + = this->__PVT__vx_register_file_master__DOT__registers[0xbU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xcU] + = this->__PVT__vx_register_file_master__DOT__registers[0xcU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xdU] + = this->__PVT__vx_register_file_master__DOT__registers[0xdU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xeU] + = this->__PVT__vx_register_file_master__DOT__registers[0xeU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xfU] + = this->__PVT__vx_register_file_master__DOT__registers[0xfU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x10U] + = this->__PVT__vx_register_file_master__DOT__registers[0x10U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x11U] + = this->__PVT__vx_register_file_master__DOT__registers[0x11U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x12U] + = this->__PVT__vx_register_file_master__DOT__registers[0x12U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x13U] + = this->__PVT__vx_register_file_master__DOT__registers[0x13U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x14U] + = this->__PVT__vx_register_file_master__DOT__registers[0x14U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x15U] + = this->__PVT__vx_register_file_master__DOT__registers[0x15U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x16U] + = this->__PVT__vx_register_file_master__DOT__registers[0x16U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x17U] + = this->__PVT__vx_register_file_master__DOT__registers[0x17U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x18U] + = this->__PVT__vx_register_file_master__DOT__registers[0x18U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x19U] + = this->__PVT__vx_register_file_master__DOT__registers[0x19U]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1aU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1aU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1bU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1bU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1cU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1cU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1dU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1dU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1eU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1eU]; + this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1fU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1fU]; } } // ALWAYS at VX_register_file_slave.v:53 - if ((((((0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - & (0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd))) - & this->in_valid[1U]) & (7U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__warp_num))) - & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__real_isclone)))) { - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0 - = this->in_write_data[1U]; - this->__Vdlyvset__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 1U; - this->__Vdlyvdim0__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0 - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd; + if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + & (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xcU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x14U))))) + & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] + >> 5U)) & (7U == (0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__real_isclone)))) { + VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0x11U) + | (0x1ffe0U + & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0xfU)))), this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers, + vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[1U]); } else { - if ((((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__real_isclone) + if ((((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__real_isclone) & ((1U == this->__PVT__rd1_register[0U]) & (1U == (IData)(this->__PVT__clone_state_stall)))) - & (7U == (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__warp_num)))) { - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x1fU]; - this->__Vdlyvset__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 1U; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v2 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x1eU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v3 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x1dU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v4 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x1cU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v5 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x1bU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v6 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x1aU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v7 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x19U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v8 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x18U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v9 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x17U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v10 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x16U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v11 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x15U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v12 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x14U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v13 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x13U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v14 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x12U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v15 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x11U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v16 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0x10U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v17 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0xfU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v18 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0xeU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v19 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0xdU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v20 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0xcU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v21 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0xbU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v22 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0xaU]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v23 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [9U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v24 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [8U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v25 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [7U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v26 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [6U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v27 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [5U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v28 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [4U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v29 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [3U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v30 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [2U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v31 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [1U]; - this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v32 - = this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs - [0U]; + & (7U == (0xfU & ((vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] + << 0x1cU) | (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] + >> 4U)))))) { + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0U] + = this->__PVT__vx_register_file_master__DOT__registers[0U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[1U] + = this->__PVT__vx_register_file_master__DOT__registers[1U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[2U] + = this->__PVT__vx_register_file_master__DOT__registers[2U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[3U] + = this->__PVT__vx_register_file_master__DOT__registers[3U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[4U] + = this->__PVT__vx_register_file_master__DOT__registers[4U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[5U] + = this->__PVT__vx_register_file_master__DOT__registers[5U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[6U] + = this->__PVT__vx_register_file_master__DOT__registers[6U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[7U] + = this->__PVT__vx_register_file_master__DOT__registers[7U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[8U] + = this->__PVT__vx_register_file_master__DOT__registers[8U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[9U] + = this->__PVT__vx_register_file_master__DOT__registers[9U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xaU] + = this->__PVT__vx_register_file_master__DOT__registers[0xaU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xbU] + = this->__PVT__vx_register_file_master__DOT__registers[0xbU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xcU] + = this->__PVT__vx_register_file_master__DOT__registers[0xcU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xdU] + = this->__PVT__vx_register_file_master__DOT__registers[0xdU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xeU] + = this->__PVT__vx_register_file_master__DOT__registers[0xeU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xfU] + = this->__PVT__vx_register_file_master__DOT__registers[0xfU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x10U] + = this->__PVT__vx_register_file_master__DOT__registers[0x10U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x11U] + = this->__PVT__vx_register_file_master__DOT__registers[0x11U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x12U] + = this->__PVT__vx_register_file_master__DOT__registers[0x12U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x13U] + = this->__PVT__vx_register_file_master__DOT__registers[0x13U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x14U] + = this->__PVT__vx_register_file_master__DOT__registers[0x14U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x15U] + = this->__PVT__vx_register_file_master__DOT__registers[0x15U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x16U] + = this->__PVT__vx_register_file_master__DOT__registers[0x16U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x17U] + = this->__PVT__vx_register_file_master__DOT__registers[0x17U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x18U] + = this->__PVT__vx_register_file_master__DOT__registers[0x18U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x19U] + = this->__PVT__vx_register_file_master__DOT__registers[0x19U]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1aU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1aU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1bU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1bU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1cU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1cU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1dU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1dU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1eU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1eU]; + this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1fU] + = this->__PVT__vx_register_file_master__DOT__registers[0x1fU]; } } - // ALWAYSPOST at VX_register_file_master_slave.v:53 - if (this->__Vdlyvset__vx_register_file_master__DOT__registers__v0) { - this->__PVT__vx_register_file_master__DOT__registers[this->__Vdlyvdim0__vx_register_file_master__DOT__registers__v0] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v0; - } - if (this->__Vdlyvset__vx_register_file_master__DOT__registers__v1) { - this->__PVT__vx_register_file_master__DOT__registers[0x1fU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v1; - this->__PVT__vx_register_file_master__DOT__registers[0x1eU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v2; - this->__PVT__vx_register_file_master__DOT__registers[0x1dU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v3; - this->__PVT__vx_register_file_master__DOT__registers[0x1cU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v4; - this->__PVT__vx_register_file_master__DOT__registers[0x1bU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v5; - this->__PVT__vx_register_file_master__DOT__registers[0x1aU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v6; - this->__PVT__vx_register_file_master__DOT__registers[0x19U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v7; - this->__PVT__vx_register_file_master__DOT__registers[0x18U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v8; - this->__PVT__vx_register_file_master__DOT__registers[0x17U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v9; - this->__PVT__vx_register_file_master__DOT__registers[0x16U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v10; - this->__PVT__vx_register_file_master__DOT__registers[0x15U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v11; - this->__PVT__vx_register_file_master__DOT__registers[0x14U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v12; - this->__PVT__vx_register_file_master__DOT__registers[0x13U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v13; - this->__PVT__vx_register_file_master__DOT__registers[0x12U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v14; - this->__PVT__vx_register_file_master__DOT__registers[0x11U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v15; - this->__PVT__vx_register_file_master__DOT__registers[0x10U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v16; - this->__PVT__vx_register_file_master__DOT__registers[0xfU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v17; - this->__PVT__vx_register_file_master__DOT__registers[0xeU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v18; - this->__PVT__vx_register_file_master__DOT__registers[0xdU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v19; - this->__PVT__vx_register_file_master__DOT__registers[0xcU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v20; - this->__PVT__vx_register_file_master__DOT__registers[0xbU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v21; - this->__PVT__vx_register_file_master__DOT__registers[0xaU] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v22; - this->__PVT__vx_register_file_master__DOT__registers[9U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v23; - this->__PVT__vx_register_file_master__DOT__registers[8U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v24; - this->__PVT__vx_register_file_master__DOT__registers[7U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v25; - this->__PVT__vx_register_file_master__DOT__registers[6U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v26; - this->__PVT__vx_register_file_master__DOT__registers[5U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v27; - this->__PVT__vx_register_file_master__DOT__registers[4U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v28; - this->__PVT__vx_register_file_master__DOT__registers[3U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v29; - this->__PVT__vx_register_file_master__DOT__registers[2U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v30; - this->__PVT__vx_register_file_master__DOT__registers[1U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v31; - this->__PVT__vx_register_file_master__DOT__registers[0U] - = this->__Vdlyvval__vx_register_file_master__DOT__registers__v32; + this->__PVT__clone_state_stall = this->__Vdly__clone_state_stall; + // ALWAYS at VX_register_file_master_slave.v:50 + if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xeU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x12U)))) + & (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0xcU) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0x14U))))) + & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] + >> 4U)) & (7U == (0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__real_wspawn)))) { + VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] + << 0x11U) + | (0x1ffe0U + & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] + >> 0xfU)))), this->__PVT__vx_register_file_master__DOT__registers, + vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[0U]); + } else { + if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__real_wspawn) + & (2U == (IData)(this->__PVT__wspawn_state_stall)))) { + this->__PVT__vx_register_file_master__DOT__registers[0U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0U]; + this->__PVT__vx_register_file_master__DOT__registers[1U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[1U]; + this->__PVT__vx_register_file_master__DOT__registers[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[2U]; + this->__PVT__vx_register_file_master__DOT__registers[3U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[3U]; + this->__PVT__vx_register_file_master__DOT__registers[4U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[4U]; + this->__PVT__vx_register_file_master__DOT__registers[5U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[5U]; + this->__PVT__vx_register_file_master__DOT__registers[6U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[6U]; + this->__PVT__vx_register_file_master__DOT__registers[7U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[7U]; + this->__PVT__vx_register_file_master__DOT__registers[8U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[8U]; + this->__PVT__vx_register_file_master__DOT__registers[9U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[9U]; + this->__PVT__vx_register_file_master__DOT__registers[0xaU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0xaU]; + this->__PVT__vx_register_file_master__DOT__registers[0xbU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0xbU]; + this->__PVT__vx_register_file_master__DOT__registers[0xcU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0xcU]; + this->__PVT__vx_register_file_master__DOT__registers[0xdU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0xdU]; + this->__PVT__vx_register_file_master__DOT__registers[0xeU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0xeU]; + this->__PVT__vx_register_file_master__DOT__registers[0xfU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0xfU]; + this->__PVT__vx_register_file_master__DOT__registers[0x10U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x10U]; + this->__PVT__vx_register_file_master__DOT__registers[0x11U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x11U]; + this->__PVT__vx_register_file_master__DOT__registers[0x12U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x12U]; + this->__PVT__vx_register_file_master__DOT__registers[0x13U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x13U]; + this->__PVT__vx_register_file_master__DOT__registers[0x14U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x14U]; + this->__PVT__vx_register_file_master__DOT__registers[0x15U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x15U]; + this->__PVT__vx_register_file_master__DOT__registers[0x16U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x16U]; + this->__PVT__vx_register_file_master__DOT__registers[0x17U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x17U]; + this->__PVT__vx_register_file_master__DOT__registers[0x18U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x18U]; + this->__PVT__vx_register_file_master__DOT__registers[0x19U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x19U]; + this->__PVT__vx_register_file_master__DOT__registers[0x1aU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x1aU]; + this->__PVT__vx_register_file_master__DOT__registers[0x1bU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x1bU]; + this->__PVT__vx_register_file_master__DOT__registers[0x1cU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x1cU]; + this->__PVT__vx_register_file_master__DOT__registers[0x1dU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x1dU]; + this->__PVT__vx_register_file_master__DOT__registers[0x1eU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x1eU]; + this->__PVT__vx_register_file_master__DOT__registers[0x1fU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers[0x1fU]; + } } this->__PVT__wspawn_state_stall = this->__Vdly__wspawn_state_stall; - // ALWAYSPOST at VX_register_file_slave.v:56 - if (this->__Vdlyvset__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0) { - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[this->__Vdlyvdim0__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0; - } - if (this->__Vdlyvset__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v1) { - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1fU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v1; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1eU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v2; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1dU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v3; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1cU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v4; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1bU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v5; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1aU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v6; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x19U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v7; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x18U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v8; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x17U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v9; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x16U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v10; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x15U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v11; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x14U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v12; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x13U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v13; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x12U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v14; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x11U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v15; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x10U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v16; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xfU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v17; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xeU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v18; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xdU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v19; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xcU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v20; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xbU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v21; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xaU] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v22; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[9U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v23; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[8U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v24; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[7U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v25; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[6U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v26; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[5U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v27; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[4U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v28; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[3U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v29; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[2U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v30; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[1U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v31; - this->__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0U] - = this->__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v32; - } - // ALWAYSPOST at VX_register_file_slave.v:56 - if (this->__Vdlyvset__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0) { - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[this->__Vdlyvdim0__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0; - } - if (this->__Vdlyvset__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v1) { - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1fU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v1; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1eU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v2; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1dU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v3; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1cU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v4; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1bU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v5; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1aU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v6; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x19U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v7; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x18U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v8; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x17U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v9; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x16U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v10; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x15U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v11; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x14U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v12; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x13U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v13; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x12U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v14; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x11U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v15; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x10U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v16; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xfU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v17; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xeU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v18; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xdU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v19; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xcU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v20; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xbU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v21; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xaU] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v22; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[9U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v23; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[8U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v24; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[7U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v25; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[6U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v26; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[5U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v27; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[4U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v28; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[3U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v29; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[2U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v30; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[1U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v31; - this->__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0U] - = this->__Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v32; - } - // ALWAYSPOST at VX_register_file_slave.v:56 - if (this->__Vdlyvset__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0) { - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[this->__Vdlyvdim0__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0; - } - if (this->__Vdlyvset__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1) { - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1fU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1eU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v2; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1dU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v3; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1cU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v4; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1bU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v5; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1aU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v6; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x19U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v7; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x18U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v8; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x17U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v9; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x16U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v10; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x15U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v11; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x14U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v12; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x13U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v13; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x12U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v14; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x11U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v15; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x10U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v16; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xfU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v17; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xeU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v18; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xdU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v19; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xcU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v20; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xbU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v21; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xaU] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v22; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[9U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v23; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[8U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v24; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[7U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v25; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[6U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v26; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[5U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v27; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[4U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v28; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[3U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v29; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[2U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v30; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[1U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v31; - this->__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0U] - = this->__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v32; - } - this->__PVT__clone_state_stall = this->__Vdly__clone_state_stall; - this->__Vcellout__vx_register_file_master__out_regs[0x1fU] - = this->__PVT__vx_register_file_master__DOT__registers - [0x1fU]; - this->__Vcellout__vx_register_file_master__out_regs[0x1eU] - = this->__PVT__vx_register_file_master__DOT__registers - [0x1eU]; - this->__Vcellout__vx_register_file_master__out_regs[0x1dU] - = this->__PVT__vx_register_file_master__DOT__registers - [0x1dU]; - this->__Vcellout__vx_register_file_master__out_regs[0x1cU] - = this->__PVT__vx_register_file_master__DOT__registers - [0x1cU]; - this->__Vcellout__vx_register_file_master__out_regs[0x1bU] - = this->__PVT__vx_register_file_master__DOT__registers - [0x1bU]; - this->__Vcellout__vx_register_file_master__out_regs[0x1aU] - = this->__PVT__vx_register_file_master__DOT__registers - [0x1aU]; - this->__Vcellout__vx_register_file_master__out_regs[0x19U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x19U]; - this->__Vcellout__vx_register_file_master__out_regs[0x18U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x18U]; - this->__Vcellout__vx_register_file_master__out_regs[0x17U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x17U]; - this->__Vcellout__vx_register_file_master__out_regs[0x16U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x16U]; - this->__Vcellout__vx_register_file_master__out_regs[0x15U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x15U]; - this->__Vcellout__vx_register_file_master__out_regs[0x14U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x14U]; - this->__Vcellout__vx_register_file_master__out_regs[0x13U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x13U]; - this->__Vcellout__vx_register_file_master__out_regs[0x12U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x12U]; - this->__Vcellout__vx_register_file_master__out_regs[0x11U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x11U]; - this->__Vcellout__vx_register_file_master__out_regs[0x10U] - = this->__PVT__vx_register_file_master__DOT__registers - [0x10U]; - this->__Vcellout__vx_register_file_master__out_regs[0xfU] - = this->__PVT__vx_register_file_master__DOT__registers - [0xfU]; - this->__Vcellout__vx_register_file_master__out_regs[0xeU] - = this->__PVT__vx_register_file_master__DOT__registers - [0xeU]; - this->__Vcellout__vx_register_file_master__out_regs[0xdU] - = this->__PVT__vx_register_file_master__DOT__registers - [0xdU]; - this->__Vcellout__vx_register_file_master__out_regs[0xcU] - = this->__PVT__vx_register_file_master__DOT__registers - [0xcU]; - this->__Vcellout__vx_register_file_master__out_regs[0xbU] - = this->__PVT__vx_register_file_master__DOT__registers - [0xbU]; - this->__Vcellout__vx_register_file_master__out_regs[0xaU] - = this->__PVT__vx_register_file_master__DOT__registers - [0xaU]; - this->__Vcellout__vx_register_file_master__out_regs[9U] - = this->__PVT__vx_register_file_master__DOT__registers - [9U]; - this->__Vcellout__vx_register_file_master__out_regs[8U] - = this->__PVT__vx_register_file_master__DOT__registers - [8U]; - this->__Vcellout__vx_register_file_master__out_regs[7U] - = this->__PVT__vx_register_file_master__DOT__registers - [7U]; - this->__Vcellout__vx_register_file_master__out_regs[6U] - = this->__PVT__vx_register_file_master__DOT__registers - [6U]; - this->__Vcellout__vx_register_file_master__out_regs[5U] - = this->__PVT__vx_register_file_master__DOT__registers - [5U]; - this->__Vcellout__vx_register_file_master__out_regs[4U] - = this->__PVT__vx_register_file_master__DOT__registers - [4U]; - this->__Vcellout__vx_register_file_master__out_regs[3U] - = this->__PVT__vx_register_file_master__DOT__registers - [3U]; - this->__Vcellout__vx_register_file_master__out_regs[2U] - = this->__PVT__vx_register_file_master__DOT__registers - [2U]; - this->__Vcellout__vx_register_file_master__out_regs[1U] - = this->__PVT__vx_register_file_master__DOT__registers - [1U]; - this->__Vcellout__vx_register_file_master__out_regs[0U] - = this->__PVT__vx_register_file_master__DOT__registers - [0U]; - this->__PVT__clone_regsiters[0x1fU] = this->__Vcellout__vx_register_file_master__out_regs - [0x1fU]; - this->__PVT__clone_regsiters[0x1eU] = this->__Vcellout__vx_register_file_master__out_regs - [0x1eU]; - this->__PVT__clone_regsiters[0x1dU] = this->__Vcellout__vx_register_file_master__out_regs - [0x1dU]; - this->__PVT__clone_regsiters[0x1cU] = this->__Vcellout__vx_register_file_master__out_regs - [0x1cU]; - this->__PVT__clone_regsiters[0x1bU] = this->__Vcellout__vx_register_file_master__out_regs - [0x1bU]; - this->__PVT__clone_regsiters[0x1aU] = this->__Vcellout__vx_register_file_master__out_regs - [0x1aU]; - this->__PVT__clone_regsiters[0x19U] = this->__Vcellout__vx_register_file_master__out_regs - [0x19U]; - this->__PVT__clone_regsiters[0x18U] = this->__Vcellout__vx_register_file_master__out_regs - [0x18U]; - this->__PVT__clone_regsiters[0x17U] = this->__Vcellout__vx_register_file_master__out_regs - [0x17U]; - this->__PVT__clone_regsiters[0x16U] = this->__Vcellout__vx_register_file_master__out_regs - [0x16U]; - this->__PVT__clone_regsiters[0x15U] = this->__Vcellout__vx_register_file_master__out_regs - [0x15U]; - this->__PVT__clone_regsiters[0x14U] = this->__Vcellout__vx_register_file_master__out_regs - [0x14U]; - this->__PVT__clone_regsiters[0x13U] = this->__Vcellout__vx_register_file_master__out_regs - [0x13U]; - this->__PVT__clone_regsiters[0x12U] = this->__Vcellout__vx_register_file_master__out_regs - [0x12U]; - this->__PVT__clone_regsiters[0x11U] = this->__Vcellout__vx_register_file_master__out_regs - [0x11U]; - this->__PVT__clone_regsiters[0x10U] = this->__Vcellout__vx_register_file_master__out_regs - [0x10U]; - this->__PVT__clone_regsiters[0xfU] = this->__Vcellout__vx_register_file_master__out_regs - [0xfU]; - this->__PVT__clone_regsiters[0xeU] = this->__Vcellout__vx_register_file_master__out_regs - [0xeU]; - this->__PVT__clone_regsiters[0xdU] = this->__Vcellout__vx_register_file_master__out_regs - [0xdU]; - this->__PVT__clone_regsiters[0xcU] = this->__Vcellout__vx_register_file_master__out_regs - [0xcU]; - this->__PVT__clone_regsiters[0xbU] = this->__Vcellout__vx_register_file_master__out_regs - [0xbU]; - this->__PVT__clone_regsiters[0xaU] = this->__Vcellout__vx_register_file_master__out_regs - [0xaU]; - this->__PVT__clone_regsiters[9U] = this->__Vcellout__vx_register_file_master__out_regs - [9U]; - this->__PVT__clone_regsiters[8U] = this->__Vcellout__vx_register_file_master__out_regs - [8U]; - this->__PVT__clone_regsiters[7U] = this->__Vcellout__vx_register_file_master__out_regs - [7U]; - this->__PVT__clone_regsiters[6U] = this->__Vcellout__vx_register_file_master__out_regs - [6U]; - this->__PVT__clone_regsiters[5U] = this->__Vcellout__vx_register_file_master__out_regs - [5U]; - this->__PVT__clone_regsiters[4U] = this->__Vcellout__vx_register_file_master__out_regs - [4U]; - this->__PVT__clone_regsiters[3U] = this->__Vcellout__vx_register_file_master__out_regs - [3U]; - this->__PVT__clone_regsiters[2U] = this->__Vcellout__vx_register_file_master__out_regs - [2U]; - this->__PVT__clone_regsiters[1U] = this->__Vcellout__vx_register_file_master__out_regs - [1U]; - this->__PVT__clone_regsiters[0U] = this->__Vcellout__vx_register_file_master__out_regs - [0U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1fU] - = this->__PVT__clone_regsiters[0x1fU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1eU] - = this->__PVT__clone_regsiters[0x1eU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1dU] - = this->__PVT__clone_regsiters[0x1dU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1cU] - = this->__PVT__clone_regsiters[0x1cU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1bU] - = this->__PVT__clone_regsiters[0x1bU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1aU] - = this->__PVT__clone_regsiters[0x1aU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x19U] - = this->__PVT__clone_regsiters[0x19U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x18U] - = this->__PVT__clone_regsiters[0x18U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x17U] - = this->__PVT__clone_regsiters[0x17U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x16U] - = this->__PVT__clone_regsiters[0x16U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x15U] - = this->__PVT__clone_regsiters[0x15U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x14U] - = this->__PVT__clone_regsiters[0x14U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x13U] - = this->__PVT__clone_regsiters[0x13U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x12U] - = this->__PVT__clone_regsiters[0x12U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x11U] - = this->__PVT__clone_regsiters[0x11U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x10U] - = this->__PVT__clone_regsiters[0x10U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xfU] - = this->__PVT__clone_regsiters[0xfU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xeU] - = this->__PVT__clone_regsiters[0xeU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xdU] - = this->__PVT__clone_regsiters[0xdU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xcU] - = this->__PVT__clone_regsiters[0xcU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xbU] - = this->__PVT__clone_regsiters[0xbU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xaU] - = this->__PVT__clone_regsiters[0xaU]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[9U] - = this->__PVT__clone_regsiters[9U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[8U] - = this->__PVT__clone_regsiters[8U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[7U] - = this->__PVT__clone_regsiters[7U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[6U] - = this->__PVT__clone_regsiters[6U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[5U] - = this->__PVT__clone_regsiters[5U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[4U] - = this->__PVT__clone_regsiters[4U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[3U] - = this->__PVT__clone_regsiters[3U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[2U] - = this->__PVT__clone_regsiters[2U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[1U] - = this->__PVT__clone_regsiters[1U]; - this->__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0U] - = this->__PVT__clone_regsiters[0U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1fU] - = this->__PVT__clone_regsiters[0x1fU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1eU] - = this->__PVT__clone_regsiters[0x1eU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1dU] - = this->__PVT__clone_regsiters[0x1dU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1cU] - = this->__PVT__clone_regsiters[0x1cU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1bU] - = this->__PVT__clone_regsiters[0x1bU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1aU] - = this->__PVT__clone_regsiters[0x1aU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x19U] - = this->__PVT__clone_regsiters[0x19U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x18U] - = this->__PVT__clone_regsiters[0x18U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x17U] - = this->__PVT__clone_regsiters[0x17U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x16U] - = this->__PVT__clone_regsiters[0x16U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x15U] - = this->__PVT__clone_regsiters[0x15U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x14U] - = this->__PVT__clone_regsiters[0x14U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x13U] - = this->__PVT__clone_regsiters[0x13U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x12U] - = this->__PVT__clone_regsiters[0x12U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x11U] - = this->__PVT__clone_regsiters[0x11U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x10U] - = this->__PVT__clone_regsiters[0x10U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xfU] - = this->__PVT__clone_regsiters[0xfU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xeU] - = this->__PVT__clone_regsiters[0xeU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xdU] - = this->__PVT__clone_regsiters[0xdU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xcU] - = this->__PVT__clone_regsiters[0xcU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xbU] - = this->__PVT__clone_regsiters[0xbU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xaU] - = this->__PVT__clone_regsiters[0xaU]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[9U] - = this->__PVT__clone_regsiters[9U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[8U] - = this->__PVT__clone_regsiters[8U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[7U] - = this->__PVT__clone_regsiters[7U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[6U] - = this->__PVT__clone_regsiters[6U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[5U] - = this->__PVT__clone_regsiters[5U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[4U] - = this->__PVT__clone_regsiters[4U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[3U] - = this->__PVT__clone_regsiters[3U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[2U] - = this->__PVT__clone_regsiters[2U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[1U] - = this->__PVT__clone_regsiters[1U]; - this->__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0U] - = this->__PVT__clone_regsiters[0U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1fU] - = this->__PVT__clone_regsiters[0x1fU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1eU] - = this->__PVT__clone_regsiters[0x1eU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1dU] - = this->__PVT__clone_regsiters[0x1dU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1cU] - = this->__PVT__clone_regsiters[0x1cU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1bU] - = this->__PVT__clone_regsiters[0x1bU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1aU] - = this->__PVT__clone_regsiters[0x1aU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x19U] - = this->__PVT__clone_regsiters[0x19U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x18U] - = this->__PVT__clone_regsiters[0x18U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x17U] - = this->__PVT__clone_regsiters[0x17U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x16U] - = this->__PVT__clone_regsiters[0x16U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x15U] - = this->__PVT__clone_regsiters[0x15U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x14U] - = this->__PVT__clone_regsiters[0x14U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x13U] - = this->__PVT__clone_regsiters[0x13U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x12U] - = this->__PVT__clone_regsiters[0x12U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x11U] - = this->__PVT__clone_regsiters[0x11U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x10U] - = this->__PVT__clone_regsiters[0x10U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xfU] - = this->__PVT__clone_regsiters[0xfU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xeU] - = this->__PVT__clone_regsiters[0xeU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xdU] - = this->__PVT__clone_regsiters[0xdU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xcU] - = this->__PVT__clone_regsiters[0xcU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xbU] - = this->__PVT__clone_regsiters[0xbU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xaU] - = this->__PVT__clone_regsiters[0xaU]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[9U] - = this->__PVT__clone_regsiters[9U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[8U] - = this->__PVT__clone_regsiters[8U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[7U] - = this->__PVT__clone_regsiters[7U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[6U] - = this->__PVT__clone_regsiters[6U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[5U] - = this->__PVT__clone_regsiters[5U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[4U] - = this->__PVT__clone_regsiters[4U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[3U] - = this->__PVT__clone_regsiters[3U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[2U] - = this->__PVT__clone_regsiters[2U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[1U] - = this->__PVT__clone_regsiters[1U]; - this->__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0U] - = this->__PVT__clone_regsiters[0U]; } void VVortex_VX_context_slave::_ctor_var_reset() { @@ -8652,228 +2992,40 @@ void VVortex_VX_context_slave::_ctor_var_reset() { clk = VL_RAND_RESET_I(1); in_warp = VL_RAND_RESET_I(1); in_wb_warp = VL_RAND_RESET_I(1); - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - in_valid[__Vi0] = VL_RAND_RESET_I(1); - }} + in_valid = VL_RAND_RESET_I(4); in_write_register = VL_RAND_RESET_I(1); in_rd = VL_RAND_RESET_I(5); - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - in_write_data[__Vi0] = VL_RAND_RESET_I(32); - }} + VL_RAND_RESET_W(128,in_write_data); in_src1 = VL_RAND_RESET_I(5); in_src2 = VL_RAND_RESET_I(5); in_curr_PC = VL_RAND_RESET_I(32); in_is_clone = VL_RAND_RESET_I(1); in_is_jal = VL_RAND_RESET_I(1); in_src1_fwd = VL_RAND_RESET_I(1); - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - in_src1_fwd_data[__Vi0] = VL_RAND_RESET_I(32); - }} + VL_RAND_RESET_W(128,in_src1_fwd_data); in_src2_fwd = VL_RAND_RESET_I(1); - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - in_src2_fwd_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<32; ++__Vi0) { - in_wspawn_regs[__Vi0] = VL_RAND_RESET_I(32); - }} + VL_RAND_RESET_W(128,in_src2_fwd_data); + VL_RAND_RESET_W(1024,in_wspawn_regs); in_wspawn = VL_RAND_RESET_I(1); - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - out_a_reg_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - out_b_reg_data[__Vi0] = VL_RAND_RESET_I(32); - }} + VL_RAND_RESET_W(128,out_a_reg_data); + VL_RAND_RESET_W(128,out_b_reg_data); out_clone_stall = VL_RAND_RESET_I(1); - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - __PVT__rd1_register[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<4; ++__Vi0) { - __PVT__rd2_register[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<32; ++__Vi0) { - __PVT__clone_regsiters[__Vi0] = VL_RAND_RESET_I(32); - }} + VL_RAND_RESET_W(128,__PVT__rd1_register); + VL_RAND_RESET_W(128,__PVT__rd2_register); __PVT__clone_state_stall = VL_RAND_RESET_I(6); __PVT__wspawn_state_stall = VL_RAND_RESET_I(6); __Vcellout__vx_register_file_master__out_src2_data = VL_RAND_RESET_I(32); __Vcellout__vx_register_file_master__out_src1_data = VL_RAND_RESET_I(32); - { int __Vi0=0; for (; __Vi0<32; ++__Vi0) { - __Vcellout__vx_register_file_master__out_regs[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<32; ++__Vi0) { - __Vcellinp__vx_register_file_master__in_wspawn_regs[__Vi0] = VL_RAND_RESET_I(32); - }} __Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src2_data = VL_RAND_RESET_I(32); __Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src1_data = VL_RAND_RESET_I(32); - { int __Vi0=0; for (; __Vi0<32; ++__Vi0) { - __Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[__Vi0] = VL_RAND_RESET_I(32); - }} __Vcellout__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__out_src2_data = VL_RAND_RESET_I(32); __Vcellout__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__out_src1_data = VL_RAND_RESET_I(32); - { int __Vi0=0; for (; __Vi0<32; ++__Vi0) { - __Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[__Vi0] = VL_RAND_RESET_I(32); - }} __Vcellout__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__out_src2_data = VL_RAND_RESET_I(32); __Vcellout__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__out_src1_data = VL_RAND_RESET_I(32); - { int __Vi0=0; for (; __Vi0<32; ++__Vi0) { - __Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<32; ++__Vi0) { - __PVT__vx_register_file_master__DOT__registers[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<32; ++__Vi0) { - __PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<32; ++__Vi0) { - __PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<32; ++__Vi0) { - __PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[__Vi0] = VL_RAND_RESET_I(32); - }} + VL_RAND_RESET_W(1024,__PVT__vx_register_file_master__DOT__registers); + VL_RAND_RESET_W(1024,__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers); + VL_RAND_RESET_W(1024,__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers); + VL_RAND_RESET_W(1024,__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers); __Vdly__clone_state_stall = VL_RAND_RESET_I(6); __Vdly__wspawn_state_stall = VL_RAND_RESET_I(6); - __Vdlyvdim0__vx_register_file_master__DOT__registers__v0 = VL_RAND_RESET_I(5); - __Vdlyvval__vx_register_file_master__DOT__registers__v0 = VL_RAND_RESET_I(32); - __Vdlyvset__vx_register_file_master__DOT__registers__v0 = VL_RAND_RESET_I(1); - __Vdlyvval__vx_register_file_master__DOT__registers__v1 = VL_RAND_RESET_I(32); - __Vdlyvset__vx_register_file_master__DOT__registers__v1 = VL_RAND_RESET_I(1); - __Vdlyvval__vx_register_file_master__DOT__registers__v2 = VL_RAND_RESET_I(32); - __Vdlyvval__vx_register_file_master__DOT__registers__v3 = VL_RAND_RESET_I(32); - __Vdlyvval__vx_register_file_master__DOT__registers__v4 = VL_RAND_RESET_I(32); - __Vdlyvval__vx_register_file_master__DOT__registers__v5 = VL_RAND_RESET_I(32); - __Vdlyvval__vx_register_file_master__DOT__registers__v6 = VL_RAND_RESET_I(32); - __Vdlyvval__vx_register_file_master__DOT__registers__v7 = VL_RAND_RESET_I(32); - __Vdlyvval__vx_register_file_master__DOT__registers__v8 = VL_RAND_RESET_I(32); - __Vdlyvval__vx_register_file_master__DOT__registers__v9 = VL_RAND_RESET_I(32); - __Vdlyvval__vx_register_file_master__DOT__registers__v10 = VL_RAND_RESET_I(32); - __Vdlyvval__vx_register_file_master__DOT__registers__v11 = VL_RAND_RESET_I(32); - __Vdlyvval__vx_register_file_master__DOT__registers__v12 = VL_RAND_RESET_I(32); - __Vdlyvval__vx_register_file_master__DOT__registers__v13 = VL_RAND_RESET_I(32); - __Vdlyvval__vx_register_file_master__DOT__registers__v14 = VL_RAND_RESET_I(32); - __Vdlyvval__vx_register_file_master__DOT__registers__v15 = VL_RAND_RESET_I(32); - __Vdlyvval__vx_register_file_master__DOT__registers__v16 = VL_RAND_RESET_I(32); - __Vdlyvval__vx_register_file_master__DOT__registers__v17 = VL_RAND_RESET_I(32); - __Vdlyvval__vx_register_file_master__DOT__registers__v18 = VL_RAND_RESET_I(32); - __Vdlyvval__vx_register_file_master__DOT__registers__v19 = VL_RAND_RESET_I(32); - __Vdlyvval__vx_register_file_master__DOT__registers__v20 = VL_RAND_RESET_I(32); - __Vdlyvval__vx_register_file_master__DOT__registers__v21 = VL_RAND_RESET_I(32); - __Vdlyvval__vx_register_file_master__DOT__registers__v22 = VL_RAND_RESET_I(32); - __Vdlyvval__vx_register_file_master__DOT__registers__v23 = VL_RAND_RESET_I(32); - __Vdlyvval__vx_register_file_master__DOT__registers__v24 = VL_RAND_RESET_I(32); - __Vdlyvval__vx_register_file_master__DOT__registers__v25 = VL_RAND_RESET_I(32); - __Vdlyvval__vx_register_file_master__DOT__registers__v26 = VL_RAND_RESET_I(32); - __Vdlyvval__vx_register_file_master__DOT__registers__v27 = VL_RAND_RESET_I(32); - __Vdlyvval__vx_register_file_master__DOT__registers__v28 = VL_RAND_RESET_I(32); - __Vdlyvval__vx_register_file_master__DOT__registers__v29 = VL_RAND_RESET_I(32); - __Vdlyvval__vx_register_file_master__DOT__registers__v30 = VL_RAND_RESET_I(32); - __Vdlyvval__vx_register_file_master__DOT__registers__v31 = VL_RAND_RESET_I(32); - __Vdlyvval__vx_register_file_master__DOT__registers__v32 = VL_RAND_RESET_I(32); - __Vdlyvdim0__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0 = VL_RAND_RESET_I(5); - __Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0 = VL_RAND_RESET_I(32); - __Vdlyvset__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0 = VL_RAND_RESET_I(1); - __Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1 = VL_RAND_RESET_I(32); - __Vdlyvset__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1 = VL_RAND_RESET_I(1); - __Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v2 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v3 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v4 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v5 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v6 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v7 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v8 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v9 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v10 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v11 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v12 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v13 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v14 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v15 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v16 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v17 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v18 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v19 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v20 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v21 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v22 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v23 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v24 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v25 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v26 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v27 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v28 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v29 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v30 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v31 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v32 = VL_RAND_RESET_I(32); - __Vdlyvdim0__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0 = VL_RAND_RESET_I(5); - __Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0 = VL_RAND_RESET_I(32); - __Vdlyvset__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0 = VL_RAND_RESET_I(1); - __Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v1 = VL_RAND_RESET_I(32); - __Vdlyvset__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v1 = VL_RAND_RESET_I(1); - __Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v2 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v3 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v4 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v5 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v6 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v7 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v8 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v9 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v10 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v11 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v12 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v13 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v14 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v15 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v16 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v17 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v18 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v19 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v20 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v21 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v22 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v23 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v24 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v25 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v26 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v27 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v28 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v29 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v30 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v31 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v32 = VL_RAND_RESET_I(32); - __Vdlyvdim0__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0 = VL_RAND_RESET_I(5); - __Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0 = VL_RAND_RESET_I(32); - __Vdlyvset__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0 = VL_RAND_RESET_I(1); - __Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v1 = VL_RAND_RESET_I(32); - __Vdlyvset__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v1 = VL_RAND_RESET_I(1); - __Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v2 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v3 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v4 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v5 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v6 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v7 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v8 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v9 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v10 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v11 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v12 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v13 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v14 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v15 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v16 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v17 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v18 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v19 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v20 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v21 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v22 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v23 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v24 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v25 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v26 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v27 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v28 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v29 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v30 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v31 = VL_RAND_RESET_I(32); - __Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v32 = VL_RAND_RESET_I(32); } diff --git a/rtl/obj_dir/VVortex_VX_context_slave.h b/rtl/obj_dir/VVortex_VX_context_slave.h index b2f32d7b..d20944d8 100644 --- a/rtl/obj_dir/VVortex_VX_context_slave.h +++ b/rtl/obj_dir/VVortex_VX_context_slave.h @@ -19,6 +19,7 @@ VL_MODULE(VVortex_VX_context_slave) { VL_IN8(clk,0,0); VL_IN8(in_warp,0,0); VL_IN8(in_wb_warp,0,0); + VL_IN8(in_valid,3,0); VL_IN8(in_write_register,0,0); VL_IN8(in_rd,4,0); VL_IN8(in_src1,4,0); @@ -29,195 +30,37 @@ VL_MODULE(VVortex_VX_context_slave) { VL_IN8(in_src2_fwd,0,0); VL_IN8(in_wspawn,0,0); VL_OUT8(out_clone_stall,0,0); + VL_INW(in_write_data,127,0,4); VL_IN(in_curr_PC,31,0); - VL_IN8(in_valid[4],0,0); - VL_IN(in_write_data[4],31,0); - VL_IN(in_src1_fwd_data[4],31,0); - VL_IN(in_src2_fwd_data[4],31,0); - VL_IN(in_wspawn_regs[32],31,0); - VL_OUT(out_a_reg_data[4],31,0); - VL_OUT(out_b_reg_data[4],31,0); + VL_INW(in_src1_fwd_data,127,0,4); + VL_INW(in_src2_fwd_data,127,0,4); + VL_INW(in_wspawn_regs,1023,0,32); + VL_OUTW(out_a_reg_data,127,0,4); + VL_OUTW(out_b_reg_data,127,0,4); // LOCAL SIGNALS // Begin mtask footprint all: VL_SIG8(__PVT__clone_state_stall,5,0); VL_SIG8(__PVT__wspawn_state_stall,5,0); - VL_SIG(__PVT__rd1_register[4],31,0); - VL_SIG(__PVT__rd2_register[4],31,0); - VL_SIG(__PVT__clone_regsiters[32],31,0); - VL_SIG(__PVT__vx_register_file_master__DOT__registers[32],31,0); - VL_SIG(__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[32],31,0); - VL_SIG(__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[32],31,0); - VL_SIG(__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[32],31,0); + VL_SIGW(__PVT__rd1_register,127,0,4); + VL_SIGW(__PVT__rd2_register,127,0,4); + VL_SIGW(__PVT__vx_register_file_master__DOT__registers,1023,0,32); + VL_SIGW(__PVT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers,1023,0,32); + VL_SIGW(__PVT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers,1023,0,32); + VL_SIGW(__PVT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers,1023,0,32); // LOCAL VARIABLES - // Anonymous structures to workaround compiler member-count bugs - struct { - // Begin mtask footprint all: - VL_SIG8(__Vdly__clone_state_stall,5,0); - VL_SIG8(__Vdly__wspawn_state_stall,5,0); - VL_SIG8(__Vdlyvdim0__vx_register_file_master__DOT__registers__v0,4,0); - VL_SIG8(__Vdlyvset__vx_register_file_master__DOT__registers__v0,0,0); - VL_SIG8(__Vdlyvset__vx_register_file_master__DOT__registers__v1,0,0); - VL_SIG8(__Vdlyvdim0__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0,4,0); - VL_SIG8(__Vdlyvset__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0,0,0); - VL_SIG8(__Vdlyvset__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1,0,0); - VL_SIG8(__Vdlyvdim0__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0,4,0); - VL_SIG8(__Vdlyvset__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0,0,0); - VL_SIG8(__Vdlyvset__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v1,0,0); - VL_SIG8(__Vdlyvdim0__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0,4,0); - VL_SIG8(__Vdlyvset__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0,0,0); - VL_SIG8(__Vdlyvset__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v1,0,0); - VL_SIG(__Vcellout__vx_register_file_master__out_src2_data,31,0); - VL_SIG(__Vcellout__vx_register_file_master__out_src1_data,31,0); - VL_SIG(__Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src2_data,31,0); - VL_SIG(__Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src1_data,31,0); - VL_SIG(__Vcellout__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__out_src2_data,31,0); - VL_SIG(__Vcellout__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__out_src1_data,31,0); - VL_SIG(__Vcellout__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__out_src2_data,31,0); - VL_SIG(__Vcellout__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__out_src1_data,31,0); - VL_SIG(__Vdlyvval__vx_register_file_master__DOT__registers__v0,31,0); - VL_SIG(__Vdlyvval__vx_register_file_master__DOT__registers__v1,31,0); - VL_SIG(__Vdlyvval__vx_register_file_master__DOT__registers__v2,31,0); - VL_SIG(__Vdlyvval__vx_register_file_master__DOT__registers__v3,31,0); - VL_SIG(__Vdlyvval__vx_register_file_master__DOT__registers__v4,31,0); - VL_SIG(__Vdlyvval__vx_register_file_master__DOT__registers__v5,31,0); - VL_SIG(__Vdlyvval__vx_register_file_master__DOT__registers__v6,31,0); - VL_SIG(__Vdlyvval__vx_register_file_master__DOT__registers__v7,31,0); - VL_SIG(__Vdlyvval__vx_register_file_master__DOT__registers__v8,31,0); - VL_SIG(__Vdlyvval__vx_register_file_master__DOT__registers__v9,31,0); - VL_SIG(__Vdlyvval__vx_register_file_master__DOT__registers__v10,31,0); - VL_SIG(__Vdlyvval__vx_register_file_master__DOT__registers__v11,31,0); - VL_SIG(__Vdlyvval__vx_register_file_master__DOT__registers__v12,31,0); - VL_SIG(__Vdlyvval__vx_register_file_master__DOT__registers__v13,31,0); - VL_SIG(__Vdlyvval__vx_register_file_master__DOT__registers__v14,31,0); - VL_SIG(__Vdlyvval__vx_register_file_master__DOT__registers__v15,31,0); - VL_SIG(__Vdlyvval__vx_register_file_master__DOT__registers__v16,31,0); - VL_SIG(__Vdlyvval__vx_register_file_master__DOT__registers__v17,31,0); - VL_SIG(__Vdlyvval__vx_register_file_master__DOT__registers__v18,31,0); - VL_SIG(__Vdlyvval__vx_register_file_master__DOT__registers__v19,31,0); - VL_SIG(__Vdlyvval__vx_register_file_master__DOT__registers__v20,31,0); - VL_SIG(__Vdlyvval__vx_register_file_master__DOT__registers__v21,31,0); - VL_SIG(__Vdlyvval__vx_register_file_master__DOT__registers__v22,31,0); - VL_SIG(__Vdlyvval__vx_register_file_master__DOT__registers__v23,31,0); - VL_SIG(__Vdlyvval__vx_register_file_master__DOT__registers__v24,31,0); - VL_SIG(__Vdlyvval__vx_register_file_master__DOT__registers__v25,31,0); - VL_SIG(__Vdlyvval__vx_register_file_master__DOT__registers__v26,31,0); - VL_SIG(__Vdlyvval__vx_register_file_master__DOT__registers__v27,31,0); - VL_SIG(__Vdlyvval__vx_register_file_master__DOT__registers__v28,31,0); - VL_SIG(__Vdlyvval__vx_register_file_master__DOT__registers__v29,31,0); - VL_SIG(__Vdlyvval__vx_register_file_master__DOT__registers__v30,31,0); - VL_SIG(__Vdlyvval__vx_register_file_master__DOT__registers__v31,31,0); - VL_SIG(__Vdlyvval__vx_register_file_master__DOT__registers__v32,31,0); - VL_SIG(__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0,31,0); - VL_SIG(__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1,31,0); - VL_SIG(__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v2,31,0); - VL_SIG(__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v3,31,0); - VL_SIG(__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v4,31,0); - VL_SIG(__Vdlyvval__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v5,31,0); - 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VL_SIG(__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v12,31,0); - VL_SIG(__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v13,31,0); - VL_SIG(__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v14,31,0); - VL_SIG(__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v15,31,0); - VL_SIG(__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v16,31,0); - VL_SIG(__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v17,31,0); - VL_SIG(__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v18,31,0); - VL_SIG(__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v19,31,0); - VL_SIG(__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v20,31,0); - VL_SIG(__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v21,31,0); - VL_SIG(__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v22,31,0); - VL_SIG(__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v23,31,0); - VL_SIG(__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v24,31,0); - VL_SIG(__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v25,31,0); - VL_SIG(__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v26,31,0); - VL_SIG(__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v27,31,0); - VL_SIG(__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v28,31,0); - VL_SIG(__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v29,31,0); - VL_SIG(__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v30,31,0); - VL_SIG(__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v31,31,0); - VL_SIG(__Vdlyvval__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v32,31,0); - VL_SIG(__Vcellout__vx_register_file_master__out_regs[32],31,0); - VL_SIG(__Vcellinp__vx_register_file_master__in_wspawn_regs[32],31,0); - VL_SIG(__Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[32],31,0); - VL_SIG(__Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[32],31,0); - VL_SIG(__Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[32],31,0); - }; + // Begin mtask footprint all: + VL_SIG8(__Vdly__clone_state_stall,5,0); + VL_SIG8(__Vdly__wspawn_state_stall,5,0); + VL_SIG(__Vcellout__vx_register_file_master__out_src2_data,31,0); + VL_SIG(__Vcellout__vx_register_file_master__out_src1_data,31,0); + VL_SIG(__Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src2_data,31,0); + VL_SIG(__Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src1_data,31,0); + VL_SIG(__Vcellout__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__out_src2_data,31,0); + VL_SIG(__Vcellout__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__out_src1_data,31,0); + VL_SIG(__Vcellout__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__out_src2_data,31,0); + VL_SIG(__Vcellout__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__out_src1_data,31,0); // INTERNAL VARIABLES private: @@ -237,21 +80,20 @@ VL_MODULE(VVortex_VX_context_slave) { // INTERNAL METHODS void __Vconfigure(VVortex__Syms* symsp, bool first); - void _combo__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one__29(VVortex__Syms* __restrict vlSymsp); - void _combo__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one__36(VVortex__Syms* __restrict vlSymsp); + void _combo__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__29(VVortex__Syms* __restrict vlSymsp); private: - void _ctor_var_reset(); + void _ctor_var_reset() VL_ATTR_COLD; public: - void _initial__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one__1(VVortex__Syms* __restrict vlSymsp); - void _sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one__15(VVortex__Syms* __restrict vlSymsp); - void _sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one__22(VVortex__Syms* __restrict vlSymsp); - void _sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one__16(VVortex__Syms* __restrict vlSymsp); - void _sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one__17(VVortex__Syms* __restrict vlSymsp); - void _sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one__18(VVortex__Syms* __restrict vlSymsp); - void _sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one__19(VVortex__Syms* __restrict vlSymsp); - void _sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one__20(VVortex__Syms* __restrict vlSymsp); - void _sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one__21(VVortex__Syms* __restrict vlSymsp); - void _settle__TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one__8(VVortex__Syms* __restrict vlSymsp); + void _initial__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__1(VVortex__Syms* __restrict vlSymsp) VL_ATTR_COLD; + void _sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__15(VVortex__Syms* __restrict vlSymsp); + void _sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__22(VVortex__Syms* __restrict vlSymsp); + void _sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__VX_Context_one__16(VVortex__Syms* __restrict vlSymsp); + void _sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__VX_Context_one__17(VVortex__Syms* __restrict vlSymsp); + void _sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__VX_Context_one__18(VVortex__Syms* __restrict vlSymsp); + void _sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__VX_Context_one__19(VVortex__Syms* __restrict vlSymsp); + void _sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__VX_Context_one__20(VVortex__Syms* __restrict vlSymsp); + void _sequent__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one__21(VVortex__Syms* __restrict vlSymsp); + void _settle__TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__8(VVortex__Syms* __restrict vlSymsp) VL_ATTR_COLD; } VL_ATTR_ALIGNED(128); #endif // guard diff --git a/rtl/obj_dir/VVortex_VX_frE_to_bckE_req_inter.cpp b/rtl/obj_dir/VVortex_VX_frE_to_bckE_req_inter.cpp new file mode 100644 index 00000000..513aca77 --- /dev/null +++ b/rtl/obj_dir/VVortex_VX_frE_to_bckE_req_inter.cpp @@ -0,0 +1,42 @@ +// Verilated -*- C++ -*- +// DESCRIPTION: Verilator output: Design implementation internals +// See VVortex.h for the primary calling header + +#include "VVortex_VX_frE_to_bckE_req_inter.h" +#include "VVortex__Syms.h" + + +//-------------------- +// STATIC VARIABLES + + +//-------------------- + +VL_CTOR_IMP(VVortex_VX_frE_to_bckE_req_inter) { + // Reset internal values + // Reset structure values + _ctor_var_reset(); +} + +void VVortex_VX_frE_to_bckE_req_inter::__Vconfigure(VVortex__Syms* vlSymsp, bool first) { + if (0 && first) {} // Prevent unused + this->__VlSymsp = vlSymsp; +} + +VVortex_VX_frE_to_bckE_req_inter::~VVortex_VX_frE_to_bckE_req_inter() { +} + +//-------------------- +// Internal Methods + +void VVortex_VX_frE_to_bckE_req_inter::_ctor_var_reset() { + VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex_VX_frE_to_bckE_req_inter::_ctor_var_reset\n"); ); + // Body + csr_address = VL_RAND_RESET_I(12); + VL_RAND_RESET_W(128,a_reg_data); + VL_RAND_RESET_W(128,b_reg_data); + itype_immed = VL_RAND_RESET_I(32); + branch_type = VL_RAND_RESET_I(3); + jal = VL_RAND_RESET_I(1); + jal_offset = VL_RAND_RESET_I(32); +} diff --git a/rtl/obj_dir/VVortex_VX_frE_to_bckE_req_inter.h b/rtl/obj_dir/VVortex_VX_frE_to_bckE_req_inter.h new file mode 100644 index 00000000..fb736dbc --- /dev/null +++ b/rtl/obj_dir/VVortex_VX_frE_to_bckE_req_inter.h @@ -0,0 +1,53 @@ +// Verilated -*- C++ -*- +// DESCRIPTION: Verilator output: Design internal header +// See VVortex.h for the primary calling header + +#ifndef _VVortex_VX_frE_to_bckE_req_inter_H_ +#define _VVortex_VX_frE_to_bckE_req_inter_H_ + +#include "verilated.h" + +class VVortex__Syms; + +//---------- + +VL_MODULE(VVortex_VX_frE_to_bckE_req_inter) { + public: + + // PORTS + + // LOCAL SIGNALS + // Begin mtask footprint all: + VL_SIG8(branch_type,2,0); + VL_SIG8(jal,0,0); + VL_SIG16(csr_address,11,0); + VL_SIGW(a_reg_data,127,0,4); + VL_SIGW(b_reg_data,127,0,4); + VL_SIG(itype_immed,31,0); + VL_SIG(jal_offset,31,0); + + // LOCAL VARIABLES + + // INTERNAL VARIABLES + private: + VVortex__Syms* __VlSymsp; // Symbol table + public: + + // PARAMETERS + + // CONSTRUCTORS + private: + VL_UNCOPYABLE(VVortex_VX_frE_to_bckE_req_inter); ///< Copying not allowed + public: + VVortex_VX_frE_to_bckE_req_inter(const char* name="TOP"); + ~VVortex_VX_frE_to_bckE_req_inter(); + + // API METHODS + + // INTERNAL METHODS + void __Vconfigure(VVortex__Syms* symsp, bool first); + private: + void _ctor_var_reset() VL_ATTR_COLD; +} VL_ATTR_ALIGNED(128); + +#endif // guard diff --git a/rtl/obj_dir/VVortex_VX_inst_mem_wb_inter.cpp b/rtl/obj_dir/VVortex_VX_inst_mem_wb_inter.cpp new file mode 100644 index 00000000..1c160571 --- /dev/null +++ b/rtl/obj_dir/VVortex_VX_inst_mem_wb_inter.cpp @@ -0,0 +1,36 @@ +// Verilated -*- C++ -*- +// DESCRIPTION: Verilator output: Design implementation internals +// See VVortex.h for the primary calling header + +#include "VVortex_VX_inst_mem_wb_inter.h" +#include "VVortex__Syms.h" + + +//-------------------- +// STATIC VARIABLES + + +//-------------------- + +VL_CTOR_IMP(VVortex_VX_inst_mem_wb_inter) { + // Reset internal values + // Reset structure values + _ctor_var_reset(); +} + +void VVortex_VX_inst_mem_wb_inter::__Vconfigure(VVortex__Syms* vlSymsp, bool first) { + if (0 && first) {} // Prevent unused + this->__VlSymsp = vlSymsp; +} + +VVortex_VX_inst_mem_wb_inter::~VVortex_VX_inst_mem_wb_inter() { +} + +//-------------------- +// Internal Methods + +void VVortex_VX_inst_mem_wb_inter::_ctor_var_reset() { + VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex_VX_inst_mem_wb_inter::_ctor_var_reset\n"); ); + // Body + VL_RAND_RESET_W(128,mem_result); +} diff --git a/rtl/obj_dir/VVortex_VX_inst_mem_wb_inter.h b/rtl/obj_dir/VVortex_VX_inst_mem_wb_inter.h new file mode 100644 index 00000000..574109b4 --- /dev/null +++ b/rtl/obj_dir/VVortex_VX_inst_mem_wb_inter.h @@ -0,0 +1,47 @@ +// Verilated -*- C++ -*- +// DESCRIPTION: Verilator output: Design internal header +// See VVortex.h for the primary calling header + +#ifndef _VVortex_VX_inst_mem_wb_inter_H_ +#define _VVortex_VX_inst_mem_wb_inter_H_ + +#include "verilated.h" + +class VVortex__Syms; + +//---------- + +VL_MODULE(VVortex_VX_inst_mem_wb_inter) { + public: + + // PORTS + + // LOCAL SIGNALS + // Begin mtask footprint all: + VL_SIGW(mem_result,127,0,4); + + // LOCAL VARIABLES + + // INTERNAL VARIABLES + private: + VVortex__Syms* __VlSymsp; // Symbol table + public: + + // PARAMETERS + + // CONSTRUCTORS + private: + VL_UNCOPYABLE(VVortex_VX_inst_mem_wb_inter); ///< Copying not allowed + public: + VVortex_VX_inst_mem_wb_inter(const char* name="TOP"); + ~VVortex_VX_inst_mem_wb_inter(); + + // API METHODS + + // INTERNAL METHODS + void __Vconfigure(VVortex__Syms* symsp, bool first); + private: + void _ctor_var_reset() VL_ATTR_COLD; +} VL_ATTR_ALIGNED(128); + +#endif // guard diff --git a/rtl/obj_dir/VVortex_VX_inst_meta_inter.cpp b/rtl/obj_dir/VVortex_VX_inst_meta_inter.cpp new file mode 100644 index 00000000..281a3b07 --- /dev/null +++ b/rtl/obj_dir/VVortex_VX_inst_meta_inter.cpp @@ -0,0 +1,36 @@ +// Verilated -*- C++ -*- +// DESCRIPTION: Verilator output: Design implementation internals +// See VVortex.h for the primary calling header + +#include "VVortex_VX_inst_meta_inter.h" +#include "VVortex__Syms.h" + + +//-------------------- +// STATIC VARIABLES + + +//-------------------- + +VL_CTOR_IMP(VVortex_VX_inst_meta_inter) { + // Reset internal values + // Reset structure values + _ctor_var_reset(); +} + +void VVortex_VX_inst_meta_inter::__Vconfigure(VVortex__Syms* vlSymsp, bool first) { + if (0 && first) {} // Prevent unused + this->__VlSymsp = vlSymsp; +} + +VVortex_VX_inst_meta_inter::~VVortex_VX_inst_meta_inter() { +} + +//-------------------- +// Internal Methods + +void VVortex_VX_inst_meta_inter::_ctor_var_reset() { + VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex_VX_inst_meta_inter::_ctor_var_reset\n"); ); + // Body + valid = VL_RAND_RESET_I(4); +} diff --git a/rtl/obj_dir/VVortex_VX_inst_meta_inter.h b/rtl/obj_dir/VVortex_VX_inst_meta_inter.h new file mode 100644 index 00000000..0f9be8e2 --- /dev/null +++ b/rtl/obj_dir/VVortex_VX_inst_meta_inter.h @@ -0,0 +1,47 @@ +// Verilated -*- C++ -*- +// DESCRIPTION: Verilator output: Design internal header +// See VVortex.h for the primary calling header + +#ifndef _VVortex_VX_inst_meta_inter_H_ +#define _VVortex_VX_inst_meta_inter_H_ + +#include "verilated.h" + +class VVortex__Syms; + +//---------- + +VL_MODULE(VVortex_VX_inst_meta_inter) { + public: + + // PORTS + + // LOCAL SIGNALS + // Begin mtask footprint all: + VL_SIG8(valid,3,0); + + // LOCAL VARIABLES + + // INTERNAL VARIABLES + private: + VVortex__Syms* __VlSymsp; // Symbol table + public: + + // PARAMETERS + + // CONSTRUCTORS + private: + VL_UNCOPYABLE(VVortex_VX_inst_meta_inter); ///< Copying not allowed + public: + VVortex_VX_inst_meta_inter(const char* name="TOP"); + ~VVortex_VX_inst_meta_inter(); + + // API METHODS + + // INTERNAL METHODS + void __Vconfigure(VVortex__Syms* symsp, bool first); + private: + void _ctor_var_reset() VL_ATTR_COLD; +} VL_ATTR_ALIGNED(128); + +#endif // guard diff --git a/rtl/obj_dir/VVortex_VX_mem_req_inter.cpp b/rtl/obj_dir/VVortex_VX_mem_req_inter.cpp new file mode 100644 index 00000000..630a5f50 --- /dev/null +++ b/rtl/obj_dir/VVortex_VX_mem_req_inter.cpp @@ -0,0 +1,37 @@ +// Verilated -*- C++ -*- +// DESCRIPTION: Verilator output: Design implementation internals +// See VVortex.h for the primary calling header + +#include "VVortex_VX_mem_req_inter.h" +#include "VVortex__Syms.h" + + +//-------------------- +// STATIC VARIABLES + + +//-------------------- + +VL_CTOR_IMP(VVortex_VX_mem_req_inter) { + // Reset internal values + // Reset structure values + _ctor_var_reset(); +} + +void VVortex_VX_mem_req_inter::__Vconfigure(VVortex__Syms* vlSymsp, bool first) { + if (0 && first) {} // Prevent unused + this->__VlSymsp = vlSymsp; +} + +VVortex_VX_mem_req_inter::~VVortex_VX_mem_req_inter() { +} + +//-------------------- +// Internal Methods + +void VVortex_VX_mem_req_inter::_ctor_var_reset() { + VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex_VX_mem_req_inter::_ctor_var_reset\n"); ); + // Body + VL_RAND_RESET_W(128,alu_result); + wb = VL_RAND_RESET_I(2); +} diff --git a/rtl/obj_dir/VVortex_VX_mem_req_inter.h b/rtl/obj_dir/VVortex_VX_mem_req_inter.h new file mode 100644 index 00000000..5c519ffe --- /dev/null +++ b/rtl/obj_dir/VVortex_VX_mem_req_inter.h @@ -0,0 +1,48 @@ +// Verilated -*- C++ -*- +// DESCRIPTION: Verilator output: Design internal header +// See VVortex.h for the primary calling header + +#ifndef _VVortex_VX_mem_req_inter_H_ +#define _VVortex_VX_mem_req_inter_H_ + +#include "verilated.h" + +class VVortex__Syms; + +//---------- + +VL_MODULE(VVortex_VX_mem_req_inter) { + public: + + // PORTS + + // LOCAL SIGNALS + // Begin mtask footprint all: + VL_SIG8(wb,1,0); + VL_SIGW(alu_result,127,0,4); + + // LOCAL VARIABLES + + // INTERNAL VARIABLES + private: + VVortex__Syms* __VlSymsp; // Symbol table + public: + + // PARAMETERS + + // CONSTRUCTORS + private: + VL_UNCOPYABLE(VVortex_VX_mem_req_inter); ///< Copying not allowed + public: + VVortex_VX_mem_req_inter(const char* name="TOP"); + ~VVortex_VX_mem_req_inter(); + + // API METHODS + + // INTERNAL METHODS + void __Vconfigure(VVortex__Syms* symsp, bool first); + private: + void _ctor_var_reset() VL_ATTR_COLD; +} VL_ATTR_ALIGNED(128); + +#endif // guard diff --git a/rtl/obj_dir/VVortex_VX_warp_ctl_inter.cpp b/rtl/obj_dir/VVortex_VX_warp_ctl_inter.cpp new file mode 100644 index 00000000..b4699af7 --- /dev/null +++ b/rtl/obj_dir/VVortex_VX_warp_ctl_inter.cpp @@ -0,0 +1,37 @@ +// Verilated -*- C++ -*- +// DESCRIPTION: Verilator output: Design implementation internals +// See VVortex.h for the primary calling header + +#include "VVortex_VX_warp_ctl_inter.h" +#include "VVortex__Syms.h" + + +//-------------------- +// STATIC VARIABLES + + +//-------------------- + +VL_CTOR_IMP(VVortex_VX_warp_ctl_inter) { + // Reset internal values + // Reset structure values + _ctor_var_reset(); +} + +void VVortex_VX_warp_ctl_inter::__Vconfigure(VVortex__Syms* vlSymsp, bool first) { + if (0 && first) {} // Prevent unused + this->__VlSymsp = vlSymsp; +} + +VVortex_VX_warp_ctl_inter::~VVortex_VX_warp_ctl_inter() { +} + +//-------------------- +// Internal Methods + +void VVortex_VX_warp_ctl_inter::_ctor_var_reset() { + VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex_VX_warp_ctl_inter::_ctor_var_reset\n"); ); + // Body + change_mask = VL_RAND_RESET_I(1); + thread_mask = VL_RAND_RESET_I(4); +} diff --git a/rtl/obj_dir/VVortex_VX_warp_ctl_inter.h b/rtl/obj_dir/VVortex_VX_warp_ctl_inter.h new file mode 100644 index 00000000..9fbe0ade --- /dev/null +++ b/rtl/obj_dir/VVortex_VX_warp_ctl_inter.h @@ -0,0 +1,48 @@ +// Verilated -*- C++ -*- +// DESCRIPTION: Verilator output: Design internal header +// See VVortex.h for the primary calling header + +#ifndef _VVortex_VX_warp_ctl_inter_H_ +#define _VVortex_VX_warp_ctl_inter_H_ + +#include "verilated.h" + +class VVortex__Syms; + +//---------- + +VL_MODULE(VVortex_VX_warp_ctl_inter) { + public: + + // PORTS + + // LOCAL SIGNALS + // Begin mtask footprint all: + VL_SIG8(change_mask,0,0); + VL_SIG8(thread_mask,3,0); + + // LOCAL VARIABLES + + // INTERNAL VARIABLES + private: + VVortex__Syms* __VlSymsp; // Symbol table + public: + + // PARAMETERS + + // CONSTRUCTORS + private: + VL_UNCOPYABLE(VVortex_VX_warp_ctl_inter); ///< Copying not allowed + public: + VVortex_VX_warp_ctl_inter(const char* name="TOP"); + ~VVortex_VX_warp_ctl_inter(); + + // API METHODS + + // INTERNAL METHODS + void __Vconfigure(VVortex__Syms* symsp, bool first); + private: + void _ctor_var_reset() VL_ATTR_COLD; +} VL_ATTR_ALIGNED(128); + +#endif // guard diff --git a/rtl/obj_dir/VVortex_VX_wb_inter.cpp b/rtl/obj_dir/VVortex_VX_wb_inter.cpp new file mode 100644 index 00000000..86858759 --- /dev/null +++ b/rtl/obj_dir/VVortex_VX_wb_inter.cpp @@ -0,0 +1,36 @@ +// Verilated -*- C++ -*- +// DESCRIPTION: Verilator output: Design implementation internals +// See VVortex.h for the primary calling header + +#include "VVortex_VX_wb_inter.h" +#include "VVortex__Syms.h" + + +//-------------------- +// STATIC VARIABLES + + +//-------------------- + +VL_CTOR_IMP(VVortex_VX_wb_inter) { + // Reset internal values + // Reset structure values + _ctor_var_reset(); +} + +void VVortex_VX_wb_inter::__Vconfigure(VVortex__Syms* vlSymsp, bool first) { + if (0 && first) {} // Prevent unused + this->__VlSymsp = vlSymsp; +} + +VVortex_VX_wb_inter::~VVortex_VX_wb_inter() { +} + +//-------------------- +// Internal Methods + +void VVortex_VX_wb_inter::_ctor_var_reset() { + VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex_VX_wb_inter::_ctor_var_reset\n"); ); + // Body + VL_RAND_RESET_W(128,write_data); +} diff --git a/rtl/obj_dir/VVortex_VX_wb_inter.h b/rtl/obj_dir/VVortex_VX_wb_inter.h new file mode 100644 index 00000000..f5a613cc --- /dev/null +++ b/rtl/obj_dir/VVortex_VX_wb_inter.h @@ -0,0 +1,47 @@ +// Verilated -*- C++ -*- +// DESCRIPTION: Verilator output: Design internal header +// See VVortex.h for the primary calling header + +#ifndef _VVortex_VX_wb_inter_H_ +#define _VVortex_VX_wb_inter_H_ + +#include "verilated.h" + +class VVortex__Syms; + +//---------- + +VL_MODULE(VVortex_VX_wb_inter) { + public: + + // PORTS + + // LOCAL SIGNALS + // Begin mtask footprint all: + VL_SIGW(write_data,127,0,4); + + // LOCAL VARIABLES + + // INTERNAL VARIABLES + private: + VVortex__Syms* __VlSymsp; // Symbol table + public: + + // PARAMETERS + + // CONSTRUCTORS + private: + VL_UNCOPYABLE(VVortex_VX_wb_inter); ///< Copying not allowed + public: + VVortex_VX_wb_inter(const char* name="TOP"); + ~VVortex_VX_wb_inter(); + + // API METHODS + + // INTERNAL METHODS + void __Vconfigure(VVortex__Syms* symsp, bool first); + private: + void _ctor_var_reset() VL_ATTR_COLD; +} VL_ATTR_ALIGNED(128); + +#endif // guard diff --git a/rtl/obj_dir/VVortex__ALL.a b/rtl/obj_dir/VVortex__ALL.a index e1032345..d24122ed 100644 Binary files a/rtl/obj_dir/VVortex__ALL.a and b/rtl/obj_dir/VVortex__ALL.a differ diff --git a/rtl/obj_dir/VVortex__ALLcls.cpp b/rtl/obj_dir/VVortex__ALLcls.cpp index 049be850..adc08d63 100644 --- a/rtl/obj_dir/VVortex__ALLcls.cpp +++ b/rtl/obj_dir/VVortex__ALLcls.cpp @@ -2,4 +2,10 @@ #define VL_INCLUDE_OPT include #include "VVortex.cpp" #include "VVortex___024unit.cpp" +#include "VVortex_VX_inst_meta_inter.cpp" +#include "VVortex_VX_frE_to_bckE_req_inter.cpp" +#include "VVortex_VX_mem_req_inter.cpp" +#include "VVortex_VX_inst_mem_wb_inter.cpp" +#include "VVortex_VX_warp_ctl_inter.cpp" +#include "VVortex_VX_wb_inter.cpp" #include "VVortex_VX_context_slave.cpp" diff --git a/rtl/obj_dir/VVortex__ALLcls.d b/rtl/obj_dir/VVortex__ALLcls.d index 3fd4ad34..f286ab51 100644 --- a/rtl/obj_dir/VVortex__ALLcls.d +++ b/rtl/obj_dir/VVortex__ALLcls.d @@ -1,5 +1,11 @@ VVortex__ALLcls.o: VVortex__ALLcls.cpp VVortex.cpp VVortex.h \ - /usr/local/Cellar/verilator/4.010/share/verilator/include/verilated.h \ - /usr/local/Cellar/verilator/4.010/share/verilator/include/verilatedos.h \ - VVortex__Syms.h VVortex___024unit.h VVortex_VX_context_slave.h \ - VVortex___024unit.cpp VVortex_VX_context_slave.cpp + /usr/local/share/verilator/include/verilated.h \ + /usr/local/share/verilator/include/verilatedos.h VVortex__Syms.h \ + VVortex___024unit.h VVortex_VX_inst_meta_inter.h \ + VVortex_VX_frE_to_bckE_req_inter.h VVortex_VX_mem_req_inter.h \ + VVortex_VX_inst_mem_wb_inter.h VVortex_VX_warp_ctl_inter.h \ + VVortex_VX_wb_inter.h VVortex_VX_context_slave.h VVortex___024unit.cpp \ + VVortex_VX_inst_meta_inter.cpp VVortex_VX_frE_to_bckE_req_inter.cpp \ + VVortex_VX_mem_req_inter.cpp VVortex_VX_inst_mem_wb_inter.cpp \ + VVortex_VX_warp_ctl_inter.cpp VVortex_VX_wb_inter.cpp \ + VVortex_VX_context_slave.cpp diff --git a/rtl/obj_dir/VVortex__ALLcls.o b/rtl/obj_dir/VVortex__ALLcls.o index 16a42a02..e7bdf665 100644 Binary files a/rtl/obj_dir/VVortex__ALLcls.o and b/rtl/obj_dir/VVortex__ALLcls.o differ diff --git a/rtl/obj_dir/VVortex__ALLsup.d b/rtl/obj_dir/VVortex__ALLsup.d index f6a3d876..267da02d 100644 --- a/rtl/obj_dir/VVortex__ALLsup.d +++ b/rtl/obj_dir/VVortex__ALLsup.d @@ -1,4 +1,7 @@ VVortex__ALLsup.o: VVortex__ALLsup.cpp VVortex__Syms.cpp VVortex__Syms.h \ - /usr/local/Cellar/verilator/4.010/share/verilator/include/verilated.h \ - /usr/local/Cellar/verilator/4.010/share/verilator/include/verilatedos.h \ - VVortex.h VVortex___024unit.h VVortex_VX_context_slave.h + /usr/local/share/verilator/include/verilated.h \ + /usr/local/share/verilator/include/verilatedos.h VVortex.h \ + VVortex___024unit.h VVortex_VX_inst_meta_inter.h \ + VVortex_VX_frE_to_bckE_req_inter.h VVortex_VX_mem_req_inter.h \ + VVortex_VX_inst_mem_wb_inter.h VVortex_VX_warp_ctl_inter.h \ + VVortex_VX_wb_inter.h VVortex_VX_context_slave.h diff --git a/rtl/obj_dir/VVortex__ALLsup.o b/rtl/obj_dir/VVortex__ALLsup.o index fc474bdd..99caeedd 100644 Binary files a/rtl/obj_dir/VVortex__ALLsup.o and b/rtl/obj_dir/VVortex__ALLsup.o differ diff --git a/rtl/obj_dir/VVortex__Syms.cpp b/rtl/obj_dir/VVortex__Syms.cpp index c48f8ef8..3121d942 100644 --- a/rtl/obj_dir/VVortex__Syms.cpp +++ b/rtl/obj_dir/VVortex__Syms.cpp @@ -4,6 +4,12 @@ #include "VVortex__Syms.h" #include "VVortex.h" #include "VVortex___024unit.h" +#include "VVortex_VX_inst_meta_inter.h" +#include "VVortex_VX_frE_to_bckE_req_inter.h" +#include "VVortex_VX_mem_req_inter.h" +#include "VVortex_VX_inst_mem_wb_inter.h" +#include "VVortex_VX_warp_ctl_inter.h" +#include "VVortex_VX_wb_inter.h" #include "VVortex_VX_context_slave.h" // FUNCTIONS @@ -12,31 +18,49 @@ VVortex__Syms::VVortex__Syms(VVortex* topp, const char* namep) : __Vm_namep(namep) , __Vm_didInit(false) // Setup submodule names - , TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one (Verilated::catName(topp->name(),"Vortex.vx_decode.genblk1[1].VX_Context_one")) - , TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one (Verilated::catName(topp->name(),"Vortex.vx_decode.genblk1[2].VX_Context_one")) - , TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one (Verilated::catName(topp->name(),"Vortex.vx_decode.genblk1[3].VX_Context_one")) - , TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one (Verilated::catName(topp->name(),"Vortex.vx_decode.genblk1[4].VX_Context_one")) - , TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one (Verilated::catName(topp->name(),"Vortex.vx_decode.genblk1[5].VX_Context_one")) - , TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one (Verilated::catName(topp->name(),"Vortex.vx_decode.genblk1[6].VX_Context_one")) - , TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one (Verilated::catName(topp->name(),"Vortex.vx_decode.genblk1[7].VX_Context_one")) + , TOP__Vortex__DOT__VX_exe_mem_req (Verilated::catName(topp->name(),"Vortex.VX_exe_mem_req")) + , TOP__Vortex__DOT__VX_frE_to_bckE_req (Verilated::catName(topp->name(),"Vortex.VX_frE_to_bckE_req")) + , TOP__Vortex__DOT__VX_mem_wb (Verilated::catName(topp->name(),"Vortex.VX_mem_wb")) + , TOP__Vortex__DOT__VX_warp_ctl (Verilated::catName(topp->name(),"Vortex.VX_warp_ctl")) + , TOP__Vortex__DOT__VX_writeback_inter (Verilated::catName(topp->name(),"Vortex.VX_writeback_inter")) + , TOP__Vortex__DOT__fe_inst_meta_fd (Verilated::catName(topp->name(),"Vortex.fe_inst_meta_fd")) + , TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one (Verilated::catName(topp->name(),"Vortex.vx_decode.genblk2[1].VX_Context_one")) + , TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__VX_Context_one (Verilated::catName(topp->name(),"Vortex.vx_decode.genblk2[2].VX_Context_one")) + , TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__VX_Context_one (Verilated::catName(topp->name(),"Vortex.vx_decode.genblk2[3].VX_Context_one")) + , TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__VX_Context_one (Verilated::catName(topp->name(),"Vortex.vx_decode.genblk2[4].VX_Context_one")) + , TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__VX_Context_one (Verilated::catName(topp->name(),"Vortex.vx_decode.genblk2[5].VX_Context_one")) + , TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__VX_Context_one (Verilated::catName(topp->name(),"Vortex.vx_decode.genblk2[6].VX_Context_one")) + , TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one (Verilated::catName(topp->name(),"Vortex.vx_decode.genblk2[7].VX_Context_one")) { // Pointer to top level TOPp = topp; // Setup each module's pointers to their submodules - TOPp->__PVT__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one = &TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one; - TOPp->__PVT__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one = &TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one; - TOPp->__PVT__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one = &TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one; - TOPp->__PVT__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one = &TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one; - TOPp->__PVT__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one = &TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one; - TOPp->__PVT__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one = &TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one; - TOPp->__PVT__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one = &TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one; + TOPp->__PVT__Vortex__DOT__VX_exe_mem_req = &TOP__Vortex__DOT__VX_exe_mem_req; + TOPp->__PVT__Vortex__DOT__VX_frE_to_bckE_req = &TOP__Vortex__DOT__VX_frE_to_bckE_req; + TOPp->__PVT__Vortex__DOT__VX_mem_wb = &TOP__Vortex__DOT__VX_mem_wb; + TOPp->__PVT__Vortex__DOT__VX_warp_ctl = &TOP__Vortex__DOT__VX_warp_ctl; + TOPp->__PVT__Vortex__DOT__VX_writeback_inter = &TOP__Vortex__DOT__VX_writeback_inter; + TOPp->__PVT__Vortex__DOT__fe_inst_meta_fd = &TOP__Vortex__DOT__fe_inst_meta_fd; + TOPp->__PVT__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one = &TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one; + TOPp->__PVT__Vortex__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__VX_Context_one = &TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__VX_Context_one; + TOPp->__PVT__Vortex__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__VX_Context_one = &TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__VX_Context_one; + TOPp->__PVT__Vortex__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__VX_Context_one = &TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__VX_Context_one; + TOPp->__PVT__Vortex__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__VX_Context_one = &TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__VX_Context_one; + TOPp->__PVT__Vortex__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__VX_Context_one = &TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__VX_Context_one; + TOPp->__PVT__Vortex__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one = &TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one; // Setup each module's pointer back to symbol table (for public functions) TOPp->__Vconfigure(this, true); - TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one.__Vconfigure(this, true); - TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one.__Vconfigure(this, false); - TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one.__Vconfigure(this, false); - TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one.__Vconfigure(this, false); - TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one.__Vconfigure(this, false); - TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one.__Vconfigure(this, false); - TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one.__Vconfigure(this, false); + TOP__Vortex__DOT__VX_exe_mem_req.__Vconfigure(this, true); + TOP__Vortex__DOT__VX_frE_to_bckE_req.__Vconfigure(this, true); + TOP__Vortex__DOT__VX_mem_wb.__Vconfigure(this, true); + TOP__Vortex__DOT__VX_warp_ctl.__Vconfigure(this, true); + TOP__Vortex__DOT__VX_writeback_inter.__Vconfigure(this, true); + TOP__Vortex__DOT__fe_inst_meta_fd.__Vconfigure(this, true); + TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one.__Vconfigure(this, true); + TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__VX_Context_one.__Vconfigure(this, false); + TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__VX_Context_one.__Vconfigure(this, false); + TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__VX_Context_one.__Vconfigure(this, false); + TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__VX_Context_one.__Vconfigure(this, false); + TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__VX_Context_one.__Vconfigure(this, false); + TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one.__Vconfigure(this, false); } diff --git a/rtl/obj_dir/VVortex__Syms.h b/rtl/obj_dir/VVortex__Syms.h index 428d6358..944c02f4 100644 --- a/rtl/obj_dir/VVortex__Syms.h +++ b/rtl/obj_dir/VVortex__Syms.h @@ -1,7 +1,8 @@ // Verilated -*- C++ -*- // DESCRIPTION: Verilator output: Symbol table internal header // -// Internal details; most calling programs do not need this header +// Internal details; most calling programs do not need this header, +// unless using verilator public meta comments. #ifndef _VVortex__Syms_H_ #define _VVortex__Syms_H_ @@ -11,6 +12,12 @@ // INCLUDE MODULE CLASSES #include "VVortex.h" #include "VVortex___024unit.h" +#include "VVortex_VX_inst_meta_inter.h" +#include "VVortex_VX_frE_to_bckE_req_inter.h" +#include "VVortex_VX_mem_req_inter.h" +#include "VVortex_VX_inst_mem_wb_inter.h" +#include "VVortex_VX_warp_ctl_inter.h" +#include "VVortex_VX_wb_inter.h" #include "VVortex_VX_context_slave.h" // SYMS CLASS @@ -23,13 +30,19 @@ class VVortex__Syms : public VerilatedSyms { // SUBCELL STATE VVortex* TOPp; - VVortex_VX_context_slave TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__1__KET____DOT__VX_Context_one; - VVortex_VX_context_slave TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__2__KET____DOT__VX_Context_one; - VVortex_VX_context_slave TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__3__KET____DOT__VX_Context_one; - VVortex_VX_context_slave TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__4__KET____DOT__VX_Context_one; - VVortex_VX_context_slave TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__5__KET____DOT__VX_Context_one; - VVortex_VX_context_slave TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__6__KET____DOT__VX_Context_one; - VVortex_VX_context_slave TOP__Vortex__DOT__vx_decode__DOT__genblk1__BRA__7__KET____DOT__VX_Context_one; + VVortex_VX_mem_req_inter TOP__Vortex__DOT__VX_exe_mem_req; + VVortex_VX_frE_to_bckE_req_inter TOP__Vortex__DOT__VX_frE_to_bckE_req; + VVortex_VX_inst_mem_wb_inter TOP__Vortex__DOT__VX_mem_wb; + VVortex_VX_warp_ctl_inter TOP__Vortex__DOT__VX_warp_ctl; + VVortex_VX_wb_inter TOP__Vortex__DOT__VX_writeback_inter; + VVortex_VX_inst_meta_inter TOP__Vortex__DOT__fe_inst_meta_fd; + VVortex_VX_context_slave TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one; + VVortex_VX_context_slave TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__VX_Context_one; + VVortex_VX_context_slave TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__VX_Context_one; + VVortex_VX_context_slave TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__VX_Context_one; + VVortex_VX_context_slave TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__VX_Context_one; + VVortex_VX_context_slave TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__VX_Context_one; + VVortex_VX_context_slave TOP__Vortex__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one; // CREATORS VVortex__Syms(VVortex* topp, const char* namep); @@ -40,4 +53,4 @@ class VVortex__Syms : public VerilatedSyms { } VL_ATTR_ALIGNED(64); -#endif // guard +#endif // guard diff --git a/rtl/obj_dir/VVortex___024unit.h b/rtl/obj_dir/VVortex___024unit.h index 122640fe..d374ef45 100644 --- a/rtl/obj_dir/VVortex___024unit.h +++ b/rtl/obj_dir/VVortex___024unit.h @@ -39,7 +39,7 @@ VL_MODULE(VVortex___024unit) { // INTERNAL METHODS void __Vconfigure(VVortex__Syms* symsp, bool first); private: - void _ctor_var_reset(); + void _ctor_var_reset() VL_ATTR_COLD; } VL_ATTR_ALIGNED(128); #endif // guard diff --git a/rtl/obj_dir/VVortex__ver.d b/rtl/obj_dir/VVortex__ver.d index b55bf511..fa8d641a 100644 --- a/rtl/obj_dir/VVortex__ver.d +++ b/rtl/obj_dir/VVortex__ver.d @@ -1 +1 @@ -obj_dir/VVortex.cpp obj_dir/VVortex.h obj_dir/VVortex.mk obj_dir/VVortex_VX_context_slave.cpp obj_dir/VVortex_VX_context_slave.h obj_dir/VVortex__Syms.cpp obj_dir/VVortex__Syms.h obj_dir/VVortex___024unit.cpp obj_dir/VVortex___024unit.h obj_dir/VVortex__ver.d obj_dir/VVortex_classes.mk : /usr/local/Cellar/verilator/4.010/bin/verilator_bin /usr/local/Cellar/verilator/4.010/bin/verilator_bin VX_alu.v VX_context.v VX_context_slave.v VX_csr_handler.v VX_d_e_reg.v VX_decode.v VX_define.v VX_e_m_reg.v VX_execute.v VX_f_d_reg.v VX_fetch.v VX_forwarding.v VX_m_w_reg.v VX_memory.v VX_register_file.v VX_register_file_master_slave.v VX_register_file_slave.v VX_warp.v VX_writeback.v Vortex.v buses.vh +obj_dir/VVortex.cpp obj_dir/VVortex.h obj_dir/VVortex.mk obj_dir/VVortex_VX_context_slave.cpp obj_dir/VVortex_VX_context_slave.h obj_dir/VVortex_VX_frE_to_bckE_req_inter.cpp obj_dir/VVortex_VX_frE_to_bckE_req_inter.h obj_dir/VVortex_VX_inst_mem_wb_inter.cpp obj_dir/VVortex_VX_inst_mem_wb_inter.h obj_dir/VVortex_VX_inst_meta_inter.cpp obj_dir/VVortex_VX_inst_meta_inter.h obj_dir/VVortex_VX_mem_req_inter.cpp obj_dir/VVortex_VX_mem_req_inter.h obj_dir/VVortex_VX_warp_ctl_inter.cpp obj_dir/VVortex_VX_warp_ctl_inter.h obj_dir/VVortex_VX_wb_inter.cpp obj_dir/VVortex_VX_wb_inter.h obj_dir/VVortex__Syms.cpp obj_dir/VVortex__Syms.h obj_dir/VVortex___024unit.cpp obj_dir/VVortex___024unit.h obj_dir/VVortex__ver.d obj_dir/VVortex_classes.mk : /usr/local/bin/verilator_bin /usr/local/bin/verilator_bin VX_alu.v VX_context.v VX_context_slave.v VX_csr_handler.v VX_d_e_reg.v VX_decode.v VX_define.v VX_e_m_reg.v VX_execute.v VX_f_d_reg.v VX_fetch.v VX_forwarding.v VX_generic_register.v VX_m_w_reg.v VX_memory.v VX_register_file.v VX_register_file_master_slave.v VX_register_file_slave.v VX_warp.v VX_writeback.v Vortex.v buses.vh interfaces//VX_frE_to_bckE_req_inter.v interfaces//VX_inst_mem_wb_inter.v interfaces//VX_inst_meta_inter.v interfaces//VX_mem_req_inter.v interfaces//VX_warp_ctl_inter.v interfaces//VX_wb_inter.v diff --git a/rtl/obj_dir/VVortex__verFiles.dat b/rtl/obj_dir/VVortex__verFiles.dat index b0a7bfbd..24d56c27 100644 --- a/rtl/obj_dir/VVortex__verFiles.dat +++ b/rtl/obj_dir/VVortex__verFiles.dat @@ -1,36 +1,55 @@ # DESCRIPTION: Verilator output: Timestamp data for --skip-identical. Delete at will. -C "-Wall -cc Vortex.v --exe test_bench.cpp -CFLAGS -std=c++11" -S 4608404 12889046060 1553037052 0 1548678579 0 "/usr/local/Cellar/verilator/4.010/bin/verilator_bin" +C "--compiler gcc -Wall -cc Vortex.v -Iinterfaces/ --exe test_bench.cpp -CFLAGS -std=c++11" +S 6746612 12892413243 1567548409 0 1567548409 0 "/usr/local/bin/verilator_bin" S 2785 1565236 1567474434 0 1567474434 0 "VX_alu.v" -S 3553 1565237 1567474434 0 1567474434 0 "VX_context.v" -S 4995 1565238 1567474434 0 1567474434 0 "VX_context_slave.v" +S 3553 1572595 1567702966 0 1567702966 0 "VX_context.v" +S 4995 1572594 1567702948 0 1567702948 0 "VX_context_slave.v" S 1699 1565239 1567474434 0 1567474434 0 "VX_csr_handler.v" -S 5512 1565240 1567474434 0 1567474434 0 "VX_d_e_reg.v" -S 17808 1565241 1567474434 0 1567474434 0 "VX_decode.v" +S 6179 1572602 1567698562 0 1567698562 0 "VX_d_e_reg.v" +S 18559 1572589 1567703138 0 1567703138 0 "VX_decode.v" S 1676 1565244 1567474434 0 1567474434 0 "VX_define.v" -S 4267 1565245 1567474434 0 1567474434 0 "VX_e_m_reg.v" -S 3692 1565246 1567474434 0 1567474434 0 "VX_execute.v" -S 2537 1567951 1567541896 0 1567541896 0 "VX_f_d_reg.v" -S 6742 1567193 1567540852 0 1567540852 0 "VX_fetch.v" -S 6293 1565249 1567474434 0 1567474434 0 "VX_forwarding.v" -S 1866 1565250 1567474434 0 1567474434 0 "VX_m_w_reg.v" -S 4352 1565251 1567474434 0 1567474434 0 "VX_memory.v" -S 1249 1565252 1567474434 0 1567474434 0 "VX_register_file.v" -S 1655 1565253 1567474434 0 1567474434 0 "VX_register_file_master_slave.v" -S 1599 1565254 1567474434 0 1567474434 0 "VX_register_file_slave.v" +S 1782 1572383 1567725862 0 1567725862 0 "VX_e_m_reg.v" +S 3753 1572381 1567704198 0 1567704198 0 "VX_execute.v" +S 776 1572788 1567631138 0 1567631138 0 "VX_f_d_reg.v" +S 6600 1571625 1567568548 0 1567568548 0 "VX_fetch.v" +S 6318 1572489 1567703920 0 1567703920 0 "VX_forwarding.v" +S 399 1565278 1567537322 0 1567537322 0 "VX_generic_register.v" +S 1038 1572397 1567725842 0 1567725842 0 "VX_m_w_reg.v" +S 2441 1572393 1567725910 0 1567725910 0 "VX_memory.v" +S 1249 1572596 1567702894 0 1567702894 0 "VX_register_file.v" +S 1655 1572598 1567702916 0 1567702916 0 "VX_register_file_master_slave.v" +S 1599 1572597 1567702888 0 1567702888 0 "VX_register_file_slave.v" S 1915 1565256 1567474434 0 1567474434 0 "VX_warp.v" -S 1568 1565257 1567474434 0 1567474434 0 "VX_writeback.v" -S 19239 1565260 1567539986 0 1567539986 0 "Vortex.v" -S 1335 1565265 1567540424 0 1567540424 0 "buses.vh" -T 937657 1568790 1567541908 0 1567541908 0 "obj_dir/VVortex.cpp" -T 33938 1568786 1567541908 0 1567541908 0 "obj_dir/VVortex.h" -T 1814 1568896 1567541908 0 1567541908 0 "obj_dir/VVortex.mk" -T 597541 1568856 1567541908 0 1567541908 0 "obj_dir/VVortex_VX_context_slave.cpp" -T 19362 1568854 1567541908 0 1567541908 0 "obj_dir/VVortex_VX_context_slave.h" -T 3699 1568785 1567541908 0 1567541908 0 "obj_dir/VVortex__Syms.cpp" -T 1578 1568784 1567541908 0 1567541908 0 "obj_dir/VVortex__Syms.h" -T 754 1568852 1567541908 0 1567541908 0 "obj_dir/VVortex___024unit.cpp" -T 860 1568851 1567541908 0 1567541908 0 "obj_dir/VVortex___024unit.h" -T 702 1569200 1567541908 0 1567541908 0 "obj_dir/VVortex__ver.d" -T 0 0 1567541908 0 1567541908 0 "obj_dir/VVortex__verFiles.dat" -T 1208 1568895 1567541908 0 1567541908 0 "obj_dir/VVortex_classes.mk" +S 1368 1572593 1567702438 0 1567702438 0 "VX_writeback.v" +S 9956 1572384 1567726302 0 1567726302 0 "Vortex.v" +S 1356 1571954 1567552292 0 1567552292 0 "buses.vh" +S 1689 1571958 1567565366 0 1567565366 0 "interfaces//VX_frE_to_bckE_req_inter.v" +S 789 1572399 1567724612 0 1567724612 0 "interfaces//VX_inst_mem_wb_inter.v" +S 444 1571666 1567552516 0 1567552516 0 "interfaces//VX_inst_meta_inter.v" +S 995 1572568 1567701364 0 1567701364 0 "interfaces//VX_mem_req_inter.v" +S 603 1571976 1567568452 0 1567568452 0 "interfaces//VX_warp_ctl_inter.v" +S 450 1572588 1567702406 0 1567702406 0 "interfaces//VX_wb_inter.v" +T 611319 1572409 1567726304 0 1567726304 0 "obj_dir/VVortex.cpp" +T 20930 1572391 1567726304 0 1567726304 0 "obj_dir/VVortex.h" +T 1791 1572466 1567726304 0 1567726304 0 "obj_dir/VVortex.mk" +T 218860 1572451 1567726304 0 1567726304 0 "obj_dir/VVortex_VX_context_slave.cpp" +T 4606 1572450 1567726304 0 1567726304 0 "obj_dir/VVortex_VX_context_slave.h" +T 1131 1572441 1567726304 0 1567726304 0 "obj_dir/VVortex_VX_frE_to_bckE_req_inter.cpp" +T 1208 1572440 1567726304 0 1567726304 0 "obj_dir/VVortex_VX_frE_to_bckE_req_inter.h" +T 882 1572445 1567726304 0 1567726304 0 "obj_dir/VVortex_VX_inst_mem_wb_inter.cpp" +T 1008 1572444 1567726304 0 1567726304 0 "obj_dir/VVortex_VX_inst_mem_wb_inter.h" +T 863 1572402 1567726304 0 1567726304 0 "obj_dir/VVortex_VX_inst_meta_inter.cpp" +T 987 1572401 1567726304 0 1567726304 0 "obj_dir/VVortex_VX_inst_meta_inter.h" +T 883 1572443 1567726304 0 1567726304 0 "obj_dir/VVortex_VX_mem_req_inter.cpp" +T 1005 1572442 1567726304 0 1567726304 0 "obj_dir/VVortex_VX_mem_req_inter.h" +T 900 1572447 1567726304 0 1567726304 0 "obj_dir/VVortex_VX_warp_ctl_inter.cpp" +T 1017 1572446 1567726304 0 1567726304 0 "obj_dir/VVortex_VX_warp_ctl_inter.h" +T 819 1572449 1567726304 0 1567726304 0 "obj_dir/VVortex_VX_wb_inter.cpp" +T 954 1572448 1567726304 0 1567726304 0 "obj_dir/VVortex_VX_wb_inter.h" +T 5392 1572390 1567726304 0 1567726304 0 "obj_dir/VVortex__Syms.cpp" +T 2283 1572389 1567726304 0 1567726304 0 "obj_dir/VVortex__Syms.h" +T 754 1572398 1567726304 0 1567726304 0 "obj_dir/VVortex___024unit.cpp" +T 873 1572396 1567726304 0 1567726304 0 "obj_dir/VVortex___024unit.h" +T 1324 1572474 1567726304 0 1567726304 0 "obj_dir/VVortex__ver.d" +T 0 0 1567726304 0 1567726304 0 "obj_dir/VVortex__verFiles.dat" +T 1472 1572465 1567726304 0 1567726304 0 "obj_dir/VVortex_classes.mk" diff --git a/rtl/obj_dir/VVortex_classes.mk b/rtl/obj_dir/VVortex_classes.mk index 0395f715..e8ea438c 100644 --- a/rtl/obj_dir/VVortex_classes.mk +++ b/rtl/obj_dir/VVortex_classes.mk @@ -11,12 +11,20 @@ VM_COVERAGE = 0 VM_THREADS = 0 # Tracing output mode? 0/1 (from --trace) VM_TRACE = 0 +# Tracing threadeds output mode? 0/1 (from --trace-fst-thread) +VM_TRACE_THREADED = 0 ### Object file lists... # Generated module classes, fast-path, compile with highest optimization VM_CLASSES_FAST += \ VVortex \ VVortex___024unit \ + VVortex_VX_inst_meta_inter \ + VVortex_VX_frE_to_bckE_req_inter \ + VVortex_VX_mem_req_inter \ + VVortex_VX_inst_mem_wb_inter \ + VVortex_VX_warp_ctl_inter \ + VVortex_VX_wb_inter \ VVortex_VX_context_slave \ # Generated module classes, non-fast-path, compile with low/medium optimization diff --git a/rtl/obj_dir/test_bench.d b/rtl/obj_dir/test_bench.d index b918f78f..e70b646c 100644 --- a/rtl/obj_dir/test_bench.d +++ b/rtl/obj_dir/test_bench.d @@ -1,4 +1,3 @@ test_bench.o: ../test_bench.cpp ../test_bench.h ../VX_define.h ../ram.h \ - VVortex.h \ - /usr/local/Cellar/verilator/4.010/share/verilator/include/verilated.h \ - /usr/local/Cellar/verilator/4.010/share/verilator/include/verilatedos.h + VVortex.h /usr/local/share/verilator/include/verilated.h \ + /usr/local/share/verilator/include/verilatedos.h diff --git a/rtl/obj_dir/test_bench.o b/rtl/obj_dir/test_bench.o index 9ebfaef9..46517178 100644 Binary files a/rtl/obj_dir/test_bench.o and b/rtl/obj_dir/test_bench.o differ diff --git a/rtl/obj_dir/verilated.d b/rtl/obj_dir/verilated.d index 8fb42837..4f8241f8 100644 --- a/rtl/obj_dir/verilated.d +++ b/rtl/obj_dir/verilated.d @@ -1,9 +1,8 @@ -verilated.o: \ - /usr/local/Cellar/verilator/4.010/share/verilator/include/verilated.cpp \ - /usr/local/Cellar/verilator/4.010/share/verilator/include/verilatedos.h \ - /usr/local/Cellar/verilator/4.010/share/verilator/include/verilated_imp.h \ - /usr/local/Cellar/verilator/4.010/share/verilator/include/verilated.h \ - /usr/local/Cellar/verilator/4.010/share/verilator/include/verilated_heavy.h \ - /usr/local/Cellar/verilator/4.010/share/verilator/include/verilated_syms.h \ - /usr/local/Cellar/verilator/4.010/share/verilator/include/verilated_sym_props.h \ - /usr/local/Cellar/verilator/4.010/share/verilator/include/verilated_config.h +verilated.o: /usr/local/share/verilator/include/verilated.cpp \ + /usr/local/share/verilator/include/verilatedos.h \ + /usr/local/share/verilator/include/verilated_imp.h \ + /usr/local/share/verilator/include/verilated.h \ + /usr/local/share/verilator/include/verilated_heavy.h \ + /usr/local/share/verilator/include/verilated_syms.h \ + /usr/local/share/verilator/include/verilated_sym_props.h \ + /usr/local/share/verilator/include/verilated_config.h diff --git a/rtl/obj_dir/verilated.o b/rtl/obj_dir/verilated.o index b1f8abbd..92fbcd84 100644 Binary files a/rtl/obj_dir/verilated.o and b/rtl/obj_dir/verilated.o differ diff --git a/rtl/results.txt b/rtl/results.txt index caa523d8..49b8ea20 100644 --- a/rtl/results.txt +++ b/rtl/results.txt @@ -3,5 +3,5 @@ # of forwarding stalls: 0 # of branch stalls: 0 # CPI: 1.01056 -# time to simulate: 6.95312e-310 milliseconds +# time to simulate: 2.19224e-314 milliseconds # GRADE: Failed on test: 4294967295 diff --git a/rtl/test_bench.h b/rtl/test_bench.h index 3256cf67..3491d7be 100644 --- a/rtl/test_bench.h +++ b/rtl/test_bench.h @@ -355,9 +355,10 @@ bool Vortex::simulate(std::string file_to_simulate) // unsigned cycles; counter = 0; while (this->stop && ((counter < 5))) + // while (this->stats_total_cycles <= 30) { - // std::cout << "************* Cycle: " << cycle << "\n"; + // std::cout << "************* Cycle: " << (this->stats_total_cycles) << "\n"; istop = ibus_driver(); // dstop = !dbus_driver();