Commit Graph

57 Commits

Author SHA1 Message Date
Blaise Tine
b02fc14da6 fill invalifator fix + refactoring 2020-05-21 20:38:55 -07:00
Blaise Tine
3c8620e770 minor update 2020-05-21 14:51:56 -04:00
Blaise Tine
cf22ef2bf3 minor update 2020-05-21 13:42:08 -04:00
felsabbagh3
7e091b53f8 Added valid_table in scheduler and removed rename_table on reset 2020-05-20 23:02:41 -07:00
Blaise Tine
7e5fed3ec1 Merge branch 'fpga_synthesis' of https://github.gatech.edu/casl/Vortex into fpga_synthesis 2020-05-20 18:27:20 -04:00
Blaise Tine
72d54c749c fixed cache msrq reset logic 2020-05-20 18:11:31 -04:00
Blaise Tine
e1b4862f85 minor update 2020-05-20 14:14:29 -07:00
Blaise Tine
cefd0d85af rtl refactoring 2020-05-20 16:59:14 -04:00
Blaise Tine
b5569dd525 OPAE rtl fixes 2020-05-20 12:08:10 -07:00
Blaise Tine
e269909db9 opae rtl fixes 2020-05-19 13:47:47 -07:00
Blaise Tine
0c88da2bfb opae rtl fixes 2020-05-18 20:19:02 -07:00
Blaise Tine
11ace25f27 opae rtl fixes 2020-05-17 20:29:42 -07:00
felsabbagh3
26f9fc96c3 Corner case where the pipeline is stalled, makes mrvq entereis valid, but when unstalled mrvq_init isn't set up correctly 2020-05-16 21:20:57 -07:00
felsabbagh3
101de6b138 mrvq update ready + init ready as 1 in same cycle causing incorrect ready state 2020-05-16 18:52:30 -07:00
felsabbagh3
e2741f9cdb Force miss_add init ready to 1 when core req matches with mrvq entry, regardless of hit/miss 2020-05-16 16:26:26 -07:00
Blaise Tine
d6c87dbb0a added debug print states or rtl 2020-05-16 14:19:17 -04:00
Blaise Tine
65c2da76cf snooping response handling fix 2020-05-14 23:34:52 -04:00
Blaise Tine
57a037b2f4 snooping response handling fix 2020-05-14 23:06:15 -04:00
Blaise Tine
d623ef4029 snooping response handling fix 2020-05-14 23:05:46 -04:00
Blaise Tine
bcb9514799 snooping response handling fix 2020-05-14 11:01:41 -04:00
felsabbagh3
ff140b6811 Added an initial ready state to an mrvq entry that might be set to 1 2020-05-12 21:47:51 -07:00
felsabbagh3
5b2624046e Avoid snoop deadlock whith snoops. Adds mrvq not almost full for snrq pop 2020-05-12 21:30:17 -07:00
felsabbagh3
b08b80156d Added pending request check. This applies when 1) mrvq entery is valid/ready but not head, then a core request hits 2) snoop when pending write. A pending miss request is either a valid entry in mrvq OR a miss entery in st2 2020-05-12 21:25:13 -07:00
Blaise Tine
b0b38f6c24 snooping response handling fix 2020-05-12 18:52:24 -04:00
Blaise Tine
fcf3800d5d snooping response handling fix 2020-05-12 13:35:18 -04:00
Blaise Tine
c49f01b769 snooping response handling 2020-05-11 22:55:44 -04:00
Blaise Tine
b6c4aa0baa rtl refactoring 2020-05-10 09:52:38 -04:00
Blaise Tine
cc84e0691c multicore fix 2020-05-10 08:30:04 -04:00
Blaise Tine
359601cfd3 OPAE rtl fixes 2020-05-08 13:16:44 -07:00
Blaise Tine
c2e9240b7d OPAE rtl fixes 2020-05-08 08:28:28 -07:00
Blaise Tine
13dfd5c8c7 rtl multicore fix 2020-05-07 02:20:12 -04:00
Blaise Tine
de9fc68ccc opae fixes 2020-05-06 21:14:53 -07:00
Blaise Tine
59cc0d5be9 rtl multicore fix 2020-05-06 13:33:16 -04:00
Blaise Tine
330bbc4f56 rtl gpr multicore fix 2020-05-06 09:05:10 -04:00
Blaise Tine
b7e892ee16 rtl refactoring 2020-05-05 10:46:48 -04:00
Blaise Tine
f142afac80 rtl refactoring 2020-05-04 20:12:05 -04:00
Blaise Tine
69f607b73e rtl refactoring 2020-05-03 17:10:02 -04:00
Blaise Tine
a1dc90b951 rtl cache refactory 2020-04-30 17:12:18 -04:00
Blaise Tine
3e64cb4380 minor update 2020-04-21 22:24:05 -04:00
Blaise Tine
24c81c4a3a merge 2020-04-21 12:32:46 -07:00
Blaise Tine
f53256f854 quartus projects 2020-04-21 12:28:37 -07:00
Blaise Tine
43d8922f64 minor update 2020-04-21 15:21:59 -04:00
Blaise Tine
d85c0af5d6 remove tab spaces 2020-04-21 03:19:47 -04:00
Blaise Tine
20ae78f434 fix simX build 2020-04-21 01:31:32 -04:00
Blaise Tine
ba4e736782 RTL code refactoring 2020-04-21 01:03:37 -04:00
Blaise Tine
d79e36912f fix opae build 2020-04-20 12:51:42 -07:00
Blaise Tine
b76f8696bd removing *.vh file for opae build 2020-04-20 15:07:27 -04:00
Blaise Tine
8e7046a388 RTL code refactoring 2020-04-20 14:05:08 -04:00
Blaise Tine
1a2823da0d RTL code refactoring 2020-04-20 13:52:24 -04:00
Blaise Tine
a0e15af0dc RTL code refactoring 2020-04-20 13:01:42 -04:00