Files
kernels/hw/syn/quartus/project.sdc
Blaise Tine 31b3e380dc minor update
2021-02-15 09:23:40 -08:00

4 lines
124 B
Tcl

create_clock -name {clk} -period "220 MHz" [get_ports {clk}]
derive_pll_clocks -create_base_clocks
derive_clock_uncertainty