19 lines
373 B
Verilog
19 lines
373 B
Verilog
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`include "../VX_define.v"
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`ifndef VX_DCACHE_REQ
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`define VX_DCACHE_REQ
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interface VX_dcache_request_inter ();
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wire[31:0] out_cache_driver_in_address[`NT_M1:0];
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wire[2:0] out_cache_driver_in_mem_read;
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wire[2:0] out_cache_driver_in_mem_write;
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wire out_cache_driver_in_valid[`NT_M1:0];
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wire[31:0] out_cache_driver_in_data[`NT_M1:0];
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endinterface
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`endif |