d47cccc157
+ Microarchitecture optimizations + 64-bit support + Xilinx FPGA support + LLVM-16 support + Refactoring and quality control fixes
40 lines
1.3 KiB
Systemverilog
40 lines
1.3 KiB
Systemverilog
// Copyright © 2019-2023
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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`ifndef VORTEX_AFU_VH
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`define VORTEX_AFU_VH
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`define AFU_ACCEL_NAME "vortex_afu"
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`define AFU_ACCEL_UUID 128'h35F9452B_25C2_434C_93D5_6F8C60DB361C
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`define AFU_IMAGE_CMD_MEM_READ 1
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`define AFU_IMAGE_CMD_MEM_WRITE 2
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`define AFU_IMAGE_CMD_RUN 3
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`define AFU_IMAGE_CMD_DCR_WRITE 4
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`define AFU_IMAGE_CMD_MAX_VALUE 4
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`define AFU_IMAGE_MMIO_CMD_TYPE 10
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`define AFU_IMAGE_MMIO_CMD_ARG0 12
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`define AFU_IMAGE_MMIO_CMD_ARG1 14
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`define AFU_IMAGE_MMIO_CMD_ARG2 16
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`define AFU_IMAGE_MMIO_STATUS 18
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`define AFU_IMAGE_MMIO_SCOPE_READ 20
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`define AFU_IMAGE_MMIO_SCOPE_WRITE 22
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`define AFU_IMAGE_MMIO_DEV_CAPS 24
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`define AFU_IMAGE_MMIO_ISA_CAPS 26
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`define AFU_IMAGE_POWER 0
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`define AFU_TOP_IFC "ccip_std_afu_avalon_mm"
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`endif // VORTEX_AFU_VH
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