107 lines
3.5 KiB
Verilog
107 lines
3.5 KiB
Verilog
`include "VX_define.vh"
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module VX_gpu_unit #(
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parameter CORE_ID = 0
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) (
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`SCOPE_IO_VX_gpu_unit
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input wire clk,
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input wire reset,
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// Input
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VX_gpu_req_if gpu_req_if,
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// Output
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VX_warp_ctl_if warp_ctl_if,
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VX_exu_to_cmt_if gpu_commit_if
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);
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`UNUSED_VAR (clk)
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`UNUSED_VAR (reset)
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gpu_tmc_t tmc;
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gpu_wspawn_t wspawn;
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gpu_barrier_t barrier;
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gpu_split_t split;
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wire is_wspawn = (gpu_req_if.op_type == `GPU_WSPAWN);
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wire is_tmc = (gpu_req_if.op_type == `GPU_TMC);
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wire is_split = (gpu_req_if.op_type == `GPU_SPLIT);
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wire is_bar = (gpu_req_if.op_type == `GPU_BAR);
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// tmc
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wire [`NUM_THREADS-1:0] tmc_new_mask;
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for (genvar i = 0; i < `NUM_THREADS; i++) begin
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assign tmc_new_mask[i] = (i < gpu_req_if.rs1_data[0]);
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end
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assign tmc.valid = is_tmc;
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assign tmc.tmask = tmc_new_mask;
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// wspawn
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wire [31:0] wspawn_pc = gpu_req_if.rs2_data;
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wire [`NUM_WARPS-1:0] wspawn_wmask;
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for (genvar i = 0; i < `NUM_WARPS; i++) begin
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assign wspawn_wmask[i] = (i < gpu_req_if.rs1_data[0]);
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end
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assign wspawn.valid = is_wspawn;
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assign wspawn.wmask = wspawn_wmask;
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assign wspawn.pc = wspawn_pc;
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// split
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wire [`NUM_THREADS-1:0] split_then_mask;
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wire [`NUM_THREADS-1:0] split_else_mask;
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for (genvar i = 0; i < `NUM_THREADS; i++) begin
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wire taken = gpu_req_if.rs1_data[i][0];
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assign split_then_mask[i] = gpu_req_if.tmask[i] & taken;
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assign split_else_mask[i] = gpu_req_if.tmask[i] & ~taken;
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end
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assign split.valid = is_split;
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assign split.diverged = (| split_then_mask) && (| split_else_mask);
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assign split.then_mask = split_then_mask;
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assign split.else_mask = split_else_mask;
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assign split.pc = gpu_req_if.next_PC;
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// barrier
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assign barrier.valid = is_bar;
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assign barrier.id = gpu_req_if.rs1_data[0][`NB_BITS-1:0];
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assign barrier.size_m1 = (`NW_BITS)'(gpu_req_if.rs2_data - 1);
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// output
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assign warp_ctl_if.valid = gpu_req_if.valid && gpu_commit_if.ready;
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assign warp_ctl_if.wid = gpu_commit_if.wid;
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assign warp_ctl_if.tmc = tmc;
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assign warp_ctl_if.wspawn = wspawn;
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assign warp_ctl_if.split = split;
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assign warp_ctl_if.barrier = barrier;
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assign gpu_commit_if.valid = gpu_req_if.valid;
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assign gpu_commit_if.wid = gpu_req_if.wid;
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assign gpu_commit_if.tmask = gpu_req_if.tmask;
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assign gpu_commit_if.PC = gpu_req_if.PC;
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assign gpu_commit_if.rd = gpu_req_if.rd;
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assign gpu_commit_if.wb = gpu_req_if.wb;
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// can accept new request?
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assign gpu_req_if.ready = gpu_commit_if.ready;
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`SCOPE_ASSIGN (scope_gpu_req_valid, gpu_req_if.valid);
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`SCOPE_ASSIGN (scope_gpu_req_wid, gpu_req_if.wid);
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`SCOPE_ASSIGN (scope_gpu_req_tmask, gpu_req_if.tmask);
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`SCOPE_ASSIGN (scope_gpu_req_op_type, gpu_req_if.op_type);
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`SCOPE_ASSIGN (scope_gpu_req_rs1, gpu_req_if.rs1_data[0]);
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`SCOPE_ASSIGN (scope_gpu_req_rs2, gpu_req_if.rs2_data);
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`SCOPE_ASSIGN (scope_gpu_req_ready, gpu_req_if.ready);
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`SCOPE_ASSIGN (scope_gpu_rsp_valid, warp_ctl_if.valid);
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`SCOPE_ASSIGN (scope_gpu_rsp_wid, warp_ctl_if.wid);
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`SCOPE_ASSIGN (scope_gpu_rsp_tmc, warp_ctl_if.tmc);
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`SCOPE_ASSIGN (scope_gpu_rsp_wspawn, warp_ctl_if.wspawn);
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`SCOPE_ASSIGN (scope_gpu_rsp_split, warp_ctl_if.split);
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`SCOPE_ASSIGN (scope_gpu_rsp_barrier, warp_ctl_if.barrier);
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endmodule |