44 lines
4.6 KiB
Plaintext
44 lines
4.6 KiB
Plaintext
# DESCRIPTION: Verilator output: Timestamp data for --skip-identical. Delete at will.
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C "--compiler gcc -cc cache_simX.v -I. -I../rtl/shared_memory -I../rtl/cache -I../rtl/interfaces -Isimulate -I../rtl --exe simX.cpp args.cpp mem.cpp core.cpp instruction.cpp enc.cpp util.cpp -CFLAGS -std=c++11 -fPIC -O3 -Wno-UNOPTFLAT -Wno-WIDTH --trace -DVL_DEBUG=1"
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S 26 4200738 1579395713 628434579 1579395713 628434579 "../rtl/./VX_define_synth.v"
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S 283 4200733 1579395713 624434332 1579395713 624434332 "../rtl/VX_countones.v"
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S 7240 4200737 1579395713 628434579 1579395713 628434579 "../rtl/VX_define.v"
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S 8325 4200739 1579395713 628434579 1579395713 628434579 "../rtl/VX_dmem_controller.v"
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S 517 4200743 1579395713 628434579 1579395713 628434579 "../rtl/VX_generic_priority_encoder.v"
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S 683 4200754 1579395713 628434579 1579395713 628434579 "../rtl/VX_priority_encoder_w_mask.v"
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S 8590 4200764 1579395713 628434579 1579395713 628434579 "../rtl/cache/VX_Cache_Bank.v"
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S 748 4200765 1579395713 628434579 1579395713 628434579 "../rtl/cache/VX_cache_bank_valid.v"
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S 7349 4200766 1579395713 628434579 1579395713 628434579 "../rtl/cache/VX_cache_data.v"
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S 6476 4200767 1579395713 628434579 1579395713 628434579 "../rtl/cache/VX_cache_data_per_index.v"
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S 14645 4200768 1579395713 628434579 1579395713 628434579 "../rtl/cache/VX_d_cache.v"
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S 393 4200780 1579395713 628434579 1579395713 628434579 "../rtl/interfaces/VX_dcache_request_inter.v"
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S 215 4200781 1579395713 628434579 1579395713 628434579 "../rtl/interfaces/VX_dcache_response_inter.v"
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S 870 4200782 1579395713 628434579 1579395713 628434579 "../rtl/interfaces/VX_dram_req_rsp_inter.v"
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S 354 4200791 1579395713 628434579 1579395713 628434579 "../rtl/interfaces/VX_icache_request_inter.v"
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S 212 4200792 1579395713 628434579 1579395713 628434579 "../rtl/interfaces/VX_icache_response_inter.v"
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S 7240 4200737 1579395713 628434579 1579395713 628434579 "../rtl/shared_memory/../VX_define.v"
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S 676 4200836 1579395713 632434826 1579395713 632434826 "../rtl/shared_memory/VX_bank_valids.v"
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S 3038 4200837 1579395713 632434826 1579395713 632434826 "../rtl/shared_memory/VX_priority_encoder_sm.v"
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S 4962 4200838 1579395713 632434826 1579395713 632434826 "../rtl/shared_memory/VX_shared_memory.v"
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S 3207 4200839 1579395713 632434826 1579395713 632434826 "../rtl/shared_memory/VX_shared_memory_block.v"
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S 5279832 2492902 1578745602 593855204 1519110675 0 "/usr/bin/verilator_bin"
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S 3144 4201058 1579395714 588493892 1579395714 588493892 "cache_simX.v"
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T 606556 4194579 1579629057 329619018 1579629057 329619018 "obj_dir/Vcache_simX.cpp"
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T 31121 4194577 1579629057 321619018 1579629057 321619018 "obj_dir/Vcache_simX.h"
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T 2305 4196430 1579629057 341619018 1579629057 341619018 "obj_dir/Vcache_simX.mk"
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T 539818 4194597 1579629057 341619018 1579629057 341619018 "obj_dir/Vcache_simX_VX_Cache_Bank__pi8.cpp"
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T 19062 4194595 1579629057 329619018 1579629057 329619018 "obj_dir/Vcache_simX_VX_Cache_Bank__pi8.h"
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T 1024 4194591 1579629057 329619018 1579629057 329619018 "obj_dir/Vcache_simX_VX_dcache_request_inter.cpp"
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T 1561 4194589 1579629057 329619018 1579629057 329619018 "obj_dir/Vcache_simX_VX_dcache_request_inter.h"
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T 999 4194587 1579629057 329619018 1579629057 329619018 "obj_dir/Vcache_simX_VX_dram_req_rsp_inter__N1_NB4.cpp"
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T 1556 4194585 1579629057 329619018 1579629057 329619018 "obj_dir/Vcache_simX_VX_dram_req_rsp_inter__N1_NB4.h"
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T 999 4194583 1579629057 329619018 1579629057 329619018 "obj_dir/Vcache_simX_VX_dram_req_rsp_inter__N4_NB4.cpp"
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T 1557 4194581 1579629057 329619018 1579629057 329619018 "obj_dir/Vcache_simX_VX_dram_req_rsp_inter__N4_NB4.h"
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T 3807 4194517 1579629057 293619017 1579629057 293619017 "obj_dir/Vcache_simX__Syms.cpp"
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T 1918 4194514 1579629057 293619017 1579629057 293619017 "obj_dir/Vcache_simX__Syms.h"
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T 704422 4194575 1579629057 317619018 1579629057 317619018 "obj_dir/Vcache_simX__Trace.cpp"
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T 921157 4194573 1579629057 309619018 1579629057 309619018 "obj_dir/Vcache_simX__Trace__Slow.cpp"
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T 1461 4196431 1579629057 341619018 1579629057 341619018 "obj_dir/Vcache_simX__ver.d"
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T 0 0 1579629057 341619018 1579629057 341619018 "obj_dir/Vcache_simX__verFiles.dat"
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T 1403 4196429 1579629057 341619018 1579629057 341619018 "obj_dir/Vcache_simX_classes.mk"
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