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kernels/hw/rtl/libs/VX_mux.v
2021-08-12 01:55:52 -07:00

21 lines
460 B
Verilog

`include "VX_platform.vh"
`TRACING_OFF
module VX_mux #(
parameter DATAW = 1,
parameter N = 1,
parameter LN = $clog2(N)
) (
input wire [N-1:0][DATAW-1:0] data_in,
input wire [LN-1:0] sel_in,
output wire [DATAW-1:0] data_out
);
if (N > 1) begin
assign data_out = data_in[sel_in];
end else begin
`UNUSED_VAR (sel_in)
assign data_out = data_in;
end
endmodule
`TRACING_ON