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cc0fb0eece8be0d37db6941cf65594a7c3e04f84
kernels/rtl
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felsabbagh3 cc0fb0eece better use of valid signal
2019-03-27 00:07:59 -04:00
..
obj_dir
better use of valid signal
2019-03-27 00:07:59 -04:00
Makefile
better use of valid signal
2019-03-27 00:07:59 -04:00
ram.h
Passing Most tests
2019-03-21 23:47:48 -04:00
results.txt
better use of valid signal
2019-03-27 00:07:59 -04:00
test_bench.cpp
Restructure
2019-03-22 04:14:52 -04:00
test_bench.h
better use of valid signal
2019-03-27 00:07:59 -04:00
Vortex.v
better use of valid signal
2019-03-27 00:07:59 -04:00
VX_alu.v
Packing data wires + ALU module
2019-03-26 19:17:11 -04:00
VX_csr_handler.v
Passing Most tests
2019-03-21 23:47:48 -04:00
VX_d_e_reg.v
Packing data wires + ALU module
2019-03-26 19:17:11 -04:00
VX_decode.v
better use of valid signal
2019-03-27 00:07:59 -04:00
VX_define.h
Passing Most tests
2019-03-21 23:47:48 -04:00
VX_define.v
Added support for MUL/DIV (Passes all tests)
2019-03-22 03:54:59 -04:00
VX_e_m_reg.v
Packing data wires + ALU module
2019-03-26 19:17:11 -04:00
VX_execute.v
Packing data wires + ALU module
2019-03-26 19:17:11 -04:00
VX_f_d_reg.v
rtl passing all tests
2019-03-22 02:44:53 -04:00
VX_fetch.v
rtl passing all tests
2019-03-22 02:44:53 -04:00
VX_forwarding.v
rtl passing all tests
2019-03-22 02:44:53 -04:00
VX_m_w_reg.v
Passing Most tests
2019-03-21 23:47:48 -04:00
VX_memory.v
better use of valid signal
2019-03-27 00:07:59 -04:00
VX_register_file.v
better use of valid signal
2019-03-27 00:07:59 -04:00
VX_writeback.v
rtl passing all tests
2019-03-22 02:44:53 -04:00