Lingjun Zhu d164ebfbc6 Added log file of synthesis, too many registers are removed

2019-10-17 14:25:54 -04:00

..

191017.log

added log file

2019-10-17 14:00:22 -04:00

dc.log

Added log file of synthesis, too many registers are removed

2019-10-17 14:25:54 -04:00

syn.tcl

Fixed the issues of memory during synthesis

2019-10-17 14:18:52 -04:00