d47cccc157
+ Microarchitecture optimizations + 64-bit support + Xilinx FPGA support + LLVM-16 support + Refactoring and quality control fixes
55 lines
1.2 KiB
C++
55 lines
1.2 KiB
C++
// Copyright © 2019-2023
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#pragma once
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#include <simobject.h>
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#include "types.h"
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namespace vortex {
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class MemSim : public SimObject<MemSim>{
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public:
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struct Config {
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uint32_t channels;
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uint32_t num_cores;
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};
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struct PerfStats {
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uint64_t reads;
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uint64_t writes;
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PerfStats()
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: reads(0)
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, writes(0)
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{}
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};
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SimPort<MemReq> MemReqPort;
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SimPort<MemRsp> MemRspPort;
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MemSim(const SimContext& ctx, const char* name, const Config& config);
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~MemSim();
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void reset();
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void tick();
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const PerfStats& perf_stats() const;
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private:
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class Impl;
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Impl* impl_;
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};
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}; |